US20070109013A1 - Method for outputting internal temperature data in semiconductor memory device and circuit of outputting internal temperature data thereby - Google Patents
Method for outputting internal temperature data in semiconductor memory device and circuit of outputting internal temperature data thereby Download PDFInfo
- Publication number
- US20070109013A1 US20070109013A1 US11/566,670 US56667006A US2007109013A1 US 20070109013 A1 US20070109013 A1 US 20070109013A1 US 56667006 A US56667006 A US 56667006A US 2007109013 A1 US2007109013 A1 US 2007109013A1
- Authority
- US
- United States
- Prior art keywords
- temperature data
- internal temperature
- data
- temperature sensor
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K7/00—Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
- G01K7/42—Circuits effecting compensation of thermal inertia; Circuits for predicting the stationary value of a temperature
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40626—Temperature related aspects of refresh operations
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
- G11C7/1069—I/O lines read out arrangements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/22—Control and timing of internal memory operations
- G11C2207/2227—Standby or low power modes
Definitions
- the present invention relates to temperature sensing to be applied in a semiconductor memory device, and more particularly, to a method for outputting internal temperature data in a volatile semiconductor memory device such as Dynamic Random Access Memory (DRAM) and a circuit for outputting the internal temperature data thereby.
- DRAM Dynamic Random Access Memory
- the data retention characteristics of the memory cell in the DRAM comprising one transistor and one storage capacitor are very sensitive to temperature.
- the memory cell can be controlled suitably according to its temperature characteristics, this can be useful in saving power.
- An approach to realize such power saving by installing a temperature sensor in the semiconductor memory device such as the DRAM and differentiating a refresh cycle according to the temperature of a chip is well known in this art.
- FIG. 1 illustrates a circuit 100 of a temperature sensor to be installed in a semiconductor memory device.
- the temperature sensor is a semiconductor temperature sensor of a band gap reference type basically comprising a current mirror-type differential amplifier and a diode, which is well known in this art.
- Currents flowing in branches C and A of the temperature sensor have temperature-current characteristics as shown in FIG. 2 .
- the horizontal axis indicates temperature and the vertical axis indicates current.
- the characteristic graphs of the branches C and A intersect at trip point TI.
- the temperature sensor as described above is very sensitive to a noise environment, and thus the deviation of the temperature data as output according to the operation modes of the semiconductor memory device may be great. Consequently, there are problems in that accuracy of the obtained temperature data is lowered and reliability of the temperature data is also lowered accordingly.
- FIG. 3 illustrates temperature data output timing according to the conventional art.
- the temperature data obtained according to various operation modes of the DRAM may have differences. That is, if the external command is applied when the DRAM performs an operation of reading the data, it is difficult for the temperature sensor to sense the present temperature data in a sufficiently stable state, and it may output deviated temperature data due to the noise environment. Consequently, the reliability of the internal temperature data as obtained is lowered, and power consumption is increased since the temperature sensor is in the continuously or periodically operating state. Moreover, since an output access time of the temperature data is indicated as access section TA of FIG. 3 , there is a problem in that the time for the chip-set to obtain the temperature data becomes somewhat long.
- the present invention is directed to provide a semiconductor memory device to solve the aforementioned conventional problems.
- One aspect of the present invention is a method for outputting internal temperature data in a semiconductor memory device which can provide a temperature sensor onboard in the semiconductor memory device with a stable operation environment, and a circuit for outputting the internal temperature data thereby.
- Another aspect of the present invention is a method for outputting internal temperature data in a semiconductor memory device which can reliably obtain temperature data of a chip, without continuously or periodically operating a temperature sensor.
- Another aspect of the present invention is a method for outputting internal temperature data in a semiconductor memory device which can output relatively accurate temperature data at high speed, without continuously or periodically operating a temperature sensor, and a circuit for outputting the internal temperature data thereby.
- Another aspect of the present invention is a method for outputting temperature data so as to obtain more reliable temperature data within a shorter time, minimizing or reducing power consumed in a temperature sensor onboard in the DRAM.
- a method for outputting internal temperature data comprises externally outputting the internal temperature data stored in a register during a preceding driving cycle in response to a temperature data request signal; driving a temperature sensor during a predefined time section after the output of the internal temperature data is completed, and storing, in the register, the internal temperature data obtained from the temperature sensor.
- the temperature data request signal may be an expansion mode register set (EMRS) command as provided in an external memory controller connected to the semiconductor memory device
- the temperature sensor may be a semiconductor temperature sensor of a band gap reference type.
- the predefined time section is below about 5 microseconds, and the internal temperature data can be output by a data output buffer which is in an inactive state in a preceding data access operation mode.
- FIG. 1 illustrates a circuit configuration of a conventional temperature sensor
- FIG. 2 is a graph showing output characteristics of the circuit of FIG. 1 ;
- FIG. 3 illustrates temperature data output timing according to the conventional art
- FIG. 4 illustrates temperature data output timing according to a first embodiment of the present invention
- FIG. 5 illustrates temperature data output timing according to a second embodiment of the present invention
- FIG. 6 is a block diagram of an exemplary circuit as applied to realize the embodiments of the present invention.
- FIG. 7 illustrates the operation timing of FIG. 6 .
- FIG. 4 illustrates temperature data output timing according to a first embodiment of the present invention.
- FIG. 4 shows a timing relation in which internal temperature data of a semiconductor memory device is externally output when an external request signal, e.g., an expansion mode register set (EMRS) command, is applied while the semiconductor memory device is not in a data access mode and a temperature sensor is in an inactive state; that is, it is not continuously or periodically activated.
- an external request signal e.g., an expansion mode register set (EMRS) command
- EMRS expansion mode register set
- a section TE of a waveform EMRS is an active section of the EMRS command
- a section OT of a sensor operation waveform TS is an operation section of sensing a temperature by the temperature sensor.
- the time for externally outputting the internal temperature data obtained from the temperature sensor is represented as an access section or interval TA I of a waveform TS_RD.
- the method for outputting the internal temperature data according to the first embodiment has advantages of reducing power consumption and enabling the external output of the relatively accurate temperature data.
- this method may be disadvantageous if this method is applied to a semiconductor memory device having a very high speed operation since the access time of the temperature data becomes relatively longer.
- FIG. 5 illustrates temperature data output timing according to the second embodiment of the present invention.
- the transition section of a waveform TS_RD is different from that of FIG. 4 .
- the access time is shortened, compared to the case of the first embodiment.
- a method of outputting internal temperature data of a semiconductor memory device is preceded by the following steps. When a temperature data request signal is applied by a command of the EMRS, in response to this signal, the internal temperature data stored in a register during a preceding driving cycle is output externally.
- a temperature sensor is driven during a predefined time section or interval OT. For example, during the time section OT as defined below about 5 microseconds, the internal temperature data obtained from the temperature sensor is stored in the register. In this case, if the internal temperature data is already stored in the register, this means that data is updated after a second storing operation.
- a temperature of a memory chip changes less than 0.5° C, within 10 milliseconds, and thus there is no problem in the operating stability if the temperature sensor is operated at a random time within the time section below 10 milliseconds.
- FIG. 6 illustrates a block diagram of an exemplary circuit as applied to realize the embodiments of the present invention and FIG. 7 illustrates operation timing of FIG. 6 .
- FIG. 6 shows a semiconductor memory device 20 connected to a CPU 10 through various signal lines.
- a circuit for outputting internal temperature data in the semiconductor memory device 20 comprises a plurality of circuit blocks 21 - 28 .
- An EMRS outputs a master command signal Master-MRS in response to an external command signal EMRS.
- a sensor driving portion 22 receives the master command signal Master-MRS as output by an EMRS 21 and generates a driving signal Ptenb.
- FIG. 7 it is shown that the state of the driving signal Ptenb is being transmitted from a high level to a low level when the master command signal Master-MRS is transmitted from “low” to “high”.
- the duration of applying the external command signal by the EMRS 21 defines the state in which the semiconductor memory device 20 does not perform a data accessing operation.
- a sensing operation of the temperature sensor is stably ensured.
- the timing signals Command, DQ ⁇ 0:3> shown in FIG. 7 will be explained after the operation of the temperature sensor 23 is explained.
- the temperature sensor 23 senses an internal temperature of the device 20 only when the driving signal Ptenb is in a first state (for instance, during five ⁇ seconds, e.g., at a low level in FIG. 7 ), thereby generating the internal temperature data OUT.
- the internal temperature data as output from the temperature sensor 23 is stored in a register update portion 24 including a register. As shown in FIG.
- the operation of the temperature sensor 23 is in a stop state when the driving signal Ptenb is maintained in a second state (e.g., at a high level) by a transition of the external command signal.
- the register update portion 24 updates the temperature data OUT that is output from the temperature sensor 23 and stored in the internal. Accordingly, the internal temperature data as output by the temperature sensor 23 is updated and stored in the register.
- the new updated internal temperature data Tdata is applied to the data output buffer 25 .
- the internal temperature data is output by the data output buffer 25 which is in an inactive state in a preceding data access operation mode.
- the internal temperature data Tdata is read out as data DQ ⁇ 0:3> through the data output buffer 25 .
- the data DQ ⁇ 0:3> is internal temperature data that has been stored and updated in the previous data access operation mode. That is, the internal temperature data sensed during the current operation cycle is first stored in the data output buffer that is not served in outputting normal data, and then is read out into the external side of memory devices in response to a command signal instructing to read the temperature data during an operation cycle.
- the output operation of the internal temperature data as shown in FIG. 7 means outputting in the current operation cycle the internal temperature data that already stored in the previous operation cycle.
- the output lines of the command decoder 26 and EMRS 21 block shown in FIG. 6 are connected to the data output buffer 25 to control the output operation of the internal temperature data. Accordingly, the data output buffer that was in an inactive state in the previous data access operation mode is activated by the command signal Command and the master command signal Master-MRS that are generated in response to the external command signal EMRS, thereby performing the output of the internal temperature data.
- FIG. 7 shows the operation timing of the circuit of FIG. 6 as described above.
- a self-cycle controlling portion 27 and a self-oscillator 28 can be provided to control a self-refresh cycle.
- an example of the prior art in which the refresh of semiconductor memory is controlled according to a temperature by applying the EMRS command, is disclosed in U.S. Patent Publication No. 2003/0056057 published Mar. 20, 2003 in the U.S.A., which will be referred to for the application of the EMRS command.
- the external CPU connected to the memory device or the EMRS command provided in the memory controller serves as the example of the temperature data request signal.
- other logic signals can of course be utilized for different cases.
- the semiconductor temperature sensor of the band gap reference type is mentioned but other temperature sensors are usable.
- the access time of the temperature data is reduced by reading-out the temperature data into the external output pin by the output buffer at the random time when the temperature sensor is in the OFF state, and the temperature data of the chip can be accurately output in the environment having almost no noise effect by activating the temperature sensor when the device is not performing any refreshing operation or a data-reading or writing operation.
- the technique of the present invention has the advantage of being more suitably applied to the mobile oriented memory requiring the low power characteristics.
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Abstract
A method for outputting internal temperature data in a semiconductor memory device can output, at high speed, relatively accurate temperature data externally, without continuously or periodically driving a temperature sensor. The method for outputting the internal temperature data comprises externally outputting internal temperature data stored in a register in a preceding driving cycle in response to a temperature data request signal; driving a temperature sensor during a predefined time section after the output of the internal temperature data is completed; and storing the internal temperature data obtained from the temperature sensor in the register. Power consumption is reduced and accurate temperature data is output externally within a shorter time.
Description
- This application is a continuation-in-part of co-pending U.S. patent application Ser. No. 11/335,036, filed 18 Jan. 2006, which claims priority from Korean Patent Application No. 10-2005-0005277, filed Jan. 20, 2005, the contents of which are hereby incorporated by reference in their entirety.
- 1. Technical Field
- The present invention relates to temperature sensing to be applied in a semiconductor memory device, and more particularly, to a method for outputting internal temperature data in a volatile semiconductor memory device such as Dynamic Random Access Memory (DRAM) and a circuit for outputting the internal temperature data thereby.
- 2. Discussion of Related Art
- Generally, for high-efficiency electronic systems such as personal computers or electronic communication machinery, volatile semiconductor memory devices such as DRAM onboard as memory have become faster and more highly integrated. In case of semiconductor memory devices onboard in battery-operated systems such as mobile phones or laptop computers, the low power consumption characteristics are critically required. Therefore, semiconductor manufacturers have continuously worked to reduce the operating current and standby current in order to provide a mobile oriented low power solution.
- The data retention characteristics of the memory cell in the DRAM comprising one transistor and one storage capacitor are very sensitive to temperature. Thus, if the memory cell can be controlled suitably according to its temperature characteristics, this can be useful in saving power. An approach to realize such power saving by installing a temperature sensor in the semiconductor memory device such as the DRAM and differentiating a refresh cycle according to the temperature of a chip is well known in this art.
-
FIG. 1 illustrates acircuit 100 of a temperature sensor to be installed in a semiconductor memory device. The temperature sensor is a semiconductor temperature sensor of a band gap reference type basically comprising a current mirror-type differential amplifier and a diode, which is well known in this art. Currents flowing in branches C and A of the temperature sensor have temperature-current characteristics as shown inFIG. 2 . InFIG. 2 , the horizontal axis indicates temperature and the vertical axis indicates current. The characteristic graphs of the branches C and A intersect at trip point TI. - However, the temperature sensor as described above is very sensitive to a noise environment, and thus the deviation of the temperature data as output according to the operation modes of the semiconductor memory device may be great. Consequently, there are problems in that accuracy of the obtained temperature data is lowered and reliability of the temperature data is also lowered accordingly.
- In practice, an attempt has been made to transfer the temperature of the DRAM chip into a chip-set such as a CPU or memory controller so that the chip-set controls various operations of the DRAM, for example, a refreshing operation. In such a case, the temperature sensor is continuously or periodically activated to perform a temperature sensing operation. When an external command is applied like a waveform (Command) in
FIG. 3 while the temperature sensor is periodically operating, internal temperature data is read-out in the DRAM until a transition of a waveform (TS-RD) occurs.FIG. 3 illustrates temperature data output timing according to the conventional art. - When the internal temperature data of the DRAM chip is obtained by the manner shown in
FIG. 3 , the temperature data obtained according to various operation modes of the DRAM may have differences. That is, if the external command is applied when the DRAM performs an operation of reading the data, it is difficult for the temperature sensor to sense the present temperature data in a sufficiently stable state, and it may output deviated temperature data due to the noise environment. Consequently, the reliability of the internal temperature data as obtained is lowered, and power consumption is increased since the temperature sensor is in the continuously or periodically operating state. Moreover, since an output access time of the temperature data is indicated as access section TA ofFIG. 3 , there is a problem in that the time for the chip-set to obtain the temperature data becomes somewhat long. - In order to obtain accurate temperature data, it is preferable to ensure that the environment is without any noise, during which the temperature sensor can perform the temperature sensing operation in a sufficiently stable state, for more than the time for responding to the sensing of the temperature sensor. Thus, measures to make it possible to obtain more reliable temperature data within a shorter time, without damaging/interrupting the performance of the semiconductor memory device, are required in the battery-operated systems.
- Therefore, the present invention is directed to provide a semiconductor memory device to solve the aforementioned conventional problems.
- One aspect of the present invention is a method for outputting internal temperature data in a semiconductor memory device which can provide a temperature sensor onboard in the semiconductor memory device with a stable operation environment, and a circuit for outputting the internal temperature data thereby.
- Another aspect of the present invention is a method for outputting internal temperature data in a semiconductor memory device which can reliably obtain temperature data of a chip, without continuously or periodically operating a temperature sensor.
- Another aspect of the present invention is a method for outputting internal temperature data in a semiconductor memory device which can output relatively accurate temperature data at high speed, without continuously or periodically operating a temperature sensor, and a circuit for outputting the internal temperature data thereby.
- Another aspect of the present invention is a method for outputting temperature data so as to obtain more reliable temperature data within a shorter time, minimizing or reducing power consumed in a temperature sensor onboard in the DRAM.
- In accordance with exemplary embodiments of some of the aforementioned aspects, a method for outputting internal temperature data comprises externally outputting the internal temperature data stored in a register during a preceding driving cycle in response to a temperature data request signal; driving a temperature sensor during a predefined time section after the output of the internal temperature data is completed, and storing, in the register, the internal temperature data obtained from the temperature sensor.
- Preferably, the temperature data request signal may be an expansion mode register set (EMRS) command as provided in an external memory controller connected to the semiconductor memory device, and the temperature sensor may be a semiconductor temperature sensor of a band gap reference type.
- Further, it may be suitable that the predefined time section is below about 5 microseconds, and the internal temperature data can be output by a data output buffer which is in an inactive state in a preceding data access operation mode.
- According to the method for outputting the temperature data, power consumption can be reduced and relatively accurate temperature data can be externally output within a shorter time.
- The above and other features and advantages of the present invention will become more apparent to those of ordinary skill in the art by describing in detail preferred embodiments thereof with reference to the attached drawings in which:
-
FIG. 1 illustrates a circuit configuration of a conventional temperature sensor; -
FIG. 2 is a graph showing output characteristics of the circuit ofFIG. 1 ; -
FIG. 3 illustrates temperature data output timing according to the conventional art; -
FIG. 4 illustrates temperature data output timing according to a first embodiment of the present invention; -
FIG. 5 illustrates temperature data output timing according to a second embodiment of the present invention; -
FIG. 6 is a block diagram of an exemplary circuit as applied to realize the embodiments of the present invention; and -
FIG. 7 illustrates the operation timing ofFIG. 6 . - The foregoing and other objects, features and advantages of the present invention will be more apparent from the preferred embodiments described in detail hereinafter, with reference to the accompanying drawings. However, the invention should not be construed as limited to only the embodiments set forth herein. Rather, these embodiments are presented as teaching examples. It should be noted that in the drawings, the same or similar portions are indicated using the same or similar reference numbers for the convenience of explanation and understanding.
-
FIG. 4 illustrates temperature data output timing according to a first embodiment of the present invention.FIG. 4 shows a timing relation in which internal temperature data of a semiconductor memory device is externally output when an external request signal, e.g., an expansion mode register set (EMRS) command, is applied while the semiconductor memory device is not in a data access mode and a temperature sensor is in an inactive state; that is, it is not continuously or periodically activated. InFIG. 4 , a section TE of a waveform EMRS is an active section of the EMRS command, and a section OT of a sensor operation waveform TS is an operation section of sensing a temperature by the temperature sensor. Thus, the time for externally outputting the internal temperature data obtained from the temperature sensor is represented as an access section or interval TA I of a waveform TS_RD. - Differently from the manner in
FIG. 3 , the method for outputting the internal temperature data according to the first embodiment has advantages of reducing power consumption and enabling the external output of the relatively accurate temperature data. However, it may be disadvantageous if this method is applied to a semiconductor memory device having a very high speed operation since the access time of the temperature data becomes relatively longer. - Below is described a second embodiment which is able to greatly shorten the access time of the first embodiment, with reference to drawings.
FIG. 5 illustrates temperature data output timing according to the second embodiment of the present invention. With reference toFIG. 5 , it can be seen that the transition section of a waveform TS_RD is different from that ofFIG. 4 . As indicated by an access section TA2, the access time is shortened, compared to the case of the first embodiment. In the second embodiment, a method of outputting internal temperature data of a semiconductor memory device is preceded by the following steps. When a temperature data request signal is applied by a command of the EMRS, in response to this signal, the internal temperature data stored in a register during a preceding driving cycle is output externally. After the output of the internal temperature data is completed, a temperature sensor is driven during a predefined time section or interval OT. For example, during the time section OT as defined below about 5 microseconds, the internal temperature data obtained from the temperature sensor is stored in the register. In this case, if the internal temperature data is already stored in the register, this means that data is updated after a second storing operation. In general, it is known that a temperature of a memory chip changes less than 0.5° C, within 10 milliseconds, and thus there is no problem in the operating stability if the temperature sensor is operated at a random time within the time section below 10 milliseconds. -
FIG. 6 illustrates a block diagram of an exemplary circuit as applied to realize the embodiments of the present invention andFIG. 7 illustrates operation timing ofFIG. 6 . -
FIG. 6 shows asemiconductor memory device 20 connected to aCPU 10 through various signal lines. A circuit for outputting internal temperature data in thesemiconductor memory device 20 comprises a plurality of circuit blocks 21-28. An EMRS outputs a master command signal Master-MRS in response to an external command signal EMRS. Asensor driving portion 22 receives the master command signal Master-MRS as output by anEMRS 21 and generates a driving signal Ptenb. InFIG. 7 , it is shown that the state of the driving signal Ptenb is being transmitted from a high level to a low level when the master command signal Master-MRS is transmitted from “low” to “high”. Herein, the duration of applying the external command signal by theEMRS 21 defines the state in which thesemiconductor memory device 20 does not perform a data accessing operation. Thus, a sensing operation of the temperature sensor is stably ensured. The timing signals Command, DQ<0:3> shown inFIG. 7 will be explained after the operation of thetemperature sensor 23 is explained. Thetemperature sensor 23 senses an internal temperature of thedevice 20 only when the driving signal Ptenb is in a first state (for instance, during five μ seconds, e.g., at a low level inFIG. 7 ), thereby generating the internal temperature data OUT. The internal temperature data as output from thetemperature sensor 23 is stored in aregister update portion 24 including a register. As shown inFIG. 7 , the operation of thetemperature sensor 23 is in a stop state when the driving signal Ptenb is maintained in a second state (e.g., at a high level) by a transition of the external command signal. Ultimately, when thetemperature sensor 23 operates during a predetermined time and is again switched to the stop state by the second state of the driving signal Ptenb after the external command signal EMRS is applied, theregister update portion 24 updates the temperature data OUT that is output from thetemperature sensor 23 and stored in the internal. Accordingly, the internal temperature data as output by thetemperature sensor 23 is updated and stored in the register. The new updated internal temperature data Tdata is applied to thedata output buffer 25. Herein, it is preferable that the internal temperature data is output by thedata output buffer 25 which is in an inactive state in a preceding data access operation mode. - Now referring to the timing signals Command, DQ<0:3> shown in
FIG. 7 , when the command signal Command is transmitted to “high” after the external command signal EMRS is applied to thememory device 20, the internal temperature data Tdata, not normal data read out by memory cells, is read out as data DQ<0:3> through thedata output buffer 25. Herein, the data DQ<0:3> is internal temperature data that has been stored and updated in the previous data access operation mode. That is, the internal temperature data sensed during the current operation cycle is first stored in the data output buffer that is not served in outputting normal data, and then is read out into the external side of memory devices in response to a command signal instructing to read the temperature data during an operation cycle. Ultimately, the output operation of the internal temperature data as shown inFIG. 7 means outputting in the current operation cycle the internal temperature data that already stored in the previous operation cycle. The output lines of thecommand decoder 26 andEMRS 21 block shown inFIG. 6 are connected to thedata output buffer 25 to control the output operation of the internal temperature data. Accordingly, the data output buffer that was in an inactive state in the previous data access operation mode is activated by the command signal Command and the master command signal Master-MRS that are generated in response to the external command signal EMRS, thereby performing the output of the internal temperature data.FIG. 7 shows the operation timing of the circuit ofFIG. 6 as described above. - In the circuit of
FIG. 6 , a self-cycle controlling portion 27 and a self-oscillator 28 can be provided to control a self-refresh cycle. In addition, an example of the prior art, in which the refresh of semiconductor memory is controlled according to a temperature by applying the EMRS command, is disclosed in U.S. Patent Publication No. 2003/0056057 published Mar. 20, 2003 in the U.S.A., which will be referred to for the application of the EMRS command. In the embodiments, the external CPU connected to the memory device or the EMRS command provided in the memory controller serves as the example of the temperature data request signal. However, other logic signals can of course be utilized for different cases. Further, as the example of the temperature sensor, the semiconductor temperature sensor of the band gap reference type is mentioned but other temperature sensors are usable. - Consequently, the access time of the temperature data is reduced by reading-out the temperature data into the external output pin by the output buffer at the random time when the temperature sensor is in the OFF state, and the temperature data of the chip can be accurately output in the environment having almost no noise effect by activating the temperature sensor when the device is not performing any refreshing operation or a data-reading or writing operation.
- As described above, according to the present invention, power consumption can be reduced and accurate temperature data can be externally output within shorter time. Therefore, the technique of the present invention has the advantage of being more suitably applied to the mobile oriented memory requiring the low power characteristics.
- A person skilled in this art can understand that the concepts described herein may be applied to specific applicable examples in various ways. The specific configuration of the operation timing or circuits as described above indicates some of the embodiments of the present invention, and a more efficient method available to the circuit designers in the art may be possible. Thus, the specific realization thereof should belong to the present invention and be within the scope of the claims.
- The present invention has been described using preferred exemplary embodiments. However, it is to be understood that the scope of the invention is not limited to the disclosed embodiments. On the contrary, the scope of the invention is intended to include various modifications and alternative arrangements within the capabilities of persons skilled in the art using presently known or future technologies and equivalents. The scope of the claims, therefore, should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
Claims (13)
1. A method for outputting internal temperature data of a semiconductor memory device, comprising:
driving a temperature sensor during a predefined time section in response to an external request signal as applied in case of a non-data access mode; and
externally outputting in response to an external temperature data request signal internal temperature data as obtained from the temperature sensor.
2. The method according to claim 1 , wherein the external request signal is an expansion mode register set (EMRS) command as provided in an external memory controller connected to the semiconductor memory device.
3. The method according to claim 1 , wherein the temperature sensor is a semiconductor temperature sensor in a band gap reference type.
4. The method according to claim 1 , wherein the predefined time section is below about 5 microseconds.
5. The method according to claim 1 , wherein the internal temperature data is output by a data output buffer, the data output buffer being in an inactive state in a preceding data access operation mode.
6. The method according to claim 1 , including storing the internal temperature data during the non-data access mode and externally outputting the stored internal temperature data during a data access operation mode.
7. A method for outputting internal temperature data of a semiconductor memory device, comprising:
externally outputting internal temperature data as stored in a register during a preceding driving cycle in response to a temperature data request signal;
driving a temperature sensor during a predefined time section after the output of the internal temperature data is completed; and
storing the internal temperature data as obtained from the temperature sensor in the register.
8. The method according to claim 7 , wherein the temperature data request signal is an expansion mode register set (EMRS) command as provided in an external memory controller connected to the semiconductor memory device.
9. The method according to claim 7 , wherein the temperature sensor is a semiconductor temperature sensor in a band gap reference type.
10. The method according to claim 7 , wherein the predefined time section is below about 5 microseconds.
11. The method according to claim 7 , wherein the internal temperature data is output by a data output buffer, the data output buffer being in an inactive state in a preceding data access operation mode.
12. An internal temperature data output circuit of a semiconductor memory device comprising:
a sensor driving portion for receiving an external command signal and generating a driving signal;
a temperature sensor for sensing an internal temperature of the semiconductor memory device and generating internal temperature data only when the driving signal is in a first state;
a register for storing the internal temperature data generated from the temperature sensor; and
a temperature data output controlling portion for controlling the internal temperature data as stored in the register to be externally output while maintaining the driving signal in a second state in response to the external command signal, and for storing the internal temperature data as output by the temperature sensor to be updated in the register while maintaining the driving signal that was in the first state in the second state after the internal temperature data is externally output.
13. The circuit according to claim 11 , further comprising a circuit block for changing a refreshing operation cycle of the semiconductor memory device according to an internal temperature change of the device, the circuit block being connected to the temperature data output controlling portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/566,670 US20070109013A1 (en) | 2005-01-20 | 2006-12-04 | Method for outputting internal temperature data in semiconductor memory device and circuit of outputting internal temperature data thereby |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020050005277A KR100655076B1 (en) | 2005-01-20 | 2005-01-20 | Internal temperature data output method of semiconductor memory device and corresponding internal temperature data output circuit |
| KR2005-0005277 | 2005-01-20 | ||
| US11/335,036 US7594750B2 (en) | 2005-01-20 | 2006-01-18 | Method for outputting internal temperature data in semiconductor memory device and circuit of outputting internal temperature date thereby |
| US11/566,670 US20070109013A1 (en) | 2005-01-20 | 2006-12-04 | Method for outputting internal temperature data in semiconductor memory device and circuit of outputting internal temperature data thereby |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US11/335,036 Continuation-In-Part US7594750B2 (en) | 2005-01-20 | 2006-01-18 | Method for outputting internal temperature data in semiconductor memory device and circuit of outputting internal temperature date thereby |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| US20070109013A1 true US20070109013A1 (en) | 2007-05-17 |
Family
ID=36683843
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US11/335,036 Expired - Fee Related US7594750B2 (en) | 2005-01-20 | 2006-01-18 | Method for outputting internal temperature data in semiconductor memory device and circuit of outputting internal temperature date thereby |
| US11/566,670 Abandoned US20070109013A1 (en) | 2005-01-20 | 2006-12-04 | Method for outputting internal temperature data in semiconductor memory device and circuit of outputting internal temperature data thereby |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US11/335,036 Expired - Fee Related US7594750B2 (en) | 2005-01-20 | 2006-01-18 | Method for outputting internal temperature data in semiconductor memory device and circuit of outputting internal temperature date thereby |
Country Status (2)
| Country | Link |
|---|---|
| US (2) | US7594750B2 (en) |
| KR (1) | KR100655076B1 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080082291A1 (en) * | 2006-09-28 | 2008-04-03 | Hynix Semiconductor Inc. | On die thermal sensor |
| US20090037778A1 (en) * | 2007-07-30 | 2009-02-05 | Micron Technology, Inc. | Devices, methods, and apparatuses for detection, sensing, and reporting functionality for semiconductor memory |
| US20160092130A1 (en) * | 2014-09-30 | 2016-03-31 | Kyung-eun CHOI | Memory device, memory system, and method of controlling memory device |
| US10489316B1 (en) | 2018-06-04 | 2019-11-26 | Micron Technology, Inc. | Methods for performing multiple memory operations in response to a single command and memory devices and systems employing the same |
| WO2020101975A1 (en) * | 2018-11-15 | 2020-05-22 | Micron Technology, Inc. | Temperature-based memory management |
Families Citing this family (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100655076B1 (en) * | 2005-01-20 | 2006-12-08 | 삼성전자주식회사 | Internal temperature data output method of semiconductor memory device and corresponding internal temperature data output circuit |
| US7471583B2 (en) * | 2005-09-29 | 2008-12-30 | Hynix Semiconductor Inc. | Memory device with self refresh cycle control function |
| US7441949B2 (en) * | 2005-12-16 | 2008-10-28 | Micron Technology, Inc. | System and method for providing temperature data from a memory device having a temperature sensor |
| US7590473B2 (en) * | 2006-02-16 | 2009-09-15 | Intel Corporation | Thermal management using an on-die thermal sensor |
| US7272063B1 (en) * | 2006-03-21 | 2007-09-18 | Infineon Technologies Ag | Memory with a temperature sensor, dynamic memory and memory with a clock unit and method of sensing a temperature of a memory |
| KR100719181B1 (en) | 2006-04-03 | 2007-05-18 | 주식회사 하이닉스반도체 | Semiconductor memory device including temperature sensing device and driving method thereof |
| JP4949013B2 (en) | 2006-04-03 | 2012-06-06 | ハイニックス セミコンダクター インク | Semiconductor memory device having temperature sensing device and driving method thereof |
| US8272781B2 (en) * | 2006-08-01 | 2012-09-25 | Intel Corporation | Dynamic power control of a memory device thermal sensor |
| US7721120B2 (en) * | 2006-09-07 | 2010-05-18 | Hewlett-Packard Development Company, L.P. | Controlling fan speed in electronic system |
| KR100807594B1 (en) * | 2006-09-28 | 2008-02-28 | 주식회사 하이닉스반도체 | Temperature information output device and semiconductor device having same |
| KR100810061B1 (en) | 2006-11-02 | 2008-03-05 | 주식회사 하이닉스반도체 | Temperature information output device and internal temperature measuring method of semiconductor memory device |
| KR100834403B1 (en) * | 2007-01-03 | 2008-06-04 | 주식회사 하이닉스반도체 | A memory device and a self-refresh period control signal generating method for performing a stable self-refresh operation |
| KR100892723B1 (en) * | 2007-11-19 | 2009-04-10 | 주식회사 하이닉스반도체 | Digital temperature information generator of semiconductor integrated circuit |
| KR100919814B1 (en) | 2008-04-28 | 2009-10-01 | 주식회사 하이닉스반도체 | Thermal code output circuit and semiconductor memory device |
| TWI401697B (en) * | 2009-01-14 | 2013-07-11 | Novatek Microelectronics Corp | Method of dynamically adjusting a timing value of a circuit system and circuit system |
| US8180500B2 (en) * | 2009-07-29 | 2012-05-15 | Nanya Technology Corp. | Temperature sensing system and related temperature sensing method |
| US8942056B2 (en) * | 2011-02-23 | 2015-01-27 | Rambus Inc. | Protocol for memory power-mode control |
| US8787105B2 (en) * | 2012-05-10 | 2014-07-22 | Nanya Technology Corporation | Dynamic random access memory with multiple thermal sensors disposed therein and control method thereof |
| JP2014081688A (en) * | 2012-10-12 | 2014-05-08 | Canon Inc | Information processing device and method of controlling the same; and program thereof and storage medium |
| WO2014123081A1 (en) * | 2013-02-08 | 2014-08-14 | ピーエスフォー ルクスコ エスエイアールエル | Semiconductor device |
| US9336855B2 (en) * | 2013-05-14 | 2016-05-10 | Qualcomm Incorporated | Methods and systems for smart refresh of dynamic random access memory |
| KR20150051471A (en) * | 2013-11-04 | 2015-05-13 | 에스케이하이닉스 주식회사 | Semiconductor device and method of driving the same |
| US9875785B2 (en) * | 2015-10-01 | 2018-01-23 | Qualcomm Incorporated | Refresh timer synchronization between memory controller and memory |
| US10067689B1 (en) | 2016-08-29 | 2018-09-04 | Cadence Design Systems, Inc. | Method and apparatus for high bandwidth memory read and write data path training |
| US9881664B1 (en) | 2017-01-12 | 2018-01-30 | Cadence Design Systems, Inc. | Per-group delay line architecture to de-skew input/output timing between a high bandwidth memory (HBM) physical (PHY) interface and the HBM device |
| TWI656803B (en) * | 2017-11-17 | 2019-04-11 | 財團法人工業技術研究院 | Network sensing device and power consumption control method thereof |
| US10297311B1 (en) | 2018-01-30 | 2019-05-21 | Cadence Design Systems, Inc. | Systems and methods for memory protocol training |
| CN113707203B (en) * | 2021-08-12 | 2024-08-02 | 长江存储科技有限责任公司 | Temperature value output control circuit, temperature value output control method and electronic system |
Citations (42)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5159520A (en) * | 1990-08-03 | 1992-10-27 | Sharp Kabushiki Kaisha | Semiconductor integrated circuit having function of preventing rise of surface temperature |
| US5296777A (en) * | 1987-02-03 | 1994-03-22 | Kabushiki Kaisha Toshiba | Ultrasonic probe |
| US5796290A (en) * | 1995-10-26 | 1998-08-18 | Nec Corporation | Temperature detection method and circuit using MOSFET |
| US5926777A (en) * | 1997-10-14 | 1999-07-20 | Nematron Corporation | Method and apparatus for monitoring computer system service life parameters |
| US20020080673A1 (en) * | 2000-08-29 | 2002-06-27 | Alexander Benedix | Semiconductor configuration with optimized refresh cycle |
| US20020167296A1 (en) * | 2001-05-11 | 2002-11-14 | Toyota Jidosha Kabushiki Kaisha | Refresh charge control device and method |
| US20020191467A1 (en) * | 2001-06-15 | 2002-12-19 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device |
| US20030056057A1 (en) * | 2001-09-19 | 2003-03-20 | Lawrence Richard H. | System and method for power reduction of memory |
| US20030058016A1 (en) * | 2001-09-21 | 2003-03-27 | Seiko Epson Corporation | Operation control according to temperature variation in integrated circuit |
| US20030086476A1 (en) * | 2001-11-08 | 2003-05-08 | Masaru Mizuta | Temperature sensor circuit having trimming function |
| US6631503B2 (en) * | 2001-01-05 | 2003-10-07 | Ibm Corporation | Temperature programmable timing delay system |
| US6751144B2 (en) * | 1999-12-03 | 2004-06-15 | Nec Electronics Corporation | Semiconductor storage and method for testing the same |
| US6756856B2 (en) * | 2001-05-31 | 2004-06-29 | Samsung Electronics Co., Ltd. | Clock generation circuits and integrated circuit memory devices for controlling a clock period based on temperature and methods for using the same |
| US6765836B2 (en) * | 2002-09-10 | 2004-07-20 | Infineon Technologies Ag | Semiconductor memory with a clock synchronization device having a temperature controlled delay circuit |
| US6768693B2 (en) * | 2002-02-15 | 2004-07-27 | Infineon Technologies Ag | Integrated dynamic memory with control circuit for controlling a refresh mode of memory cells, and method for driving the memory |
| US20050146965A1 (en) * | 2003-12-23 | 2005-07-07 | Soo-Young Kim | Semiconductor memory device having internal circuits responsive to temperature data and method thereof |
| US7003273B1 (en) * | 1999-06-22 | 2006-02-21 | Kabushiki Kaisha Toshiba | Temperature compensating circuit, electronic apparatus and radio unit having temperature compensating function |
| US20060044910A1 (en) * | 2004-08-27 | 2006-03-02 | Chien-Yi Chang | Temperature-dependent dram self-refresh circuit |
| US20060077742A1 (en) * | 2004-10-11 | 2006-04-13 | Jae-Eung Shim | Memory devices configured to detect failure of temperature sensors thereof and methods of operating and testing same |
| US20060203589A1 (en) * | 2003-10-31 | 2006-09-14 | Jae-Youl Lee | Self refresh period signal generation device |
| US7124325B2 (en) * | 2002-10-07 | 2006-10-17 | Infineon Technologies Ag | Method and apparatus for internally trimming output drivers and terminations in semiconductor devices |
| US7135913B2 (en) * | 2003-10-29 | 2006-11-14 | Samsung Electronics Co., Ltd. | Reference voltage generating circuit for integrated circuit |
| US7167401B2 (en) * | 2005-02-10 | 2007-01-23 | Micron Technology, Inc. | Low power chip select (CS) latency option |
| US7180211B2 (en) * | 2003-09-22 | 2007-02-20 | Micro Technology, Inc. | Temperature sensor |
| US20070121408A1 (en) * | 2005-11-30 | 2007-05-31 | Samsung Electronics Co., Ltd. | Stable temperature adjustment for referesh control |
| US7295484B2 (en) * | 2004-12-01 | 2007-11-13 | Freescale Semiconductor, Inc. | Temperature based DRAM refresh |
| US20070274147A1 (en) * | 2006-05-09 | 2007-11-29 | Egerer Jens C | Integrated Semiconductor Memory and Method for Operating an Integrated Semiconductor Memory |
| US20070286004A1 (en) * | 2006-04-13 | 2007-12-13 | Kim Kyung-Hoon | Semiconductor memory device with temperature sensing device capable of minimizing power consumption in refresh |
| US20070297260A1 (en) * | 2006-06-16 | 2007-12-27 | Dong-Woo Lee | Controlling execution of additional function during a refresh operation in a semiconductor memory device |
| US7322743B2 (en) * | 2005-07-25 | 2008-01-29 | Caterpillar Inc. | Temperature measurement system and method |
| US20080137457A1 (en) * | 2006-12-07 | 2008-06-12 | Elpida Memory, Inc. | Semiconductor memory device and control method thereof |
| US20080159038A1 (en) * | 2007-01-03 | 2008-07-03 | Hynix Semiconductor Inc. | Semiconductor memory device and method for driving the same |
| US7397721B2 (en) * | 2005-12-28 | 2008-07-08 | Samsung Electronics Co., Ltd. | Standby leakage current reduction circuit and semiconductor memory device comprising the standby leakage current reduction circuit |
| US20080180300A1 (en) * | 2007-01-31 | 2008-07-31 | Hynix Semiconductor Inc. | Analog-digital converter and on-die thermal sensor including the same |
| US20080205183A1 (en) * | 2007-02-28 | 2008-08-28 | Samsung Electronics Co., Ltd. | Self-refresh control circuit and semiconductor memory device including the same |
| US20080247256A1 (en) * | 2007-04-06 | 2008-10-09 | Hynix Semiconductor Inc. | Refresh signal generator of semiconductor memory device |
| US7453302B2 (en) * | 2003-12-23 | 2008-11-18 | Infineon Technologies Ag | Temperature compensated delay signals |
| US7464315B2 (en) * | 2004-06-18 | 2008-12-09 | Elpida Memory, Inc. | Semiconductor memory device |
| US7492657B2 (en) * | 2004-06-18 | 2009-02-17 | Fujitsu Limited | Semiconductor device temperature sensor and semiconductor storage device |
| US7499359B2 (en) * | 2005-02-16 | 2009-03-03 | Samsung Electronics Co., Ltd. | Temperature sensor instruction signal generator and semiconductor memory device having the same |
| US20090059689A1 (en) * | 2007-09-04 | 2009-03-05 | Hynix Semiconductor Inc. | Apparatus and method for transmitting/receiving signals at high speed |
| US7594750B2 (en) * | 2005-01-20 | 2009-09-29 | Samsung Electronics Co., Ltd. | Method for outputting internal temperature data in semiconductor memory device and circuit of outputting internal temperature date thereby |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003132450A (en) * | 2001-10-19 | 2003-05-09 | Yokohama Rubber Co Ltd:The | Measured data transmitter and fire alarm supporting system |
-
2005
- 2005-01-20 KR KR1020050005277A patent/KR100655076B1/en not_active Expired - Fee Related
-
2006
- 2006-01-18 US US11/335,036 patent/US7594750B2/en not_active Expired - Fee Related
- 2006-12-04 US US11/566,670 patent/US20070109013A1/en not_active Abandoned
Patent Citations (43)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5296777A (en) * | 1987-02-03 | 1994-03-22 | Kabushiki Kaisha Toshiba | Ultrasonic probe |
| US5159520A (en) * | 1990-08-03 | 1992-10-27 | Sharp Kabushiki Kaisha | Semiconductor integrated circuit having function of preventing rise of surface temperature |
| US5796290A (en) * | 1995-10-26 | 1998-08-18 | Nec Corporation | Temperature detection method and circuit using MOSFET |
| US5926777A (en) * | 1997-10-14 | 1999-07-20 | Nematron Corporation | Method and apparatus for monitoring computer system service life parameters |
| US7003273B1 (en) * | 1999-06-22 | 2006-02-21 | Kabushiki Kaisha Toshiba | Temperature compensating circuit, electronic apparatus and radio unit having temperature compensating function |
| US6751144B2 (en) * | 1999-12-03 | 2004-06-15 | Nec Electronics Corporation | Semiconductor storage and method for testing the same |
| US20020080673A1 (en) * | 2000-08-29 | 2002-06-27 | Alexander Benedix | Semiconductor configuration with optimized refresh cycle |
| US6631503B2 (en) * | 2001-01-05 | 2003-10-07 | Ibm Corporation | Temperature programmable timing delay system |
| US20020167296A1 (en) * | 2001-05-11 | 2002-11-14 | Toyota Jidosha Kabushiki Kaisha | Refresh charge control device and method |
| US6756856B2 (en) * | 2001-05-31 | 2004-06-29 | Samsung Electronics Co., Ltd. | Clock generation circuits and integrated circuit memory devices for controlling a clock period based on temperature and methods for using the same |
| US20020191467A1 (en) * | 2001-06-15 | 2002-12-19 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device |
| US20030056057A1 (en) * | 2001-09-19 | 2003-03-20 | Lawrence Richard H. | System and method for power reduction of memory |
| US20030058016A1 (en) * | 2001-09-21 | 2003-03-27 | Seiko Epson Corporation | Operation control according to temperature variation in integrated circuit |
| US20030086476A1 (en) * | 2001-11-08 | 2003-05-08 | Masaru Mizuta | Temperature sensor circuit having trimming function |
| US6768693B2 (en) * | 2002-02-15 | 2004-07-27 | Infineon Technologies Ag | Integrated dynamic memory with control circuit for controlling a refresh mode of memory cells, and method for driving the memory |
| US6765836B2 (en) * | 2002-09-10 | 2004-07-20 | Infineon Technologies Ag | Semiconductor memory with a clock synchronization device having a temperature controlled delay circuit |
| US7124325B2 (en) * | 2002-10-07 | 2006-10-17 | Infineon Technologies Ag | Method and apparatus for internally trimming output drivers and terminations in semiconductor devices |
| US7180211B2 (en) * | 2003-09-22 | 2007-02-20 | Micro Technology, Inc. | Temperature sensor |
| US7135913B2 (en) * | 2003-10-29 | 2006-11-14 | Samsung Electronics Co., Ltd. | Reference voltage generating circuit for integrated circuit |
| US20060203589A1 (en) * | 2003-10-31 | 2006-09-14 | Jae-Youl Lee | Self refresh period signal generation device |
| US7453302B2 (en) * | 2003-12-23 | 2008-11-18 | Infineon Technologies Ag | Temperature compensated delay signals |
| US20050146965A1 (en) * | 2003-12-23 | 2005-07-07 | Soo-Young Kim | Semiconductor memory device having internal circuits responsive to temperature data and method thereof |
| US7492657B2 (en) * | 2004-06-18 | 2009-02-17 | Fujitsu Limited | Semiconductor device temperature sensor and semiconductor storage device |
| US7464315B2 (en) * | 2004-06-18 | 2008-12-09 | Elpida Memory, Inc. | Semiconductor memory device |
| US20060044910A1 (en) * | 2004-08-27 | 2006-03-02 | Chien-Yi Chang | Temperature-dependent dram self-refresh circuit |
| US7035157B2 (en) * | 2004-08-27 | 2006-04-25 | Elite Semiconductor Memory Technology, Inc. | Temperature-dependent DRAM self-refresh circuit |
| US20060077742A1 (en) * | 2004-10-11 | 2006-04-13 | Jae-Eung Shim | Memory devices configured to detect failure of temperature sensors thereof and methods of operating and testing same |
| US7295484B2 (en) * | 2004-12-01 | 2007-11-13 | Freescale Semiconductor, Inc. | Temperature based DRAM refresh |
| US7594750B2 (en) * | 2005-01-20 | 2009-09-29 | Samsung Electronics Co., Ltd. | Method for outputting internal temperature data in semiconductor memory device and circuit of outputting internal temperature date thereby |
| US7167401B2 (en) * | 2005-02-10 | 2007-01-23 | Micron Technology, Inc. | Low power chip select (CS) latency option |
| US7499359B2 (en) * | 2005-02-16 | 2009-03-03 | Samsung Electronics Co., Ltd. | Temperature sensor instruction signal generator and semiconductor memory device having the same |
| US7322743B2 (en) * | 2005-07-25 | 2008-01-29 | Caterpillar Inc. | Temperature measurement system and method |
| US20070121408A1 (en) * | 2005-11-30 | 2007-05-31 | Samsung Electronics Co., Ltd. | Stable temperature adjustment for referesh control |
| US7397721B2 (en) * | 2005-12-28 | 2008-07-08 | Samsung Electronics Co., Ltd. | Standby leakage current reduction circuit and semiconductor memory device comprising the standby leakage current reduction circuit |
| US20070286004A1 (en) * | 2006-04-13 | 2007-12-13 | Kim Kyung-Hoon | Semiconductor memory device with temperature sensing device capable of minimizing power consumption in refresh |
| US20070274147A1 (en) * | 2006-05-09 | 2007-11-29 | Egerer Jens C | Integrated Semiconductor Memory and Method for Operating an Integrated Semiconductor Memory |
| US20070297260A1 (en) * | 2006-06-16 | 2007-12-27 | Dong-Woo Lee | Controlling execution of additional function during a refresh operation in a semiconductor memory device |
| US20080137457A1 (en) * | 2006-12-07 | 2008-06-12 | Elpida Memory, Inc. | Semiconductor memory device and control method thereof |
| US20080159038A1 (en) * | 2007-01-03 | 2008-07-03 | Hynix Semiconductor Inc. | Semiconductor memory device and method for driving the same |
| US20080180300A1 (en) * | 2007-01-31 | 2008-07-31 | Hynix Semiconductor Inc. | Analog-digital converter and on-die thermal sensor including the same |
| US20080205183A1 (en) * | 2007-02-28 | 2008-08-28 | Samsung Electronics Co., Ltd. | Self-refresh control circuit and semiconductor memory device including the same |
| US20080247256A1 (en) * | 2007-04-06 | 2008-10-09 | Hynix Semiconductor Inc. | Refresh signal generator of semiconductor memory device |
| US20090059689A1 (en) * | 2007-09-04 | 2009-03-05 | Hynix Semiconductor Inc. | Apparatus and method for transmitting/receiving signals at high speed |
Cited By (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080082291A1 (en) * | 2006-09-28 | 2008-04-03 | Hynix Semiconductor Inc. | On die thermal sensor |
| US7965571B2 (en) * | 2006-09-28 | 2011-06-21 | Hynix Semiconductor Inc. | On die thermal sensor |
| US20090037778A1 (en) * | 2007-07-30 | 2009-02-05 | Micron Technology, Inc. | Devices, methods, and apparatuses for detection, sensing, and reporting functionality for semiconductor memory |
| US8028198B2 (en) * | 2007-07-30 | 2011-09-27 | Micron Technology, Inc. | Devices, methods, and apparatuses for detection, sensing, and reporting functionality for semiconductor memory |
| US8732533B2 (en) | 2007-07-30 | 2014-05-20 | Micron Technology, Inc. | Devices, methods, and apparatuses for detection, sensing, and reporting functionality for semiconductor memory |
| US9424891B2 (en) | 2007-07-30 | 2016-08-23 | Micron Technology, Inc. | Methods and devices for temperature sensing of a memory device |
| US20160092130A1 (en) * | 2014-09-30 | 2016-03-31 | Kyung-eun CHOI | Memory device, memory system, and method of controlling memory device |
| US10522197B2 (en) * | 2014-09-30 | 2019-12-31 | Samsung Electronics Co., Ltd. | Memory device, memory system, and method of controlling memory device |
| WO2019236118A1 (en) * | 2018-06-04 | 2019-12-12 | Micron Technology, Inc. | Methods for performing multiple memory operations in response to a single command and memory devices and systems employing the same |
| US10489316B1 (en) | 2018-06-04 | 2019-11-26 | Micron Technology, Inc. | Methods for performing multiple memory operations in response to a single command and memory devices and systems employing the same |
| US10552087B2 (en) | 2018-06-04 | 2020-02-04 | Micron Technology, Inc. | Methods for performing multiple memory operations in response to a single command and memory devices and systems employing the same |
| US10810145B2 (en) | 2018-06-04 | 2020-10-20 | Micron Technology, Inc. | Methods for performing multiple memory operations in response to a single command and memory devices and systems employing the same |
| US10846248B2 (en) | 2018-06-04 | 2020-11-24 | Micron Technology, Inc. | Methods for performing multiple memory operations in response to a single command and memory devices and systems employing the same |
| US11294836B2 (en) | 2018-06-04 | 2022-04-05 | Micron Technology, Inc. | Methods for performing multiple memory operations in response to a single command and memory devices and systems employing the same |
| US11775459B2 (en) | 2018-06-04 | 2023-10-03 | Lodestar Licensing Group Llc | Methods for performing multiple memory operations in response to a single command and memory devices and systems employing the same |
| US12475067B2 (en) | 2018-06-04 | 2025-11-18 | Lodestar Licensing Group Llc | Methods for performing multiple memory operations in response to a single command and memory devices and systems employing the same |
| WO2020101975A1 (en) * | 2018-11-15 | 2020-05-22 | Micron Technology, Inc. | Temperature-based memory management |
| US11321008B2 (en) | 2018-11-15 | 2022-05-03 | Micron Technology, Inc. | Temperature-based memory management |
| US12019900B2 (en) | 2018-11-15 | 2024-06-25 | Micron Technology, Inc. | Temperature-based memory management |
Also Published As
| Publication number | Publication date |
|---|---|
| US7594750B2 (en) | 2009-09-29 |
| KR100655076B1 (en) | 2006-12-08 |
| KR20060084572A (en) | 2006-07-25 |
| US20060159156A1 (en) | 2006-07-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7594750B2 (en) | Method for outputting internal temperature data in semiconductor memory device and circuit of outputting internal temperature date thereby | |
| KR100298432B1 (en) | Control Circuit for Controlling Power Consumption in Semiconductor Memory Device And Method Varying Bit-line Precharge Voltage Using the Same | |
| US6646942B2 (en) | Method and circuit for adjusting a self-refresh rate to maintain dynamic data at low supply voltages | |
| US9406358B1 (en) | Driving circuit and driving method using the same | |
| US6597614B2 (en) | Self refresh circuit for semiconductor memory device | |
| US7408828B1 (en) | System and method for reducing power consumption during extended refresh periods of dynamic random access memory devices | |
| US8045411B2 (en) | Semiconductor memory device with temperature sensing device capable of minimizing power consumption in refresh | |
| KR20060054822A (en) | Logic embedded memory and self contained memory system for controlling self-refresh operation | |
| US7251170B2 (en) | Peripheral voltage generator | |
| US7569904B2 (en) | Semiconductor device having a plurality of temperature sensors and semiconductor device control method using the plurality of temperature sensors | |
| US9030896B1 (en) | Control circuit for bit-line sense amplifier and semiconductor memory apparatus having the same, and operating method thereof | |
| KR102912356B1 (en) | Memory device and operation method thereof | |
| US9058895B2 (en) | Self-refresh control device and method for reducing a current requisite for self-refresh operation using the same | |
| KR20000066268A (en) | Self refresh circuitry for detecting temperature | |
| KR102760131B1 (en) | Semiconductor memory device | |
| JP2003141876A (en) | Semiconductor storage device | |
| US7414898B2 (en) | Semiconductor memory device with internal power supply | |
| KR20030050349A (en) | Circuit for reducing current consumption of self refresh and method thereof | |
| US8391092B2 (en) | Circuit and method for eliminating bit line leakage current in random access memory devices | |
| US8199593B2 (en) | Circuit and method for controlling standby leakage current in random access memory devices | |
| KR20050023844A (en) | Semiconductor memory device having new over-driving scheme and method thereof | |
| KR20020066624A (en) | sense amplifier driving method in semiconductor memory device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| AS | Assignment |
Owner name: SAMSUNG ELECTRONICS CO., LTD.,KOREA, REPUBLIC OF Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:LEE, SEUNG-HOON;PARK, CHUL-WOO;SIGNING DATES FROM 20061110 TO 20061114;REEL/FRAME:018581/0051 |
|
| STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |