US20030124771A1 - Semiconductor wafer singulation method - Google Patents
Semiconductor wafer singulation method Download PDFInfo
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- US20030124771A1 US20030124771A1 US10/040,019 US4001902A US2003124771A1 US 20030124771 A1 US20030124771 A1 US 20030124771A1 US 4001902 A US4001902 A US 4001902A US 2003124771 A1 US2003124771 A1 US 2003124771A1
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- This invention relates to a method whereby a semiconductor wafer is singulated into individual dies.
- Integrated circuits are usually formed in and on silicon and other semiconductor wafer substrates.
- One substrate typically carries an array of integrated circuits.
- Each integrated circuit may include millions of electronic semiconductor components, such as transistors, capacitors, diodes, etc.
- the integrated circuits further include alternating metal lines and dielectric layers formed on the silicon substrate. The metal lines interconnect the electronic components with one another, and provide communication between the electronic components and terminals on the layers. The dielectric layers isolate the metal lines electrically from one another.
- a wafer which is processed to include such integrated circuits is subsequently “singulated” or “diced” into individual dies, each die carrying a respective one of the integrated circuits.
- a saw is typically used to cut in x- and y-directions through scribe streets between the integrated circuits.
- the layers of the integrated circuits overlap the scribe street, so that the saw has to be directed through the layers.
- the layers were made of mechanically strong dielectric materials such as SiO 2 and fluorinated silica glass. These materials were sufficiently strong to prevent cracking into the integrated circuits when being sawed.
- the dielectric layers have been made of low K-value (low electric permitivity) dielectric materials. These low K-value dielectric materials are much weaker, and cracks propagate easily from the saw through these materials into the integrated circuits.
- FIG. 1 is a cross-sectional side view illustrating a CO 2 laser gun, which is used to ablate the layers of a processed semiconductor wafer;
- FIG. 2 is a view similar to FIG. 1, after the laser gun forms a trench in the layers;
- FIG. 3 is a plan view of the wafer, further illustrating additional trenches formed therein;
- FIG. 4 is a view similar to FIG. 2, illustrating sawing of a silicon substrate of the wafer.
- FIG. 5 is a cross-sectional side view of a wafer in which trenches are formed according to another method of the invention.
- FIG. 1 of the accompanying drawings illustrates a CO 2 laser gun 10 which, together with beam-shaping optics 12 , is used to ablate layers of a processed semiconductor wafer 14 , to singulate the wafer 14 into individual dies according to the invention.
- the CO 2 laser gun creates laser light 16 at a wavelength in the range of 9 to 11 ⁇ m.
- the wavelength of the CO 2 laser gun is assumed to be 10 ⁇ m.
- the wavelength of the laser light 16 is ideally suited to ablate the layers, but not silicon, of the wafer 14 .
- a trench is thereby created in the layers which prevents damage to the layers when the wafer 14 is subsequently sawed.
- the wafer 14 includes a silicon (semiconductor material) substrate 18 in which semiconductor electric elements (not shown), such as transistors, capacitors, etc., are formed.
- a number of layers 20 are then formed on the silicon substrate 18 .
- the layers 20 include alternating metal and dielectric layers.
- a top layer 22 of SiO 2 is formed on the layers 20 for purposes relating to mechanical strength.
- the layer 22 may be fluorinated silica glass.
- Some of the layers 20 are low K-value dielectric layers that are relatively weak mechanically, but desirable because of their electrical properties.
- Other ones of the layers 20 are layers of metal lines between the dielectric layers.
- Guard rings 24 are formed in the layers 20 and 22 . Each guard ring 24 surrounds a respective integrated circuit 26 formed by the electric components and the layers 20 and 22 .
- a scribe street 28 is defined between the guard rings 24 .
- the beam-shaping optics 12 shape the laser light 16 , and direct the laser light 16 as a beam 30 onto on an upper surface of the scribe street 28 .
- the light from the beam 30 is absorbed by each one of the layers 22 and 20 .
- the respective layer 22 or 20 is ablated after absorbing the light.
- a respective layer 22 or 20 is more easily ablated, the more absorbent it is to the light.
- a higher absorption coefficient indicates that the light is more easily absorbed and the particular material is then more easily ablated. It can be seen from the table that SiO 2 (layer 22 ) has a relatively high absorption coefficient when radiated by laser light having a reference of 10 ⁇ m, and is relatively transparent when radiated with laser light at a wavelength of 355 nm. Specific absorption coefficients at 10 ⁇ m laser light are not available for all the layers 20 . It has been found that they are easily ablated with 10 ⁇ m laser light, and for that reason it is believed that their absorption coefficients of 10 ⁇ m laser are all at least 1E+03 cm ⁇ 1 .
- silicon is relatively transparent at 10 ⁇ m laser light. Relatively little damage will occur to the silicon substrate 18 .
- silicon is relatively absorptive, and SiO 2 is relatively transparent at laser light of 355 mn.
- Laser light at 10 ⁇ m will thus ablate all the layers 22 and 20 without causing ablation or damage to the silicon substrate 18 .
- the wavelength of the laser light is preferably between 9 and 11 ⁇ m, the wavelengths of a CO 2 laser gun, although it is believed that a laser with a wavelength of at least 4.5 ⁇ m and larger will ablate all the layers in the table above, without significant damage to the silicon substrate 18 .
- FIG. 2 illustrates the wafer 14 of FIG. 1 after portions of the layers 20 and 22 have been ablated.
- a trench 32 is thereby formed in the scribe street 28 .
- the trench 32 has a vertical depth in a z-direction of between 5 and 20 ⁇ m, and a width in an x-direction of between 10 and 150 ⁇ m.
- the trench 32 extends all the way down through the layers 22 and 20 , and terminates against the silicon substrate 18 .
- an x-y array of integrated circuits 26 is formed as part of the wafer 14 .
- the wafer 14 is moved relative to the beam-shaping optics 12 of FIG. 1 to form a plurality of trenches 32 , and more trenches 42 .
- the trenches 32 extend in a y-direction and are spaced in an x-direction direction relative to one another, and the trenches 42 extend in an x-direction and are spaced in a y-direction relative to one another.
- Four trenches are so formed on different sides of each integrated circuit 26 .
- a saw 44 is then used to cut through the silicon substrate 18 in a region below the trench 32 .
- the saw 44 does not cut through the layers 20 and 22 , so that no damage occurs to the layers 20 or 22 .
- the saw 44 is repeatedly used to cut through the silicon below each one of the trenches 32 and 42 in FIG. 3.
- the wafer 14 is so singulated into individual dies, each die carrying a respective one of the integrated circuits 26 .
- Damage to the layers 20 and 22 may also be avoided as illustrated in FIG. 5.
- a CO 2 laser gun is used to form two trenches 50 between the guard rings 24 .
- a saw is then used to cut a groove 52 through the layers 20 and 22 between the trenches 50 and through the silicon substrate 18 .
- the trenches 50 isolate the saw from the integrated circuits 26 .
- the trenches 50 do not have to be as wide as shown as FIG. 2, which allows for the use of a more concentrated beam of laser light.
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Abstract
Layers of a processed semiconductor wafer are ablated with laser light from a laser gun. A CO2 laser gun is used, which creates laser light in a wavelength in the 9 to 11 μm range. The layers all have absorption coefficients that are relatively high when radiated by laser light having such a wavelength. Silicon of the wafer is, however, relatively transparent to laser light having such a wavelength. A trench is thereby formed in the layers, which prevents damage to the layers when the silicon is subsequently sawed.
Description
- 1). Field of the Invention
- This invention relates to a method whereby a semiconductor wafer is singulated into individual dies.
- 2). Discussion of Related Art
- Integrated circuits are usually formed in and on silicon and other semiconductor wafer substrates. One substrate typically carries an array of integrated circuits. Each integrated circuit may include millions of electronic semiconductor components, such as transistors, capacitors, diodes, etc. The integrated circuits further include alternating metal lines and dielectric layers formed on the silicon substrate. The metal lines interconnect the electronic components with one another, and provide communication between the electronic components and terminals on the layers. The dielectric layers isolate the metal lines electrically from one another.
- A wafer which is processed to include such integrated circuits is subsequently “singulated” or “diced” into individual dies, each die carrying a respective one of the integrated circuits. A saw is typically used to cut in x- and y-directions through scribe streets between the integrated circuits.
- The layers of the integrated circuits overlap the scribe street, so that the saw has to be directed through the layers. Previously, the layers were made of mechanically strong dielectric materials such as SiO 2 and fluorinated silica glass. These materials were sufficiently strong to prevent cracking into the integrated circuits when being sawed. More recently, the dielectric layers have been made of low K-value (low electric permitivity) dielectric materials. These low K-value dielectric materials are much weaker, and cracks propagate easily from the saw through these materials into the integrated circuits.
- The invention is described by way of examples with reference to the accompanying drawings, wherein:
- FIG. 1 is a cross-sectional side view illustrating a CO 2 laser gun, which is used to ablate the layers of a processed semiconductor wafer;
- FIG. 2 is a view similar to FIG. 1, after the laser gun forms a trench in the layers;
- FIG. 3 is a plan view of the wafer, further illustrating additional trenches formed therein;
- FIG. 4 is a view similar to FIG. 2, illustrating sawing of a silicon substrate of the wafer; and
- FIG. 5 is a cross-sectional side view of a wafer in which trenches are formed according to another method of the invention.
- Throughout the following description, specific details are set forth in order to provide a more thorough understanding of the invention. However, the invention may be practiced without these particulars. In other instances, well-known elements have not been shown or described in detail to avoid unnecessarily obscuring the present invention.
- FIG. 1 of the accompanying drawings illustrates a CO 2 laser gun 10 which, together with beam-
shaping optics 12, is used to ablate layers of a processedsemiconductor wafer 14, to singulate thewafer 14 into individual dies according to the invention. The CO2 laser gun creates laser light 16 at a wavelength in the range of 9 to 11 μm. For purposes of further discussion, the wavelength of the CO2 laser gun is assumed to be 10 μm. As will be discussed hereinafter, the wavelength of the laser light 16 is ideally suited to ablate the layers, but not silicon, of thewafer 14. A trench is thereby created in the layers which prevents damage to the layers when thewafer 14 is subsequently sawed. - The
wafer 14 includes a silicon (semiconductor material)substrate 18 in which semiconductor electric elements (not shown), such as transistors, capacitors, etc., are formed. A number oflayers 20 are then formed on thesilicon substrate 18. Thelayers 20 include alternating metal and dielectric layers. Atop layer 22 of SiO2 is formed on thelayers 20 for purposes relating to mechanical strength. In another embodiment, thelayer 22 may be fluorinated silica glass. Some of thelayers 20 are low K-value dielectric layers that are relatively weak mechanically, but desirable because of their electrical properties. Other ones of thelayers 20 are layers of metal lines between the dielectric layers.Guard rings 24 are formed in the 20 and 22. Eachlayers guard ring 24 surrounds a respectiveintegrated circuit 26 formed by the electric components and the 20 and 22. Alayers scribe street 28 is defined between theguard rings 24. - The beam-
shaping optics 12 shape the laser light 16, and direct the laser light 16 as abeam 30 onto on an upper surface of thescribe street 28. The light from thebeam 30 is absorbed by each one of the 22 and 20. Thelayers 22 or 20 is ablated after absorbing the light. Arespective layer 22 or 20 is more easily ablated, the more absorbent it is to the light.respective layer - The following table lists absorption coefficients of the
22 and 20 and of thelayers silicon substrate 18 when radiated by laser light having a wavelength of 355 nm and 10 μm, respectively.355 nm 10 μm Absorption Absorption Material coefficient (cm−1) coefficient (cm−1) Notes Silicon 1.07E+06 1.00E+00 Key layer SiO2 0.00E+00 ˜1E4 Key layer SiOxFy Expect high Key layer Cardon doped Silica 1.06E+03 Expect high Key layer Si3N4 (passivation) 2.48E+03 Polyimide (passiviation) SixNy (Etch stop layer) 1.72E+04 SiC (Etch stop layer) 4.60E+03 6.00E+03 Cu - A higher absorption coefficient indicates that the light is more easily absorbed and the particular material is then more easily ablated. It can be seen from the table that SiO 2 (layer 22) has a relatively high absorption coefficient when radiated by laser light having a reference of 10 μm, and is relatively transparent when radiated with laser light at a wavelength of 355 nm. Specific absorption coefficients at 10 μm laser light are not available for all the
layers 20. It has been found that they are easily ablated with 10 μm laser light, and for that reason it is believed that their absorption coefficients of 10 μm laser are all at least 1E+03 cm−1. - What should also be noted is that silicon is relatively transparent at 10 μm laser light. Relatively little damage will occur to the
silicon substrate 18. In comparison, it can also be noted that silicon is relatively absorptive, and SiO2 is relatively transparent at laser light of 355 mn. - Laser light at 10 μm will thus ablate all the
22 and 20 without causing ablation or damage to thelayers silicon substrate 18. The wavelength of the laser light is preferably between 9 and 11 μm, the wavelengths of a CO2 laser gun, although it is believed that a laser with a wavelength of at least 4.5 μm and larger will ablate all the layers in the table above, without significant damage to thesilicon substrate 18. - FIG. 2 illustrates the
wafer 14 of FIG. 1 after portions of the 20 and 22 have been ablated. Alayers trench 32 is thereby formed in thescribe street 28. Thetrench 32 has a vertical depth in a z-direction of between 5 and 20 μm, and a width in an x-direction of between 10 and 150 μm. Thetrench 32 extends all the way down through the 22 and 20, and terminates against thelayers silicon substrate 18. - As can be seen in FIG. 3, an x-y array of integrated
circuits 26 is formed as part of thewafer 14. Thewafer 14 is moved relative to the beam-shapingoptics 12 of FIG. 1 to form a plurality oftrenches 32, andmore trenches 42. Thetrenches 32 extend in a y-direction and are spaced in an x-direction direction relative to one another, and thetrenches 42 extend in an x-direction and are spaced in a y-direction relative to one another. Four trenches are so formed on different sides of eachintegrated circuit 26. - As illustrated in FIG. 4, a
saw 44 is then used to cut through thesilicon substrate 18 in a region below thetrench 32. Thesaw 44 does not cut through the 20 and 22, so that no damage occurs to thelayers 20 or 22. Thelayers saw 44 is repeatedly used to cut through the silicon below each one of the 32 and 42 in FIG. 3. Thetrenches wafer 14 is so singulated into individual dies, each die carrying a respective one of theintegrated circuits 26. - Damage to the
20 and 22 may also be avoided as illustrated in FIG. 5. A CO2 laser gun is used to form twolayers trenches 50 between the guard rings 24. A saw is then used to cut a groove 52 through the 20 and 22 between thelayers trenches 50 and through thesilicon substrate 18. Thetrenches 50 isolate the saw from theintegrated circuits 26. Thetrenches 50 do not have to be as wide as shown as FIG. 2, which allows for the use of a more concentrated beam of laser light. - While certain exemplary embodiments have been described and shown in the accompanying drawings, it is to be understood that such embodiments are merely illustrative and not restrictive of the current invention, and that this invention is not restricted to the specific constructions and arrangements shown and described since modifications may occur to those ordinarily skilled in the art.
Claims (20)
1. A semiconductor wafer singulation method comprising:
generating a beam of laser light having a wavelength of at least 4.5 μm; and
forming a trench into a scribe street between adjacent integrated circuits of a processed semiconductor wafer by directing the beam onto the scribe street.
2. The method of claim 1 wherein the wafer includes a substrate of semiconductor material and a plurality of layers formed on the semiconductor material, and all the layers up to the substrate have absorption coefficients of at least 1E+03 cm−1 at the wavelength of the laser light.
3. The method of claim 2 wherein the semiconductor material has an absorption coefficient of less than 1E+02 cm−1 at the wavelength of the laser light.
4. The method of claim 3 wherein the semiconductor material is silicon.
5. The method of claim 3 wherein the semiconductor material has an absorption coefficient of at least 1E+05 cm−1 of laser light having a wavelength of 355 nm.
6. The method of claim 2 wherein one of the layers is SiO2 or fluorinated silica glass.
7. The method of claim 2 wherein one of the layers has an absorption coefficient of less than 1E+01 cm−1 of laser light having a wavelength of 355 nm.
8. The method of claim 1 wherein the wavelength of the laser light is between 9 and 11 μm.
9. The method of claim 2 , further comprising:
separating the substrate between the integrated circuits.
10. The method of claim 9 wherein the substrate is separated by sawing the substrate.
11. The method of claim 1 , further comprising:
forming three additional trenches on different sides of one of the integrated circuits.
12. The method of claim 1 wherein the beam is generated using a CO2 laser gun.
13. A semiconductor wafer singulation method, comprising:
generating a beam of laser light using a CO2 laser gun; and
forming a trench into a scribe street between adjacent integrated circuits of a processed semiconductor wafer by directing the beam onto the scribe street.
14. The method of claim 13 wherein the wafer includes a substrate of semiconductor material and a plurality of layers formed on the semiconductor material, and all the layers up to the substrate have absorption coefficients of at least 1E+03 cm−1 at a wavelength of the laser light.
15. The method of claim 14 , further comprising:
separating the substrate between the integrated circuits.
16. A semiconductor wafer singulation method, comprising:
generating a beam of laser light; and
forming a trench into a scribe street between adjacent integrated circuits of a processed semiconductor wafer by directing the beam onto the scribe street, the wafer including a substrate of a semiconductor material having a relatively low absorption coefficient at a wavelength of the laser light, and a plurality of layers on the substrate, all of which having absorption coefficients that are relatively high at the wavelength of the laser light.
17. The method of claim 16 wherein the semiconductor material has an absorption coefficient of less than 1E+02 cm−1 at the wavelength of the laser light.
18. The method of claim 17 wherein the semiconductor material is silicon.
19. The method of claim 16 wherein one of the layers is SiO2 or fluorinated silica glass.
20. The method of claim 16 wherein the semiconductor material is silicon and one of the layers is SiO2.
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| Application Number | Priority Date | Filing Date | Title |
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| US10/040,019 US6596562B1 (en) | 2002-01-03 | 2002-01-03 | Semiconductor wafer singulation method |
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|---|---|---|---|
| US10/040,019 US6596562B1 (en) | 2002-01-03 | 2002-01-03 | Semiconductor wafer singulation method |
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| US20030124771A1 true US20030124771A1 (en) | 2003-07-03 |
| US6596562B1 US6596562B1 (en) | 2003-07-22 |
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| US20050266661A1 (en) * | 2004-05-26 | 2005-12-01 | Lei Li | Semiconductor wafer with ditched scribe street |
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