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US20020070721A1 - Wideband regulator with fast transient suppression circuitry - Google Patents

Wideband regulator with fast transient suppression circuitry Download PDF

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Publication number
US20020070721A1
US20020070721A1 US09/944,417 US94441701A US2002070721A1 US 20020070721 A1 US20020070721 A1 US 20020070721A1 US 94441701 A US94441701 A US 94441701A US 2002070721 A1 US2002070721 A1 US 2002070721A1
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US
United States
Prior art keywords
voltage
output
voltage regulator
sensing circuit
switching devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US09/944,417
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English (en)
Inventor
Kenneth Ostrom
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Primarion Inc
Original Assignee
Primarion Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Primarion Inc filed Critical Primarion Inc
Priority to US09/944,417 priority Critical patent/US20020070721A1/en
Assigned to PRIMARION, INC. reassignment PRIMARION, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: OSTROM, KENNETH A.
Publication of US20020070721A1 publication Critical patent/US20020070721A1/en
Priority to US10/338,575 priority patent/US6661212B2/en
Abandoned legal-status Critical Current

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is DC
    • G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • G05F3/242—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current 
    • G05F1/46—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/56—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/06—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps

Definitions

  • the present invention relates to voltage regulators, and in particular, to wideband voltage regulators for use with microprocessor, microcontrollers or other like high-frequency devices in which suppression of current transients is desired.
  • V IN is an input power supply
  • V OUT is a regulated output supply
  • V CC is a voltage source required to bias the regulator circuitry, and which may be common with input power supply V IN
  • V REF is a voltage reference which determines the regulated output voltage supply V OUT
  • an amplifier 104 that comprises an output buffer amplifier having a gain G.
  • load current supplied to regulated output supply V OUT is primarily drawn from the input power supply V IN .
  • a closed loop differential transconductance amplifier 102 formed by transistors Q 1 and Q 2 senses the difference between output voltage V OUT and reference voltage V REF and, through its feedback arrangement, strives to minimize the difference between the two voltages, V OUT and V REF .
  • the effectiveness of a conventional wideband voltage regulator, such as regulator 100 , to respond to fast load transients is primarily a function of the small signal bandwidth of regulator 100 , the output impedance of output buffer amplifier 104 and the large signal slew rate performance of regulator 100 .
  • FIGS. 2 and 3 which illustrates the response to fast load transients of regulator 100
  • input transconductance amplifier 102 formed by Q 1 and Q 2 can fully switch, and the reaction response of the voltage regulator 100 can then be initially limited by the large signal slew rate performance of amplifier 102 .
  • a wideband voltage regulator which can provide suppression of fast transients.
  • a voltage regulator can include a boosting circuit and a sensing circuit.
  • the boosting circuit can be suitably configured to boost the voltage regulator response, while the sensing circuit can determine when such a boost may be desired. Accordingly, the response of the voltage regulator can be accelerated to a fast load transient beyond the closed loop bandwidth limited response or the slew rate limited response of the voltage regulator.
  • an exemplary voltage regulator can be configured with an active sensing circuit comprising a sensing amplifier with switch control outputs, and a boosting circuit comprising N stored charge sources and (3N ⁇ 1) switches that are configured to accelerate the voltage regulators response to a fast load transient beyond the closed loop bandwidth limited or slew rate limited response of the voltage regulator.
  • the stored charge sources can comprise various components, such as boost capacitors, additional power supplies, or actively biased devices.
  • the sensing circuit can be configured in various manners.
  • a method for determining when the sensing circuit can switch the state of the stored charge sources can comprise a comparison of the output voltage of the regulator to a constant reference voltage.
  • the sensing circuit can switch the state of the stored charge sources by comparing the voltage drop across the parasitic inductance between the voltage regulator output and the load to a constant reference voltage, or by comparing the difference between the voltage drop across the parasitic inductance of the supply side and the ground return of the load.
  • the sensing circuit can be triggered on a one-shot basis with preset pulse width, or by any other suitable trigger methodology.
  • a differential offset voltage can be added to the sense amplifier to suitably adjust or configure the sensitivity of the sensing circuit.
  • FIG. 1 illustrates a schematic diagram of a prior art voltage regulator configuration
  • FIG. 2 illustrates a response diagram of a prior art voltage regulator in response to fast load transients
  • FIG. 3 illustrates a schematic diagram of a prior art voltage regulator during slewing operations
  • FIG. 4 illustrates a schematic diagram of an exemplary embodiment of a voltage regulator in accordance with the present invention
  • FIG. 5 illustrates diagrams of load transient and regulator waveforms for the exemplary embodiment illustrated in FIG. 4;
  • FIG. 6 illustrates a schematic diagram of another exemplary embodiment of a voltage regulator in accordance with the present invention.
  • FIG. 7 illustrates a schematic diagram of yet another exemplary embodiment of a voltage regulator in accordance with the present invention.
  • FIG. 8 illustrates diagrams of load transient and regulator waveforms for the exemplary embodiment of a voltage regulator as illustrated in FIG. 7.
  • the present invention may be described herein in terms of various functional components and various processing steps. It should be appreciated that such functional components may be realized by any number of hardware or structural components configured to perform the specified functions. For example, the present invention may employ various integrated components comprised of various electrical devices, e.g., resistors, transistors, capacitors, diodes and the like, whose values may be suitably configured for various intended purposes. In addition, the present invention may be practiced in any integrated circuit application where high-frequency, low-voltage requirements are desired. Such general applications that may be appreciated by those skilled in the art in light of the present disclosure are not described in detail herein. However for purposes of illustration only, exemplary embodiments of a voltage regulator will be described herein. Further, it should be noted that while various components may be suitably coupled or connected to other components within exemplary circuits, such connections and couplings can be realized by direct connection between components, or by connection through other components and devices located therebetween.
  • a voltage regulator can include a boosting circuit and a sensing circuit.
  • the boosting circuit can be suitably configured to boost the voltage regulator response, while the sensing circuit can determine when such a boost may be desired. Accordingly, the response of the voltage regulator can be accelerated to a fast load transient beyond the closed loop bandwidth limited response or the slew rate limited response of the voltage regulator.
  • voltage regulator 400 includes an input power Supply V IN , a regulated output supply V OUT , a voltage source V CC configured to bias the circuitry of regulator 400 and which may be common with input power supply V IN , a voltage reference V REF which determines the regulated output voltage V OUT , a compensation capacitor C COMP , an amplifier 402 , and an amplifier 408 .
  • Amplifier 402 suitably comprises a closed loop differential transconductance amplifier formed by transistors Q 1 and Q 2
  • amplifier 408 comprises an output buffer amplifier having a gain G.
  • load current supplied to V OUT is primarily drawn from the V IN supply.
  • Closed loop differential amplifier 402 is configured to sense the difference between output voltage V OUT and reference voltage V REF and, through a feedback arrangement, to minimize the difference between the two voltages, V OUT and V REF .
  • voltage regulator 400 suitably includes a boosting circuit 404 and a sensing circuit 406 .
  • Boosting circuit 404 suitably comprises a stored charge source and a switching arrangement comprising switching devices ⁇ 1 and ⁇ 2 .
  • the stored charge sources can comprise various components, such as, for example, boost capacitors, additional power supplies, or actively biased devices.
  • the stored charge source comprises a voltage boosting capacitor C BOOST .
  • voltage boosting capacitor C BOOST is included merely for the purposes of illustration, and that the stored charge source is not limited to such a configuration.
  • boosting capacitor C BOOST can comprise various capacitance values, for example, between a 1 pF to 100 nf capacitance value
  • C BOOST can also comprise any other capacitance values which can be suitably scaled based upon the load to voltage regulator 400 .
  • Switching devices ⁇ 1 and ⁇ 2 can comprise any suitable switching mechanism, e.g., various types of transistor devices, such as FET or BJT devices.
  • Boost capacitor C BOOST is suitably configured to be initially connected between bias voltage V CC and ground during a charging phase through closure of switching device ⁇ 1 and opening of switching device ⁇ 2 , and then connected in parallel across the terminals of compensation capacitor C COMP during a boosting phase through and opening of switching device ⁇ 1 and closure of switching device ⁇ 2 .
  • Sensing circuit 406 suitably includes a threshold voltage (V TH ), which is configured to permit sensing circuit to determine when the voltage V OUT droops or otherwise decreases as a result of load transients.
  • Threshold voltage V TH can comprise various values depending on any number of design criteria. In an exemplary embodiment, threshold voltage V TH can comprise between 1% to 10% of output voltage V OUT , or other smaller percentage values of output voltage V OUT .
  • threshold voltage V TH is suitably coupled to reference voltage V REF , i.e., to the base of transistor Q 1 .
  • Sensing circuit 406 also includes a control device 410 that is configured to command switch controls ⁇ 1 and ⁇ 2 . Control device 410 includes a positive terminal coupled to the output of output buffer amplifier 408 , and a negative terminal coupled to threshold voltage V TH .
  • switch ⁇ 1 is initially “closed” and switch ⁇ 2 is “opened,” and boost capacitor C BOOST is charged to the same potential as biasing voltage source V CC , which is generally at a higher potential than the voltage across compensation capacitor C COMP .
  • sensing circuitry 406 can suitably open switch ⁇ 1 and close switch ⁇ 2 , thereby providing additional stored charge to boost the voltage across compensation capacitor C COMP .
  • the voltage across compensation capacitor C COMP can then be buffered by output amplifier 408 with gain G, such as, for example, a unity gain amplifier, thereby accelerating the response of voltage regulator 400 to the load transient beyond the closed loop bandwidth limited or slew rate limited response of a conventional regulator.
  • gain G such as, for example, a unity gain amplifier
  • the bandwidth of buffer amplifier 408 is an order of magnitude greater than the closed loop bandwidth of overall amplifier 402 , thereby rendering the boosted regulator response superior to the conventional closed loop response, e.g., an improvement of 10 to 50 times in bandwidth.
  • sensing circuitry 406 can be configured to operate as a one-shot device, with the pulse width selected such that the switches ⁇ 1 and ⁇ 2 change from “closed” to “open,” and from “open” to “closed,” respectively, only once when the difference between reference voltage V REF and a threshold voltage V TH is initially crossed by output voltage V OUT , i.e., when output voltage V OUT falls below the difference between reference voltage V REF and threshold voltage V TH .
  • the selected pulse width comprises a narrow, limited pulse width.
  • switches ⁇ 1 and ⁇ 2 can be internally reset after a time interval, for example an interval equal to t reset ⁇ t event , which is selected to be larger than the expected duration of the fast load transient event.
  • switches ⁇ 1 and ⁇ 2 can be internally reset after detecting that output voltage V OUT has been sufficiently boosted to its desired level.
  • switches ⁇ 1 and ⁇ 2 can be internally reset after first detecting output voltage V OUT has been boosted to an initial level, and then waiting for a given time interval to occur before resetting. It should be noted that other similar variations are also contemplated herein.
  • Boosting circuit 404 can be suitably configured in various manners to provide a stored charge to boost the voltage across compensation capacitor C COMP .
  • a boosting circuit can suitably comprise an array of N stored charge sources, e.g., boost capacitors, and (3N ⁇ 1) switches, that are configured to facilitate acceleration of the voltage regulators response to a fast load transient beyond the closed loop bandwidth limited, or the slew rate limited response of the voltage regulator.
  • a voltage regulator 600 suitably includes a closed loop amplifier 602 and an output buffer amplifier 608 , a boosting circuit 604 and a sensing circuit 606 .
  • Boosting circuit 604 is suitably configured such that a boost capacitor C BOOST comprises an array of capacitors in series and/or parallel along with an array of switches, such as two switches each for ⁇ 1 and ⁇ 2 .
  • boosting circuit 602 can include at least two capacitors, C 1 and C 2 configured in an array, which can be comprised of various capacitance values as described above.
  • Sensing circuit 608 suitably includes a threshold voltage (V TH ), and a control device 610 that is configured to command switch controls ⁇ 1 and ⁇ 2 .
  • switches ⁇ 1 are “closed” and switches ⁇ 2 are “opened” to suitably charge both of capacitors C 1 and C 2 to the potential of bias voltage V CC .
  • switches ⁇ 1 are suitably “opened” and switches ⁇ 2 are “closed.”
  • the total capacitance placed in parallel with amplifier compensation capacitor C COMP can be reduced to C BOOST /2, thus resulting in an improved closed loop bandwidth response once the boost charge has been redistributed.
  • the sensing circuit can also be configured in various other manners to detect when a boost of output voltage V OUT is desired.
  • an exemplary voltage regulator 700 suitably includes a closed loop amplifier 702 and an output buffer amplifier 708 , a boosting circuit 704 and a sensing circuit 706 .
  • Boosting circuit 704 can comprise various configurations, such as exemplary boosting circuits 404 or 604 , or an exemplary boosting circuit comprising an array of N boost capacitors and (3N ⁇ 1) switches.
  • Sensing circuit 706 suitably includes a threshold voltage (V TH ), which is configured to permit sensing circuit 706 to determine when the voltage V OUT droops as a result of load transients.
  • threshold voltage V TH is suitably coupled to the output of output buffer amplifier 708 , i.e., to the base of transistor Q 2 .
  • Sensing circuit 706 also includes a control device 710 that is configured to command switch controls ⁇ 1 and ⁇ 2 .
  • Control device 710 includes a positive terminal coupled to threshold voltage V TH , and a negative terminal coupled to the output of output buffer amplifier 708 as discussed below.
  • the parasitic inductance, e.g., L LOAD , associated with the physical interconnect between voltage regulator 700 and load circuit 712 can be used to determine when a boost to output voltage V OUT may be desirable.
  • parasitic inductance L LOAD can be suitably coupled between the negative terminal of control device 710 and the output of output buffer amplifier 708 .
  • sensing circuitry 706 can suitably “open” switch ⁇ 1 and “close” switch ⁇ 2 , thereby providing additional stored charge to boost the voltage across capacitor C COMP .
  • This voltage across capacitor C COMP can then be buffered by output amplifier 708 with gain G, such as a unity gain amplifier, thereby accelerating the response of voltage regulator 700 to the load transient beyond the closed loop bandwidth limited or slew rate limited response of a conventional regulator.
  • gain G such as a unity gain amplifier
  • sensing circuitry 706 can operate as a one-shot device, with the pulse width selected such that the switches ⁇ 1 and ⁇ 2 change from “closed” to “open,” and from “open” to “closed,” respectively, only once when the level of threshold voltage V TH is initially crossed. Thereafter, switches ⁇ 1 and ⁇ 2 can be internally reset after a time interval, for example an interval equal to t reset ⁇ t event , which can be selected to be larger than the expected duration of the fast load transient event.
  • switches ⁇ 1 and ⁇ 2 can be internally reset after detecting that the voltage V OUT has been sufficiently boosted to its desired level. Moreover, switches ⁇ 1 and ⁇ 2 can be internally reset after first detecting output voltage V OUT has been boosted to an initial level, and then waiting for a given time interval to occur before resetting. It should be noted that other similar variations are also contemplated herein.
  • the sensing circuitry can be envisioned when the parasitic inductance of the load ground path is similar to the supply path.
  • the voltage drop across the supply side inductor can be sensed and can be differentially compared to the voltage drop across the ground side inductor, with the resulting differential voltage used to drive the boost capacitor C BOOST .
  • a differential offset voltage can also be added to the sensed difference voltage to set the sensitivity of the sense circuitry 706 as desired.
  • an exemplary voltage regulator 900 suitably includes a closed loop amplifier 902 and an output buffer amplifier 908 , a boosting circuit 904 and a sensing circuit 906 .
  • sensing circuit suitably comprises three control devices 910 , 912 and 914 that are configured together to command switch controls ⁇ 1 and ⁇ 2 .
  • Control device 912 includes a positive terminal coupled to output voltage V OUT and a negative terminal coupled to the parasitic inductance L LOAD associated with the physical interconnect between voltage regulator 900 and a load circuit 912 , i.e., the negative terminal is coupled to V SENSE1 .
  • Control device 914 includes a positive terminal coupled ground and a negative terminal coupled to a load capacitor C LOAD , i.e., the negative terminal is coupled to V SENSE2 .
  • control device 710 includes a positive terminal coupled to threshold voltage V TH , which is coupled to the output of control device 912 , and a negative terminal coupled to the output of control device 914 .
  • a differential offset voltage provided the output of control device 914 can also be added to the sensed difference voltage provided by the output of control device 912 to set the sensitivity of the sense circuitry 906 .
  • the above exemplary embodiments of the invention can be configured for boosting in response to high to low load transients, as well by connecting both boost capacitor terminals to ground during a pre-positioning stage, thereby depleting the capacitors of stored charge. Accordingly, when the depleted capacitor(s) are then connected to the active node of compensation capacitor C COMP , the circuit is accelerated in the negative going direction.
  • a voltage regulator can be configured with an active sensing circuit comprising a sense amplifier with switch control outputs, and a boosting circuit comprising N boost capacitors and (3N ⁇ 1) switches that are configured to accelerate the voltage regulators response to a fast load transient beyond the closed loop bandwidth limited or slew rate limited response of the voltage regulator.
  • a method for determining when the sensing circuit can switch the state of the boost capacitors can comprise a comparison of the output voltage of the regulator to a constant reference voltage.
  • the sensing circuit can switch the state of the boost capacitors by comparing the voltage drop across the parasitic inductance between the voltage regulator output and the load to a constant reference voltage, or by comparing the difference between the voltage drop across the parasitic inductance of the supply side and the ground return of the load.
  • the sensing circuit can be triggered on a one-shot basis with preset pulse width, or by any other suitable trigger methodology.
  • a differential offset voltage can be added to the sense amplifier to suitably adjust or configure the sensitivity of the sensing circuit.
  • a wideband voltage regulator which can facilitate suppression of fast transients.
  • a voltage regulator can include a boosting circuit and a sensing circuit, with the boosting circuit suitably configured to boost the voltage regulator response, while the sensing circuit can determine when such a boost may be desired. Accordingly, the response of the voltage regulator can be accelerated to a fast load transient beyond the closed loop bandwidth limited response or the slew rate limited response of the voltage regulator.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Nonlinear Science (AREA)
  • Power Engineering (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)
US09/944,417 2000-08-31 2001-08-31 Wideband regulator with fast transient suppression circuitry Abandoned US20020070721A1 (en)

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Application Number Priority Date Filing Date Title
US09/944,417 US20020070721A1 (en) 2000-08-31 2001-08-31 Wideband regulator with fast transient suppression circuitry
US10/338,575 US6661212B2 (en) 2000-08-31 2003-01-08 Wideband regulator with fast transient suppression circuitry

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US22962100P 2000-08-31 2000-08-31
US09/944,417 US20020070721A1 (en) 2000-08-31 2001-08-31 Wideband regulator with fast transient suppression circuitry

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US20110080209A1 (en) * 2009-10-02 2011-04-07 Power Integrations, Inc. Method and apparatus for implementing slew rate control using bypass capacitor
US20140043010A1 (en) * 2012-08-12 2014-02-13 Loai Galal Bahgat Salem Recursive dc-dc converter
US20140184189A1 (en) * 2013-01-02 2014-07-03 Loai Galal Bahgat Salem Inductively assisted switched capacitor dc-dc converter
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US9322354B2 (en) * 2013-04-18 2016-04-26 Mitsubishi Electric Corporation In-vehicle engine control device and control method thereof
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Publication number Priority date Publication date Assignee Title
US20040063414A1 (en) * 2001-02-02 2004-04-01 Kasperkovitz Wolfdietrich Georg Feedback loop with slew rate limiter
US20060294437A1 (en) * 2005-06-22 2006-12-28 Thunder Creative Technologies, Inc. Point-of-load power conditioning for memory modules
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US8970290B2 (en) 2009-10-02 2015-03-03 Power Integrations Inc. Method and apparatus for implementing slew rate control using bypass capacitor
US20110080209A1 (en) * 2009-10-02 2011-04-07 Power Integrations, Inc. Method and apparatus for implementing slew rate control using bypass capacitor
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US20150144109A1 (en) * 2012-06-21 2015-05-28 Hitachi Automotive Systems, Ltd. Control Device for Internal Combustion Engine
US20140043010A1 (en) * 2012-08-12 2014-02-13 Loai Galal Bahgat Salem Recursive dc-dc converter
US10110130B2 (en) * 2012-08-12 2018-10-23 Loai Galal Bahgat Salem Recursive DC-DC converter
US20140184189A1 (en) * 2013-01-02 2014-07-03 Loai Galal Bahgat Salem Inductively assisted switched capacitor dc-dc converter
US9322354B2 (en) * 2013-04-18 2016-04-26 Mitsubishi Electric Corporation In-vehicle engine control device and control method thereof
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US6661212B2 (en) 2003-12-09
WO2002019487A2 (fr) 2002-03-07
US20030098674A1 (en) 2003-05-29
AU2001288583A1 (en) 2002-03-13

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