US20020001893A1 - Method of manufacturing a capacitor in a semiconductor device - Google Patents
Method of manufacturing a capacitor in a semiconductor device Download PDFInfo
- Publication number
- US20020001893A1 US20020001893A1 US09/852,929 US85292901A US2002001893A1 US 20020001893 A1 US20020001893 A1 US 20020001893A1 US 85292901 A US85292901 A US 85292901A US 2002001893 A1 US2002001893 A1 US 2002001893A1
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- US
- United States
- Prior art keywords
- film
- forming
- sccm
- torr
- wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/01—Manufacture or treatment
- H10D1/041—Manufacture or treatment of capacitors having no potential barriers
- H10D1/042—Manufacture or treatment of capacitors having no potential barriers using deposition processes to form electrode extensions
-
- H10P14/69393—
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
- H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
- H10D1/692—Electrodes
- H10D1/696—Electrodes comprising multiple layers, e.g. comprising a barrier layer and a metal layer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
- H10D1/692—Electrodes
- H10D1/711—Electrodes having non-planar surfaces, e.g. formed by texturisation
- H10D1/716—Electrodes having non-planar surfaces, e.g. formed by texturisation having vertical extensions
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- H10P14/6334—
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- H10P14/6532—
-
- H10P14/6538—
Definitions
- the invention relates generally to a method of manufacturing a capacitor in a semiconductor device. More particularly, the invention relates to a method of manufacturing a capacitor in a semiconductor device, which can obtain a high capacitance and a low leakage current in a capacitor using a Ta 2 O 5 film as a dielectric film, in such a way that a first Ru film used as a lower electrode is deposited by an LPCVD method, a mixture plasma process of Ar and H 2 is performed, and then a second Ru film is deposited by an LPCVD method to improve the surface roughness of the Ru film.
- an LPCVD method is employed. If the Ru film is formed by an LPCVD method, as the surface roughness is poor, some of the Ru film is deposited as the seed layer by a PVD method, and the Ru film is then deposited by the LPCVD method, thus improving the surface roughness. In this case, however, the process is complicated and the step coverage is adversely affected.
- a method of manufacturing a capacitor in a semiconductor device includes the steps of depositing a first Ru film on a semiconductor substrate in which a given structure is formed; processing the first Ru film by exciting a mixture plasma of Ar and H 2 ; depositing a second Ru film on the first Ru film to form a second deposited Ru film, then patterning the second deposited Ru film to form a lower electrode; forming a Ta 2 O 5 film on the entire structure; and forming a TiN film on the entire structure and then patterning the TiN film to form an upper electrode.
- FIGS. 1 A- 1 C are cross-sectional views of a device for explaining a method of manufacturing a capacitor in a semiconductor device according to the present invention.
- the method can obtain a high capacitance and a low leakage current in a capacitor using a Ta 2 O 5 film as a dielectric film, by first depositing a first Ru film used as a lower electrode by an LPCVD method, performing a mixture plasma process of Ar and H 2 , and depositing a second Ru film by an LPCVD method to improve the surface roughness of the Ru film.
- a selected region of the insulating film 12 is etched to form a contact hole through which a selected region of the semiconductor substrate 11 is exposed.
- a polysilicon plug 13 and a diffusion prevention film 14 are stacked to fill the contact hole.
- a capacitor of a cylinder shape is etched so that a portion of the underlying contact hole can be exposed.
- a first Ru film 16 A is deposited on the entire structure by an LPCVD method, and is then processed by exciting a mixture plasma of Ar and H 2 .
- the RF power for exciting the plasma is maintained at about 10 W to about 1000 W. Meanwhile, when the RF power is applied, a sub eater is used as a ground and a showerhead is used as an electrode.
- the first Ru film 16 A is deposited by vaporizing tris (2,4-octanedionato) ruthenium and then introducing the vaporized tris (2,4-octanedionato) ruthenium into a reaction furnace containing a wafer, and in which a pressure of about 0.1 Torr to about 10 Torr is maintained.
- a reaction gas uses oxygen at a flow rate of about 5 sccm to about 1000 sccm and the wafer within the reaction furnace is heated to a temperature of about 200° C. to about 350° C.
- a second Ru film 16 B is deposited on the first Ru film 16 A and processed by plasma by an LPCVD method, thus forming a secondly-deposited Ru film 16 .
- the second Ru film 16 B is deposited in the same manner as the first Ru film 16 A.
- the Ru film 16 is polished to expose the oxide film 15 , thus forming a lower electrode.
- a Ta 2 O 5 film 17 is formed on the entire structure.
- the Ta 2 O 5 film 17 is formed by vaporizing tantalum ethylate Ta(OC 2 H 5 ) 5 ) in a vaporizer within which a temperature of about 170° C. to about 190° C. is maintained, and then the vaporized tantalum ethylate is introduced into a reaction furnace containing a wafer, and in which a pressure of about 0.1 Torr to about 1.2 Torr is maintained.
- oxygen at a flow rate of about 10 sccm to about 1000 sccm is used as a reaction gas, and the wafer within the reaction furnace is heated to a temperature of about 300° C. to about 400° C.
- N 2 O plasma or a UV/O 3 process is performed at the temperature of about 300° C. to about 500° C. and a rapid thermal process or reactor annealing process is performed at the temperature of about 500° C. to about 700° C. using N 2 gas and O 2 gas.
- a Ru film or a TiN film 18 is deposited on the entire structure, it is patterned to form an upper electrode.
- the method can obtain a high capacitance and a low leakage current in a capacitor using a Ta 2 O 5 film as a dielectric film, by firstly depositing a Ru film used as a lower electrode by an LPCVD method, performing a mixture plasma process of Ar and H 2 and secondly depositing the Ru film by an LPCVD method to improve the surface roughness of the Ru film.
Landscapes
- Semiconductor Memories (AREA)
- Electrodes Of Semiconductors (AREA)
- Semiconductor Integrated Circuits (AREA)
- Formation Of Insulating Films (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
Description
- 1. Field of the Invention
- The invention relates generally to a method of manufacturing a capacitor in a semiconductor device. More particularly, the invention relates to a method of manufacturing a capacitor in a semiconductor device, which can obtain a high capacitance and a low leakage current in a capacitor using a Ta 2O5 film as a dielectric film, in such a way that a first Ru film used as a lower electrode is deposited by an LPCVD method, a mixture plasma process of Ar and H2 is performed, and then a second Ru film is deposited by an LPCVD method to improve the surface roughness of the Ru film.
- 2. Description of the Prior Art
- As a semiconductor device is highly integrated, in order to secure the capacitance of a capacitor using a Ta 2O5 film having a conventional MIS (metal-insulator-silicon) structure as a dielectric film, the thickness of the Ta2O5 film is reduced. This method, however, causes increases in the leakage current. In order to solve this problem, a method in which a metal layer is used as a lower electrode to lower the effective thickness and to secure a capacitance and the characteristic of a leakage current, has been attempted. If a metal layer is used as the lower electrode, the characteristic of a leakage current can be improved due to the thin quality of the lower electrode.
- For example, in order to form the Ru film as the lower electrode, an LPCVD method is employed. If the Ru film is formed by an LPCVD method, as the surface roughness is poor, some of the Ru film is deposited as the seed layer by a PVD method, and the Ru film is then deposited by the LPCVD method, thus improving the surface roughness. In this case, however, the process is complicated and the step coverage is adversely affected.
- A method of manufacturing a capacitor in a semiconductor device includes the steps of depositing a first Ru film on a semiconductor substrate in which a given structure is formed; processing the first Ru film by exciting a mixture plasma of Ar and H 2; depositing a second Ru film on the first Ru film to form a second deposited Ru film, then patterning the second deposited Ru film to form a lower electrode; forming a Ta2O5 film on the entire structure; and forming a TiN film on the entire structure and then patterning the TiN film to form an upper electrode.
- The aforementioned aspects and other features of the present invention will be explained in the following description, taken in conjunction with the accompanying drawings, wherein:
- FIGS. 1A-1C are cross-sectional views of a device for explaining a method of manufacturing a capacitor in a semiconductor device according to the present invention.
- It is an objective of this disclosure to provide a method of manufacturing a capacitor in a semiconductor device capable of improving an electrical characteristic of the capacitor by improving the surface roughness when a Ru film is formed as a lower electrode.
- The method can obtain a high capacitance and a low leakage current in a capacitor using a Ta 2O5 film as a dielectric film, by first depositing a first Ru film used as a lower electrode by an LPCVD method, performing a mixture plasma process of Ar and H2, and depositing a second Ru film by an LPCVD method to improve the surface roughness of the Ru film.
- The disclosed method will be described in detail by way of a preferred embodiment with reference to accompanying drawings.
- Referring to FIG. 1A, after an
insulating film 12 is formed on asemiconductor substrate 11 in which a predetermined structure is formed, a selected region of theinsulating film 12 is etched to form a contact hole through which a selected region of thesemiconductor substrate 11 is exposed. Then, apolysilicon plug 13 and a diffusion prevention film 14 (e.g., a Ti/TiN film) are stacked to fill the contact hole. After anoxide film 15 is formed on the entire structure, a capacitor of a cylinder shape is etched so that a portion of the underlying contact hole can be exposed. Next, afirst Ru film 16A is deposited on the entire structure by an LPCVD method, and is then processed by exciting a mixture plasma of Ar and H2. At this time, the RF power for exciting the plasma is maintained at about 10 W to about 1000 W. Meanwhile, when the RF power is applied, a sub eater is used as a ground and a showerhead is used as an electrode. Thefirst Ru film 16A is deposited by vaporizing tris (2,4-octanedionato) ruthenium and then introducing the vaporized tris (2,4-octanedionato) ruthenium into a reaction furnace containing a wafer, and in which a pressure of about 0.1 Torr to about 10 Torr is maintained. At this time, a reaction gas uses oxygen at a flow rate of about 5 sccm to about 1000 sccm and the wafer within the reaction furnace is heated to a temperature of about 200° C. to about 350° C. - Referring to FIG. 1B, a
second Ru film 16B is deposited on thefirst Ru film 16A and processed by plasma by an LPCVD method, thus forming a secondly-depositedRu film 16. The second Rufilm 16B is deposited in the same manner as the first Rufilm 16A. - Referring to FIG. 1C, the
Ru film 16 is polished to expose theoxide film 15, thus forming a lower electrode. After theoxide film 15 is removed, a Ta2O5film 17 is formed on the entire structure. The Ta2O5film 17 is formed by vaporizing tantalum ethylate Ta(OC2H5)5) in a vaporizer within which a temperature of about 170° C. to about 190° C. is maintained, and then the vaporized tantalum ethylate is introduced into a reaction furnace containing a wafer, and in which a pressure of about 0.1 Torr to about 1.2 Torr is maintained. At this time, oxygen at a flow rate of about 10 sccm to about 1000 sccm is used as a reaction gas, and the wafer within the reaction furnace is heated to a temperature of about 300° C. to about 400° C. After the Ta2O5 film 17 is formed, N2O plasma or a UV/O3 process is performed at the temperature of about 300° C. to about 500° C. and a rapid thermal process or reactor annealing process is performed at the temperature of about 500° C. to about 700° C. using N2 gas and O2 gas. After a Ru film or aTiN film 18 is deposited on the entire structure, it is patterned to form an upper electrode. - As mentioned above, the method can obtain a high capacitance and a low leakage current in a capacitor using a Ta 2O5 film as a dielectric film, by firstly depositing a Ru film used as a lower electrode by an LPCVD method, performing a mixture plasma process of Ar and H2 and secondly depositing the Ru film by an LPCVD method to improve the surface roughness of the Ru film.
- The method has been described with reference to a particular embodiment in connection with a particular application. Those having ordinary skill in the art and access to the teachings of the method will recognize additional modifications and applications within the scope thereof.
- It is therefore intended by the appended claims to cover any and all such applications, modifications, and embodiments within the scope of the invention.
Claims (10)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR00-37040 | 2000-06-30 | ||
| KR10-2000-0037040A KR100414948B1 (en) | 2000-06-30 | 2000-06-30 | Method of forming a capacitor in a semiconductor device |
| KR2000-37040 | 2000-06-30 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| US20020001893A1 true US20020001893A1 (en) | 2002-01-03 |
| US6365487B2 US6365487B2 (en) | 2002-04-02 |
Family
ID=19675303
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US09/852,929 Expired - Lifetime US6365487B2 (en) | 2000-06-30 | 2001-05-10 | Method of manufacturing a capacitor in a semiconductor device |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US6365487B2 (en) |
| JP (1) | JP4215189B2 (en) |
| KR (1) | KR100414948B1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6410381B2 (en) * | 2000-06-01 | 2002-06-25 | Hynix Semiconductor Inc. | Method for forming capacitor of semiconductor device |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4053226B2 (en) * | 2000-10-18 | 2008-02-27 | 株式会社ルネサステクノロジ | Semiconductor integrated circuit device and manufacturing method thereof |
| KR100440073B1 (en) | 2001-12-10 | 2004-07-14 | 주식회사 하이닉스반도체 | A method for forming a capacitor of a semiconductor device |
| KR100875647B1 (en) * | 2002-05-17 | 2008-12-24 | 주식회사 하이닉스반도체 | Capacitor Formation Method of Semiconductor Device |
| JP2004063807A (en) | 2002-07-29 | 2004-02-26 | Elpida Memory Inc | Method for manufacturing semiconductor device |
| JP2004079924A (en) * | 2002-08-22 | 2004-03-11 | Renesas Technology Corp | Semiconductor device |
| JP4408653B2 (en) | 2003-05-30 | 2010-02-03 | 東京エレクトロン株式会社 | Substrate processing method and semiconductor device manufacturing method |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2778451B2 (en) * | 1994-01-27 | 1998-07-23 | 日本電気株式会社 | Method for manufacturing semiconductor device |
| KR0172772B1 (en) * | 1995-05-17 | 1999-03-30 | 김주용 | Method of forming ruthenium oxide film for diffusion barrier of semiconductor device |
| CN1054702C (en) * | 1995-06-26 | 2000-07-19 | 现代电子产业株式会社 | Method for manufacturing capacitor for semiconductor device |
| KR100239417B1 (en) * | 1996-12-03 | 2000-01-15 | 김영환 | Capacitor of semiconductor device and manufacturing method thereof |
| JP3905977B2 (en) * | 1998-05-22 | 2007-04-18 | 株式会社東芝 | Manufacturing method of semiconductor device |
| KR100331545B1 (en) * | 1998-07-22 | 2002-04-06 | 윤종용 | Method of forming multi-layered titanium nitride film by multi-step chemical vapor deposition process and method of manufacturing semiconductor device using the same |
| JP4261021B2 (en) * | 1999-05-14 | 2009-04-30 | パナソニック株式会社 | Semiconductor device and manufacturing method thereof |
| KR100389913B1 (en) * | 1999-12-23 | 2003-07-04 | 삼성전자주식회사 | Forming method of Ru film using chemical vapor deposition with changing process conditions and Ru film formed thereby |
| KR100415516B1 (en) * | 2000-06-28 | 2004-01-31 | 주식회사 하이닉스반도체 | Method of manufacturing a capacitor in a semiconductor device |
-
2000
- 2000-06-30 KR KR10-2000-0037040A patent/KR100414948B1/en not_active Expired - Fee Related
-
2001
- 2001-03-27 JP JP2001090328A patent/JP4215189B2/en not_active Expired - Fee Related
- 2001-05-10 US US09/852,929 patent/US6365487B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6410381B2 (en) * | 2000-06-01 | 2002-06-25 | Hynix Semiconductor Inc. | Method for forming capacitor of semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| KR100414948B1 (en) | 2004-01-14 |
| JP4215189B2 (en) | 2009-01-28 |
| US6365487B2 (en) | 2002-04-02 |
| KR20020002754A (en) | 2002-01-10 |
| JP2002026273A (en) | 2002-01-25 |
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Owner name: INTELLECTUAL DISCOVERY CO., LTD., KOREA, REPUBLIC Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SK HYNIX INC;REEL/FRAME:032421/0488 Effective date: 20140218 Owner name: HYNIX SEMICONDUCTOR, INC., KOREA, REPUBLIC OF Free format text: CHANGE OF NAME;ASSIGNOR:HYUNDAI ELECTRONICS INDUSTRIES CO., LTD.;REEL/FRAME:032421/0637 Effective date: 20010406 Owner name: SK HYNIX INC, KOREA, REPUBLIC OF Free format text: CHANGE OF NAME;ASSIGNOR:HYNIX SEMICONDUCTOR, INC.;REEL/FRAME:032421/0496 Effective date: 20120413 |