TWM661277U - Data line sharing circuit suitable for display device - Google Patents

Abstract

The present application is related to a data line sharing circuit suitable for a display device includes a passive element, a first unidirectional element and a second unidirectional element. The first end of the passive element is connected to a high voltage level. The first end of the first unidirectional element is electrically connected to the second end of the passive element and a control sensing module. The second end of the first unidirectional element is electrically connected to a microprocessor. The first unidirectional element is used to receive and output the control sensing data. The first end of the second unidirectional element is electrically connected to the microprocessor to receive display data. The second end of the second unidirectional element is used to output the display data. Therefore, the microprocessor does not need to increase the number of input and output ports and data lines, and can read additional control sensing data through the data line sharing circuit.

Description

Data line sharing circuit for display devices

The present application relates to a display sharing circuit, and more particularly to a data line sharing circuit.

Generally speaking, a display includes at least a main controller and a display panel. The main controller exchanges data with the display panel through a bus, so that the display panel updates its display screen according to the received control signal and output display data. For example, the main controller transmits a control signal to the display panel through the control bus, and the main controller transmits output display data to the display panel through the data bus.

In order to provide control signals and output display data to the display panel, the main controller needs to be designed with input and output ports (IO) corresponding to the bus to facilitate the transmission of control signals and output display data. At the same time, with the increasing amount of data, the number of input and output ports of the main controller is also increasing. In this case, if the main controller needs to receive signals or data other than output display data, it is often necessary to change the packaging design of the main controller to increase the number of input and output ports. However, changing the packaging of the main controller and increasing the number of input and output ports will increase the cost of the main controller.

Therefore, how to increase the types of signals received by the main controller without increasing the cost of the main controller is one of the problems to be solved in this field.

In order to solve the above technical problems, the present application proposes a data line sharing circuit, which enables the microprocessor of the display device to transmit a display data to a panel module or receive control sensing data from a control sensing module through the data line sharing circuit. In this way, the microprocessor can transmit the display data and receive other control sensing data with limited input and output ports, thereby achieving the purpose of effectively controlling the cost required by the microprocessor and increasing the data types obtained by the microprocessor.

In order to achieve the above-mentioned purpose, the present application proposes a data line sharing circuit, which includes a passive element, a first unidirectional element and a second unidirectional element. The passive element has a first end and a second end, the first end of the passive element is connected to a high voltage level, and the second end of the passive element is electrically connected to a microprocessor and receives an enable signal. The first unidirectional element has a first end and a second end, the first end of the first unidirectional element is electrically connected to the second end of the passive element and a control sensing module, the second end of the first unidirectional element is electrically connected to the microprocessor through a data line, the first end of the first unidirectional element is used to receive a control sensing data, and the second end of the first unidirectional element is used to output the control sensing data. The second unidirectional element has a first end and a second end. The first end of the second unidirectional element is electrically connected to the microprocessor through the data line, and the second end of the second unidirectional element is electrically connected to a panel module. The first end of the second unidirectional element is used to receive display data output by the microprocessor, and the second end of the second unidirectional element is used to output the display data.

In order to achieve the above-mentioned purpose, the present application proposes a data line sharing circuit, which includes a unidirectional element. The unidirectional element has a first end and a second end, the first end of the unidirectional element is electrically connected to a control sensing module, the second end of the unidirectional element is electrically connected to a microprocessor and a panel module through a data line, and the second end of the unidirectional element is used to output the control sensing data.

According to the above content, the present application uses the data line sharing circuit to output display data or receive control sensing data at different time periods with the same data line, so that the microprocessor of the display device does not need to increase the number of input and output ports and data lines, that is, the existing input and output ports and data lines can obtain additional control sensing data, thereby achieving the purpose of effectively controlling the cost required for the microprocessor and increasing the data types obtained by the microprocessor.

Please refer to FIG. 1 , which is a schematic diagram of an embodiment of the display device of the present application. The display device 1 includes a microprocessor 100 , a data line sharing circuit 200 , a panel module 300 and a control sensing module 400 .

In the embodiment of FIG. 1 , the microprocessor 100 is used to generate display data DATA and a control signal Cs corresponding to the image information according to internal or external image information, wherein the control signal Cs includes but is not limited to a vertical synchronization signal Synv (as shown in FIG. 4 ), a horizontal synchronization signal Synh (as shown in FIG. 4 ) or a data enable signal.

In the embodiment of Figure 1, the data line sharing circuit 200 is electrically connected to the microprocessor 100 through a data bus. Furthermore, the data line sharing circuit 200 is electrically connected to the microprocessor 100 through at least one data line in the data bus and receives display data DATA. Each data line in the data bus is used to transmit 1 bit of data. In one embodiment, the data line sharing circuit 200 is electrically connected to the microprocessor 100 through all data lines in the data bus and receives display data DATA. In one embodiment, the data lines that are not electrically connected to the data line sharing circuit 200 are electrically connected to the microprocessor 100 and the panel module 300 to transmit other display data DATA to the panel module 300.

In the embodiment of FIG. 1 , the panel module 300 is electrically connected to the data line sharing circuit 200 through one of the data lines in the data bus, and the panel module 300 is electrically connected to the microprocessor 100 through a control bus. The panel module 300 receives the display data DATA from the microprocessor 100 through the data line sharing circuit 200, and receives the control signal Cs through the control bus. The panel module 300 updates the display screen of the panel module 300 according to the received control signal Cs and the display data DATA. In one embodiment, the panel module 300 is a liquid crystal display panel, and the present application is not limited thereto.

In the embodiment of FIG. 1 , the control sensing module 400 is electrically connected to the data line sharing circuit 200 via a data line. The control sensing module 400 is used to generate a control sensing data Ss, which is a control signal generated by a user operating the control sensing module 400. The control sensing module 400 is not disposed in the panel module 300, that is, the control sensing module 400 is an external device of the panel module 300.

In one embodiment, the display device 1 may include a plurality of data line sharing circuits 200. The data line sharing circuits 200 are electrically connected to the control sensing module 400. Each of the data line sharing circuits 200 is electrically connected to a data line in the data bus. The number of the data line sharing circuits 200 may be equal to or less than the number of data lines in the data bus. For example, the data bus is 8 bits, which means that the data bus includes at least 8 data lines for transmitting data. Therefore, the number of data line sharing circuits 200 can be configured to be 8 or less than 8 according to the number of transmission bits of the control sensing data Ss. In an embodiment where the number of the data line sharing circuits 200 is less than the number of data lines of the data bus, the data lines not electrically connected to the data line sharing circuits 200 are electrically connected to the microprocessor 100 and the panel module 300 to transmit the other display data DATA to the panel module 300.

In one embodiment, the display device 1 may include a plurality of control sensing modules 400 , each of which is electrically connected to a data line sharing circuit 200 via at least one data line.

In the embodiment of FIG. 1 , the microprocessor 100 operates in a control sensing data input mode in a first time period based on an enable signal En, and obtains the control sensing data Ss in the data line sharing circuit 200. The enable signal En can be implemented by one of the control signals Cs, that is, the enable signal En includes one of the vertical synchronization signal Synv, the horizontal synchronization signal Synh (as shown in FIG. 4 ) or the data enable signal. The microprocessor 100 also operates in a display data output mode in a second time period based on the enable signal, and outputs the display data DATA to the data line sharing circuit 200. The first time period is earlier than the second time period, and the first time period is a non-screen update phase of the panel module 300, and the second time period is a screen update phase of the panel module 300.

Therefore, the data line sharing circuit 200 of the present application enables the display device 1 to obtain the control sensing data Ss through the data line sharing circuit 200 when the panel module 300 is in the non-screen update phase. The display device 1 of the present application also transmits the display data DATA to the panel module 300 through the data line sharing circuit 200 when the panel module 300 is in the screen update phase, so that the panel module 300 can normally receive the display data DATA to update the display screen. The microprocessor 100 does not need to increase the number of input/output ports and data lines, and can obtain additional control sensing data Ss through the existing input/output ports and data lines, thereby achieving the purpose of effectively controlling the cost required by the microprocessor and increasing the data types obtained by the microprocessor. At the same time, since the data line sharing circuit 200 transmits and receives the display data DATA and the control sensing data Ss through the existing data lines, it can be easily applied to the existing microprocessor and panel module without being affected by the architecture or version of the microprocessor and panel module, thereby enhancing the convenience of display device design.

Please refer to FIG2, which is a schematic diagram of an embodiment of the display device of the present application. In the embodiment of FIG2, the display device 2 includes a microprocessor 100, a data line sharing circuit 200, a panel module 300 and a control sensing module 400, wherein the microprocessor 100 and the panel module 300 are similar to the embodiment of FIG1, and therefore will not be described in detail here.

In the embodiment of FIG. 2 , the data line sharing circuit 200 includes a passive element 210 , a first unidirectional element 220 , and a second unidirectional element 230 .

In the embodiment of FIG. 2 , the passive element 210 has a first end and a second end. The first end of the passive element 210 is electrically connected to a high voltage level VDDH, and the second end of the passive element 210 is electrically connected to the microprocessor 100 and receives an enable signal En. In this embodiment, the passive element 210 can be implemented by a pull-up resistor. In this embodiment, the enable signal En can be implemented by one of the control signals Cs, and the present application is not limited thereto.

In the embodiment of Figure 2, the first unidirectional element 220 has a first end and a second end. The first end of the first unidirectional element 220 is electrically connected to the second end of the passive element 210 and the control sensing module 400. The second end of the first unidirectional element 220 is electrically connected to the microprocessor 100 through the data line. The first end of the first unidirectional element 220 is used to receive the control sensing data S1, and the second end of the first unidirectional element 220 is used to output the control sensing data S1.

In the embodiment of FIG. 2 , the second unidirectional element 230 has a first end and a second end, the first end of the second unidirectional element 230 is electrically connected to the microprocessor 100 via the data line, and the second end of the second unidirectional element 230 is electrically connected to the panel module 300. The first end of the second unidirectional element 230 is used to receive the display data DATA output by the microprocessor 100, and the second end of the second unidirectional element 230 is used to output the display data DATA.

In the embodiment of FIG. 2 , the first unidirectional element 220 and the second unidirectional element 230 may be implemented by diodes.

In the embodiment of FIG. 2 , the data line sharing circuit 200 further includes a buffer element 240, the buffer element 240 having a first end and a second end, the first end of the buffer element 240 being electrically connected to the microprocessor 100, the second end of the buffer element 240 being electrically connected to the second end of the passive element 210, and the first end of the buffer element 240 being used to receive the enable signal En. In this embodiment, the buffer element 240 is implemented by an inverter. In other embodiments, the buffer element 240 can be implemented by a resistor element, a buffer, or by a circuit (PCB) layout.

In the embodiment of FIG. 2 , the control sensing module 400 has a first end and a second end. The first end of the control sensing module 400 is electrically connected to the first end of the first unidirectional element 220, and the second end of the control sensing module 400 is electrically connected to a zero voltage level GND. In this embodiment, the control sensing module 400 can be implemented by a key switch.

Please refer to FIG. 2 and FIG. 4 . FIG. 4 is a schematic diagram of an embodiment of the vertical synchronization signal Synv and the horizontal synchronization signal Synh. In this embodiment, the vertical synchronization signal Synv is used as the enable signal En as an example to illustrate the operation method of the display device 2 .

First, at time point T1, when the vertical synchronization signal Synv changes from a logical high level to a logical low level, the microprocessor 100 operates in the control sensing data input mode and is ready to obtain the control sensing data S1 from the data line. Then, in the first time period Td1 between time point T1 and time point T2, the panel module 300 is in a non-screen update stage, the vertical synchronization signal Synv remains at a logical low level, and the first end of the buffer element 240 is at a logical low level, so its second end outputs a logical high level. When the control sensing module 400 is pressed by the user and the first end of the control sensing module 400 is connected to the second end, the voltage of the second end of the buffer element 240 is pulled down to the zero voltage level GND, so that the first unidirectional element 220 is not conductive, and the second end of the first unidirectional element 220 is a logical low voltage. When the control sensing module 400 is not pressed by the user, so that the first end and the second end of the control sensing module 400 are disconnected, the voltage of the second end of the buffer element 240 is maintained at a logical high voltage due to the output logical high voltage and the high voltage level VDDH electrically connected to the first end of the passive element 210, the first unidirectional element 220 is turned on, and the second end of the first unidirectional element 220 is at a logical high voltage. Therefore, the microprocessor 100 can obtain the control sensing data S1 by obtaining the voltage value of the second end of the first unidirectional element 220, and judge whether the user presses the control sensing module 400 based on the obtained control sensing data S1, so as to generate the corresponding display data DATA according to the judgment result. For example, when the microprocessor 100 judges that the user presses the control sensing module 400 based on the received control sensing data S1, the microprocessor 100 generates the corresponding display data DATA based on the control sensing data S1, so that the display screen of the panel module 300 is updated from the standby screen (black screen) to a status display screen (displaying power status, operation status, etc.) during the screen update phase.

At time point T2, when the vertical synchronization signal Synv changes from a logical low level to a logical high level, the microprocessor 100 operates in the display data output mode and is ready to output the generated display data DATA to the data line sharing circuit 200. Then, in the second time period Td2 between time point T2 and time point T3, the panel module 300 is in the screen update stage, the vertical synchronization signal Synv is maintained at a logical high level, the first end of the buffer element 240 is a logical high level, and its second end outputs a logical low level. The first end of the first unidirectional element 220 is maintained at a logical low level, and the first unidirectional element 220 remains non-conductive in the second time period Td2. Therefore, in the second time period Td2, regardless of whether the control sensing module 400 is pressed by the user, the control sensing module 400 will not affect the voltage of the second end of the first unidirectional element 220. The display data DATA output by the microprocessor 100 to the second unidirectional element 230 will not be affected by the second end of the first unidirectional element 220, so the panel module 300 can accurately obtain the display data DATA from the second end of the second unidirectional element. That is, in the second time period Td2, the display data DATA will not be affected by the control sensing data S1 and change.

In one embodiment, the enable signal En can be implemented by the horizontal synchronization signal Synh of the first time period Td1. In this embodiment, since the period of the horizontal synchronization signal Synh is shorter than the vertical synchronization signal Synv, during the first time period Td1, the microprocessor 100 will trigger the control sensing data input mode multiple times due to the horizontal synchronization signal Synh, and read the second end of the first unidirectional element 220 multiple times, so as to accurately determine the state of the control sensing module 400 with the control sensing data S1 obtained multiple times.

Please refer to FIG3, which is a schematic diagram of an embodiment of the display device of the present application. In the embodiment of FIG3, the display device 3 includes a microprocessor 100, a data line sharing circuit 200, a panel module 300 and a control sensing module 400, wherein the microprocessor 100 and the panel module 300 are similar to the embodiment of FIG1, and therefore will not be described in detail here.

In the embodiment of FIG. 3 , the data line sharing circuit 200 includes a unidirectional element 250 and a passive element 260 .

In the embodiment of FIG. 3 , the passive element 260 has a first end and a second end. The first end of the passive element 260 is electrically connected to the control sensing module 400 via a data line to receive the control sensing data S2 from the control sensing module 400. The second end of the passive element 260 is electrically connected to the unidirectional element 250.

In the embodiment of FIG. 3 , the unidirectional element 250 has a first end and a second end. The first end of the unidirectional element 250 is electrically connected to the control sensing module 400 via the second end of the passive element 260, and the second end of the unidirectional element 250 is electrically connected to the microprocessor 100 and the panel module 300 via the data line. The second end of the unidirectional element 250 is used to output the control sensing data S2, wherein the unidirectional element 250 can be implemented by a diode.

In the embodiment of FIG. 3 , the control sensing module 400 includes a touch circuit 410 and at least one touch sensing unit 420. In the embodiment of FIG. 3 , the at least one touch sensing unit 420 is electrically connected to the touch circuit 410 to generate a touch sensing signal and transmit the touch sensing signal to the touch circuit 410. In one embodiment, the control sensing module 400 may include a plurality of touch sensing units 420, and the present application is not limited thereto. In the embodiment of FIG. 3 , the touch control circuit 410 is electrically connected to the at least one touch sensing unit 420. The touch control circuit 410 is used to receive the touch sensing signal, determine whether a touch event occurs according to the received touch sensing signal, and generate the corresponding control sensing data S2 according to the determination result. In this embodiment, the control sensing data S2 is described as a one-bit data amount. In other embodiments, the control sensing data S2 may be a multi-bit data amount, and the touch control circuit 410 may be electrically connected to a plurality of data line sharing circuits 200 corresponding to the data amount of the control sensing data S2, that is, the number of data line sharing circuits 200 depends on the received control sensing data S2, and the present application is not limited thereto.

Please refer to FIG. 3 and FIG. 4 at the same time. First, at time point T1, when the vertical synchronization signal Synv changes from a logical high level to a logical low level, the microprocessor 100 operates in the control sensing data input mode and is ready to obtain the control sensing data S2 from the data line. Then, in the first time segment Td1 between time point T1 and time point T2, the panel module 300 is in a non-screen update stage. When the control sensing data S2 is a logical low level, the first end of the unidirectional element 250 is a logical low level, and the unidirectional element 250 is not conducting, so its second end outputs a logical low level, and the microprocessor 100 obtains the control sensing data S2 of a logical low level. When the control sensing data S2 is at a logical high potential, the first end of the unidirectional element 250 is at a logical high potential, the unidirectional element 250 is turned on, and thus the second end outputs a logical high potential, and the microprocessor 100 obtains the control sensing data S2 at a logical high potential.

At time point T2, when the vertical synchronization signal Synv changes from a logical low level to a logical high level, the microprocessor 100 operates in the display data output mode and is ready to output the generated display data DATA to the data line sharing circuit 200. Then, in the second time period Td2 between time point T2 and time point T3, the panel module 300 is in the screen update stage, and the vertical synchronization signal Synv is maintained at a logical high level. When the microprocessor 100 outputs the display data DATA of a logical high level, and when the control sensing data S2 is a logical low level, the voltage at the first end of the unidirectional element 250 is lower than the voltage at the second end of the unidirectional element 250, and the unidirectional element 250 is in a high impedance state and is not conducting, so the display data DATA will not be affected by the control sensing data S2 and will not change. When the control sensing data S2 is at a logical high potential, the unidirectional element 250 is in a conducting state, and the display data DATA outputted from the second end of the unidirectional element 250 is simultaneously maintained at a logical high potential. The display data DATA will not be affected by the control sensing data S2 and will not change. Therefore, the panel module 300 can accurately obtain the display data DATA at a logical high potential. When the control sensing data S2 is a logical high potential, and the microprocessor 100 outputs the display data DATA at a logical low potential, the unidirectional element 250 is in a conducting state, and the voltage at the second end of the unidirectional element 250 is pulled down by the output display data DATA and maintained at a logical low potential, so the panel module 300 can accurately obtain the display data DATA at a logical low potential. That is, in the second period Td2, the voltage at the second end of the unidirectional element 250 is only determined by the voltage of the display data DATA output by the microprocessor 100, and the display data DATA will not be affected by the control sensing data S2 and change. At the same time, when the control sensing data S2 is a logical high potential and the microprocessor 100 outputs the display data DATA of a logical low potential, the cross voltage between the first end of the passive element 260 and the second end of the unidirectional element 250 is the logical high potential of the control sensing data S2 plus the forward voltage of the unidirectional element 250. Since the forward voltage of the unidirectional element 250 (for example, 0.2V or 0.7V) is much smaller than the logical high potential of the control sensing data S2, the forward voltage of the unidirectional element 250 can be regarded as a constant that does not affect the cross voltage. Therefore, the voltage across the first end of the passive element 260 and the second end of the unidirectional element 250 is mainly affected by the logical high potential of the control sensing data S2, and the current value between the first end of the passive element 260 and the second end of the unidirectional element 250 is mainly affected by the resistance value of the passive element 260. The passive element 260 is implemented as a current limiting resistor. Thus, since the passive element 260 can limit the current value of the data line sharing circuit 200 of the present application, the power consumption of the data line sharing circuit 200 is limited. Therefore, through the data line sharing circuit 200, the power consumption of the data line sharing circuit 200 can be effectively reduced.

In summary, the data line sharing circuit of the present application enables the microprocessor of the display device to output display data or receive control sensing data at different time periods using the same data line. Therefore, the microprocessor of the display device does not need to increase the number of input/output ports and data lines, and can obtain additional control sensing data using the existing input/output ports and data lines, thereby achieving the purpose of effectively controlling the cost required by the microprocessor and increasing the types of data obtained by the microprocessor.

1, 2, 3: Display device

100: Microprocessor

200: Data line sharing circuit

210: Passive components

220: first one-way element

230: Second one-way element

240: Buffer element

250: One-way element

260: Passive element

300: Panel module

400: Control sensor module

410: Touch circuit

420: Touch sensor unit

Cs: Control signal

DATA: Display data

En: Enable signal

GND: Zero voltage level

Ss, S1, S2: control sensing data

Synv: vertical synchronization signal

Synh: horizontal synchronization signal

T1, T2, T3: time point

Td1: First period

Td2: The second period

VDDH: High voltage level

FIG. 1 is a schematic diagram of a display device embodiment according to an embodiment of the present application; FIG. 2 is a schematic diagram of another display device embodiment according to an embodiment of the present application; FIG. 3 is a schematic diagram of another display device embodiment according to an embodiment of the present application; and FIG. 4 is a schematic diagram of a vertical synchronization signal and a horizontal synchronization signal embodiment according to an embodiment of the present application.

2: Display device

100: Microprocessor

200: Data line sharing circuit

210: Passive element

220: First unidirectional element

230: Second one-way element

240: Buffer element

300: Panel module

400: Control sensor module

Cs: control signal

DATA: Display data

En: Enable signal

GND: zero voltage level

S1: Control sensor data

VDDH: high voltage level

Claims (10)

A data line sharing circuit suitable for a display device includes: a passive element having a first end and a second end, the first end of the passive element being connected to a high voltage level, the second end of the passive element being electrically connected to a microprocessor and receiving an enable signal; a first unidirectional element having a first end and a second end, the first end of the first unidirectional element being electrically connected to the second end of the passive element and a control sensing module, the second end of the first unidirectional element being electrically connected to the microprocessor via a data line, The first end of the first unidirectional element is used to receive a control sensing data, and the second end of the first unidirectional element is used to output the control sensing data; and a second unidirectional element has a first end and a second end, the first end of the second unidirectional element is electrically connected to the microprocessor through the data line, the second end of the second unidirectional element is electrically connected to a panel module, the first end of the second unidirectional element is used to receive the display data output by the microprocessor, and the second end of the second unidirectional element is used to output the display data. The data line sharing circuit as described in claim 1, wherein the data line sharing circuit further includes a buffer element, the buffer element having a first end and a second end, the first end of the buffer element being electrically connected to the microprocessor, the second end of the buffer element being electrically connected to the second end of the passive element, and the first end of the buffer element receiving the enable signal. A data line sharing circuit as described in claim 2, wherein the buffer element is implemented by an inverter, a buffer, a resistor element or a circuit layout. A data line sharing circuit as described in claim 1, wherein the enable signal includes a vertical synchronization signal, a horizontal synchronization signal or a data enable signal. The data line sharing circuit as described in claim 1, wherein the first unidirectional element and the second unidirectional element are a diode. A data line sharing circuit as described in claim 1, wherein the control sensing module is a key switch. A data line sharing circuit suitable for a display device includes: a unidirectional element having a first end and a second end, the first end of the unidirectional element being electrically connected to a control sensing module, the second end of the unidirectional element being electrically connected to a microprocessor and a panel module through a data line, the second end of the unidirectional element being used to output a control sensing data; and a passive element having a first end and a second end, the first end of the passive element being electrically connected to the control sensing module, the second end of the passive element being electrically connected to the first end of the unidirectional element. A data line sharing circuit as described in claim 7, wherein the unidirectional element is a diode. A data line sharing circuit as described in claim 7, wherein the passive element is a current limiting resistor. The data line sharing circuit as described in claim 7, wherein the control sensing module includes a touch circuit and at least one touch sensing unit, the at least one touch sensing unit is electrically connected to the touch circuit and used to generate a touch sensing signal, and the touch circuit is used to receive the touch sensing signal and generate the corresponding control sensing data.