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TWM519328U - Back passivated solar cell structure - Google Patents

Back passivated solar cell structure Download PDF

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Publication number
TWM519328U
TWM519328U TW104218633U TW104218633U TWM519328U TW M519328 U TWM519328 U TW M519328U TW 104218633 U TW104218633 U TW 104218633U TW 104218633 U TW104218633 U TW 104218633U TW M519328 U TWM519328 U TW M519328U
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Taiwan
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solar cell
cell structure
passivation layer
area
disposed
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TW104218633U
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Chinese (zh)
Inventor
黃志強
余承曄
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元晶太陽能科技股份有限公司
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Priority to TW104218633U priority Critical patent/TWM519328U/en
Publication of TWM519328U publication Critical patent/TWM519328U/en

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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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Abstract

A PERC cell structure includes a semiconductor substrate having a front surface and a rear surface. A rear passivation layer is disposed on the rear surface. At least one local opening is formed in the rear passivation layer. A discontinuous, spot-shaped rear silver pattern is disposed on the rear passivation layer. A rear electrode pattern is formed on the rear passivation layer and fills into the local opening to form a local backside field. The discontinuous, spot-shaped rear silver pattern occupies an area that accounts for only 1.6% of the area of the rear surface.

Description

背面鈍化太陽能電池結構Back passivated solar cell structure

本創作係有關於一種太陽能電池技術領域,特別是有關一種具有較高轉換效率的背面鈍化太陽能電池結構。The present invention relates to the field of solar cell technology, and more particularly to a back passivated solar cell structure having higher conversion efficiency.

已知,太陽能電池的工作原理係利用太陽光輻射能源與半導體材料作用來產生電能,主要材料包括有半導體材料,如單晶矽、多晶矽、非晶矽之矽基板或III-V族化合物之半導體材料等,以及用來作為電極之導電膠,例如,銀膠或鋁膠等。It is known that solar cells work by using solar radiation energy and semiconductor materials to generate electrical energy. The main materials include semiconductor materials such as single crystal germanium, polycrystalline germanium, amorphous germanium germanium or III-V compound semiconductor. Materials, etc., and conductive pastes used as electrodes, for example, silver or aluminum glue.

太陽能電池的製造方法通常先進行晶圓表面清潔與粗糙化處理,然後進行擴散製程,在晶圓表面形成磷玻璃層及摻雜射極(emitter)區域,以蝕刻製程去除磷玻璃層後,再形成抗反射層,然後,利用網印技術於電池正、背面以金屬漿料網印出電極圖案,然後進行高溫燒結,形成電極。最後,進行串焊將電池單元串接成模組。The solar cell manufacturing method usually performs wafer surface cleaning and roughening treatment, and then performs a diffusion process to form a phosphor glass layer and an emitter emitter region on the surface of the wafer, and then remove the phosphor glass layer by an etching process, and then An anti-reflection layer is formed, and then an electrode pattern is printed on the metal paste web on the front and back sides of the battery by screen printing, and then sintered at a high temperature to form an electrode. Finally, string welding is performed to connect the battery cells in series.

其中,背面鈍化太陽能電池(PERC)係利用形成在太陽能電池背面的鈍化層(例如薄氧化鋁層),來降低電子-電洞對的再結合(recombination),並且可配合抗反射鍍膜(ARC)將光線反射回太陽能電池中,以提升電池效率。Among them, the back passivated solar cell (PERC) utilizes a passivation layer (for example, a thin aluminum oxide layer) formed on the back surface of the solar cell to reduce recombination of the electron-hole pair and can be combined with an anti-reflective coating (ARC). Reflect light back into the solar cell to increase battery efficiency.

本創作之主要目的在提供一種改良的背面鈍化太陽能電池結構,可以提升轉換效率,並且可以降低背銀使用量,進而降低生產成本。The main purpose of this creation is to provide an improved back passivated solar cell structure that can improve conversion efficiency and reduce the amount of back silver used, thereby reducing production costs.

根據本創作一實施例,本案提供一種背面鈍化太陽能電池結構,包含有一半導體基板,具有一正面及一背面;一背面鈍化層,設於該半導體基板的該背面上;至少一局部開孔區域,設於該背面鈍化層中;一不連續、點狀的背銀圖案,設於該背面鈍化層上;以及一背面電極圖案,設於該背面鈍化層上,填入該局部開孔區域,並於該局部開孔區域內形成一局部背面電場。其中該不連續、點狀的背銀圖案的面積僅佔該背面的面積的1.6%。According to an embodiment of the present invention, the present invention provides a back passivated solar cell structure including a semiconductor substrate having a front surface and a back surface; a back passivation layer disposed on the back surface of the semiconductor substrate; at least a portion of the open area, Provided in the back passivation layer; a discontinuous, dot-shaped back silver pattern disposed on the back passivation layer; and a back electrode pattern disposed on the back passivation layer to fill the partial opening region, and A partial back surface electric field is formed in the partial opening region. The area of the discontinuous, dot-shaped back silver pattern accounts for only 1.6% of the area of the back surface.

為讓本創作之上述目的、特徵及優點能更明顯易懂,下文特舉較佳實施方式,並配合所附圖式,作詳細說明如下。然而如下之較佳實施方式與圖式僅供參考與說明用,並非用來對本創作加以限制者。The above described objects, features and advantages of the present invention will become more apparent from the following description. However, the following preferred embodiments and drawings are for illustrative purposes only and are not intended to limit the present invention.

傳統的PERC太陽能電池通常受限於模組客戶的背面焊接,背銀面積固定,例如,整體背銀面積比例約為5.45%,以致於無法將PERC太陽能電池的轉換效率最佳化。申請人於是提出本創作以解決上述問題。Conventional PERC solar cells are often limited by the backside soldering of the module customer, and the back silver area is fixed. For example, the overall back silver area ratio is about 5.45%, so that the conversion efficiency of the PERC solar cell cannot be optimized. The applicant then proposed this creation to solve the above problems.

請參閱第1圖至第6圖,其例示本創作製作一太陽能電池結構的剖面示意圖。如第1圖所示,首先,如第1圖所示,提供一半導體基板11,例如,N型摻雜結晶矽基板或結晶矽晶圓,其厚度例如約180-200微米左右,但不限於此。Please refer to FIG. 1 to FIG. 6 , which illustrate a schematic cross-sectional view of a solar cell structure produced by the present invention. As shown in FIG. 1, first, as shown in FIG. 1, a semiconductor substrate 11 such as an N-type doped crystalline germanium substrate or a crystalline germanium wafer having a thickness of, for example, about 180 to 200 μm is provided, but is not limited thereto. this.

再利用化學蝕刻製程,進行半導體基板11的表面清潔處理及表面粗糙化(surface texture)處理,在半導體基板11的正面(受光面)S1形成粗糙化(或金字塔形)結構101,並且在半導體基板11的背面S2形成平坦表面。The surface etching process and surface texture processing of the semiconductor substrate 11 are performed by a chemical etching process, and a roughened (or pyramidal) structure 101 is formed on the front surface (light receiving surface) S1 of the semiconductor substrate 11, and the semiconductor substrate is formed. The back surface S2 of 11 forms a flat surface.

如第2圖所示,接著,於正面(受光面)S1及背面S2分別形成一表面摻雜區105及106,例如N型表面摻雜區。表面摻雜區105及106的可以利用一擴散爐提供三氯氧磷(phosphorus chloride oxide, POCl 3)氣體擴散形成,後續再利用氫氟酸(hydrofluoric acid, HF)等濕式蝕刻方法,去除位於半導體基板11表面的磷玻璃(phosphosilicate glass, PSG)(圖未示)。 As shown in Fig. 2, a surface doping region 105 and 106, for example, an N-type surface doped region, is formed on the front surface (light receiving surface) S1 and the back surface S2, respectively. The surface doped regions 105 and 106 can be formed by diffusion of a phosphorous chloride oxide (POCl 3 ) gas using a diffusion furnace, followed by a wet etching method such as hydrofluoric acid (HF) to remove the Phosphorus glass (PSG) on the surface of the semiconductor substrate 11 (not shown).

繼之,於正面(受光面)S1形成一抗反射層107,例如氧化矽、氮化矽,覆蓋於表面摻雜區105上。抗反射層107的形成可利用化學氣相沉積(CVD)、低壓化學蒸氣沉積(low pressure CVD, LPCVD)、電漿增強化學氣相沉積(plasma enhanced CVD, PECVD)等技術,但不限於此。Then, an anti-reflection layer 107, such as hafnium oxide or tantalum nitride, is formed on the front surface (light-receiving surface) S1 to cover the surface doping region 105. The anti-reflection layer 107 may be formed by techniques such as chemical vapor deposition (CVD), low pressure chemical vapor deposition (LPCVD), plasma enhanced CVD (PECVD), and the like, but is not limited thereto.

如第3圖所示,接著,利用化學氣相沉積(chemical vapor deposition, CVD)製程,於半導體基板11的背面S2形成背面鈍化層12以及蓋層13。例如,背面鈍化層12可以是氮氧化矽(SiONx),而蓋層13可以是氮化矽(SiNx),但不限於此。As shown in FIG. 3, the back surface passivation layer 12 and the cap layer 13 are formed on the back surface S2 of the semiconductor substrate 11 by a chemical vapor deposition (CVD) process. For example, the back passivation layer 12 may be bismuth oxynitride (SiONx), and the cap layer 13 may be tantalum nitride (SiNx), but is not limited thereto.

舉例來說,背面鈍化層12與蓋層13均為介電材料,且可以是多層膜結構。例如,背面鈍化層12可以選自以下群組:氧化矽(SiOx)、氮氧化矽(SiONx)、氧化鋁(AlOx)、非晶矽(a-Si)。For example, the back passivation layer 12 and the cap layer 13 are both dielectric materials and may be a multilayer film structure. For example, the back passivation layer 12 may be selected from the group consisting of yttrium oxide (SiOx), yttrium oxynitride (SiONx), aluminum oxide (AlOx), amorphous germanium (a-Si).

在另一實施例中,也可以選擇在背面鈍化層12及蓋層13完成之後,再形成前述粗糙化(或金字塔形)結構101。In another embodiment, the roughening (or pyramidal) structure 101 may be formed after the back passivation layer 12 and the cap layer 13 are completed.

如第4圖所示,接著利用雷射製程,於半導體基板11的背面S2的背面鈍化層12以及蓋層13中,形成局部開孔區域103。As shown in FIG. 4, a partial opening region 103 is formed in the back surface passivation layer 12 and the cap layer 13 on the back surface S2 of the semiconductor substrate 11 by a laser process.

如第5圖所示,接著可以先在半導體基板11的背面S2的蓋層13上網印形成背面接觸電極,例如,可以利用銀漿網印出如第6圖中所例示的三排(R 1、R 2、R 3)的不連續、點狀的背銀圖案18。需注意,雖然圖中例示三排背銀圖案18,但並不限於此。例如,在其它實施中,也可以是僅有兩排背銀圖案18。點狀的背銀圖案18,其各點的面積或形狀可以視設計需求而調整。 As shown in FIG. 5, the back contact electrode may be formed by first printing on the cap layer 13 of the back surface S2 of the semiconductor substrate 11. For example, three rows (R 1 ) as illustrated in FIG. 6 may be printed by a silver paste screen. , discontinuous, point-like back silver pattern 18 of R 2 , R 3 ). It should be noted that although the three rows of back silver patterns 18 are illustrated in the drawings, they are not limited thereto. For example, in other implementations, there may be only two rows of back silver patterns 18. The dot-shaped back silver pattern 18, the area or shape of each point can be adjusted according to design requirements.

隨後,利用金屬漿料於半導體基板11的正面S1網印出正面電極圖案17。上述金屬漿料可以是銀漿,但不限於此。接著利用金屬漿料於半導體基板11的背面S2網印形成背面電極圖案19,使背面電極圖案19填滿局部開孔區域103。上述金屬漿料可以是鋁漿,但不限於此。Subsequently, the front electrode pattern 17 is screen printed on the front surface S1 of the semiconductor substrate 11 with a metal paste. The above metal paste may be a silver paste, but is not limited thereto. Next, the back surface electrode pattern 19 is formed by screen printing on the back surface S2 of the semiconductor substrate 11 with a metal paste, and the back surface electrode pattern 19 is filled with the partial opening region 103. The above metal paste may be an aluminum paste, but is not limited thereto.

最後,利用高溫快速燒結爐,進行正面電極圖案17、背面接觸電極18及背面電極圖案19的燒結,並於局部開孔區域103形成局部背面電場(local backside field, local BSF)104。Finally, the front electrode pattern 17, the back contact electrode 18, and the back electrode pattern 19 are sintered by a high temperature rapid sintering furnace, and a local backside field (local BSF) 104 is formed in the partial opening region 103.

本創作的主要技術特徵在於第6圖中所例示的不連續、點狀的背銀圖案18的面積僅僅佔半導體基板11的背面S2的面積的1.6%左右。經過電性驗證,若上述面積比例少於1.6%,則電池的電性已無法進一步獲得改善,且無法使用焊接題自動化生產。The main technical feature of the present invention is that the area of the discontinuous, dot-shaped back silver pattern 18 illustrated in Fig. 6 is only about 1.6% of the area of the back surface S2 of the semiconductor substrate 11. After electrical verification, if the above area ratio is less than 1.6%, the battery's electrical properties can no longer be further improved, and it is impossible to use the welding problem to automate the production.

過去先前技藝所使用的背銀圖案網版圖形對於高效PERC產品並不適合,背面鈍化層面積無法有效提升,倒至效率無法最佳化,並且背銀膠料的耗用量較大,生產成本較高。本創作可以將背面鈍化曾面積最佳化,並且可以使用生產焊接機台量產。根據實驗數句,若將背面鈍化層面積從94.55%提升至98.4%(鈍化曾面積增加及局部背面電場面積增加),整體轉換效率可以提升約0.2%。The back silver pattern screen pattern used in the past prior art is not suitable for high-efficiency PERC products. The area of the back passivation layer cannot be effectively improved, and the efficiency cannot be optimized, and the consumption of the back silver compound is large, and the production cost is relatively high. high. This creation can optimize the area of the back passivation and can be mass-produced using a production welding machine. According to the experimental sentence, if the area of the back passivation layer is increased from 94.55% to 98.4% (the passivation area is increased and the partial back surface electric field area is increased), the overall conversion efficiency can be improved by about 0.2%.

本創作至少包括以下的優點:(1)可以有效降低背銀使用量,藉此可以降低生產成本。(2)可以有效增加背面鈍化層面積以及局部背面電場(LBSF)的面積。(3)可以與PERC製程相容,不需要額外製程,即可增加轉換效率。The creation includes at least the following advantages: (1) The amount of back silver can be effectively reduced, thereby reducing production costs. (2) The area of the back passivation layer and the area of the partial back surface electric field (LBSF) can be effectively increased. (3) It can be compatible with the PERC process, and can increase the conversion efficiency without additional processes.

需注意,以上各製程步驟、順序僅為例示說明,其所用技術手段、方法僅為舉例,且各膜層材料不侷限於上述說明。It should be noted that the above various process steps and sequences are merely illustrative, and the technical means and methods used are merely examples, and the material of each film layer is not limited to the above description.

以上所述僅為本創作之較佳實施例,凡依本創作申請專利範圍所做之均等變化與修飾,皆應屬本創作之涵蓋範圍。The above descriptions are only preferred embodiments of the present invention, and all changes and modifications made by the scope of the patent application of the present invention should be covered by the present invention.

11‧‧‧半導體基板
12‧‧‧背面鈍化層
13‧‧‧蓋層
17‧‧‧正面電極圖案
18‧‧‧背銀圖案
19‧‧‧背面電極圖案
20‧‧‧局部鈍化層
101‧‧‧粗糙化(金字塔形)結構
103‧‧‧局部開孔區域
104‧‧‧局部背面電場
105‧‧‧表面摻雜區
106‧‧‧表面摻雜區
107‧‧‧抗反射層
S1‧‧‧正面(受光面)
S2‧‧‧背面
11‧‧‧Semiconductor substrate
12‧‧‧Back passivation layer
13‧‧‧ cover
17‧‧‧Front electrode pattern
18‧‧‧Back silver pattern
19‧‧‧Back electrode pattern
20‧‧‧Local passivation layer
101‧‧‧Roughened (pyramid) structure
103‧‧‧Partial opening area
104‧‧‧ Partial back electric field
105‧‧‧ surface doped area
106‧‧‧ surface doped area
107‧‧‧Anti-reflective layer
S1‧‧‧Front (glossy)
S2‧‧‧Back

第1圖至第6圖例示本創作製作一太陽能電池結構的剖面示意圖,其中,第6圖例示第5圖中以銀漿網印出的不連續、點狀的背銀圖案的上視示意圖。1 to 6 illustrate a schematic cross-sectional view of a solar cell structure produced by the present invention, wherein FIG. 6 illustrates a top view of a discontinuous, dot-shaped back silver pattern printed on a silver paste web in FIG.

11‧‧‧半導體基板 11‧‧‧Semiconductor substrate

13‧‧‧蓋層 13‧‧‧ cover

18‧‧‧背銀圖案 18‧‧‧Back silver pattern

S2‧‧‧背面 S2‧‧‧Back

R1、R2、R3‧‧‧排 R 1 , R 2 , R 3 ‧‧‧

Claims (10)

一種背面鈍化太陽能電池結構,包含有: 一半導體基板,具有一正面及一背面; 一背面鈍化層,設於該半導體基板的該背面上; 至少一局部開孔區域,設於該背面鈍化層中; 一不連續、點狀的背銀圖案,設於該背面鈍化層上;以及 一背面電極圖案,設於該背面鈍化層上,填入該局部開孔區域,並於該局部開孔區域內形成一局部背面電場。A back passivated solar cell structure comprising: a semiconductor substrate having a front surface and a back surface; a back passivation layer disposed on the back surface of the semiconductor substrate; at least a partial opening region disposed in the back passivation layer a discontinuous, dot-shaped back silver pattern disposed on the back passivation layer; and a back electrode pattern disposed on the back passivation layer, filling the partial opening area, and in the partial opening area A partial back surface electric field is formed. 如申請專利範圍第1項所述的背面鈍化太陽能電池結構,其中該不連續、點狀的背銀圖案的面積僅佔該背面的面積的1.6%。The back passivation solar cell structure of claim 1, wherein the discontinuous, dot-shaped back silver pattern has an area of only 1.6% of the area of the back surface. 如申請專利範圍第1項所述的背面鈍化太陽能電池結構,其中該不連續、點狀的背銀圖案排列成兩排至三排。The back passivation solar cell structure of claim 1, wherein the discontinuous, dot-shaped back silver pattern is arranged in two rows to three rows. 如申請專利範圍第1項所述的背面鈍化太陽能電池結構,其中該正面具有一粗糙化結構。The back passivated solar cell structure of claim 1, wherein the front side has a roughened structure. 如申請專利範圍第1項所述的背面鈍化太陽能電池結構,其中在該正面另包含有一表面摻雜區。The back passivated solar cell structure of claim 1, wherein the front side further comprises a surface doped region. 如申請專利範圍第5項所述的背面鈍化太陽能電池結構,其中在該正面另包含有一抗反射層,設於該表面摻雜區上。The back passivation solar cell structure of claim 5, wherein the front side further comprises an anti-reflection layer disposed on the surface doped region. 如申請專利範圍第6項所述的背面鈍化太陽能電池結構,其中在該正面另包含有一正面電極圖案,設於該抗反射層上。The back passivation solar cell structure of claim 6, wherein the front side further comprises a front electrode pattern disposed on the anti-reflective layer. 如申請專利範圍第1項所述的背面鈍化太陽能電池結構,其中另包含有一蓋層,設於該背面鈍化層上。The back passivation solar cell structure of claim 1, further comprising a cap layer disposed on the back passivation layer. 如申請專利範圍第8項所述的背面鈍化太陽能電池結構,其中該蓋層包含氮化矽。The back passivated solar cell structure of claim 8, wherein the cap layer comprises tantalum nitride. 如申請專利範圍第1項所述的背面鈍化太陽能電池結構,其中該背面鈍化層選自以下群組:氧化矽、氮氧化矽、氧化鋁、非晶矽。The back passivation solar cell structure according to claim 1, wherein the back passivation layer is selected from the group consisting of cerium oxide, cerium oxynitride, aluminum oxide, and amorphous cerium.
TW104218633U 2015-11-20 2015-11-20 Back passivated solar cell structure TWM519328U (en)

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