M310340 八、新型說明： 【新型所屬之技術領域】 本創作係有關於一種測試系統，特別是有關於一種可 測試一待測晶片於不同模式與條件下之測試系統。 【先前技術】 一般而言，晶片於封裝測試完成後，為了確保實際操 作時不會發生問題，因此會將晶片放到一個接近實際產品 ) 且可模擬外在的環境的測試系統中進行測試。一般而言， 待測晶片係與產品為一體。因此’當待測晶片進行壞境測 試時，待測晶片與產品整個都會一起測試。假設測試結果 為不正常時，無法確知是由待測晶片或是由於產品中的其 他模組工作不正常所引起。此外，萬一產品於測試過程中 發生工作不正常，導致燒壞或故障，很可能會使整個產品 報廢，如此一來，測試成本相對地提高了許多。 > 再者，通常測試系統只會對具有某一個特定溫度與溼 度的外在環境進行測試，舉例來說，測試常溫時的功能是 否正常。然而，外在環境的條件是相當複雜的，尤其現在 的產品都會銷售到許多地區，例如寒帶國家或是熱帶國 家，若以現行的測試系統，只選擇一個特定的環境影響下 進行測試，並不能確保晶片能在任何環境下都可以正常的 運作’無法保證產品的品質。 【新型内容】 有鑑於此，本創作提供一種測試系統，系統中包括一 0119-A21663TWF(N2)；Princeton9515；jasonkung 5 M310340 反應室（chamber)、一測試板以及一控制板。反應室具有可 调整的一溫度與一濕度。測試板係置放於反應室中，用以 ’貝J。式α又置於其上的一晶片。控制板轉接至測試板以及反應 室，用以產生複數調整信號與一控制信號。其中，當進行 一測試時，控制板依序輸出每一調整信號之其中一者至反 應室，以調整反應室之溫度與濕度，並且輸出控制信號以 控制晶片之一工作模式。 /本創作另提供-種測試系統，用以測試一晶片。測試 系、、先包括-電源供應裝置、—控制板、—測試板以及 反電Γ供應裝置用以提供一電塵輸出以驅動控制板 板。控制板輕接至電源供 =:度參數之複數調整信號以及-控制信 ===裝編制板，並且係置放於—反應室 -溫产盘—曰糸位於'則5式板上’且反應室具有可調整的 〜d驅動模_接至該载模組。 告 =:物，空制板依序輪出每一調整信號之其 反應至’以調整反應室之、w 、， 號以控制晶片之-工作模式恤又/丄又，亚且輸出控制信 明顯'易懂，下:::上二他目的、特徵、和優點能更 詳細說明如^特舉一1 父佳實施例，並配合所附圖示，作 【實施方式】 明參閱第1圖，第1圖 示意圖。測試系統1〇〇包 控 匕δ有—電壓供應裝置u〇、一 °^-A21663TWP(N2)：Prjncet〇n95i5；jas〇nkung 6 M310340 制板120、一測試板130以及一反應室140。其中，電源供 應裝置110耦接控制板120與測試板130，且測試板130 與控制板120耦接。 此外，測試板130係設置於反應室140中，並且有一 測試晶片132置放於其上。電源供應裝置110具有可調整 大小的電壓輸出，用以提供控制板120與測試板130所需 要的工作電壓。反應室140具有可調整的一溫度Tc與一濕 度He。控制板120用以產生複數調整信號與一控制信號， 其中調整信號可調整反應室140之溫度Tc與濕度He，而 控制信號則可控制測試晶片132的工作模式。 請參閱第2圖，第2圖顯示本創作一控制板之細部示 意圖。控制板120中包括了調整單元124以及控制單元 122。其中，調整單元124可以產生上述調整信號，用來調 整反應室140之溫度Tc與溼度He。控制單元122可產生 上述控制信號，可以控制待測晶片132之工作模式，其中 工作模式可藉由控制單元122中的電壓控制模組1222與負 載量控制模組1220所控制。關於電壓控制模組1222與負 載量控制模組1220的詳細運作將詳細介紹於下。此外，調 整信號中至少包括了一溫度參數與一溼度參數，用以設定 反應室140之溫度Tc與溼度He。這些調整信號與測試條 件有關，可以根據想要測試的各種參數，產生對應的調整 信號。反應室140中包括有一溫度控制單元142與一溼度 控制單元144，溫度控制單元142用以調整反應室140的 溫度Tc，溼度控制單元144則用以調整反應室140的溼度 0119-A21663TWF(N2)；Princeton9515；]asonkung 7 M310340M310340 VIII. New Description: [New Technology Field] This creation is about a test system, especially a test system that can test a wafer under test in different modes and conditions. [Prior Art] In general, after the package test is completed, in order to ensure that the actual operation does not cause a problem, the wafer is placed in a test system that is close to the actual product and can simulate an external environment. In general, the wafer to be tested is integrated with the product. Therefore, when the wafer to be tested is subjected to a bad environment test, the wafer to be tested and the entire product are tested together. If the test result is abnormal, it is impossible to know whether it is caused by the wafer to be tested or because other modules in the product are not working properly. In addition, if the product does not work properly during the test, resulting in burnout or failure, it is likely to scrap the entire product, so the test cost is relatively improved. > Furthermore, the test system usually only tests the external environment with a specific temperature and humidity, for example, whether the function at normal temperature is normal. However, the conditions of the external environment are quite complicated, especially if the current products are sold to many regions, such as cold countries or tropical countries. If the current test system is used, only one specific environmental impact is selected for testing. Ensure that the wafer can operate normally in any environment. 'The quality of the product cannot be guaranteed. [New content] In view of this, the present invention provides a test system comprising a 0119-A21663TWF (N2); Princeton 9515; jasonkung 5 M310340 reaction chamber, a test board and a control board. The reaction chamber has an adjustable temperature and a humidity. The test board is placed in the reaction chamber for use. A wafer on which the equation α is placed. The control board is transferred to the test board and the reaction chamber for generating a plurality of adjustment signals and a control signal. Wherein, when performing a test, the control board sequentially outputs one of each adjustment signal to the reaction chamber to adjust the temperature and humidity of the reaction chamber, and outputs a control signal to control one of the operating modes of the wafer. / This creation also provides a test system for testing a wafer. The test system includes a power supply unit, a control board, a test board, and an anti-electricity supply unit for providing an electric dust output to drive the control board. The control board is lightly connected to the power supply for the :: multi-level adjustment signal of the degree parameter and - control letter === loading plate, and is placed in the - reaction chamber - temperature production plate - 曰糸 is located on the '5 type plate' and The reaction chamber has an adjustable ~d drive mode to the carrier module. Report =: object, the empty board in turn rotates each adjustment signal to its response to 'to adjust the reaction chamber, w,, to control the wafer - work mode shirt and / 丄, and the output control letter is obvious 'Intelligible, Next::: The second purpose, characteristics, and advantages can be explained in more detail. For example, the following is a detailed description of the parent embodiment, and with the accompanying drawings, [Embodiment] See Figure 1 for details. Figure 1 is a schematic diagram. The test system 1 〇〇 有 has a voltage supply device u 〇, a ° ^ - A21663TWP (N2): Prjncet 〇 n95i5; jas 〇nkung 6 M310340 plate 120, a test plate 130 and a reaction chamber 140. The power supply device 110 is coupled to the control board 120 and the test board 130, and the test board 130 is coupled to the control board 120. Further, a test board 130 is disposed in the reaction chamber 140, and a test wafer 132 is placed thereon. The power supply unit 110 has a resizable voltage output for providing the desired operating voltage for the control board 120 and the test board 130. The reaction chamber 140 has an adjustable temperature Tc and a humidity He. The control board 120 is configured to generate a plurality of adjustment signals and a control signal, wherein the adjustment signal adjusts the temperature Tc and the humidity He of the reaction chamber 140, and the control signal controls the operation mode of the test wafer 132. Please refer to Figure 2, which shows a detailed description of the control panel of this creation. The control unit 120 includes an adjustment unit 124 and a control unit 122. The adjusting unit 124 can generate the above adjustment signal for adjusting the temperature Tc and the humidity He of the reaction chamber 140. The control unit 122 can generate the control signal, and can control the working mode of the chip 132 to be tested. The working mode can be controlled by the voltage control module 1222 and the load control module 1220 in the control unit 122. The detailed operation of the voltage control module 1222 and the load control module 1220 will be described in detail below. In addition, the adjustment signal includes at least a temperature parameter and a humidity parameter for setting the temperature Tc and the humidity He of the reaction chamber 140. These adjustment signals are related to the test conditions and can generate corresponding adjustment signals according to various parameters to be tested. The reaction chamber 140 includes a temperature control unit 142 for adjusting the temperature Tc of the reaction chamber 140, and a humidity control unit 144 for adjusting the humidity of the reaction chamber 140. 0119-A21663TWF(N2) ;Princeton9515;]asonkung 7 M310340
He。其中，上述控制單元可依據控制板120輸出的調整信 號，自動調整反應室140中的溫度Tc與濕度He，產生所 要的溫度與溼度。以下詳述測試流程。 首先，電壓供應裝置110提供一電壓輸出，啟動控制 板120與測試板130開始進行測試。此時，測試板130上 的待測晶片132也開始執行。接著，控制板120中的調整 單元124開始輸出第一個調整信號到反應室140，此調整 信號中包含了溫度參數與溼度參數。於是，反應室140中 > 的溫度控制單元142根據調整信號中的溫度參數調整反應 室的溫度Tc。同樣地，反應室140中的溼度控制單元144 根據調整信號中的溼度參數調整反應室140的濕度He。因 此，反應室140的溫度Tc與溼度He可調整至調整信號所 指定之測試環境。由於，待測晶片132係置放於反應室140 中，因此待測晶片132會在調整信號所指定之測試環境下 進行測試。於測試時，控制板130可設定每隔一段時間後， 依序輸出一個調整信號到反應室140中，使得反應室140 > 的溫度Tc與溼度He依據調整信號中的溼度參數與溼度參 數被重新設定。於是，待測晶片132便可於另一測試環境 下進行測試。同時，控制板130可以記錄待測晶片132於 每個調整信號所指定的測試條件下的執行結果。 換言之，只要依據所有想要測試的環境變數（溫度、溼 度）產生對應的調整信號，再依序輸出每一個調整信號到反 應室140中，待測晶片132就可測試於調整信號所指定的 不同環境下。最後，檢查這些測試結果，便可得知待測晶 0119-A21663TWF(N2)；Princeton9515；jasonkung 8 M310340 片13 2於不同環境下是否仍能正常工作，以作進一步的分 析。 舉例來說，假設待測晶片132有兩種不同的環境必須 加以測試：溫度25°C與溼度80%、以及溫度85。(：與溼度 20%。首先，可依據上述兩種環境變數產生調整信號1與調 整信號2。其中，調整信號1中的溫度參數T1設為25，其 渔度參數Η1設為80。同樣地，調整信號2中的溫度參數 丁2設為85，其溼度參數Η2設為20。接著，控制板120會 • 傳送調整信號1至反應室140。反應室140中的溫度控制 單元142會相應於調整信號1中的溫度參數Τ1而將反應室 140的溫度Tc設為25°C，其溼度控制單元144則會相應於 調整信號1中的濕度參數H1將反應室140的溼度He設為 80%。由於反應室140的溫度Tc與溼度He隨著調整信號 1而改變，位於測試板130上的待測晶片132便可測試於 調整信號1所設定的溫度25°C與溼度80%的環境下。當上 述測試經過一段時間例如2小時後，紀錄測試的結果為第 ® -測試結果。 接著，控制板120再傳送調整信號2至反應室140。反 應室140中的溫度控制單元142會相應於調整信號2中的 溫度參數T2將反應室140的溫度Tc設為85°C，其溼度控 制單元144則會相應於調整信號2中的濕度參數H2將反 應室140溼度He設為20%。由於反應室140的溫度Tc與 溼度He隨著調整信號2而改變，位於測試板130上的待測 晶片132將測試於調整信號2所設定的溫度85°C與溼度 0119-A21663TWF(N2)；Princeton9515；jasonkung 9 M310340 20%的環境。同樣地，當上述測試經過一段時間後，紀錄 測試的結果為第二測試結果。最後，再檢查第一與第二測 試結果，就可以知道測試晶片132在兩種不同環境下是否 可以正常的工作。 利用本創作，可利用不同的調整信號來表示各種不同 的測試環境，再據此控制反應室140的溫度與溼度，使得 測試晶片132可測試於調整信號裡的環境變數所設定的環 境下，可以精確的掌握晶片在各種環境下的測試結果。 • 值得注意的是，於本發明之另一實施例中，反應室140 係可設定為自動調整溫度及溼度，只要將反應室140預先 設定完成，反應室140即可自動根據設定好的溫度及溼度 自動進行改變’因此’於本實施例中’並不需要利用測試 信號隨時調整反應室140的溫度及溼度。 於本創作中，調整信號裡的溫度參數與溼度參數的設 計係依據一般要求的規格而定，即溫度範圍介於-40°C與85 °C之間，溼度範圍介於0與98%之間。因此，可於此範圍 ® 内選定所有需要測試的溫度與溼度，並產生對應的調整信 號進行測試。值得注意的是，這些調整信號於測試時會依 序輸出至反應室140。為了避免測試時，反應室140本身 的溫度誤差可能造成無效的測試結果，設計上，特別使每 兩個相鄰調整信號之溫度參數兩者間的溫度差大於5°C。 舉例來說，請參見表一，表一為依據本創作一調整信號列 表。於表一中，調整信號5的溫度參數為0，其左邊相鄰 的調整信號4的溫度參數必須超過5(°C)，故調整信號4的 0119-A21663TWF(N2);Princeton9515；jasonkung 10 M310340 溫度參數設為13。同樣地，調整信號5右邊相鄰的調整信 號6的溫度參數與其溫度參數的溫度差也必須大於5，故 調整信號6的溫度參數設為25。 表一 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 溫度 (°C) -40 -23 -5 13 0 25 40 60 85 78 34 17 7 -12 1 -17 -32 溼度 (%) 0 0 0 0 0 80 98 45 20 30 70 55 0 0 0 0 0 • 另外，每一個調整信號可表示某一常用的參考環境下 的溫度與溼度。舉例來說，調整信號1中的溫度與濕度參 數係為-40(°c)與〇(%)，用以表示測試時的最低溫度要求、 調整信號6中的溫度與濕度參數係為25(°C)與80(%)，用 以表示常溫下的測試條件、調整信號2中的溫度與濕度參 數係為-23(°C )與〇(%)，用以表示北美洲的初春的白天溫 度、以及調整信號6中的溫度與濕度參數係為85(°C)與 0(%)，用以表示測試時的最高溫度要求。 • 此外，為了提高測試結果的可靠度，調整信號的溫度 安排係大致上由低溫到南溫’再從南溫回到低溫。值得注 意的是，調整信號的溫度安排可包含其他不同方式，例如 可由南溫到低溫’再從低溫回到南溫。如此可避免早獨由 低溫測試到高溫時測試通過的待測晶片132,可能於返回 到常溫下工作不正常。值得注意的是，為了使測試時的溫 度差別較大或是針對某一範圍的溫度變化想要特別測試， 因此安排調整信號的順序時，可特別安插幾個調整信號， 0119-A21663TWF(N2)；Princeton9515；jasonkung 11 M310340 加大測試的溫度範圍。請參見表一，調整信號1到6的溫 度參數係大致上由測試的最低溫-40°C逐步升高到常溫25 °C，調整信號6到9的溫度參數係由常溫25T：逐步升高到 測試的最高溫85°C，調整信號9到11的溫度參數係由測 試的最高溫85°C逐步下降到接近常溫的34°C，調整信號 11到17的溫度參數則大致上由接近常溫的34°C再回到低 溫的-32°C。其中，調整信號5特別安插在調整信號4與調 整信號6之間來加大測試的溫度範圍。同樣地，調整信號 > 14特別安插在調整信號13與調整信號15之間來加大測試 的溫度範圍。因此，可以依據各種不同的規格，訂出所有 可能的環境變數，再利用上述規則產生調整信號。於一實 施例中，舉例來說，依據上述規則共可得到如表一所示的 17個調整信號。 除了這些調整信號之外，於實際操作時，待測晶片132 也可能會操作於不同工作模式，這些工作模式係與工作電 壓準位與其承受負載量相關。控制板120裡的控制單元122 p 可用來控制待測晶片132的工作模式，使其測試於不同模 式之下。請參閱第2圖，控制單元122中包括了電壓控制 模組1222與負載量控制模組1220。電壓控制模組1222可 控制提供給測試晶片132的工作電壓，而負載量控制模組 1220則是設定測試晶片132所承受的負載量。 一般而言，晶片都會有工作電壓方面的規格定義以界 定其正常工作範圍。舉例來說，某些晶片的工作電壓範圍 可能介於2.7V到5V之間，表示此晶片在此工作電壓範圍 0119-A21663TWF(N2)；Princeton9515；jasonkung 12 M310340 内都必須要維持正常的工作，而 般情況下晶片的工作電壓為3第宜中曰广丄表不： 高工作電壓5V定義為 八 日日片可谷忍的最 電壓2 7V定義大電壓’而其可容忍的最低工作 私/土厶/ V疋義取小電壓。 立 電塵與最小電壓係可依規林Μ⑧的疋’最大電壓、正常 r電壓控_組1222可㈣並使測試晶^ =創作 常電壓、最大電壓及最小I- 工作於正 取小玉壓二種電壓準位下。 另外，晶片所承受的負载量 負载、一般操作 、JT刀為較小負载的最小 #曰、吊負载與滿载時的最大負载二種f 载！。舉例來說，以一個有广-種負 田此網路父換器於待機時⑽ 都在使用時為最大負載μ 2載H所有$個通道 模式。於本創作中㈣ '曰/ 民模式下則為最小負载 '本=作中，負载置控制模组122〇可 日日片132工作於最小負載、 11史判口式 量下。 ^ ^貞载及取大負载三種負载 因此，進行測試時，可在每一個 應室⑽溫度餘度下，利用控制單幻2^:：!的反 模組1222與負、电昼控制 竹描4 _、、且1220改交待測晶片132的工 作板式’相剌各種工作模式下_試結果，々 表一表不待測晶片132於—個調整信號設定的環产下 的不同負載量與工作電遂準位的測試結果。'兄下 待測晶片132在不同負载量與 ;二不’ 果可分為正常财或是失敗” FJ，^ 為”ΡΑςς，， ^ ^ ^ t測试結果 ，表不在某—特定1載量與—特定卫作電壓的條 〇119-A21663TWF(N2)；Phnceton9515；j( jasonkung 13 M310340 為”FAIL，，’，1 W m的運作保持正常。反之，若測試結果 當m。’ Γ表不於上述條件下的待測晶片13 2係為不正 Α矣-故。牛例來說，假設表二為調整信號4的測試結果， 當工作電遷為最大電麼且處於最小負載模式 二結果，表示待測晶片132可以在此條 澄产來:八運作。由表—可知，調整信號4的溫度參數與 戶ί '二別為13fc)與0(%)。亦即，待測晶片132在溫 ί载度為G%的環境巾且操作於最A電壓與最小 負載杈式的^況下，仍可保持正常地運作。He. The control unit can automatically adjust the temperature Tc and the humidity He in the reaction chamber 140 according to the adjustment signal outputted by the control board 120 to generate a desired temperature and humidity. The test process is detailed below. First, the voltage supply device 110 provides a voltage output that initiates the test panel 120 and the test board 130 to begin testing. At this time, the wafer 132 to be tested on the test board 130 is also started to be executed. Next, the adjustment unit 124 in the control panel 120 begins to output a first adjustment signal to the reaction chamber 140, which includes temperature parameters and humidity parameters. Thus, the temperature control unit 142 of the > in the reaction chamber 140 adjusts the temperature Tc of the reaction chamber in accordance with the temperature parameter in the adjustment signal. Similarly, the humidity control unit 144 in the reaction chamber 140 adjusts the humidity He of the reaction chamber 140 in accordance with the humidity parameter in the adjustment signal. Therefore, the temperature Tc and humidity He of the reaction chamber 140 can be adjusted to the test environment specified by the adjustment signal. Since the wafer to be tested 132 is placed in the reaction chamber 140, the wafer 132 to be tested is tested under the test environment specified by the adjustment signal. During the test, the control board 130 can be set to output an adjustment signal to the reaction chamber 140 in sequence, so that the temperature Tc and humidity He of the reaction chamber 140 > are based on the humidity parameter and the humidity parameter in the adjustment signal. reset. Thus, the wafer 132 to be tested can be tested in another test environment. At the same time, the control board 130 can record the execution result of the wafer 132 to be tested under the test conditions specified by each adjustment signal. In other words, as long as the corresponding adjustment signal is generated according to all the environmental variables (temperature, humidity) to be tested, and then each adjustment signal is sequentially outputted to the reaction chamber 140, the wafer 132 to be tested can be tested for the difference specified by the adjustment signal. in environment. Finally, by examining these test results, it is known whether the crystal to be tested 0119-A21663TWF(N2); Princeton9515; jasonkung 8 M310340 piece 13 2 can still work normally in different environments for further analysis. For example, assume that the wafer 132 to be tested has two different environments that must be tested: temperature 25 ° C and humidity 80%, and temperature 85. (: and humidity 20%. First, the adjustment signal 1 and the adjustment signal 2 can be generated according to the above two environmental variables. The temperature parameter T1 in the adjustment signal 1 is set to 25, and the fishing parameter Η1 is set to 80. The temperature parameter in the adjustment signal 2 is set to 85, and the humidity parameter Η2 is set to 20. Next, the control board 120 transmits the adjustment signal 1 to the reaction chamber 140. The temperature control unit 142 in the reaction chamber 140 corresponds to Adjusting the temperature parameter Τ1 in the signal 1 and setting the temperature Tc of the reaction chamber 140 to 25 ° C, the humidity control unit 144 sets the humidity He of the reaction chamber 140 to 80% corresponding to the humidity parameter H1 in the adjustment signal 1. Since the temperature Tc and the humidity He of the reaction chamber 140 change with the adjustment signal 1, the wafer 132 to be tested on the test board 130 can be tested under the environment where the temperature set by the adjustment signal 1 is 25 ° C and the humidity is 80%. When the above test is performed for a period of time, for example, 2 hours, the result of the recording test is the first - test result. Next, the control board 120 transmits the adjustment signal 2 to the reaction chamber 140. The temperature control unit 142 in the reaction chamber 140 corresponds to Adjust signal 2 The temperature parameter T2 sets the temperature Tc of the reaction chamber 140 to 85 ° C, and the humidity control unit 144 sets the humidity He of the reaction chamber 140 to 20% corresponding to the humidity parameter H2 in the adjustment signal 2. Since the reaction chamber 140 The temperature Tc and the humidity He change with the adjustment signal 2, and the wafer 132 to be tested on the test board 130 will be tested at the temperature set by the adjustment signal 2 at 85 ° C and the humidity 0119-A21663TWF (N2); Princeton 9515; jasonkung 9 M310340 20% of the environment. Similarly, when the above test is over a period of time, the result of the record test is the second test result. Finally, after checking the first and second test results, it can be known that the test chip 132 is in two different environments. Whether it can work normally. With this creation, different adjustment signals can be used to represent various test environments, and then the temperature and humidity of the reaction chamber 140 can be controlled, so that the test chip 132 can be tested in the environmental variables of the adjustment signal. In the set environment, the test results of the wafer under various environments can be accurately grasped. • It is worth noting that in another embodiment of the present invention, the reaction chamber The 140 system can be set to automatically adjust the temperature and humidity. As long as the reaction chamber 140 is pre-set, the reaction chamber 140 can be automatically changed according to the set temperature and humidity. Therefore, in this embodiment, the test does not need to be used. The signal adjusts the temperature and humidity of the reaction chamber 140 at any time. In this creation, the design of the temperature parameter and the humidity parameter in the adjustment signal is determined according to the general requirements, that is, the temperature range is between -40 ° C and 85 ° C. The humidity range is between 0 and 98%. Therefore, all the temperatures and humidityes to be tested can be selected in this range ® and the corresponding adjustment signals are generated for testing. It is worth noting that these adjustment signals are output to the reaction chamber 140 in sequence during the test. In order to avoid testing, the temperature error of the reaction chamber 140 itself may cause ineffective test results, and in particular, the temperature difference between the temperature parameters of each two adjacent adjustment signals is greater than 5 °C. For example, please refer to Table 1. Table 1 is a list of adjusted signals according to this creation. In Table 1, the temperature parameter of the adjustment signal 5 is 0, and the temperature parameter of the adjustment signal 4 adjacent to the left side must exceed 5 (° C.), so the signal of the signal 4 is 0119-A21663TWF (N2); Princeton 9515; jasonkung 10 M310340 The temperature parameter is set to 13. Similarly, the temperature difference between the temperature parameter of the adjustment signal 6 adjacent to the right side of the adjustment signal 5 and its temperature parameter must also be greater than 5, so the temperature parameter of the adjustment signal 6 is set to 25. Table 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Temperature (°C) -40 -23 -5 13 0 25 40 60 85 78 34 17 7 -12 1 -17 -32 Humidity (% ) 0 0 0 0 0 80 98 45 20 30 70 55 0 0 0 0 0 • In addition, each adjustment signal can indicate the temperature and humidity in a common reference environment. For example, the temperature and humidity parameters in the adjustment signal 1 are -40 (°c) and 〇 (%), which are used to indicate the minimum temperature requirement during the test, and the temperature and humidity parameters in the adjustment signal 6 are 25 ( °C) and 80 (%), used to indicate the test conditions at normal temperature, the temperature and humidity parameters in the adjustment signal 2 are -23 (°C) and 〇 (%), which is used to indicate the daytime in early spring in North America. The temperature and humidity and humidity parameters in the adjustment signal 6 are 85 (°C) and 0 (%) to indicate the highest temperature requirement during the test. • In addition, in order to improve the reliability of the test results, the temperature adjustment of the adjustment signal is generally from low temperature to south temperature and then from south temperature to low temperature. It is worth noting that the temperature setting of the adjustment signal can include other different methods, such as from south to low temperature and then from low temperature to south temperature. This avoids the wafer 132 to be tested that has passed the test from low temperature test to high temperature, and may not work properly when returning to normal temperature. It is worth noting that in order to make the temperature difference during the test or to test the temperature change for a certain range, it is necessary to arrange a few adjustment signals when arranging the order of the adjustment signal, 0119-A21663TWF(N2) ;Princeton9515; jasonkung 11 M310340 Increase the temperature range of the test. Please refer to Table 1. The temperature parameters of the adjustment signals 1 to 6 are gradually increased from the lowest temperature of the test to -40 °C to 25 °C. The temperature parameters of the adjustment signals 6 to 9 are from normal temperature 25T: gradually increase. To the highest temperature of the test, 85 °C, the temperature parameters of the adjustment signal 9 to 11 are gradually reduced from the highest temperature of 85 °C to 34 °C near the normal temperature, and the temperature parameters of the adjustment signals 11 to 17 are substantially close to the normal temperature. At 34 ° C, return to the low temperature of -32 ° C. Among them, the adjustment signal 5 is particularly inserted between the adjustment signal 4 and the adjustment signal 6 to increase the temperature range of the test. Similarly, the adjustment signal > 14 is particularly interposed between the adjustment signal 13 and the adjustment signal 15 to increase the temperature range of the test. Therefore, all possible environmental variables can be determined according to various specifications, and the above rules can be used to generate the adjustment signal. In one embodiment, for example, a total of 17 adjustment signals as shown in Table 1 can be obtained according to the above rules. In addition to these adjustment signals, in operation, the wafers 132 to be tested may also operate in different operating modes, which are related to the operating voltage level and the amount of load they are subjected to. The control unit 122p in the control board 120 can be used to control the mode of operation of the wafer 132 to be tested to be tested under different modes. Referring to FIG. 2, the control unit 122 includes a voltage control module 1222 and a load amount control module 1220. The voltage control module 1222 can control the operating voltage supplied to the test wafer 132, and the load control module 1220 sets the amount of load that the test wafer 132 is subjected to. In general, the wafer has a specification of the operating voltage to define its normal operating range. For example, some wafers may operate between 2.7V and 5V, indicating that the wafer must maintain normal operation in this operating voltage range of 0119-A21663TWF (N2); Princeton 9515; jasonkung 12 M310340. Under normal circumstances, the working voltage of the chip is 3. The high working voltage is 5V. The high working voltage is defined as the maximum voltage of the 7-day solar film. The maximum voltage of 2 7V defines the large voltage' and its tolerable minimum working private / Bandits / V疋 take a small voltage. The vertical dust and the minimum voltage can be adjusted according to the regulation of the maximum voltage, normal r voltage control _ group 1222 can (4) and test crystal = create constant voltage, maximum voltage and minimum I- work in the two small pressure Under the voltage level. In addition, the load on the wafer, the general operation, the JT knives are the minimum load of the smaller load, the hoist load and the maximum load at the full load. . For example, if there is a wide-range negative field, the network parent switcher is in standby mode (10) when it is in use for the maximum load μ 2 load H for all $ channel modes. In this creation (4) 'min/min mode is the minimum load' in this work, the load control module 122 can work on the daily load 132 under the minimum load, 11 history judgment. ^ ^ Load and take three loads of large load. Therefore, when testing, you can use the anti-module 1222 of control single magic 2^::! to control the bamboo drawing with negative and electric power in each room (10) temperature margin. 4 _,, and 1220 change the working plate type of the wafer to be tested 132 in various working modes _ test results, the table 1 does not test the different loads and work of the wafer 132 under the loop set by the adjustment signal Test results of the eDonkey level. 'Brothers under test 132 are at different load levels; two no' can be divided into normal wealth or failure" FJ, ^ is "ΡΑςς,, ^ ^ ^ t test results, the table is not a certain - specific 1 load With the specific servant voltage bar 119-A21663TWF (N2); Phnceton 9515; j (jasonkung 13 M310340 for "FAIL,, ', 1 W m operation remains normal. Conversely, if the test result is m.' The wafer to be tested 13 2 under the above conditions is not correct. Therefore, for the case of cattle, it is assumed that Table 2 is the test result of the adjustment signal 4, when the working electromigration is the maximum power and the result is in the minimum load mode. It indicates that the wafer to be tested 132 can be produced in this section: eight operations. From the table, it can be seen that the temperature parameter of the adjustment signal 4 is equal to 13fc) and 0 (%). That is, the wafer to be tested 132 is The temperature is G% environmental towel and operates at the most A voltage and minimum load mode, and can still operate normally.
----- --------------------- —— 電壓 正常電壓 最小雷壓 最小負载 PASS —------- PASS /_3l. DACC i常負載 PASS PASS Γ nOo PASS 最大負載 —----1 _PASS PASS 丄 ilVJVJ -----— PASS 一 儿入衣>兄r，會得到一個類似表 -/、曰曰片賴結果，再檢查這些測試結果，就可以精確掌 握待測晶片132於各種測試條件下的測試結果。第4圖 3本創作之-測試流程示意圖。其中，曲線物表二測 试蚪的溫度，曲線420表示測試時的溼度，曲線43〇表示 測試時晶片所承受的負載量，曲線物表: 工作電^。曲線物中的d、WF分別表示測 的負载置分別設定為最大負載、正常負载與最小負载。曲 線440中的a、b肖c分別表示測試時晶片的工作電壓分 別設定為最大電塵、正常電壓與最小電壓。由圖可知^ 〇119 A21663TWF(N2);Princeton9515;jasonkung 14 M310340 據本創作，待測晶片132將測試於17種環境下，並且每個 環境中，將測試晶片132的9種工作模式，而第4圖橫軸 座標則代表時間軸，舉曲線440中的A為例，代表晶片於 最大電壓A的狀態下連續測試2個小時。 因此，依據本創作之測試系統，可於各種預設的溫度 與溼度下，將待測晶片132測試於各種工作模式下。相較 於習知技術，本創作之測試系統係利用所有的測試條件產 生對應的調整信號、將所有調整信號依據上述規則安排測 > 試順序、再依序利用調整信號設定反應室140的溫度與溼 度，可完全測試待測晶片132在各種溫、溼度環境下與各 種模式中的測試結果，對於產品的可靠度可大幅地提高， 也可提南產品的品質。 另外，於實際操作時，待測晶片132可能需要接收一 些外部信號以及驅動一些外部元件來執行其功能。舉例來 說，若待測晶片132為一個音效晶片時，其需要一個外部 音源模組提供所需的音源信號，並藉以驅動一個揚聲器使 > 其發聲。因此，可於測試系統100之外再外掛一個驅動模 組150，組成另一個測試系統300，如第3圖所示。於是， 將待測晶片132所需的這些外部信號以及驅動元件設置於 驅動模組150中，並使其與測試板130相耦接，藉以於進 行測試時，可相應控制板120中負載量控制單元1220的負 載量設定，由待測晶片132驅動並產生待測晶片132所需 的負載量。 雖然本創作已以較佳實施例揭露如上，然其並非用以 0119-A21663TWF(N2)；Princeton9515；jasonkung M310340 限定本創作，任何熟習此技藝者，在不脫離本創作之精神 和範圍内，當可作些許之更動與潤飾，因此本創作之保護 範圍當視後附之申請專利範圍所界定者為準。----- --------------------- —— Voltage normal voltage minimum lightning pressure minimum load PASS —------- PASS /_3l. DACC i constant load PASS PASS Γ nOo PASS maximum load ----- _PASS PASS 丄 ilVJVJ ----- PASS brother r, will get a similar table - /, 赖 赖 ,, By checking these test results, the test results of the wafer 132 to be tested under various test conditions can be accurately grasped. Figure 4 3 Schematic diagram of the test-test process. Among them, the curve table 2 measures the temperature of the enthalpy, the curve 420 represents the humidity at the time of the test, and the curve 43 〇 represents the load on the wafer at the time of the test, and the curve table: the working electricity ^. The d and WF in the curve indicate that the measured load is set to the maximum load, the normal load and the minimum load, respectively. A and b in the curve 440 indicate that the operating voltage of the wafer during the test is set to the maximum electric dust, the normal voltage and the minimum voltage, respectively. As can be seen from the figure, 〇 119 A21663TWF (N2); Princeton 9515; jasonkung 14 M310340 According to the present creation, the wafer to be tested 132 will be tested in 17 environments, and in each environment, the nine working modes of the wafer 132 will be tested, and 4 The horizontal axis coordinate represents the time axis, and A in the curve 440 is taken as an example, and the wafer is continuously tested for 2 hours under the state of the maximum voltage A. Therefore, according to the test system of the present invention, the wafer to be tested 132 can be tested in various working modes under various preset temperatures and humidity. Compared with the prior art, the test system of the present invention uses all the test conditions to generate corresponding adjustment signals, arranges all the adjustment signals according to the above rules, and then sequentially adjusts the temperature of the reaction chamber 140 by using the adjustment signals. With the humidity, the test results of the wafer 132 to be tested under various temperature and humidity environments and various modes can be completely tested, and the reliability of the product can be greatly improved, and the quality of the product can be improved. In addition, in actual operation, the wafer under test 132 may need to receive some external signals and drive some external components to perform its functions. For example, if the chip to be tested 132 is a sound effect chip, it needs an external sound source module to provide the desired sound source signal, and thereby drive a speaker to make it sound. Therefore, a drive module 150 can be externally attached to the test system 100 to form another test system 300, as shown in FIG. Therefore, the external signals and the driving components required for the chip 132 to be tested are disposed in the driving module 150 and coupled to the test board 130, so that the load amount control in the control board 120 can be correspondingly controlled during the test. The load amount of unit 1220 is set, driven by the wafer to be tested 132 and produces the amount of load required for the wafer 132 to be tested. Although the present invention has been disclosed above in the preferred embodiment, it is not intended to be used in the context of 0119-A21663TWF (N2); Princeton 9515; jasonkung M310340, and anyone skilled in the art, without departing from the spirit and scope of the present invention, Some changes and refinements may be made, so the scope of protection of this creation is subject to the definition of the patent application scope attached.
0119-A21663TWF(N2)；Princeton9515；jasonkung 16 M310340 【圖式簡單說明】 第1圖顯示本創作一測試系統之示意圖。 第2圖顯示本創作之一控制板之示意圖。 第3圖顯示本創作另一測試系統之示意圖。 第4圖顯示本創作之一測試流程示意圖。 【主要元件符號說明】 100〜測試系統 110〜電壓供應裝置 _ 120〜控制板 122〜控制單元 124〜調整單元 13 0〜測試板 132〜待測晶片 140〜反應室 142〜溫度控制單元 | 144〜濕度控制單元0119-A21663TWF (N2); Princeton 9515; jasonkung 16 M310340 [Simple description of the diagram] Figure 1 shows a schematic diagram of the test system of the present creation. Figure 2 shows a schematic diagram of one of the control panels of this creation. Figure 3 shows a schematic diagram of another test system for this creation. Figure 4 shows a schematic diagram of one of the test processes for this creation. [Main component symbol description] 100 to test system 110 to voltage supply device _ 120 to control board 122 to control unit 124 to adjustment unit 13 0 to test board 132 to wafer 140 to reaction chamber 142 to temperature control unit | 144 Humidity control unit
Tc〜溫度 He〜歷度 ΤΙ、T2〜溫度參數 HI、H2〜溼度參數 15 0〜驅動模組 3 00〜測試糸統 410-440〜曲線 1220〜負載量控制模組 0119-A21663TWF(N2)；Princeton9515；jasonkung M310340 1222〜電壓控制模組Tc ~ temperature He ~ calendar ΤΙ, T2 ~ temperature parameter HI, H2 ~ humidity parameter 15 0 ~ drive module 3 00 ~ test system 410-440 ~ curve 1220 ~ load control module 0119-A21663TWF (N2); Princeton9515; jasonkung M310340 1222 ~ voltage control module
0119-A21663TWF(N2)；Princeton9515；]asonkung 180119-A21663TWF(N2);Princeton9515;]asonkung 18