M379085 五、新型說明： 【新型所屬之技術領域】 本創作是有關於一種主動元件陣列基板，且特別是有 關於一種檢測電路之能力良好的主動元件陣列基板。 【先前技術】 於諸多的平面顯示器中，具有高晝質、空間利用效率 佳、低消耗功率、無輕射等優越特性的薄膜電晶體液晶顯M379085 V. New description: [New technical field] This creation is related to an active device array substrate, and in particular to an active device array substrate having a good capability for detecting a circuit. [Prior Art] In many flat panel displays, thin film transistor liquid crystal display with superior properties such as high quality, good space utilization efficiency, low power consumption, and no light emission
^^(Thm Film Transistor Liquid Crystal Display, TFT fD)’已成為顯示n領域中的主流，膜電晶體液晶顯示 =要是由主動元件_基板、彩色遽光基板以及爽於此 兩基板之間的液晶層所構成。 在完成主動元件陣列基板的製 素陣列進行電性檢測，或心 燈檢測，以判斷畫素陣列或 十；不良的兀件（如薄膜電晶體戋蚩素雷極笨、弋蠄 路進行修補H為了胁〜素電財）或線 1素陣列或面板進行檢測， (Ε:::=Γ邊區上便需要製作_電路 別二:動是利用多個檢測開關分 線。此外，檢㈣:上的讀掃描線以及多條資料 連接於掃描線的檢“串接多在條：條 3 的檢測開關串接在一起。如此一來，由短路條的端部輸入 對應的檢測訊號就可以進行檢測。 一 然而，母一條短路條連接至所有的掃描線或是所有的 賁料線將增加短路條上之檢測開關的阻抗負荷。此外，掃 插線，間_合效細及資料線之間_合效應以及掃描 線與資料線之間的耦合效應更會加重檢測開關的負擔。如 此一來，檢測開關的充放電能力不佳而使檢測主動元件陣 J土板時谷易發生叙線等誤檢測現象。特別是，隨顯示面 板的解析度提升，檢測開_負擔更是沉重而更容 檢測效能不佳的情形。 x 【新型内容】 力声作提供種主動元件陣列基板，其檢測電路之能 本創作提出一種主動元件陣列基板，包 夕 條，號線、多個畫素結構以及—檢測電路 料一$ ==以外的—周邊區。訊號線位於顯二 測第電路:::邊區:，並電性連接訊號線。檢 各:_延伸線最二= 路r開嶋至第-短路條 在本創作之一實施例中，上述之第一開關以及第二開 關分別為一薄膜電晶體。具體而言，薄膜電晶體包括一閘 極、一源極以及一没極，且閘極位於源極與及極之間。此 外’没極例如連接於其中一條訊號線。 在本創作之一實施例中，上述之第一短路條以及第二 短路知为別為一第一檢測閘極線以及一第二檢測閘極線。 第一檢測閘極線用以將一第一閘極訊號輸入至第一開關， 而第二檢測閘極線用以將一第二閘極訊號輸入至第二開 關。檢測電路例如更包括一檢測資料線，其連接至第一開 關以及第二開關。或是，檢測電路更包括一第一檢測資料 線以及一弟一檢測資料線，且第一檢測資料線連接至第一 開關’而第二檢測資料線連接至第二開關。此外，第一檢 測資料線可以包括一第一紅色檢測資料線、一第一綠色檢 貧料線以及一第一藍色檢測資料線，其分別連接部分的 弟開關，而弟二檢測資料線包括一第二紅色檢測資料 線、一第一綠色檢測資料線以及一第二藍色檢測資料線， 其分別連接部分的第二開關。 在本創作之一實施例中，上述之第一短路條以及第二 短路條分別為一第一檢測資料線以及一第二檢測資料線， 其中第一檢測資料線用以將一第一資料訊號輸入至第一開 關，而第二檢測資料線用以將一第二資料訊號輸入至第二 開關。在一實施例中，第一檢測資料線包括一第一紅色檢 测資料線、一第一綠色檢測資料線以及一第一藍色檢測資 料線，其分別連接部分的第一開關，而第二檢測資料線包 括一第二紅色檢測資料線、一第二綠色檢測資料線以及一 第二藍色檢測資料線，其分別連接部分 =路更包括一檢測閘極線，其連接上：二 在本創作之-實施例中，上述之檢測電 ;短路條以及多個第三開關。第三開關連接至第三短ί 二通過第，路條'第二短路 或多ίΐίΐ之一實施例中’上述之訊號線為多條掃描線 在本創作之一實施例中，十、 關同時被開啟或分別被·。述之開關以及第二開 短路 線及部ί的晝素，而不需承擔過大的負 ::广條短路條上的檢測開關可以更有電 而使檢測正確性提升。換t彳★心 +的充放電 板不容易發生檢測誤差。、。賴作的主動元件陣列基 為讓本創作之上述特徵和優點 舉實施例，並配合所附圖式作詳細說明如;、。’下文特 【實施方式】 圖1繪示為本創作之—第—容 板之上視示意圖。請參 例的主動元件陣列基 括-基板110、多條訊號" 動凡件陣列基板100包 、°〜、’友120、多個晝素結構130以及一 M379085 仏測電路140。基板lio具有一顯示區ii2以及顯示區η〗 以外的一周邊區114。訊號線120位於顯示區112中，且 訊號線120彼此平行。晝素結構130位於顯示區112中， 並電性連接訊號線12〇。檢測電路14〇位於周邊區114中， 並電性連接訊號線12〇。 至^^(Thm Film Transistor Liquid Crystal Display, TFT fD)' has become the mainstream in the field of display n, film transistor liquid crystal display = if the active device _ substrate, color luminescent substrate and liquid crystal between the two substrates The layer is composed. Perform electrical detection on the array of active element array substrates, or heart lamp detection to determine the pixel array or ten; defective components (such as thin film transistor 戋蚩 雷 雷 弋蠄 弋蠄 弋蠄 弋蠄 弋蠄 弋蠄 弋蠄 弋蠄 弋蠄 弋蠄 修补In order to detect the 〜 素 电 或 或 或 或 或 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素 素The read scan line and the plurality of data are connected to the scan line. "The serial connection is more in the strip: the detection switches of the strip 3 are connected in series. In this way, the corresponding detection signal can be detected by inputting the end of the shorting strip. However, a female shorting bar connected to all of the scanning lines or all of the feeding lines will increase the impedance load of the detecting switch on the shorting bar. In addition, the sweeping line, between the _ combined effect and the data line _ The combined effect and the coupling effect between the scan line and the data line will increase the burden of the detection switch. As a result, the charge and discharge capability of the detection switch is not good, so that the detection of the active device array J soil plate is likely to occur. Detection phenomenon. Special Yes, as the resolution of the display panel increases, the detection open_burden is heavy and the detection performance is not good. x [New content] Lisheng provides a kind of active device array substrate, and the detection circuit is capable of this creation. An active device array substrate, a package strip, a number line, a plurality of pixel structures, and a peripheral region of the detection circuit material $==. The signal line is located at the second circuit of the second measurement::: edge region: Connect the signal line. Check each: _ extension line second = way r open to the first short circuit strip In one embodiment of the present invention, the first switch and the second switch are respectively a thin film transistor. The thin film transistor includes a gate, a source, and a gate, and the gate is located between the source and the gate. Further, the 'pole is connected to one of the signal lines, for example. In an embodiment of the present invention, The first shorting bar and the second shorting are respectively configured as a first detecting gate line and a second detecting gate line. The first detecting gate line is for inputting a first gate signal to the first switch And the second detecting gate line is used A second gate signal is input to the second switch. The detecting circuit further includes a detecting data line connected to the first switch and the second switch. Alternatively, the detecting circuit further includes a first detecting data line and a first one. Detecting the data line, and the first detection data line is connected to the first switch' and the second detection data line is connected to the second switch. In addition, the first detection data line may include a first red detection data line and a first green detection a poor material line and a first blue detection data line respectively connected to a part of the young switch, and the second detection data line includes a second red detection data line, a first green detection data line and a second blue detection a data line, which is respectively connected to a second switch. In an embodiment of the present invention, the first shorting bar and the second shorting bar are respectively a first detecting data line and a second detecting data line, wherein the first A detection data line is used to input a first data signal to the first switch, and a second detection data line is used to input a second data signal to the second switch. In an embodiment, the first detection data line includes a first red detection data line, a first green detection data line, and a first blue detection data line, which are respectively connected to a portion of the first switch, and the second The detecting data line includes a second red detecting data line, a second green detecting data line and a second blue detecting data line, wherein the connecting portion=the road further comprises a detecting gate line, and the connecting line is connected to the second: In the authoring embodiment, the above-mentioned detection power; the short-circuit bar and the plurality of third switches. The third switch is connected to the third short ί second through the first, the second strip or the second strip in the embodiment. The above-mentioned signal line is a plurality of scan lines in one embodiment of the present creation, ten and Being turned on or separately. The switch and the second open short circuit and the unit of the ί, do not have to bear too much negative :: the detection switch on the strip short strip can be more energized to improve the detection accuracy. It is not easy to change the detection error of the t彳★心+ charge and discharge board. ,. The active elements of the array are based on the above-described features and advantages of the present invention, and are described in detail in conjunction with the drawings. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT FIG. 1 is a schematic top view of a first-piece container of the present invention. The active device array of the reference example includes a substrate 110, a plurality of signals " an actuator array substrate 100 package, a ~, a friend 120, a plurality of pixel structures 130, and a M379085 detection circuit 140. The substrate lio has a display area ii2 and a peripheral area 114 other than the display area η. The signal lines 120 are located in the display area 112, and the signal lines 120 are parallel to each other. The pixel structure 130 is located in the display area 112 and electrically connected to the signal line 12A. The detecting circuit 14 is located in the peripheral area 114 and electrically connected to the signal line 12A. to
主動元件陣列基板τ，分重系箱稱13〇需要連接 一條掃描線(未標示）以及一條資料線(未標示），以由掃描 線(未標*)與資料、線(未標示)傳送顯示晝面所需的訊號。掃 描線(未標示）以及資料線(未標示）的延伸方向不同。為了清 ，且明確地描述本實關的設計，本實_以訊號線^ 來表不掃描線(未標示）以及資料線(未標示）其中一者以進 行說明。齡之，町綱的技術手段可喊用於所屬技 術領域巾具有通常知識者所知悉的掃描 然也可以同時應用於此兩者。 貝卄綠田 檢測電路140包括一第一短路條142、_第The active device array substrate τ, the weight-receiving box, 13 〇 need to be connected to a scan line (not labeled) and a data line (not labeled) to be displayed by the scan line (not marked *) and data, line (not labeled) The signal required for the face. The scanning lines (not shown) and the data lines (not shown) extend in different directions. In order to clear and clearly describe the design of this actual implementation, the actual _ uses the signal line ^ to indicate one of the scan line (not labeled) and the data line (not labeled) for explanation. The technical means of the age, the town, can be called for the scanning of the technical field, which is known to those skilled in the art, and can be applied to both. The Bellow Green Field detecting circuit 140 includes a first shorting bar 142, _
=多個第—開關幻以及多個第二開關I第—開關 連接至第一短路條142而第二開關幻 的延伸線最多通過第-短= 鱼第-短敗你1/M 士 者也就疋祝，第—短路條142 ，、弟:短路條144在各訊號線m的延伸執跡上 。 以及第二開關S2分別為-薄心 極s 源極S以及—及極D。開極G位於源 m。詳=二=祕°例如連祕料-條訊號線 第紐路條142以及第二短路條144分別為 7 MJ79085 :第-檢測資料線以及一第二檢測資料線，其分別連接至 弟-開關S1的源極S以及第二開關S2的源極s。另外， 檢測電路140更包括一檢測閘極線146，其連接至第一 關S1的閘極G以及第二開關S2的閘極〇。 幵 由這樣的連接關係可知，第一短路條142僅連接於部 分訊號線120以劃分出第—檢測區j，而第二短路條144 連接於另邛为訊號線120以劃分出第二檢測區η。在這 樣的設計之下’僅有第—檢測區i中的訊號線m彼此搞 δ的效應會影響第-„ S1的充放電效能。同樣地，僅 有第二檢測區U中的訊號線1W彼此輕合的效應會影響第 二開關S2的充放電效能。所以，第一開關Sl與第二^關 2都可以具有較佳的充放電效能。相較於峰所有訊號線 12〇皆影響檢湖關之效能的設計，本實關可以大幅地 降低第一開關S1與第二開關S2的負擔。 另外，第一短路條142與第二短路條144在各訊號線 120的延伸執跡上不重疊。因此，本實施例可以避免兩條 短路條142與144之間_合效應而更進一步地減輕第一 開關si與第二開關S2的負荷。第一開關Sl與第二開關 S j的充放電效能越好則越不容易產生假線等誤檢測的情 开乂因此，檢測電路ho能夠正確地檢測出主動元件陣列 基板100的缺陷。 在本貫施例中，檢測閘極線146可以傳輸一閘極訊號 yg以控制第-開關S1以及第二開關S2的開啟與關閉。 第一短路條142用以將一第一資料訊號Vdl輸入至第一開 M379085 關SI，而第二短路條144則用以將一第二資料訊號Vd2 輸入至第二開關S2。 具體而言’主動元件陣列基板100可採用其中一種的 檢測方法如下。首先’由檢測閘極線146輸入閘極訊號 Vg’並且由第一短路條142輸入第一資料訊號vdl。此時， 第一開關si會將第一資料訊號Vdl輸入至位於第一檢測 區I中的畫素結構130。在這一檢測步驟中，可以檢測第 一檢測區I中的元件是否有缺陷產生。接著，由檢測閘極 線146輸入閘極訊號Vg，以及由第二短路條144輸入第二 資料訊號Vd2，以檢測第二檢測區η中的晝素結構13〇。 另一種檢測方法例如是由檢測閘極線146輸入閘極訊 唬Vg，由第一短路條142輸入第一資料訊號vdl，並同時 由第二短路條144輸入第二資料訊號Vd2。這樣的檢測方 法可以同時檢測顯示區112中所有的元件。亦即，本實施 例可以將第一開關S1以及第二開關S2同時開啟或分別開 啟。此外，第一開關S1與第二開關S2所承擔的負荷較以 往設計減輕許多，所以同時檢測顯示區112中所有的元件 時，第一開關S1與第二開關S2仍可以很有效率地充放 電。也因此，主動元件陣列基板100的缺陷可以更正確地 被檢測出來。 值得一提的是，本實施例是以訊號線12〇來描述掃描 線以及資料線其中一者的檢測電路140設計，另一者的檢 測電路150可以與檢測電路140相同或是相異。實際上， 主動元件陣列基板1〇〇中只要有一側的檢測電路14〇設計 9 有不重璺的兩條知路條(如142與144)以劃分出多個檢測 區就有助於降低檢測開關(如S1與S2)的負擔以及誤檢測 的情形。 另外’圖2緣示為本創作之一第二實施例的主動元件 陣列基板。μ參照® 2 ’主動元件陣列基板的設計是 由主動兀件陣列基板1 〇 〇衍生而來。主動元件陣列基板2 〇 〇 的，計係應用於彩色平面顯示面板。因此，若訊號線12〇 為貝料線’則訊號、線120包括有紅色資料線12〇R、綠色資 料線120G以及藍色資料線12〇6。 在這樣的τΜ牛設計下’若要依照不同顏色的晝素結構 130進行檢測’則檢測電路24()中，第―檢測資料線242 包括一第一紅色檢測資料線242R、一第一綠色檢測資料線 242G以及一第一藍色檢測資料線242B，其分別連接部分 的第一開關si，而第二檢測資料線244包括一第二紅色檢 測貧料線244R、一第二綠色檢測資料線244G以及一第二 藍色檢測資料線244B，其分別連接部分的第二開關S2。 攻樣的設計非但更進一步減輕第一開關S1與第二開關S2 的負擔，還可以分別檢測不同顏色的晝素結構13〇。 圖3繪示為本創作之一第三實施例的主動元件陣列基 板示意圖。請參照圖3，主動元件陣列基板3〇〇與主動元 件陣列基板1〇〇有大致相同的元件設計，其中同樣的元件 符唬將表示為相同設計的元件。不過，主動元件陣列基板 3〇〇中檢測電路340的第一短路條342以及第二短路條344 分別地連接於第一開關S1的閘極G以及第二開關S2的閘 極G。此外，第一開關S1與第二開關幻的源極s接連接 至同一條檢測資料線346。 *換言之，第一短路條342以及第二短路條344分別為 一第一檢測閘極線以及一第二檢測閘極線。第一短路條 342用以將一第一閘極訊號Vgl輸入至第一開關si，而^ 二短路條344用以將一第二閘極訊號Vg2輸入至第二開關 S2。本實施例是利用不同的檢測閘極線來劃分出第一檢測 區Ϊ以及第二檢測區Π。 具體來說，主動元件陣列基板300的檢測方法可以是 依序由第一短路條342與第二短路條344將第一閘極訊號 Vgl以及第二閘極訊號Vg2輸入晝素結構13〇。同時，由 檢測資料線346將資料訊號vd輸入至晝素結構13〇。 另種檢測方法也可以是同時由第一短路條342與第 二短路條344將第一閘極訊號Vgl以及第二閘極訊號Vg2 輸入晝素130。並且，由檢測資料線346將資料訊號vd 輸入至畫素130。 上述的檢測方法中，第一開關S1與第二開關S2所承 載的負荷較小，而具有良好的充放電效能。因此，主動元 件陣列基板300可以有效率地被檢測’且不容易因為開關 元件(S1與S2)的能力不足而有誤檢測的情形發生。 值得一提的是，本實施例不限定檢測資料線的設計為 一條或是多條。訊號線120若為資料線時，檢測資料線346 的設計可以參考圖2之第一短路條242，而由紅色檢測資 料線(未繪示）、綠色檢測資料線(未繪示）以及藍色檢測資料 M379085 線(未緣示）組成。 圖4繪不為本創作之一第四實施例的主動元件陣列基 板:請參照圖4,主動元件陣列基板結合了前述之主 ^件陣列基板100與絲元件陣聽板·的設計。詳 &之，檢測電路440包括多個第一開關S][、多個第二開關 S2、第一短路條〗42、342及第二短路條144、3私。 _具體而s ’第-短路條142為第一檢測資料線，第— ，路條342為第一檢測閘極線。並且，第二短路條144為 第二檢測資料線，第二短路條344為第二檢測閘極線。亦 即第關S1與第二開關S2未由任何一條共同的線路 連接。誠如前述，這樣的設計可以減輕第—開關si與第 關S2的負擔而有助於降低誤檢_情形而提高檢測 當訊號線120 $資料線時，第一短路條342及第二短 路條344的設計可以如圖2之第一短路條犯與第二短路 條244的設計。也就是說，第一短路條342及第二短路條 344可以分別由三條檢測資料線所構成以針對不同顏色的 晝素結構別地進行檢測。另外，另一侧的檢測電路 150可以按照刖述的檢測電路14〇、24〇或34〇的方式設計。 圖5繪示為本創作之一第五實施例的主動元件陣列基 板。請參關5 ’主動元件陣列基板是由絲元件陣 列基板橋的料基礎延伸騎的。主動 包括了主動元鱗縣板彻巾所有的元件，且檢測電路 540更包括多個弟二開關S3以及連接於第三開關幻的第 12 M379085 二短路條546、548。各訊號線120的延伸線最多通 短路條142與342、第二短路條144與344以及第二_ 條546與548其中一者。另外，第三短路條546例 三檢測閘極線’而第三短路條548例如是第三檢測資料 一本實施例可以依照不同的短路條將顯示區丨12劃分 三個檢測區I、π以及in。各檢測區ju以及Ιπ中二蚩 素結構130可以分別被點亮或同時被點亮以進行感測 外’第一開關S卜第二開g S2與第三開關S3的負荷較^ 而具有較㈣錢電能力。所以，主動元⑽職板5〇〇 的檢測效能相當良好。 本實施例中，不同檢測區Ϊ、Π以及ΠΙ中的開關S1、 S2以及S3都是連接獨立的線路且以不_訊號(v幻、 Vg2、Vg3以及Vdl、Vd3、)來控制。也就是說，第一 開關si由第一短路條142與342連接，第二開關幻由第 二短路條144與344連接，而第三開關％由第三短路條 546與548連接。不過，在其他的實施例中，帛一短路停 142、第二短路條144與第三短路條546可以連接在-起。、 或是，第一短路條342、第二短路條344與第三短路條548 可以連接在-起。亦即，所有開關S1、S2以及S3可以連 接至同-條檢測_、線或是同—條檢測資料線。實際上， 本貫施例的③僅需叫條以上的短路雜餘測閘極線 或是檢測資躲至少其巾—者就可以纽麟低檢測開關 的負擔，而達到提高檢測效率的功效。 訊號線120可以是橫向的掃描線或是縱向的資料線， 13 M379085 不過上述的實施例皆以其中-個方向的訊號、線12〇來進行 說明。實際上，上述檢測電路140、24〇、34〇、44〇以及 540也可以應用於另一侧的檢測電路15〇。 -圖6、.會示為本創作之—第六實施例的主動元件陣列基 板示意圖。請參照圖6，主動元件陣列基板_在橫向以 及縱向分別設置有檢測電路61〇以及62〇。檢測電路61〇 與檢測電路620的設計分別為上述檢測電路14〇、24〇、 340、440以及540其中一者。此時，主動元件陣列基板6〇〇 可劃分出多個檢測區I〜IV。各檢測區J、π、ΠΙ以及IV可 以分別進行檢測或是同時進行檢測。由前述實施例的内容 可知，檢測電路610與檢測電路62〇中元件的負荷較小。 所以，主動元件陣列基板600具有良好的檢測正確性及高 檢測效率。 綜上所述，本創作利用多條短路條來連接同一側的檢 測開關。因此，各檢測開關的負擔大幅減少，而具有較佳 的充放電效能。此外’不同組的短路條在訊號線的延伸執 跡上不重疊而不易產生顯著的耦合效應’而更進一步降低 了檢測開_負擔。如此-來，主動元件陣列基板的缺陷 可以有效率且正確地被檢測出來，而不易有誤檢測，例如 假線，的情形發生。 雖然本創作已以實施例揭露如上，然其並非用以限定 本創作，任何所屬技術領域中具有通常知識者，在不脫離 本創作之精神和範圍内，當可作些許之更動與潤飾，故本 創作之保護範圍當視後附之申請專利範圍所界定者為準。 M379085 【圖式簡單說明】 圖1繪示為本創作之一第一實施例的主動元件陣列基 板之上視示意圖。 圖2繪示為本創作之一第二實施例的主動元件陣列基 板。 圖3繪示為本創作之一第三實施例的主動元件陣列基 板示意圖。 圖4繪示為本創作之一第四實施例的主動元件陣列基 板。 圖5繪示為本創作之一第五實施例的主動元件陣列基 板。 圖6繪示為本創作之一第六實施例的主動元件陣列基 板示意圖。 【主要元件符號說明】 100、200、300、400、500、600 :主動元件陣列基板 110 基板 112 顯示區 114 周邊區 120 訊號線 120R、120G、120B 資料線 130 :晝素結構 140、150、240、340、440、540、610、620 :檢測電 路 15 M379085 142、242、342、144、244、344、546、548 :短路條 242R、242G、242B、244R、244G、244B、346 :檢 測資料線 146:檢測閘極線 D :汲極 G :閘極 S :源極 51 ··第一開關. 52 :第二開關 53 :第三開關= multiple first - switch phantom and multiple second switch I - switch connected to the first shorting bar 142 and the second switch phantom extension line through the first - short = fish - short defeat you 1 / M As a result, the first short circuit bar 142, the younger: the short circuit bar 144 is on the extension of each signal line m. And the second switch S2 is - a thin core s source S and - and a pole D, respectively. The opening G is located at the source m. Details = two = secret ° For example, the secret material - the signal line No. NZ strip 142 and the second short strip 144 are respectively 7 MJ79085: the first - detection data line and a second detection data line, which are respectively connected to the brother - switch The source S of S1 and the source s of the second switch S2. In addition, the detecting circuit 140 further includes a detecting gate line 146 connected to the gate G of the first switch S1 and the gate 〇 of the second switch S2. It can be seen from the connection relationship that the first shorting bar 142 is only connected to the partial signal line 120 to divide the first detecting area j, and the second shorting bar 144 is connected to the other signal line 120 to divide the second detecting area. η. Under such a design, the effect of the signal line m in the first detection zone i δ can affect the charge-discharge performance of the first-S1. Similarly, only the signal line 1W in the second detection zone U The effect of the light combination with each other affects the charging and discharging performance of the second switch S2. Therefore, both the first switch S1 and the second switch 2 can have better charging and discharging performance, and all the signal lines 12 影响 are affected compared with the peaks. The design of the performance of the lake gate can substantially reduce the burden on the first switch S1 and the second switch S2. In addition, the first shorting bar 142 and the second shorting bar 144 are not on the extended track of each signal line 120. Therefore, in this embodiment, the load between the two shorting bars 142 and 144 can be avoided to further reduce the load of the first switch si and the second switch S2. The charging of the first switch S1 and the second switch S j The better the discharge performance, the less likely the false detection of false lines or the like is generated. Therefore, the detection circuit ho can correctly detect the defects of the active device array substrate 100. In the present embodiment, the detection gate line 146 can be transmitted. A gate signal yg to control the first switch S1 And the second switch S2 is turned on and off. The first shorting bar 142 is used to input a first data signal Vdl to the first opening M379085, and the second shorting bar 144 is used to input a second data signal Vd2. To the second switch S2. Specifically, the active device array substrate 100 can adopt one of the detection methods as follows: First, the gate signal Vg' is input from the detection gate line 146 and the first data signal is input by the first shorting bar 142. Vdl. At this time, the first switch si inputs the first data signal Vdl to the pixel structure 130 located in the first detection area 1. In this detecting step, it is possible to detect whether the components in the first detection area I have The defect is generated. Next, the gate signal Vg is input from the detection gate line 146, and the second data signal Vd2 is input from the second shorting bar 144 to detect the pixel structure 13〇 in the second detection area η. For example, the gate signal gVg is input from the detection gate line 146, the first data signal vd1 is input from the first short circuit strip 142, and the second data signal Vd2 is input from the second short circuit strip 144. The detection method can be simultaneously detected. All the components in the display area 112. That is, the first switch S1 and the second switch S2 can be simultaneously turned on or turned on separately. In addition, the load on the first switch S1 and the second switch S2 is lighter than the previous design. Many, so when all the components in the display area 112 are simultaneously detected, the first switch S1 and the second switch S2 can still be charged and discharged very efficiently. Therefore, the defects of the active device array substrate 100 can be detected more correctly. It should be noted that, in this embodiment, the detection circuit 140 of one of the scan line and the data line is described by the signal line 12〇, and the other detection circuit 150 may be the same as or different from the detection circuit 140. In fact, as long as there is a side of the detection circuit 14 in the active device array substrate 1 , there are two paths (such as 142 and 144 ) that do not overlap to divide a plurality of detection areas to help reduce detection. The burden of switches (such as S1 and S2) and the situation of false detection. Further, Fig. 2 is a view showing an active element array substrate of a second embodiment of the present invention. The μ reference ® 2 ' active device array substrate is derived from the active device array substrate 1 〇 。. The active device array substrate 2 〇 , is applied to a color flat display panel. Therefore, if the signal line 12 is the bedding line, the signal 120 includes the red data line 12〇R, the green data line 120G, and the blue data line 12〇6. In the τ yak design, if the detection is performed according to the different color 昼 结构 structure 130, the detection data line 242 includes a first red detection data line 242R and a first green detection. The data line 242G and a first blue detection data line 242B are respectively connected to a portion of the first switch si, and the second detection data line 244 includes a second red detection poor line 244R and a second green detection data line 244G. And a second blue detection data line 244B, which is respectively connected to a portion of the second switch S2. The design of the attack sample not only further reduces the burden on the first switch S1 and the second switch S2, but also can detect the pixel structure 13〇 of different colors separately. 3 is a schematic diagram of an active device array substrate according to a third embodiment of the present invention. Referring to FIG. 3, the active device array substrate 3A and the active device array substrate 1 have substantially the same component design, wherein the same component symbols will be denoted as the same designed components. However, the first shorting bar 342 and the second shorting bar 344 of the detecting circuit 340 of the active device array substrate 3 are respectively connected to the gate G of the first switch S1 and the gate G of the second switch S2. In addition, the first switch S1 and the source s of the second switch are connected to the same detection data line 346. In other words, the first shorting bar 342 and the second shorting bar 344 are a first detecting gate line and a second detecting gate line, respectively. The first shorting bar 342 is for inputting a first gate signal Vgl to the first switch si, and the second shorting bar 344 is for inputting a second gate signal Vg2 to the second switch S2. In this embodiment, the first detection area Ϊ and the second detection area 划分 are divided by using different detection gate lines. Specifically, the method for detecting the active device array substrate 300 may be that the first gate signal Vgl and the second gate signal Vg2 are sequentially input to the pixel structure 13A by the first shorting bar 342 and the second shorting bar 344. At the same time, the data signal vd is input to the halogen structure 13 by the detection data line 346. Alternatively, the first shorting bar 342 and the second shorting bar 344 may be used to input the first gate signal Vgl and the second gate signal Vg2 to the element 130. And, the data signal vd is input to the pixel 130 from the detection data line 346. In the above detection method, the first switch S1 and the second switch S2 carry a small load, and have good charging and discharging performance. Therefore, the active device array substrate 300 can be efficiently detected 'and it is not easy to be erroneously detected due to insufficient capability of the switching elements (S1 and S2). It is worth mentioning that the embodiment does not limit the design of the detection data line to one or more. If the signal line 120 is a data line, the design of the detection data line 346 can refer to the first shorting bar 242 of FIG. 2, and the red detecting data line (not shown), the green detecting data line (not shown), and the blue color. The test data consists of M379085 line (not shown). 4 is an active element array substrate which is not a fourth embodiment of the present invention. Referring to FIG. 4, the active device array substrate incorporates the above-described design of the main assembly substrate 100 and the wire element array. In detail, the detection circuit 440 includes a plurality of first switches S] [, a plurality of second switches S2, first short bars 42, 342, and second short bars 144, 3 private. _Specific and s 'the first shorting bar 142 is the first detecting data line, and the first, the road bar 342 is the first detecting gate line. Further, the second shorting bar 144 is a second detecting data line, and the second shorting bar 344 is a second detecting gate line. That is, the first switch S1 and the second switch S2 are not connected by any common line. As described above, such a design can reduce the burden of the first switch si and the second switch S2 to help reduce the false detection _ situation and improve the detection of the first shorting bar 342 and the second shorting bar when the signal line 120 $ data line is detected. The design of 344 can be as designed with the first shorting bar of FIG. 2 and the second shorting bar 244. That is to say, the first shorting bar 342 and the second shorting bar 344 can be respectively constituted by three detecting data lines to detect the pixel structures of different colors. Further, the detection circuit 150 on the other side can be designed in such a manner as to be described in the detection circuit 14A, 24A or 34A. Fig. 5 is a diagram showing an active device array substrate according to a fifth embodiment of the present invention. Please refer to the 5' active device array substrate which is extended by the material base of the wire element array substrate bridge. The active unit includes all the components of the active Yuanxian County board, and the detecting circuit 540 further includes a plurality of second switches S3 and a 12th M379085 second shorting strips 546, 548 connected to the third switch. The extension lines of each of the signal lines 120 pass through at most one of the shorting bars 142 and 342, the second shorting bars 144 and 344, and the second_strips 546 and 548. In addition, the third shorting bar 546 is exemplified by the third detecting gate line ′ and the third shorting bar 548 is, for example, the third detecting data. In this embodiment, the display area 丨 12 can be divided into three detecting areas I and π according to different shorting bars. In. The detection regions ju and the dioxin structure 130 in the Ιπ can be respectively illuminated or simultaneously illuminated to sense the load of the first switch Sb and the second switch g S2 and the third switch S3. (4) The ability of money and electricity. Therefore, the detection performance of the active element (10) job board 5〇〇 is quite good. In this embodiment, the switches S1, S2, and S3 in the different detection zones Ϊ, Π, and ΠΙ are connected to independent lines and are controlled by no signals (v magic, Vg2, Vg3, and Vdl, Vd3,). That is, the first switch si is connected by the first shorting bars 142 and 342, the second switch is connected by the second shorting bars 144 and 344, and the third switch % is connected by the third shorting bars 546 and 548. However, in other embodiments, the short circuit stop 142, the second short circuit bar 144, and the third short circuit bar 546 may be connected. Or, the first shorting bar 342, the second shorting bar 344, and the third shorting bar 548 may be connected to each other. That is, all of the switches S1, S2, and S3 can be connected to the same-strip detection _, line, or the same-strip detection data line. In fact, the 3 of the present application only needs to call the short-circuit residual gate line above the strip or the detection of at least the towel. The burden of the low-detection switch can be improved, and the detection efficiency is improved. The signal line 120 can be a horizontal scanning line or a vertical data line, 13 M379085. However, the above embodiments are described by the signal in one direction and the line 12〇. Actually, the above-described detection circuits 140, 24A, 34A, 44A and 540 can also be applied to the detection circuit 15A on the other side. - Figure 6, which is a schematic diagram of the active device array substrate of the sixth embodiment. Referring to Fig. 6, the active device array substrate _ is provided with detection circuits 61 〇 and 62 分别 in the lateral direction and the longitudinal direction, respectively. The detection circuit 61A and the detection circuit 620 are designed to be one of the above-described detection circuits 14A, 24A, 340, 440, and 540, respectively. At this time, the active device array substrate 6A can divide the plurality of detection regions I to IV. Each of the detection zones J, π, ΠΙ, and IV can be detected separately or simultaneously. As can be seen from the foregoing embodiments, the load of the components in the detecting circuit 610 and the detecting circuit 62 is small. Therefore, the active device array substrate 600 has good detection accuracy and high detection efficiency. In summary, the creation uses a plurality of shorting bars to connect the detection switches on the same side. Therefore, the burden of each detecting switch is greatly reduced, and the charging and discharging performance is better. In addition, 'the different sets of shorting bars do not overlap on the extended trace of the signal line and are not prone to significant coupling effects' and further reduce the detection on-load. In this way, defects of the active device array substrate can be detected efficiently and correctly, and it is not easy to detect by mistake, such as a false line. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any person having ordinary knowledge in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of protection of this creation is subject to the definition of the scope of the patent application attached. M379085 BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a top plan view of an active device array substrate according to a first embodiment of the present invention. 2 is a diagram showing an active device array substrate according to a second embodiment of the present invention. 3 is a schematic diagram of an active device array substrate according to a third embodiment of the present invention. Fig. 4 is a diagram showing an active device array substrate according to a fourth embodiment of the present invention. Fig. 5 is a diagram showing an active device array substrate according to a fifth embodiment of the present invention. 6 is a schematic diagram of an active device array substrate according to a sixth embodiment of the present invention. [Main component symbol description] 100, 200, 300, 400, 500, 600: active device array substrate 110 substrate 112 display region 114 peripheral region 120 signal line 120R, 120G, 120B data line 130: halogen structure 140, 150, 240 , 340, 440, 540, 610, 620: detection circuit 15 M379085 142, 242, 342, 144, 244, 344, 546, 548: shorting bar 242R, 242G, 242B, 244R, 244G, 244B, 346: detection data line 146: Detection gate line D: drain G: gate S: source 51 ··first switch. 52: second switch 53: third switch
Vd、VcU、Vd2、Vd3 :資料訊號 Vg、Vg卜Vg2、Vg3 :閘極訊號 I、II、III、IV :檢測區 16Vd, VcU, Vd2, Vd3: data signal Vg, Vg Bu Vg2, Vg3: gate signal I, II, III, IV: detection area 16