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TWM370828U - Wafer protection structure - Google Patents

Wafer protection structure

Info

Publication number
TWM370828U
TWM370828U TW98213404U TW98213404U TWM370828U TW M370828 U TWM370828 U TW M370828U TW 98213404 U TW98213404 U TW 98213404U TW 98213404 U TW98213404 U TW 98213404U TW M370828 U TWM370828 U TW M370828U
Authority
TW
Taiwan
Prior art keywords
protection structure
wafer protection
wafer
protection
Prior art date
Application number
TW98213404U
Other languages
Chinese (zh)
Inventor
yao-qi Fei
Original Assignee
D Tek Semicon Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by D Tek Semicon Technology Co Ltd filed Critical D Tek Semicon Technology Co Ltd
Priority to TW98213404U priority Critical patent/TWM370828U/en
Publication of TWM370828U publication Critical patent/TWM370828U/en

Links

TW98213404U 2009-07-22 2009-07-22 Wafer protection structure TWM370828U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW98213404U TWM370828U (en) 2009-07-22 2009-07-22 Wafer protection structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW98213404U TWM370828U (en) 2009-07-22 2009-07-22 Wafer protection structure

Publications (1)

Publication Number Publication Date
TWM370828U true TWM370828U (en) 2009-12-11

Family

ID=44392399

Family Applications (1)

Application Number Title Priority Date Filing Date
TW98213404U TWM370828U (en) 2009-07-22 2009-07-22 Wafer protection structure

Country Status (1)

Country Link
TW (1) TWM370828U (en)

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Legal Events

Date Code Title Description
MM4K Annulment or lapse of a utility model due to non-payment of fees