TWM359871U - Linear regulators having fast transient response - Google Patents
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- TWM359871U TWM359871U TW97222853U TW97222853U TWM359871U TW M359871 U TWM359871 U TW M359871U TW 97222853 U TW97222853 U TW 97222853U TW 97222853 U TW97222853 U TW 97222853U TW M359871 U TWM359871 U TW M359871U
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M359871 五、新型說明: 【新型所屬之技術領域】 本新型相關於一種具快速暫態響應之線性穩壓器(linear regulator),尤指一種具快速暫態響應之低壓降穩壓器(i〇w dropout regulator » LDO regulator) ° 【先前技術】 針對手機、個人數位助理(Personal digital assistant, PDA)和筆記型電腦等可攜帶式電子產品,設法降低核心處 理器的供電電壓是目前發展趨勢,然而在降壓的同時也須同 時兼顧系統效率、功率消耗和電池壽命,因此常會設計各式 各樣的電壓轉換電路以進行電源管理。良好的電壓轉換電路 能提供一個穩定的輸出電壓和大範圍的輸出電流,使輪出電 壓在負載瞬間變化時,仍然可以快速穩定在原本的電壓位準 並快速的提供不同的負載電流’做出最有效率的降麼轉換。 因此,響應速度和系統穩定度是評估電壓轉換電路的重要參 數。 傳統常見之電壓轉換電路有兩種:交換式穩壓器 (switching regulator)以及線性穩壓器(linear regUiat〇r),其中 在降壓應用中常使用的線性穩壓器為低壓降穩壓器(low dropout regulator,LDO regulator )。低壓降穩壓器具有低生 M359871 產成本、電路簡單和低噪音等特點,能夠提供穩定輸出電 壓,因此被廣泛地應用於各種攜帶式電子產品上。 第1圖為一種習知低壓降穩壓器10的示意圖。低壓降穩 壓器10包含一誤差放大器110、一功率開關12〇、一分壓電路 130、一内部補償電路14〇,以及一輸出電容c〇。低壓降穩壓 器10可將輸入電壓VIN轉換輸出電壓V〇UT,以驅動一負載(由 電阻Rl來表示),而負載電流則*Iload來表示。分壓電路13〇 包含電阻Rd〇R2’可將輸出電壓ν〇υτ*壓以產生一回授電壓 VFB。誤差放大器110包含一内部比較器112和一内部放大器 14,内部比較器112可比較回授電壓vFB及一參考電壓vREF 之間的差異並產生相對應之控制訊號,而内部放大器114可 增強控制訊號以控制功率開關12〇的通道阻抗(由第1圖中之 寄生電容Cp來表示)’進而穩定輸出電壓ν〇υτ。輸出電容c〇 和負載電阻rl並聯’當負載電流Il〇ad突然改變時,輸出電容 C〇可暫時提供負載所需的大量電流,以改善輸出電壓V0UT 勺暫態響應(transient response)。内部補償電路14〇包含一 電P且心和一電容Cz,電阻Rz和電容Cz彼此串聯。内部補償電 路14〇之一端耦接至功率開關12〇之控制端,另一端則耦接至 、羞放大器110内部,藉以作為頻率補償之用。内部補償電 略140與内部放大器114並聯,藉由米勒效應(Miller effect) 於内部放大器114的輪入端提供一等效的大電容。 M359871 迴路穩定度是設計低壓降線性穩壓器的過程中重要考 量’負載電流大小以及輸出電容值為兩項主要影響穩定度的 因素。透過小訊號分析,先前技術低壓降穩壓器10之迴路 中主要存在兩極點(pole) fpl和fp2,分別由下列公式來表 示: fp\ ^ ~---- ^ X Rpar X CparM359871 V. New Description: [New Technology Field] This new type relates to a linear regulator with fast transient response, especially a low-dropout regulator with fast transient response (i〇 w dropout regulator » LDO regulator) ° [Prior Art] For portable electronic products such as mobile phones, personal digital assistants (PDAs) and notebook computers, it is currently the trend to reduce the supply voltage of the core processor. In the case of bucking, system efficiency, power consumption, and battery life must also be considered. Therefore, various voltage conversion circuits are often designed for power management. A good voltage conversion circuit can provide a stable output voltage and a wide range of output current, so that when the load voltage changes instantaneously, the voltage can be quickly stabilized at the original voltage level and quickly provide different load currents. The most efficient conversion is possible. Therefore, response speed and system stability are important parameters for evaluating voltage conversion circuits. There are two traditional voltage conversion circuits: switching regulators and linear regulators (linear regUiat〇r). The linear regulators commonly used in buck applications are low-dropout regulators. Low dropout regulator, LDO regulator ). Low-dropout regulators are widely used in a variety of portable electronic products due to their low production cost, simple circuit and low noise, which provide stable output voltage. FIG. 1 is a schematic diagram of a conventional low dropout regulator 10. The low dropout voltage regulator 10 includes an error amplifier 110, a power switch 12A, a voltage dividing circuit 130, an internal compensation circuit 14A, and an output capacitor c. The low dropout regulator 10 converts the input voltage VIN to the output voltage V〇UT to drive a load (represented by resistor R1) and the load current is represented by *Iload. The voltage dividing circuit 13A includes a resistor Rd 〇 R2' to press the output voltage ν 〇υ τ * to generate a feedback voltage VFB. The error amplifier 110 includes an internal comparator 112 and an internal amplifier 14. The internal comparator 112 compares the difference between the feedback voltage vFB and a reference voltage vREF and generates a corresponding control signal, and the internal amplifier 114 can enhance the control signal. The output voltage ν 〇υ τ is stabilized by controlling the channel impedance of the power switch 12 ( (represented by the parasitic capacitance Cp in FIG. 1). The output capacitor c〇 is connected in parallel with the load resistor rl. When the load current I1〇ad suddenly changes, the output capacitor C〇 temporarily provides a large amount of current required by the load to improve the transient response of the output voltage VOUT. The internal compensation circuit 14A includes an electric P and a core and a capacitor Cz, and the resistor Rz and the capacitor Cz are connected in series with each other. One end of the internal compensation circuit 14〇 is coupled to the control end of the power switch 12〇, and the other end is coupled to the inside of the shame amplifier 110 for use as a frequency compensation. The internal compensation circuit 140 is coupled in parallel with the internal amplifier 114 to provide an equivalent large capacitance to the turn-in end of the internal amplifier 114 by the Miller effect. M359871 loop stability is an important consideration in the design of low-dropout linear regulators. The magnitude of the load current and the value of the output capacitor are two factors that primarily affect stability. Through small signal analysis, there are mainly two poles fpl and fp2 in the loop of the prior art low-dropout regulator 10, which are respectively represented by the following formula: fp\ ^ ~---- ^ X Rpar X Cpar
^tcxRsxCo 又 X Jtoad 2n^Co ⑴ -(2)^tcxRsxCo and X Jtoad 2n^Co (1) -(2)
其中,among them,
Rpar代表誤差放大器110和内部補償電路140之等效輸 出阻抗;Rpar represents the equivalent output impedance of error amplifier 110 and internal compensation circuit 140;
Cpar代表誤差放大器110和内部補償電路140之等效輸 出電容;Cpar represents the equivalent output capacitance of error amplifier 110 and internal compensation circuit 140;
Rs代表功率開關120之輸出阻抗; λ代表以金氧半導體(MOS)電晶體作為功率開關120時 之通道長度調變係數(channel length modulation coefficient) ° 由(1)和(2)可知,主極點fpl之值相關於誤差放大器no 和内部補償電路140,而第二極點fp2會隨著負載電流ilQad 變化而改變。由於低壓降穩壓器丨〇之閉迴路系統的相位邊 際(phase margin )需要一極低頻的主極點才得以維持,因 5 M359871 彳Ά fpl之值越小越好。先前技術之低壓降穩壓器… .使用内部補償電路140的米勒效應,來增加等效輸出電容 及等效輸出阻抗>之值,進而降低主極點fpi之 值:提供較大範圍的相位邊際。然而,增加電容值的結果將 使等效輸出電容Cpar需要更長的充放電時間,如此會降低 對負載變化的響應速度,增加輸出電壓之峰至峰值 (peak to-peak),以數位相機或顯示器的應用為例,這種負 ,.載變化暫_應將影響顯示品質。為了降低輸出電壓之峰至 =值’先前技術之低壓降穩㈣1G f使用大容值之輸出電 合Co (通本為47uF〜l〇〇uF),而這大容值之輪出電容c〇 身又疋電解電容’比較昂貴,會增加製作成本。 【新型内容】 本新型提供-種具快速暫態響應之線性穩壓器,包含有〆誤差 放^器,絲根據-參考電壓及—回授電壓來產生—控制訊號;一 輯調整元件,耦接於該誤差放大器,絲根據該控制訊號對-輸 調整λ,進而產生—輸出電壓;—分壓電路,耦接於該電 二正几,时傾雜出賴以產生朗授鹤; 用來在該線性穩•器之迴路 頻寬和相位邊Z u 點’進而增加該線性穩屢器之 【實施方式】 M359871 在說明書及後續的申請專利範圍當中使用了某些 -來指㈣定的元件。所屬領域中具有通常知識者應 硬體製造商可能會用不同的名詞來稱呼同—個元彳=。’ 書及後續的申請專利範圍並不以名稱的差異來作為區分說月 件的方式,1是以元件在功能上的差異來作為區分的=。 在通篇說明書及後續的請求項當中所提及的「包含」係為 開放式的用語,故應解釋成「包含但不限定於」。此外',‘= _接」一詞在此係包含任何直接及間接的電氣連接手段,因 此,若文中描述一第一裝置耦接於一第二裝置,則代表該第 一裝置可直接電氣連接於該第二裝置,或者透過其他裝置或 連接手段間接地電氣連接至該第二裝置。同時,為讓本新= 更顯而易懂,下文依本新型之低壓降穩壓器特舉實施例配八 所附圖式作詳細說明,但所提供之實施例並非用以限制本新 型所涵蓋的範圍。 1 第2圖為本新型第一實施例中一低壓降穩壓器2〇的示 意圖。低壓降穩壓器20包含一誤差放大器210、一功率開關 220、一分壓電路23〇,以及一外部補償電路24〇。低壓降穩 壓器20可將輸入電壓VlN轉換輸出電壓ν〇υτ,以驅動一負 載(由電阻RL來表示),而負載電流則由Il〇ad來表示。分 壓電路230包含電阻心和尺2,可將輸出電壓ν〇υτ分壓以產 生一回授電壓Vfb。誤差放大器210包含一内部比較器212 和一内部放大器214,内部比較器212可比較回授電壓v阳 M359871 及-參考電壓\之_差異並產生相對應之控制訊於 而内部放大器214可增強控制訊號以控制功率開關细二 道阻抗(由第2圖中之寄生電容Cp來表 ^ a r~ ^ ^運而穩定輪屮 電£ v0UT。外部補償電路240和負載電阻 L皿,包含雷 阻R01、R02和電容c〇i、c〇2,其中電阻玟⑴和電容C〇互 相串接,而電阻R〇2和電容C〇2互相串接。 〇1互Rs represents the output impedance of the power switch 120; λ represents the channel length modulation coefficient when the metal oxide semiconductor (MOS) transistor is used as the power switch 120. From (1) and (2), the main pole is known. The value of fpl is related to the error amplifier no and the internal compensation circuit 140, and the second pole fp2 changes as the load current ilQad changes. Since the phase margin of the closed loop system of the low dropout regulator requires a very low frequency main pole to be maintained, the smaller the value of 5 M359871 彳Ά fpl, the better. The low voltage drop regulator of the prior art... uses the Miller effect of the internal compensation circuit 140 to increase the value of the equivalent output capacitance and the equivalent output impedance>, thereby reducing the value of the main pole fpi: providing a larger range of phases Marginal. However, increasing the value of the capacitor will result in a longer charge-discharge time for the equivalent output capacitor Cpar, which will reduce the response to load changes and increase the peak-to-peak output voltage to a digital camera or For example, the application of the display, such a negative, temporary change _ should affect the display quality. In order to reduce the peak of the output voltage to the value of 'the low voltage drop of the prior art (4) 1G f uses the output value of the large capacitance Co (compass is 47uF~l〇〇uF), and the capacitance of this large value is c〇 The body is also expensive and will increase the production cost. [New content] This new type provides a linear regulator with fast transient response, including a 〆 error amplifier, the wire is generated according to the - reference voltage and the feedback voltage - a control signal; a series of adjustment components, coupled Connected to the error amplifier, the wire adjusts λ according to the control signal, and then generates an output voltage; the voltage dividing circuit is coupled to the electric two positive and several times, and the time is mixed to generate a grading crane; In the loop bandwidth and phase edge Z u point of the linear stabilizer, the linear stabilizer is further increased. [Embodiment] M359871 is used in the specification and the subsequent patent application scope to refer to (four) element. Those with ordinary knowledge in the field should be called by the hardware manufacturer with different nouns. The scope of the book and the subsequent patent application does not use the difference in name as the way to distinguish between the month and the month, and 1 is the difference in the function of the component. The term "including" as used throughout the specification and subsequent claims is an open term and should be interpreted as "including but not limited to". In addition, the term ', '= _ 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接 接The second device is electrically connected to the second device indirectly via other devices or connection means. At the same time, in order to make this new = more understandable, the following description of the low-voltage drop regulator specific embodiment of the present invention is described in detail with reference to the eight drawings, but the embodiments provided are not intended to limit the present invention. The scope covered. 1 Fig. 2 is a schematic view of a low-dropout regulator 2〇 in the first embodiment of the present invention. The low dropout regulator 20 includes an error amplifier 210, a power switch 220, a voltage dividing circuit 23A, and an external compensation circuit 24A. The low dropout voltage regulator 20 converts the input voltage VlN into an output voltage ν 〇υ τ to drive a load (represented by the resistor RL), and the load current is represented by Il 〇 ad. The voltage dividing circuit 230 includes a resistor core and a ruler 2, and the output voltage ν 〇υ τ can be divided to generate a feedback voltage Vfb. The error amplifier 210 includes an internal comparator 212 and an internal amplifier 214. The internal comparator 212 can compare the feedback voltage v positivity M359871 and the - reference voltage _ difference and generate a corresponding control signal, and the internal amplifier 214 can enhance the control. The signal is used to control the fine impedance of the power switch (the parasitic capacitance Cp in Figure 2 is used to stabilize the rim volts. The external compensation circuit 240 and the load resistor L, including the lightning resistance R01, R02 and capacitors c〇i, c〇2, wherein the resistor 玟(1) and the capacitor C〇 are connected in series, and the resistor R〇2 and the capacitor C〇2 are connected in series with each other.
等效輸出電容Cpar之充放電時間At可由下列公式表示 其中, BW代表系統頻寬;The charge and discharge time At of the equivalent output capacitor Cpar can be expressed by the following formula, where BW represents the system bandwidth;
Cpar代表誤差放大器210之等效輸出電容; △ V代表誤差放大器210之跨壓;Cpar represents the equivalent output capacitance of the error amplifier 210; ΔV represents the voltage across the error amplifier 210;
Isr代表流經誤差放大器210之電流。 由公式(3)可知,在固定頻寬下,等效輸出電容Cpar之 充放電時間At和其電容值成正比。在先前技術之低壓降穩 壓器10中,内部補償電路140之電容匕會增加其等效輪: 電容Cpar’因此需要較長的充電時間。本新型之低壓降穩壓 器20不使用内部補償電路,所以也沒有產生米勒效應,因 此可降低等效輸出電容Cpar之值,進而加快對負載變化的 響應速度,降低輸出電壓之峰至峰值以提升品質。 M359871 另一方面,透過小訊號分析,外部補償電路24〇可在低 壓降穩壓器20之迴路中提供兩零點(zer〇) l和,分別 由下列公式來表示: Λ, fz2 1 2^x/?01xC01 1 2^xi?02xC02 其中W1〇C02而 零點fZ i和fz2可增加低壓降穩壓_ 2 〇之頻寬和相位邊 際’先前技術之低壓降穩壓器1G需使用大容值之輸出電容 Co (通常為47uF〜議uF) ’本新型第—實施例之低壓降穩 壓器20僅需使用小容值之電容(^通常為黯,而q 通常為i則和低阻質之電阻(R〇i和R〇2通常皆為⑴)來 達到同樣效果。電阻、和、可整合至扣内部,小容值之 電容c。1和C。2可以是陶竟電容,不會佔據太大電路空間, 因此能大幅降低生產成本。另 β 而強5周的疋,本實施例之外部 補償電路240雖包含c和r 形成兩個零點作為補償,“ HC。2和R。2等兩組電路以 電路240可視整體低壓 丨補秘 雷故所f 之需求增加或減少補償 電路所形成之零點,舉例來說, 。與、所構成。 外4刻員電路240可僅由 9 M359871 第3圖為本新型第二實施例中一低壓降穩壓器30的示 意圖。低壓降穩壓器30和低壓降穩壓器20結構類似,同樣 沒有内部補償電路,同樣包含誤差放大器210、功率開關 220,和分壓電路230,不同之處在於低壓降穩壓器30包含 一外部補償電路340。外部補償電路340包含電阻R01和電 容C〇i、C〇2。串接之電阻R〇l和電容C〇i同時和負載電阻 RL並聯,而電阻R〇2和分壓電路230中之電阻Ri並聯。 透過小訊號分析,外部補償電路340可在低壓降穩壓器 30之迴路中提供兩零點fZ3和fz4,分別由下列公式來表示: /Z3 *--- 2π x Rox x C01 r 〜1 + i?1 C〇2 Z4 2πχ R'C02 本新型第二實施例之低壓降穩壓器30同樣僅需使用小 容值之電容Cm、(:。2和低阻質之電阻R〇i,就能達到增加頻 寬和相位邊際效果,同時亦不會佔據太大電路空間,因此能 大幅降低生產成本。 在前述本新型實施例中,功率開關220可為一 P通道金 氧半導體(P-channel Metal Oxide Semiconductor ’ PMOS)電晶 體,或是其它具類似功能之元件。分壓電路230可包含兩電 阻心和R2,或更多數目之串接電阻。 M359871 本新型之低壓降穩壓器不使用内部補償電路,而是透過 外部補償電路來維持系統穩定度,因此可降低誤差放電器的 充電時間,進而加快暫態響應以提升顯示品質。同時,外部 補償電路僅需使用小容值之電容和低阻質之電阻,因此能大 幅降低生產成本。 以上所述僅為本創作之較佳實施例,凡依本創作申請專利範圍 Φ 所做之均等變化與修飾,皆應屬本創作之涵蓋範圍。 【圖式簡單說明】 第1圖先前技術中一低壓降穩壓器的示意圖。 第2圖本新型第一實施例中一低壓降穩壓器的示意圖。 第3圖本新型第二實施例中一低壓降穩壓器的示意圖。 _ 【主要元件符號說明】 10 ' 20 、 30 低壓降穩壓器 110 、 210 誤差放大器 112 、 212 内部比較器 114 、 214 内部放大器 120 、 220 功率開關 130 、 230 分壓電路 140 内部補償電路 11 M359871 240 、 340 CpIsr represents the current flowing through the error amplifier 210. It can be seen from equation (3) that at a fixed bandwidth, the charge-discharge time At of the equivalent output capacitor Cpar is proportional to its capacitance value. In the prior art low dropout regulator 10, the capacitance of the internal compensation circuit 140 increases its equivalent wheel: the capacitor Cpar' therefore requires a longer charging time. The novel low-dropout regulator 20 does not use an internal compensation circuit, so there is no Miller effect, so the value of the equivalent output capacitor Cpar can be reduced, thereby speeding up the response to load changes and reducing the peak-to-peak value of the output voltage. To improve quality. M359871 On the other hand, through small signal analysis, the external compensation circuit 24 can provide two zero points (zer〇) l and in the loop of the low dropout regulator 20, which are respectively represented by the following formula: Λ, fz2 1 2^x /?01xC01 1 2^xi?02xC02 where W1〇C02 and zero points fZ i and fz2 can increase the low-dropout voltage regulation _ 2 〇 bandwidth and phase margin 'Previous technology low-dropout regulator 1G needs to use large value Output Capacitor Co (usually 47uF to UF) 'The low-dropout regulator 20 of the present invention is only required to use a small capacitance (^ is usually 黯, and q is usually i and low-resistance) The resistors (R〇i and R〇2 are usually (1)) to achieve the same effect. The resistors, and can be integrated into the buckle, and the capacitance of the small capacitance c. 1 and C. 2 can be ceramic capacitors, not occupied. The circuit space is too large, so the production cost can be greatly reduced. In addition, the external compensation circuit 240 of the present embodiment includes c and r to form two zero points as compensation, "HC. 2 and R. 2, etc." The two sets of circuits increase or decrease the compensation circuit by the need of the circuit 240 to visualize the overall low voltage The zero point is formed, for example, and is composed of. The outer 4 electrician circuit 240 can be only 9 M359871. Fig. 3 is a schematic diagram of a low voltage drop regulator 30 in the second embodiment of the present invention. The device 30 is similar in structure to the low dropout regulator 20, and also has no internal compensation circuit, and also includes an error amplifier 210, a power switch 220, and a voltage dividing circuit 230, except that the low dropout regulator 30 includes an external compensation circuit. 340. The external compensation circuit 340 includes a resistor R01 and capacitors C〇i, C〇2. The series connected resistor R〇1 and capacitor C〇i are simultaneously connected in parallel with the load resistor RL, and the resistor R〇2 and the voltage dividing circuit 230 are included. The resistors Ri are connected in parallel. Through small signal analysis, the external compensation circuit 340 can provide two zero points fZ3 and fz4 in the loop of the low dropout regulator 30, which are respectively represented by the following formula: /Z3 *--- 2π x Rox x C01 r 〜1 + i?1 C〇2 Z4 2πχ R'C02 The low-dropout regulator 30 of the second embodiment of the present invention also requires only a small capacitance Cm, (: 2 and low resistance R) 〇i, you can achieve increased bandwidth and phase margin effects, and will not occupy too The large circuit space can greatly reduce the production cost. In the foregoing embodiment, the power switch 220 can be a P-channel Metal Oxide Semiconductor (PMOS) transistor, or other similar functions. The voltage divider circuit 230 can include two resistor cores and R2, or a greater number of series resistors. M359871 The novel low dropout regulator does not use an internal compensation circuit, but maintains system stability through an external compensation circuit. Therefore, the charging time of the error discharger can be reduced, thereby accelerating the transient response to improve the display quality. At the same time, the external compensation circuit only needs to use a small capacitance capacitor and a low resistance resistor, so the production cost can be greatly reduced. The above description is only the preferred embodiment of the present invention, and all the equivalent changes and modifications made by the scope of the patent application Φ should be covered by the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic diagram of a low dropout regulator in the prior art. Figure 2 is a schematic view of a low dropout regulator in the first embodiment of the present invention. Figure 3 is a schematic view of a low dropout regulator in the second embodiment of the present invention. _ [Main component symbol description] 10 ' 20 , 30 low dropout regulator 110 , 210 error amplifier 112 , 212 internal comparator 114 , 214 internal amplifier 120 , 220 power switch 130 , 230 voltage divider circuit 140 internal compensation circuit 11 M359871 240, 340 Cp
Co、Cz、C〇i、C〇2 Rl、Ri、R2、Rz、R〇i 外部補償電路 寄生電容 輸出電容 R〇2 電阻Co, Cz, C〇i, C〇2 Rl, Ri, R2, Rz, R〇i External compensation circuit Parasitic capacitance Output capacitance R〇2 Resistance
1212
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| TW97222853U TWM359871U (en) | 2008-12-19 | 2008-12-19 | Linear regulators having fast transient response |
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| TW97222853U TWM359871U (en) | 2008-12-19 | 2008-12-19 | Linear regulators having fast transient response |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106169286B (en) * | 2015-05-20 | 2018-08-14 | 晶宏半导体股份有限公司 | Self-discharge voltage stabilizer for display |
| TWI652563B (en) | 2017-07-03 | 2019-03-01 | 旺宏電子股份有限公司 | Circuit and method for supplying a regulated voltage to a target circuit |
| TWI741690B (en) * | 2019-10-01 | 2021-10-01 | 旺宏電子股份有限公司 | Integrated circuit, memory device and method of managing bit line voltage generating circuits |
| TWI775374B (en) * | 2020-04-06 | 2022-08-21 | 愛爾蘭商亞德諾半導體國際無限公司 | Closed loop switch control system, control unit for regulating impedance of switch to reference impedance, and method for controlling impedance of switch |
-
2008
- 2008-12-19 TW TW97222853U patent/TWM359871U/en not_active IP Right Cessation
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106169286B (en) * | 2015-05-20 | 2018-08-14 | 晶宏半导体股份有限公司 | Self-discharge voltage stabilizer for display |
| TWI652563B (en) | 2017-07-03 | 2019-03-01 | 旺宏電子股份有限公司 | Circuit and method for supplying a regulated voltage to a target circuit |
| TWI741690B (en) * | 2019-10-01 | 2021-10-01 | 旺宏電子股份有限公司 | Integrated circuit, memory device and method of managing bit line voltage generating circuits |
| US11342010B2 (en) | 2019-10-01 | 2022-05-24 | Macronix International Co., Ltd. | Managing bit line voltage generating circuits in memory devices |
| TWI775374B (en) * | 2020-04-06 | 2022-08-21 | 愛爾蘭商亞德諾半導體國際無限公司 | Closed loop switch control system, control unit for regulating impedance of switch to reference impedance, and method for controlling impedance of switch |
| US11431334B2 (en) | 2020-04-06 | 2022-08-30 | Analog Devices International Unlimited Company | Closed loop switch control system and method |
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