TWI908448B - Plasma-erosion-resistant component structure and manufacturing method thereof - Google Patents

Abstract

A plasma-erosion-resistant component structure and its manufacturing method are provided, especially for use in semiconductor processing equipment. The structure comprises a multi-layered assembly including a component substrate selected from stainless steel alloys, aluminum alloys, polymer materials, or ceramic materials; a surface coating composed of metal oxides, fluorides, or nitrides, applied via deposition methods such as plasma spraying, aerosol deposition, physical vapor deposition, atomic layer deposition, or plasma-enhanced chemical vapor deposition; and a surface-modified coating formed by densifying the surface coating through ion bombardment using inert gases. This multi-layered configuration enhances hardness, density, and wear resistance, thereby improving plasma-erosion resistance and reducing dust generation caused by coating peeling. The invention offers superior durability and reduced particulate contamination, addressing critical challenges in advanced semiconductor fabrication processes.

Description

Structure and manufacturing method of plasma-resistant element

This invention relates to components used in semiconductor process equipment, particularly addressing the problem of plasma erosion resistance. More specifically, this invention relates to the structural design and material composition of components within cavities to enhance durability and reduce contamination that may occur in advanced semiconductor processes.

In the semiconductor industry, plasma-based processes are crucial for various manufacturing steps, including etching, deposition, and surface modification. Plasma is used in specialized process chambers to achieve precise material removal and deposition at the microscopic level, enabling the fabrication of complex semiconductor devices. Inside these chambers, components such as electrodes, pads, and gas distribution plates are continuously exposed to the reactive plasma environment. To withstand these harsh conditions, these components have traditionally been made of metals (such as stainless steel) or quartz. However, as semiconductor devices become increasingly complex and process capabilities improve, the requirements for chamber components have become more stringent, necessitating surface treatments to ensure component lifespan and process reliability. To reduce plasma-induced degradation, the industry has developed techniques for surface microstructure treatments or coatings on cavity components. These surface modification techniques aim to impart resistance to plasma corrosion, thereby reducing the rate of substrate peeling and minimizing the formation of particulate contamination, which can lead to defects in the semiconductor substrate. Commonly used surface treatment techniques include physical vapor deposition, chemical vapor deposition, and various plasma spraying methods. Despite these technological advancements, problems remain. Traditional materials such as metals and quartz inherently possess limited resistance to plasma corrosion, leading to accelerated wear and ultimately, the peeling of surface treatment layers. The peeling of these coatings not only compromises the integrity of the cavity components but also introduces dust particles into the process environment, adversely affecting product quality and yield. As an alternative to metal and quartz substrates, sintered ceramic materials have been widely explored due to their excellent resistance to plasma corrosion. Ceramic materials such as alumina (Al₂O₃), silicon carbide (SiC), and zirconium dioxide (ZrO₂) exhibit better durability in plasma environments. However, sintered ceramics also have some limitations. The inherent porosity of sintered ceramic substrates can adsorb contaminants, thereby reducing the purity of the cavity environment. Furthermore, the sintering process often leaves adhesive residues on the ceramic surface, further reducing its corrosion resistance and affecting the performance of cavity components. Therefore, there is an urgent need for an innovative component structure that not only resists plasma-induced corrosion but also minimizes the generation of particulate contamination. This structure should possess high hardness, high density, and wear resistance, as well as good protective coating adhesion to ensure long component life and maintain the purity of the semiconductor manufacturing environment.

This invention provides a plasma-resistant element structure designed for use in semiconductor process equipment. This innovative structure addresses the critical need for enhanced durability and reduced contamination in harsh plasma environments. The plasma-resistant element structure of this invention includes a substrate, a coating layer applied to one upper surface of the substrate, and a surface-modified layer. The substrate, serving as the base layer, can be made of a metal, polymer, or ceramic material. The metals include stainless steel types such as SUS304 and SUS316, various aluminum alloys (e.g., 5000 series, 6000 series, 7000 series); polymer materials such as epoxy resins, polyvinyl chloride, etc.; and ceramic materials such as alumina, aluminum nitride (AlN), silicon dioxide (SiO₂), silicon carbide (SiC), silicon nitride (SiN), zirconium dioxide (ZrO₂), and silicon (Si) ceramic substrates. Furthermore, the coating is directly applied to at least one upper surface of the substrate, and this coating is designed to enhance hardness, wear resistance, and corrosion resistance. The coating materials include metal oxides, fluorides, and nitrides, including but not limited to titanium dioxide (TiO₂), aluminum oxide (Al₂O₃), yttrium fluoride (YF₃), erbium oxide (Er₂O₃), thionium oxide (Gd₂O₃), yttrium oxide (Y₂O₃), yttrium oxyfluoride (YOF), yttrium aluminum garnet (YAG), yttrium aluminum monooxide (YAM), erbium aluminum garnet (EAG), and mixtures thereof. The coating is deposited on the upper surface of one of the substrates using deposition techniques, including atmospheric plasma spraying (APS), suspension plasma spraying (SPS), vacuum plasma spraying (VPS), aerosol deposition (ADM), physical vapor deposition (PVD), atomic layer deposition (ALD), or plasma-enhanced chemical vapor deposition (PECVD). The coating thickness ranges from 0.1 µm to 250 µm, and the hardness ranges from 400 HV to 1500 HV. The surface-modified layer is treated with ion bombardment to reduce its surface porosity by at least 50% compared to the original coating. This ion bombardment process is performed under controlled conditions using an inert gas such as argon, krypton, xenon, or radon, at a current of 100–3000 mA, a voltage of 100–1500 V, a gas flow rate of 5–500 sccm, and an operating pressure of 1.0E-1 to 1.0E-6 Torr. The ion bombardment process enhances the coating's resistance to plasma erosion, adhesion, and abrasion resistance, thereby effectively reducing dust generation caused by coating peeling and extending the component's service life. The main advantages of this invention include: Enhanced plasma corrosion resistance: The combination of a high-density surface-modified layer and a robust surface coating provides excellent plasma corrosion resistance, ensuring stable performance of components in harsh semiconductor manufacturing environments. Reduced particle contamination: By reducing coating peeling and substrate degradation, this invention significantly reduces dust particle generation, thereby improving product quality and yield in semiconductor manufacturing. Material diversity and flexibility: This invention can utilize a variety of substrate materials and deposition techniques, providing customized options for specific application requirements and process conditions. Improved Mechanical Properties: The multilayer structure provides high hardness, high density, and wear resistance, which together enhance the durability and reliability of components within the cavity. Simplified Manufacturing Process: Utilizing advanced deposition techniques and ion bombardment for surface modification simplifies the production of high-purity, corrosion-resistant components, overcoming the limitations of traditional sintered ceramic and metal-based components. In summary, this invention provides an innovative solution to the challenges faced by semiconductor manufacturing equipment. By combining a robust substrate with a professionally designed surface coating and surface modification layer, this invention achieves enhanced durability, reduced contamination, and improved overall performance, meeting the growing demands of advanced semiconductor manufacturing technologies. To make the above-mentioned features and advantages of this invention more apparent, preferred embodiments are described below in detail with reference to the accompanying drawings.

Please refer to Figure 1, which illustrates one embodiment of the plasma-resistant element structure of the present invention. This plasma-resistant element structure 100 (hereinafter referred to as element structure 100) aims to enhance the durability and performance of internal components in a cavity by mitigating the effects of plasma-induced corrosion. The plasma-resistant element structure 100 includes a multi-layer structure comprising a substrate 110, a coating 120 disposed on one upper surface of the substrate, and a surface-modified layer 130 disposed on the coating, comprehensively providing excellent plasma resistance, reducing particle contamination, and extending the service life of semiconductor process cavities. The substrate 110 forms the base layer of the plasma-resistant element structure 100, serving as the primary structural support. The substrate 110 is selected from a range of materials possessing good mechanical strength, thermal stability, and compatibility with semiconductor manufacturing conditions. Selection criteria for the substrate 110 include: effective thermal conductivity for heat dissipation; mechanical strength to maintain structural integrity under operating pressure; chemical resistance to degradation under reactive plasma conditions; and compatibility with subsequent coating deposition methods to ensure effective deposition of the coating 120. Suitable materials include stainless steel alloys such as SUS304 and SUS316, which are favored for their excellent corrosion resistance and mechanical properties. In addition, various aluminum alloys, including the 5000 series (including magnesium alloys), 6000 series (including magnesium-silicon alloys), and 7000 series (including zinc alloys), are selected due to their strength, lightweight properties, and thermal conductivity. The substrate 110 can also be composed of ceramic materials, such as alumina, aluminum nitride, silicon dioxide, silicon carbide, silicon nitride, zirconium dioxide, and silicon. These ceramic materials, due to their high hardness, thermal stability, and excellent chemical resistance, can withstand the reactive plasma environment in semiconductor manufacturing processes. Furthermore, polymeric materials such as oxygen-reducing resins and polyethylene can also be used in other specialized fields. The coating 120 deposited on the upper surface of the substrate 110 plays a key role in enhancing the resistance of the component structure 100 to plasma abrasion and corrosion. This coating 120 significantly improves the hardness, abrasion resistance, and corrosion resistance of the component structure 100, thus forming a barrier against plasma erosion. The coating 120 is composed of materials selected from the group consisting of metal oxides, fluorides, and nitrides, including but not limited to titanium dioxide, aluminum oxide, yttrium oxide, erbium oxide, thorium oxide, yttrium aluminum garnet, yttrium aluminum monooxide, and erbium aluminum garnet. The coating 120 is deposited on one surface of the substrate 110 using deposition techniques, including atmospheric plasma spraying, suspended plasma spraying, vacuum plasma spraying, aerosol spraying, physical vapor deposition, atomic layer deposition, or plasma-enhanced chemical vapor deposition. These deposition techniques allow for precise control of the coating 120 thickness, typically ranging from 0.1 µm to 250 µm, and a hardness ranging from 400 HV to 1500 HV. The porosity of the coating 120 is maintained between 1% and 10%, ensuring a balance between mechanical strength and minimal gas permeability. The effect of coating 120 is further influenced by various deposition parameters, which vary depending on the deposition method. For example, for plasma spraying, these parameters include: arc current, rotation speed, carrier gas flow rate, preheating temperature, and vacuum pressure. Alternatively, for aerosol deposition, these parameters include: powder particle size, carrier gas flow rate, deposition pressure, spraying temperature, and nozzle-to-substrate distance. Or, for physical vapor deposition, these parameters include: chamber temperature, evaporation rate, ion beam power and voltage, carrier gas flow rate, and process pressure. A surface-modified layer 130 is located above the coating 120 and is specifically designed to further enhance resistance to plasma erosion by increasing surface density and improving adhesion. This surface-modified layer 130 is formed through a densification process using ion bombardment, which significantly improves the coating's performance. During ion bombardment, the coating 120 is exposed to a stream of ions generated from inert gases such as argon, krypton, xenon, or radon. In one embodiment, these ions are accelerated under controlled conditions of current (100 to 3000 mA), voltage (100 to 1500 V), operating pressure (1.0E-1 to 1.0E-6 Torr), and gas flow rate (5 to 500 Sccm). Through this ion bombardment process, the porosity of a portion above the coating 120 is reduced by at least 50%, thereby forming a surface-modified layer 130 with enhanced plasma erosion resistance, improved adhesion, and excellent wear resistance. The densified surface-modified layer 130 has a hardness range of 500 HV to 1500 HV and a porosity of less than 1%, effectively reducing plasma penetration and pathways for subsequent material degradation. The thickness ratio of the surface-modified layer 130 to the original coating 120 is, for example, in the range of 1%:99% to 50%:50%. Improving the interfacial bond between the coating 120 and the surface-modified layer 130 is key to maintaining the integrity of the multilayer component. Since the surface-modified layer 130 is generated by ion bombardment of the coating 120, it inherently possesses excellent adhesion, effectively reducing coating peeling and minimizing the likelihood of dust generation. Next, please refer to Figures 2 and 3A to 3C. Figure 2 illustrates one embodiment of the manufacturing process of the plasma-resistant element structure of the present invention, and Figures 3A to 3C are schematic diagrams corresponding to some steps in Figure 2. First, referring to step S110 and Figure 3A, the material of the substrate 110 is selected according to the specific requirements of the semiconductor process environment. In one embodiment, the substrate 110 undergoes surface treatment, including cleaning, degreasing, and surface roughening, to ensure better adhesion during the subsequent deposition of the coating 120. Next, referring to step S120 and Figure 3B, after the substrate 110 has been selected and cleaned, a coating 120 is deposited on one of the upper surfaces of the substrate 110 using a selected deposition method (such as APS, SPS, VPS, ADM, PVD, ALD, or PECVD). Parameters during the deposition process are carefully controlled to achieve a uniform coating thickness within a specified range and to impart the desired hardness and porosity characteristics. In one embodiment, step S130 may be performed for curing or controlled cooling after coating 120 deposition to stabilize it. Subsequently, referring to step S140 and Figure 3C, after the substrate 110 is prepared, a surface modification layer 130 is formed by ion bombardment coating 120. The substrate 110 coated with coating 120 is placed in an ion bombardment chamber equipped with an inert gas source. Ion bombardment is performed under controlled conditions of current, voltage, gas flow rate, and pressure to form a denser surface modification layer 130 in coating 120, enhancing its resistance to plasma erosion. Process parameters are optimized to ensure effective densification of the coating 120 surface without compromising its integrity. Following ion bombardment, in step S150, post-processing steps are performed, including heat treatment to release stress and further enhance the properties of coating 120 and surface modification layer 130. Subsequently, in step S160, the device structure 100 undergoes rigorous testing to confirm the uniformity, density, hardness, and adhesion of the coating. Testing techniques include microscopic inspection, hardness testing, and adhesion testing. In one embodiment, as shown in step S170, finishing steps such as polishing or machining may also be performed to achieve the required dimensions and surface smoothness, ensuring the device structure 100 can be installed in semiconductor manufacturing equipment. The device structure 100 of this invention can be implemented in a variety of different applications. For example, one embodiment uses SUS304 stainless steel as the material of the substrate 110, and forms a 150 µm thick aluminum oxide coating 120 by atmospheric plasma spraying. The substrate 110 with coating 120 is then subjected to argon ion bombardment at 500 mA and 800 V to further reduce the porosity of the coating surface. In another embodiment, the substrate 110 is made of silicon carbide, a ceramic material, and a coating 120 with a thickness of 200 µm is deposited by suspended plasma spraying of a mixture of 70 wt% alumina (Al₂O₃) and 30 wt% titanium dioxide (TiO₂). A surface modification layer 130 is formed by xenon ion bombardment at 1000 mA and 1200 V, reducing surface porosity. In yet another embodiment, an aluminum alloy is used as the material of the substrate 110, and yttrium aluminum garnet is deposited by physical vapor deposition to form the coating 120. In one embodiment, a coating 120 of various materials can also be deposited on a silicon-based substrate 110 via atomic layer deposition. These embodiments demonstrate how different substrate 110 materials, coating combinations, and deposition techniques can be combined to meet diverse semiconductor manufacturing requirements. Variations in deposition methods—such as using atmospheric plasma spraying for thick coatings, aerosol spraying for thin and dense coatings, physical vapor deposition for thin and high-hardness coatings, or using atomic layer deposition/plasma-enhanced chemical vapor deposition for uniform thin film deposition—make optimization possible according to specific application requirements. The plasma-resistant component structure 100 of this invention offers significant advantages over traditional cavity-internal components. First, the multi-layered structure effectively resists plasma-induced corrosion, thereby maintaining structural integrity and reducing the need for frequent component replacements. This durability is attributed to the high-density surface-modified layer 130, which provides excellent protection in harsh plasma environments. Furthermore, the strong adhesion between the coating layer 120 and the surface-modified layer 130 effectively reduces coating particle detachment, thereby minimizing particulate contamination in the semiconductor manufacturing environment. The plasma-resistant device structure 100 is suitable for a wide range of semiconductor manufacturing equipment, such as plasma etching chambers, chemical vapor deposition (CVD) and physical vapor deposition (PVD) chambers, plasma-enhanced lithography systems, and ion implantation equipment. That is, devices exposed to high-energy ion beams and reactive plasma environments can benefit from the enhanced erosion resistance and reduced particle formation characteristics provided by this invention. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the invention. Anyone skilled in the art may make modifications and refinements without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

100: Plasma-resistant component structure (component structure) 110: Substrate 120: Coating 130: Surface modification layer S110~S170: Flowchart steps

Figure 1 illustrates one embodiment of the plasma corrosion resistant element structure of the present invention. Figure 2 illustrates one embodiment of the manufacturing process of the plasma corrosion resistant element structure of the present invention. Figures 3A to 3C are schematic diagrams corresponding to some steps in Figure 2.

100: Plasma-resistant component structure (component structure)

110: Substrate

120: Coating

130: Surface modification layer

Claims (11)

A plasma-resistant element structure includes: a substrate; a coating disposed on a surface of the substrate; and a surface-modifying layer disposed on the coating, wherein the porosity of the surface-modifying layer is less than that of the coating, thereby enhancing the plasma-resistant properties of the element; wherein the surface-modifying layer is formed by reducing the porosity of the surface above the coating by ion bombardment; and wherein the surface-modifying layer uses at least one inert gas selected from argon, krypton, xenon, or radon in the ion bombardment. The anti-plasma erosion element structure as described in claim 1, wherein the coating is deposited by at least one of the following deposition methods: atmospheric plasma spraying, suspended plasma spraying, vacuum plasma spraying, aerosol spraying, physical vapor deposition, atomic layer deposition, or plasma-enhanced chemical vapor deposition. The anti-plasma erosion element structure as described in claim 1, wherein the substrate is made of metal, polymer or ceramic material. The anti-plasma erosion element structure as described in claim 2, wherein the porosity of the surface modification layer is reduced by at least 50% compared to the porosity of the coating layer. The anti-plasma erosion element structure as described in claim 2, wherein the thickness ratio of the surface modification layer to the coating layer is in the range of 1:1 to 1:99. A method for forming a plasma-resistant element structure includes: providing a substrate; depositing a coating on a surface of the substrate; and ion bombarding the coating with at least one inert gas to form a surface-modified layer; wherein the ion bombardment of the coating is performed using at least one inert gas selected from argon, krypton, xenon, or radon. The method for forming a plasma-resistant element structure as described in claim 6, wherein the deposition method of the coating is selected from atmospheric plasma spraying, suspended plasma spraying, vacuum plasma spraying, aerosol spraying, physical vapor deposition, atomic layer deposition, or plasma-enhanced chemical vapor deposition. The method for forming a plasma-resistant element structure as described in claim 6, wherein the substrate is made of a metal, polymer, or ceramic material. The method for forming a plasma-resistant element structure as described in claim 6, wherein the porosity of the surface-modified layer is reduced by at least 50% compared to the coating. The method for forming a plasma-resistant element structure as described in claim 6, wherein the thickness ratio of the surface-modified layer to the coating layer is in the range of 1:1 to 1:99. The method for forming a plasma-resistant element structure as described in claim 6, wherein the coating is subjected to ion bombardment under the following conditions: current 100~3000mA, voltage 100-1500V, gas flow rate 5~500Sccm, and operating pressure 1.0E-1~1.0E-6Torr.