TWI901349B - Switching power supply and its control circuit - Google Patents

Abstract

A switching power supply and its control circuit are provided. The switching power supply includes a chip startup resistor and a chip supply capacitor. The control circuit includes a charge control switch circuit and is configured to: during the startup process of the switching power supply, control the charge control switch circuit to be in an on state, so that the AC input voltage of the switching power supply charges the chip supply capacitor via the chip startup resistor and the charge control switch circuit.

Description

Switching power supply and its control circuit

The present invention relates to the field of circuits, and more specifically to a switching power supply and its control circuit.

A switching power supply, also known as an alternating current power supply or switching converter, is a type of power supply. It converts a DC or AC voltage into the voltage or current required by the user through various architectures (e.g., flyback, forward, buck, or boost).

According to an embodiment of the present invention, a control circuit is used in a switching power supply, wherein the switching power supply includes a chip startup resistor and a chip power supply capacitor, and the control chip includes a charge control switch circuit and is configured to: during the startup process of the switching power supply, control the charge control switch circuit to be in a conductive state, so that the AC input voltage of the switching power supply charges the chip power supply capacitor via the chip startup resistor and the charge control switch circuit.

The switching power supply according to an embodiment of the present invention includes the above-mentioned control circuit.

100,200: Flyback switching power supply

102,202: Control chip

2022: Power supply voltage detection module

2024: Line Voltage Detection Module

2026: Constant Pressure/Constant Flow Control Module

2028: Charging Control Module

AC: AC input voltage

BASE: High voltage bipolar junction transistor base PIN

C0: Capacitor

char_req: Charging requirement indication signal

charge: charging switch control signal

Co: Output filter capacitor

CS: Primary side current detection signal

Cvcc: Chip power supply capacitor

D1: diode

D2: IC internal rectifier diode

dem: Demagnetization status indication signal

dem_b: Demagnetization completion indication signal

FB: Output voltage feedback signal

GND: Chip ground pin

Highline: Input voltage indication signal

I1, I2: Charging current

Ip: Primary current

M2, MP2, MP3, MP4, MN3, MP5, MN4: Transistors

MN1, MP1: Driver tube

Naux: Auxiliary winding

ngate: First driver control signal

ngate2: transistor control signal

Np: Primary Winding

Ns: Secondary Winding

PG: Power ready signal

pgate: Second driver control signal

pwm: power transistor control signal

Q1: Power transistor

R1: Chip start resistor

R2, R3, R4, R5, R6, R7: resistors

R9, R10: voltage divider resistors

Rs: Current flow measurement resistance

state: Transformer status indication signal

SW: Switch pin

T, T1: Transformer

VCC: Chip supply voltage

VCC_low: Power supply status indication signal

Vo: System output voltage

The present invention can be better understood from the following description of specific embodiments of the present invention in conjunction with the drawings, wherein:

Figure 1 shows a schematic diagram of the structure of a traditional flyback switching power supply.

Figure 2 shows a schematic structural diagram of a flyback switching power supply according to an embodiment of the present invention.

Figure 3 shows the operating timing diagram of the multiple charging control related signals shown in Figure 2.

Figure 4 shows an example implementation circuit diagram of the charging control module shown in Figure 2.

The features and exemplary embodiments of various aspects of the present invention are described in detail below. In the detailed description below, many specific details are set forth in order to provide a comprehensive understanding of the present invention. However, it will be apparent to those skilled in the art that the present invention can be implemented without some of these specific details. The following description of the embodiments is intended only to provide a better understanding of the present invention by illustrating examples of the present invention. The present invention is in no way limited to any specific configuration and algorithm set forth below, but rather covers any modifications, substitutions, and improvements to the elements, components, and algorithms without departing from the spirit of the present invention. In the drawings and the following description, well-known structures and techniques are not shown in order to avoid unnecessary ambiguity in the present invention. In addition, it should be noted that the term "A and B are connected" used here can mean "A and B are directly connected" or "A and B are indirectly connected via one or more other components."

FIG1 shows a schematic diagram of the structure of a conventional flyback switching power supply. As shown in Figure 1, in a flyback switching power supply 100, the system output voltage Vo of the flyback switching power supply 100 is sampled using the auxiliary winding Naux of the transformer T to generate an output voltage feedback signal FB representing the system output voltage Vo. The primary current Ip flowing through the primary winding NP of the transformer T is detected using an inductive sensing resistor Rs to generate a primary current detection signal CS representing the primary current Ip. Based on the output voltage feedback signal FB and the primary current detection signal CS, constant voltage/constant current control of the system output voltage/current is achieved through logic control.

As shown in Figure 1, in a flyback switching power supply 100, the power transistor Q1 is connected between the primary winding Np of the transformer T1 and the reference ground, the driver MN1 is connected between the base of the power transistor Q1 and the reference ground, and the driver MP1 is connected between the chip power supply capacitor Cvcc and the base of the power transistor Q1. Before the system is powered on, the driver MP1 and MN1, transistor M2, and power transistor Q1 are all in the off state. After the system is powered on, the AC input voltage AC is rectified by the rectifier bridge and then started by the chip. Resistor R1 charges the base of power transistor Q1. As the base voltage of power transistor Q1 increases, power transistor Q1 switches from the off state to the on state. The AC input voltage AC generates a charging current I1 in power transistor Q1 that flows from the switching pin SW of control chip 102 through diode D1 to the chip supply voltage VCC of control chip 102, charging chip supply capacitor Cvcc. When the chip supply voltage VCC on chip supply capacitor Cvcc exceeds the undervoltage lockout (UVL) of control chip 102, the power supply capacitor Cvcc is turned off. When the UVLO threshold is reached, the control chip 102 starts to work. After the control chip 102 works normally, the constant voltage/constant current control module generates a power transistor control signal PWM (not shown in the figure) to control the on and off of the power transistor Q1 based on the output voltage feedback signal FB and the primary side current detection signal CS, and generates a first driver control signal PWM to control the on and off of the driver MN1 based on the power transistor control signal PWM. ngate and the second driver control signal pgate that controls the on and off of the driver MP1; when the driver MP1 is in the on state and the driver MN1 is in the off state, the power transistor Q1 is in the on state, and the primary winding Np of the transformer T stores energy; when the driver MP1 is in the off state and the driver MN1 is in the on state, the power transistor Q1 is in the off state, and the energy stored in the primary winding Np of the transformer T is Energy is transferred to the secondary winding Ns of the transformer T. The auxiliary winding Naux of the transformer T generates a voltage proportional to the system output voltage Vo by coupling the demagnetization signal of the secondary winding Ns. The dividing resistors R9 and R10 divide the voltage on the auxiliary winding Naux of the transformer T to generate the output voltage feedback signal FB. When the control chip 102 is working normally and the power transistor Q1 is in the off state, if the chip If the chip supply voltage VCC on the supply capacitor Cvcc falls below the predetermined supply threshold (i.e., the control chip 102's self-power supply is insufficient), the base voltage of the power transistor Q1 is pulled up through the chip enable resistor R1, causing the power transistor Q1 to switch from the off state to the on state. Charging current I1 then flows from the switching pin SW of the control chip 102 through the diode D1 to the chip supply voltage VCC of the control chip 102, charging the chip supply capacitor Cvcc.

The flyback switching power supply 100 shown in Figure 1 has the following drawback: when the AC input voltage is high or ultra-high, the collector-emitter voltage of the power transistor Q1 is low. This can easily lead to breakdown damage during normal system startup or when the control chip 102's self-power supply is insufficient and the chip power supply capacitor Cvcc is charged. However, if the chip power supply capacitor Cvcc is charged solely through the chip startup resistor R1, rather than through the power transistor Q1, the control chip 102's self-power supply is likely to be insufficient when the AC input voltage is low.

In view of the above situation, a control chip for use in a switching power supply according to an embodiment of the present invention is proposed. This can prevent breakdown damage to the power transistors in the switching power supply during normal system startup or when the control chip's self-power supply is insufficient. It can also prevent insufficient self-power supply to the control chip when the AC input voltage is low.

Figure 2 shows a schematic diagram of the structure of a flyback switching power supply according to an embodiment of the present invention. As shown in Figures 1 and 2, flyback switching power supply 200 differs from flyback switching power supply 100 in that control chip 102 is replaced with control chip 202. Control chip 202 is configured to turn on the charging control switch circuit during startup of flyback switching power supply 200, allowing the rectified AC input voltage to charge capacitor Cvcc via resistors R1 and Q1.

As shown in FIG2 , in some embodiments, the control chip 202 is further configured to: during normal operation of the flyback switching power supply 200, when the power transistor Q1 is in the off state and the chip supply voltage VCC on the chip supply capacitor Cvcc is less than a predetermined supply threshold, if the AC input voltage AC of the flyback switching power supply 200 is greater than or equal to the predetermined input threshold, then the charge control switch circuit is controlled to be in the on state, so that the AC input voltage AC charges the chip supply capacitor Cvcc via the chip startup resistor R1 and the charge control switch circuit. Otherwise, the driver transistor MN1 connected between the base of the power transistor Q1 and the reference ground is controlled to switch from the on state to the off state, so that the AC input voltage AC charges the base of the power transistor Q1 through the chip startup resistor R1. After the power transistor Q1 switches from the off state to the on state as its base voltage increases, the AC input voltage AC charges the chip supply capacitor Cvcc through the power transistor Q1 (that is, the charging current I1 charges the chip supply capacitor Cvcc).

As shown in FIG2 , in some embodiments, the control chip 202 includes a supply voltage detection module 2022, a line voltage detection module 2024, a constant voltage/constant current control module 2026, and a charging control module 2028. The supply voltage detection module 2022 is configured to generate a supply status indication signal VCC_low based on the chip supply voltage VCC on the chip supply capacitor Cvcc, indicating whether the chip supply voltage VCC on the chip supply capacitor Cvcc is less than a predetermined supply threshold. The line voltage detection module 2024 is configured to generate an input voltage indication signal High based on the output voltage feedback signal FB, indicating whether the AC input voltage AC is greater than or equal to a predetermined input threshold. line; the constant voltage/constant current control module 2026 is configured to generate a demagnetization state indication signal dem based on the output voltage feedback signal FB, indicating whether the secondary winding Ns of the transformer T is in a demagnetized state, and to generate a power transistor control signal PWM based on the output voltage feedback signal FB and the primary-side current detection signal CS, for controlling the on/off state of the power transistor Q1; the charging control module 2028 is configured to control the on/off state of the charging control switch circuit, the driver transistors MN1 and MP1, and the transistor M2 based on the power supply state indication signal VCC_low, the input voltage indication signal Highline, the power transistor control signal PWM, and the demagnetization state indication signal dem.

As shown in FIG2 , in some embodiments, the charging control module 2028 is further configured to: generate a first driver transistor control signal ngate for controlling the on/off state of the driver transistor MN1 based on the power transistor control signal pwm, the demagnetization state indication signal dem, and the power supply state indication signal VCC_low (for example, generate a demagnetization end indication signal dem_b indicating whether a predetermined time has passed since the demagnetization end moment of the secondary winding Ns of the transformer T based on the demagnetization state indication signal dem, and generate a first driver transistor control signal ngate based on the power transistor control signal pwm, the demagnetization end indication signal dem_b, and the power supply state indication signal VCC_low). The power transistor control signal ngate is generated; and based on the power transistor control signal pwm, the demagnetization state indication signal dem, the power supply state indication signal VCC_low, and the input voltage indication signal Highline, a charge switch control signal charge is generated to control the conduction and shutdown of the charge control switch circuit (for example, a demagnetization end indication signal dem_b is generated based on the demagnetization state indication signal dem, and a charge switch control signal charge is generated based on the power transistor control signal pwm, the demagnetization end indication signal dem_b, the power supply state indication signal VCC_low, and the input voltage indication signal Highline).

As shown in FIG2 , in some embodiments, the charging control module 2028 is further configured to generate a transistor control signal ngate2 for controlling the on and off switching of transistor M2 based on the power transistor control signal pwm, the demagnetization state indication signal dem, the power supply state indication signal VCC_low, and the input voltage indication signal Highline (for example, generating a demagnetization completion indication signal dem_b based on the demagnetization state indication signal dem, and generating a charging switch control signal charge based on the power transistor control signal pwm, the demagnetization completion indication signal dem_b, the power supply state indication signal VCC_low, and the input voltage indication signal Highline).

As shown in FIG2 , in some embodiments, the control chip 202 is further configured to generate a second driver transistor control signal pgate based on the power transistor control signal pwm to control the on/off switching of the driver transistor MP1 connected between the base of the power transistor Q1 and the chip power supply capacitor Cvcc.

As shown in FIG2 , in a flyback switching power supply 200: before the system is powered on, the driver transistors MP1 and MN1, the transistor M2, and the power transistor Q1 are all in the off state; after the system is powered on, the AC input voltage AC is rectified by the rectifier bridge and then charges the chip power supply capacitor Cvcc via the chip startup resistor R1 and the charge control switch circuit (i.e., the charging current I2 charges the chip power supply capacitor Cvcc via the charge control switch circuit); when the chip power supply voltage VCC on the chip power supply capacitor Cvcc is higher than the UVLO threshold of the control chip 202, the control chip 202 starts to operate; during the normal operation of the system, when the power supply is When the power transistor control signal PWM is at a logical high level, the first and second driver transistor control signals NGate and PGate are at a logical low level, the driver transistor MP1 is in the on state, the driver transistor MN1 is in the off state, the power transistor Q1 is in the on state, the transistor control signal NGate2 is at a logical high level, and the transistor M2 is in the on state; when the power transistor control signal PWM is at a logical low level, the first and second driver transistor control signals NGate and PGate are at a logical high level, the driver transistor MP1 is in the off state, the driver transistor MN1 is in the on state, and the power transistor Q1 is in the off state.

Figure 3 shows the operating timing of the various charging control-related signals shown in Figure 2. As shown in Figure 3, when the power supply status indication signal VCC_low is at a logically high level, it indicates that the control chip 202's self-power supply is insufficient. When the power transistor control signal pwm is at a logically low level, the demagnetization status indication signal dem is also at a logically low level, and after a delay, the chip power supply capacitor Cvcc needs to be charged. When the input voltage indication signal Highline is at a logically low level, indicating a low AC input voltage, driver transistor MN1 and transistor M2 are controlled to be in the off state. This allows the AC input voltage to charge the base of power transistor Q1 via chip startup resistor R1. As power transistor Q1 transitions from the off state to the on state as its base voltage rises, the AC input voltage then charges the chip power supply capacitor Cvcc via power transistor Q1 and diode D1 (i.e., charging current I1 charges Cvcc). At this time, although the withstand voltage between the emitter and collector of power transistor Q1 is small, since the AC input voltage is low, power transistor Q1 will not suffer breakdown damage. When the input voltage indication signal Highline is at a logically high level, indicating that the AC input voltage is high, the charge switch control signal Charge is at a logically high level, and the charge control switch circuit is in the on state. The base of power transistor Q1 is short-circuited to the chip supply capacitor Cvcc. The AC input voltage AC charges the chip supply capacitor Cvcc through the chip startup resistor R1 and the charge control switch circuit. At this time, the withstand voltage between the collector and base of power transistor Q1 is relatively high, and power transistor Q1 will not suffer breakdown damage.

Figure 4 shows an example implementation circuit diagram of the charging control module shown in Figure 2. In the charging control module 2028 shown in Figure 4, resistors R2, R3, R4, R5, and R6 and transistors MP2, MP3, MP4, and MN3 form a charging control switch circuit. Transistors MN3 and MP4 and resistors R4, R5, and R6 form a control circuit that controls the on and off switching of transistors MP2 and MP3. When transistors MP2 and MP3 are in the on state, charging current I2 charges the chip power supply capacitor Cvcc via chip startup resistor R1, resistor R2, transistors MP2 and MP3, and resistor R3. When transistors MP2 and MP3 are in the off state, charging current I1 charges the chip power supply capacitor Cvcc via diode D1.

As shown in FIG4 , in some embodiments, the charging control module 2028 is further configured to: generate a demagnetization end indication signal dem_b based on the demagnetization state indication signal dem, indicating whether a predetermined time has passed since the demagnetization end moment of the secondary winding Ns of the transformer T (for example, transistors MP5 and MN4, resistor R7, and capacitor C0 form a delay circuit for generating the demagnetization end indication signal dem_b based on the demagnetization state indication signal dem); generate a charging requirement indication signal char_req based on the power transistor control signal pwm, the demagnetization end indication signal dem_b, and the power supply state indication signal VCC_low, indicating whether the chip power supply capacitor Cvcc needs to be charged (for example, by inverting the power transistor control signal pwm and the demagnetization state indication signal VCC_low). The system performs a logical AND operation on the demagnetization indication signal dem_b to generate a transformer state indication signal state indicating whether a predetermined time has elapsed since the demagnetization of the secondary winding Ns of the transformer T was completed while the power transistor Q1 was in the off state; generates a charging requirement indication signal char_req by performing a logical AND operation on the transformer state indication signal state and the power supply state indication signal VCC_low; and generates a first driver transistor control signal ngate based on the power transistor control signal pwm and the charging requirement indication signal char_req (for example, by performing a logical AND operation on the inverted signal of the power transistor control signal pwm and the inverted signal of the charging requirement indication signal char_req to generate the first driver transistor control signal ngate).

As shown in FIG4 , in some embodiments, the charging control module 2028 is further configured to generate a charging switch control signal charge by performing a logical AND operation on the inverted signal of the input voltage indication signal Highline and the charging demand indication signal char_req.

As shown in FIG4 , in some embodiments, the charging control module 2028 is further configured to: during the startup process of the flyback switching power supply 200, generate a power-good signal PG based on the chip power supply voltage VCC on the chip power supply capacitor Cvcc, and control the charging control switch circuit to switch from an on state to an off state when the power-good signal PG changes from a logically low level to a logically high level.

As shown in FIG4 , in some embodiments, during the startup process of the flyback switching power supply 200, the operating principle of the charging control module 2028 is as follows: the chip supply voltage VCC on the chip supply capacitor Cvcc is 0V, the power ready signal PG is at a logical low level, the driver transistors MP1 and MN1 and the transistors M2, MN3, and MP4 are all in the off state, the transistors MP2 and MP3 are in the on state, the chip supply capacitor Cvcc is short-circuited to the chip startup resistor R1, and the charging current I2 is directly connected to the chip via the charging control switch circuit. The chip power supply capacitor Cvcc is charged. When the chip power supply voltage VCC on the chip power supply capacitor Cvcc is greater than the UVLO threshold of the control chip 202, the power-good signal PG changes from a logically low level to a logically high level. Transistor MN3 changes from an off state to an on state, causing resistor R4 to be grounded. This causes transistor MP4 to change from an off state to an on state. The change from an off state to an on state of transistor MP4 causes transistors MP2 and MP3 to change from an on state to an off state, thereby completing the charging of the chip power supply capacitor Cvcc.

As shown in FIG4 , in some embodiments, during normal operation of the flyback switching power supply 200, the charging control module 2028 operates as follows: When the power supply status indication signal VCC_low is at a logically high level, it indicates that the chip power supply capacitor Cvcc needs to be charged. If the input voltage indication signal Highline is at a logically low level, indicating that the AC input voltage AC is low, the charging switch control signal charge is at a logically low level, transistors M2 and MN3 are in the off state, and driver transistors MP1 and MN1 are also in the off state. During power After transistor Q1 switches from the off state to the on state, charging current I1 charges the chip power supply capacitor Cvcc via diode D1. If the input voltage indication signal Highline is at a logical high level, indicating that the AC input voltage is high, the charge switch control signal charge is at a logical high level, transistors MN3 and MP4 are off, and transistors MP2 and MP3 are on. The chip power supply capacitor Cvcc is short-circuited to the chip startup resistor R1, and charging current I2 charges the chip power supply capacitor Cvcc via the charge control switch circuit.

Those skilled in the art will appreciate that the control circuit according to the embodiments of the present invention can be used not only in flyback switching power supplies, but also in switching power supplies employing various architectures, such as forward, buck, or boost. Furthermore, the output voltage feedback signal FB can be obtained not only by sampling the system output voltage Vo of the flyback switching power supply 100 using the auxiliary winding Naux of the transformer T, but also by obtaining the output voltage feedback signal FB from the secondary side of the transformer T using a feedback device such as an optocoupler.

The present invention may be implemented in other specific forms without departing from its spirit and essential characteristics. For example, the algorithms described in the specific embodiments may be modified without departing from the basic spirit of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, and the scope of the invention is to be defined by the appended claims rather than the foregoing description, and all changes coming within the meaning and range of equivalents of the claims are intended to be included within the scope of the invention.

200: Flyback switching power supply

202: Control chip

2022: Power supply voltage detection module

2024: Line Voltage Detection Module

2026: Constant Pressure/Constant Flow Control Module

2028: Charging Control Module

AC: AC input voltage

BASE: High voltage bipolar junction transistor base PIN

Co: Output filter capacitor

CS: Primary side current detection signal

Cvcc: Chip power supply capacitor

D1: diode

D2: IC internal rectifier diode

dem: Demagnetization status indication signal

FB: Output voltage feedback signal

GND: Chip ground pin

Highline: Input voltage indication signal

I1, I2: Charging current

M2: Transistor

MN1, MP1: Driver tube

Naux: Auxiliary winding

ngate: First driver control signal

ngate2: transistor control signal

Np: Primary Winding

Ns: Secondary Winding

pgate: Second driver control signal

pwm: power transistor control signal

Q1: Power transistor

R1: Chip start resistor

R9, R10: voltage divider resistors

Rs: Current flow measurement resistance

SW: Switch pin

T: Transformer

VCC: Chip supply voltage

VCC_low: Power supply status indication signal

Vo: System output voltage

Claims (10)

A control circuit for use in a switching power supply, wherein the switching power supply includes a chip startup resistor and a chip supply capacitor, and the control circuit includes a charging control switch circuit and is configured to: during the startup process of the switching power supply, control the charging control switch circuit to be in a conductive state, so that the AC input voltage is rectified and then charges the chip supply capacitor through the chip startup resistor and power transistor; wherein the switching power supply also includes a power transistor, and the control circuit is further configured to: during normal operation of the switching power supply, when the power transistor is in an off state and the chip supply voltage on the chip supply capacitor is less than a predetermined supply threshold In the case of a power supply circuit, if the AC input voltage is greater than or equal to a predetermined input threshold, the charging control switch circuit is controlled to be in an on state, so that the AC input voltage charges the chip power supply capacitor via the chip startup resistor and the charging control switch circuit. Otherwise, the first driver transistor connected between the base of the power transistor and the reference ground is controlled to change from an on state to an off state, so that the AC input voltage charges the base of the power transistor via the chip startup resistor. After the power transistor changes from an off state to an on state as its base voltage increases, the AC input voltage charges the chip power supply capacitor via the power transistor. The control circuit of claim 1 is further configured to: generate a power-on-ready signal based on the chip power supply voltage on the chip power supply capacitor during startup of the switching power supply, and control the charge control switch circuit to switch from an on state to an off state when the power-on-ready signal changes from a logically low level to a logically high level. The control circuit of claim 1, wherein the switching power supply further comprises a transformer, the power transistor being connected between a primary winding of the transformer and a reference ground, and the control circuit being further configured to: generate a power supply status indication signal indicating whether the chip power supply voltage on the chip power supply capacitor is less than the predetermined power supply threshold based on the chip power supply voltage on the chip power supply capacitor; and generate a power supply status indication signal indicating whether the chip power supply voltage on the chip power supply capacitor is less than the predetermined power supply threshold based on a power transistor control signal for controlling the on/off state of the power transistor and a power transistor control signal indicating the secondary winding of the transformer. A first driver transistor control signal for controlling the on/off switching of the first driver transistor is generated based on a demagnetization state indication signal indicating whether the secondary winding is in a demagnetized state and the power supply state indication signal. Furthermore, a charging switch control signal for controlling the on/off switching of the charging control switch circuit is generated based on the power transistor control signal, the demagnetization state indication signal, the power supply state indication signal, and an input voltage indication signal indicating whether the AC input voltage is greater than or equal to the predetermined input threshold. The control circuit of claim 3 is further configured to: generate a demagnetization completion indication signal indicating whether a predetermined time has elapsed since the demagnetization of the transformer's secondary winding was completed based on the demagnetization state indication signal; generate a charging requirement indication signal indicating whether the chip power supply capacitor needs to be charged based on the power transistor control signal, the demagnetization completion indication signal, and the power supply state indication signal; and generate the first driver transistor control signal based on the power transistor control signal and the charging requirement indication signal. The control circuit of claim 4 is further configured to: generate a transformer status indication signal indicating whether the predetermined time has elapsed since the demagnetization of the transformer's secondary winding has ended while the power transistor is in the off state by performing a logical AND operation on the inverted signal of the power transistor control signal and the demagnetization completion indication signal; generate the charging requirement indication signal by performing a logical AND operation on the transformer status indication signal and the power supply status indication signal; and generate the first driver transistor control signal by performing a logical AND operation on the inverted signal of the power transistor control signal and the inverted signal of the charging requirement indication signal. The control circuit of claim 5 is further configured to: Generate the charging switch control signal by performing a logical operation on the inverted signal of the input voltage indication signal and the charging demand indication signal. The control circuit of claim 3 is further configured to generate a transistor control signal for controlling the on/off switching of a transistor connected between an emitter of the power transistor and a reference ground based on the power transistor control signal, the demagnetization state indication signal, the power supply state indication signal, and the input voltage indication signal. The control circuit of claim 3 is further configured to generate a second driver transistor control signal for controlling the on/off switching of a second driver transistor connected between the base of the power transistor and the chip power supply capacitor based on the power transistor control signal. The control circuit of claim 3 is further configured to: generate the power transistor control signal based on an output voltage feedback signal representing the system output voltage of the switching power supply and a primary current detection signal representing the primary current flowing through the primary winding of the transformer; and generate the demagnetization state indication signal and the input voltage indication signal based on the output voltage feedback signal. A switching power supply comprising the control circuit described in any one of claims 1 to 9.