TWI901201B - Display panel - Google Patents

Abstract

A display panel including a first substrate, a second substrate, a pixel structure, a liquid crystal layer and a light shielding layer is provided. The first substrate and the second substrate are overlapped with each other along a stacking direction. The pixel structure is disposed on the first substrate and has an active device and a reflective electrode electrically connected to each other. The liquid crystal layer is disposed between the first substrate and the second substrate. The light shielding layer is disposed on the second substrate and has a first light shielding pattern. The first light shielding pattern overlaps the reflective electrode of the pixel structure along the stacking direction.

Description

Display Panel

The present invention relates to a display panel, and in particular to a display panel provided with a light-shielding layer.

To avoid image artifacts and reduce power consumption, current display panels often use polarity inversion methods such as column inversion or dot inversion to operate multiple pixel electrodes. However, the operating voltage differences between different pixels can easily cause partial misalignment of the liquid crystal layer between the electrodes. Furthermore, areas of the display panel with significant differences in film stacking structures are prone to forming weakly aligned regions during the subsequent alignment process, leading to poor alignment of the liquid crystal layer in these areas. This poor alignment of the liquid crystal layer can cause light leakage when the display panel is operating in the dark state, resulting in a decrease in display contrast.

The present invention provides a display panel having better dark state performance.

The display panel of the present invention includes a first substrate, a second substrate, a pixel structure, a liquid crystal layer, and a light-shielding layer. The first and second substrates are stacked in a stacking direction. The pixel structure is disposed on the first substrate and has an active element and a reflective electrode electrically connected to each other. The liquid crystal layer is disposed between the first and second substrates. The light-shielding layer is disposed on the second substrate and includes a first light-shielding pattern. The first light-shielding pattern overlaps the reflective electrode of the pixel structure in the stacking direction.

In one embodiment of the present invention, the display panel further includes an insulating layer disposed on the first substrate and covering the active element. The insulating layer has an opening for a reflective electrode that overlaps the pixel structure. The reflective electrode is disposed on the insulating layer and extends into the opening to electrically connect to the active element. The orthographic projection of the opening in the insulating layer on the substrate surface of the first substrate is within the orthographic projection of the first light-shielding pattern on the substrate surface.

In one embodiment of the present invention, the multiple reflective electrodes of the multiple pixel structures of the display panel are spaced apart along a first direction. A gap is provided between any two adjacent reflective electrodes. The light-shielding layer further includes a second light-shielding pattern. The second light-shielding pattern overlaps the gap and comprises a first micro-slit and a second micro-slit. The first micro-slit and the second micro-slit are located on opposite sides of the gap along the first direction.

In one embodiment of the present invention, the multiple reflective electrodes of the multiple pixel structures of the display panel are arranged at intervals along a first direction. A gap is provided between any two adjacent reflective electrodes. The light-shielding layer further includes a second light-shielding pattern. The second light-shielding pattern overlaps the gap and has multiple wide portions and multiple narrow portions. The wide portions and the narrow portions are alternately arranged and connected to each other along a second direction. The first direction is perpendicular to the second direction. The width of any one of the wide portions along the first direction is greater than the width of any one of the narrow portions along the first direction.

In one embodiment of the present invention, the multiple reflective electrodes of the multiple pixel structures of the display panel are arranged at intervals along a first direction and a second direction. The first direction is perpendicular to the second direction. A first gap is provided between any two adjacent reflective electrodes arranged along the first direction. The light-shielding layer further includes a second light-shielding pattern. The second light-shielding pattern overlaps the first gap and has a micro-gap. The micro-gap overlaps the first gap. A second gap is provided between any two adjacent reflective electrodes arranged along the second direction. The light-shielding layer further includes a third light-shielding pattern. The orthographic projection of the second gap on the substrate surface is located within the orthographic projection of the third light-shielding pattern on the substrate surface.

In one embodiment of the present invention, the display panel further includes spacers, a first alignment layer, and a second alignment layer. The spacers are disposed between the first and second substrates. The first alignment layer is disposed on the first substrate and has a first alignment direction. The second alignment layer is disposed on the second substrate and has a second alignment direction. The spacers have a first side edge and a second side edge that are opposite to each other and arranged sequentially along the first or second alignment direction. The light-shielding layer further includes a fourth light-shielding pattern. In the overlapping direction, the fourth light-shielding pattern overlaps the second side edge of the spacer but does not overlap the first side edge of the spacer.

In one embodiment of the present invention, the orthographic projection outline of the spacer of the display panel on the substrate surface is circular, and the orthographic projection outline of the fourth light-shielding pattern on the substrate surface is crescent-shaped.

In one embodiment of the present invention, the display panel further includes a common electrode and a common electrode line. The common electrode is disposed on the first substrate and overlaps the reflective electrode of the pixel structure. The common electrode line is disposed on the first substrate and connects to the common electrode. A plurality of reflective electrodes are arranged spaced apart along a first direction. A gap is provided between any two adjacent reflective electrodes. The gap extends in a second direction. The first direction is perpendicular to the second direction. The common electrode line has a portion overlapping the gap. The light-shielding layer further includes a second light-shielding pattern. The orthographic projection of a portion of the common electrode line on the substrate surface is located within the orthographic projection of the second light-shielding pattern on the substrate surface.

In one embodiment of the present invention, the display panel further includes a scan line disposed on the first substrate and electrically connected to the active elements of the pixel structure. A plurality of reflective electrodes are arranged at intervals along a first direction. A gap is provided between any two adjacent reflective electrodes. The gap extends in a second direction. The first direction is perpendicular to the second direction. The scan line has a portion overlapping the gap. The light-shielding layer further includes a second light-shielding pattern. The orthographic projection of a portion of the scan line on the substrate surface is within the orthographic projection of the second light-shielding pattern on the substrate surface.

In one embodiment of the present invention, the multiple reflective electrodes of the multiple pixel structures of the display panel are arranged at intervals along a first direction and a second direction. The first direction is perpendicular to the second direction. A first gap is provided between any two adjacent reflective electrodes arranged along the first direction. A second gap is provided between any two adjacent reflective electrodes arranged along the second direction. The light-shielding layer further includes a second light-shielding pattern and a third light-shielding pattern. The orthographic projection of the first gap on the substrate surface is within the orthographic projection of the second light-shielding pattern on the substrate surface. The orthographic projection of the second gap on the substrate surface is within the orthographic projection of the third light-shielding pattern on the substrate surface. The width of the second light-shielding pattern along the first direction is different from the width of the third light-shielding pattern along the second direction.

In one embodiment of the present invention, the first substrate of the display panel includes a display area and a peripheral area outside the display area. Multiple pixel structures are disposed within the display area. The display area includes an edge display area adjacent to the peripheral area and a central display area distal from the peripheral area. The multiple pixel structures include multiple first pixel structures and multiple second pixel structures. The multiple first pixel structures are disposed within the edge display area. The multiple second pixel structures are disposed within the central display area. A first gap is provided between the two reflective electrodes of any two adjacent reflective electrodes of the first pixel structures arranged along a first direction. A second gap is provided between the two reflective electrodes of any two adjacent reflective electrodes of the second pixel structures arranged along the first direction. The light-shielding layer further includes a second light-shielding pattern and a third light-shielding pattern. The second light-shielding pattern overlaps the first gap and has at least one micro-gap. The third light-shielding pattern overlaps the second gap, and the orthographic projection of the second gap on the substrate surface is located within the orthographic projection of the third light-shielding pattern on the substrate surface.

In one embodiment of the present invention, the number of at least one micro-slit in the second light-shielding pattern of the display panel gradually decreases as the area moves away from the peripheral region.

Based on the above, in a display panel according to one embodiment of the present invention, the light-shielding pattern provided on the reflective electrode overlapping the pixel structure is suitable for shielding light leakage caused by poor alignment of the liquid crystal layer above or at the edges of the reflective electrode, thereby helping to improve the dark state performance of the display panel and thereby enhance its display contrast.

10, 10A, 10B, 10C, 10D, 10E: Display Panel

101: First substrate

101s: Substrate Surface

102: Second substrate

110: Gate insulation layer

120, 130: Insulating layer

150: Covering layer

AD1: First alignment direction

AD2: Second alignment direction

AL1: First Alignment Layer

AL2: Second alignment layer

cDA: Central Display Area

CE: Common Electrode

CEL: Common Electrode Layer

CL: Common Electrode Line

CLp, GLp: Partial

CP: Conductive Pattern

CPE: Capacitor Electrode

D1, D2, D3: Direction

DA: Display Area

DE: Drain

DL: Data Line

eDA:Edge Display Area

FL: filter layer

G1, G2, Gc, Ged: gaps

GE: Gate

GL: Scan Line

LCL: Liquid Crystal Layer

LSL, LSL-A, LSL-B, LSL-C, LSL-D, LSL-E: light shielding layer

LSP1, LSP2, LSP2a, LSP2a1, LSP2a2, LSP2a3, LSP2b, LSP2c, LSP2d, LSP2e, LSP2a-A, LSP2b-A, LSP2-D, LSP3, LSP3-D, LSP4: Shading pattern

LSP2p1, LSP2p2: Light-shielding portion

np: narrow part

OP: Open your mouth

PA: Peripheral Area

PX, PXc, PXe: Pixel structure

RE:Reflective electrode

SC: semiconductor pattern

SE: Source

se1: first side edge

se2: Second side edge

SLT, SLT1~SLT4: Micro-gap

SP: interstitial matter

T: Active element

TH: Contact hole

W, W1, W2, W1”, W2”: Width

wp:width

A-A’, B-B’, C-C’, D-D’, E-E’, F-F’, G-G’, H-H’, I- I’, J-J’: section line

Figures 1 and 2 are schematic front views of a portion of the film layers of a display panel according to the first embodiment of the present invention.

Figures 3 and 4 are schematic cross-sectional views of the display panels of Figures 1 and 2.

Figure 5 is a schematic front view of a portion of the film layers of a display panel according to the second embodiment of the present invention.

Figures 6 and 7 are schematic front views of a portion of the film layers of a display panel according to the third embodiment of the present invention.

Figures 8 and 9 are schematic cross-sectional views of the display panels of Figures 6 and 7.

Figures 10 and 11 are schematic front views of a portion of the film layers of a display panel according to the fourth embodiment of the present invention.

Figure 12 is a schematic cross-sectional view of the display panel of Figures 10 and 11.

Figure 13 is a schematic front view of a portion of the film layers of a display panel according to the fifth embodiment of the present invention.

Figure 14 is a schematic front view of a portion of the film layers of a display panel according to the sixth embodiment of the present invention.

Figures 15 and 16 are schematic cross-sectional views of the display panel of Figure 14.

The aforementioned technical contents, features, and functions of the present invention will be clearly presented in the following detailed description of a preferred embodiment with reference to the accompanying drawings. Directional terms such as up, down, left, right, front, and back mentioned in the following embodiments are merely references to the directions in the accompanying drawings. Therefore, the directional terms used are for illustrative purposes only and are not intended to limit the present invention.

Figures 1 and 2 are schematic front views of portions of the film layers of a display panel according to the first embodiment of the present invention. Figures 3 and 4 are schematic cross-sectional views of the display panel shown in Figures 1 and 2. Figure 3 corresponds to section line A-A' in Figures 1 and 2. Figure 4 corresponds to section lines B-B' and C-C' in Figures 1 and 2. Specifically, Figures 1 and 2 are top views of the display panel 10 taken from one side of the second substrate 102 in Figures 3 and 4, respectively, along direction D3. For clarity, Figures 1 and 2 omit portions of the film layers shown in Figures 3 and 4.

Referring to Figures 1 and 3 , the display panel 10 includes a first substrate 101, a second substrate 102, a plurality of data lines DL, a plurality of scan lines GL, a plurality of pixel structures PX, and a liquid crystal layer LCL. The first substrate 101 and the second substrate 102 are arranged to overlap each other, with the liquid crystal layer LCL disposed therebetween. The term "overlapping" herein refers to, for example, overlapping the first substrate 101 and the second substrate 102 along a stacking direction (e.g., direction D3). Unless otherwise specified below, the overlapping relationship between the two components is defined in this manner, and the overlapping direction will not be further discussed.

In this embodiment, multiple data lines DL are arranged on the first substrate 101 at intervals along direction D1 and extend in direction D2, for example. Multiple scan lines GL are arranged on the first substrate 101 at intervals along direction D2 and extend in direction D1, for example. Directions D1, D2, and D3 may optionally be perpendicular to each other, but are not limited to this. More specifically, the scan lines GL intersect the data lines DL and define multiple pixel regions of the reflective display panel 10. Multiple pixel structures PX are disposed within these pixel regions, each electrically connected to a scan line GL and a data line DL. For example, the pixel structures PX may be arranged in multiple rows and columns along directions D1 and D2, respectively. In other words, the pixel structures PX are arranged in an array on the first substrate 101.

Specifically, each of these pixel structures PX may include an active element T and a reflective electrode RE electrically connected to each other. In this embodiment, the method for forming the active element T may include the following steps: forming a gate electrode GE, a gate insulation layer 110, a semiconductor pattern SC, a source electrode SE, and a drain electrode DE in sequence on a first substrate 101. The semiconductor pattern SC is disposed overlapping the gate electrode GE. The source electrode SE and the drain electrode DE overlap the semiconductor pattern SC and are electrically contacted with two different regions of the semiconductor pattern SC. In this embodiment, the gate electrode GE of the active element T may be optionally disposed below the semiconductor pattern SC to form a bottom-gate thin-film transistor (TFT), but this is not limited to this embodiment. In other embodiments, the gate of the active device may be selectively disposed above the semiconductor pattern to form a top-gate thin film transistor (TFT).

Furthermore, the active element T may be sequentially covered with an insulating layer 120 and an insulating layer 130. In this embodiment, the insulating layer 120 is, for example, a passivation layer, and the insulating layer 130 is, for example, a planarization layer. For example, in this embodiment, the pixel structure PX may also include a common electrode CE, a capacitor electrode CPE, and a conductive pattern CP that overlap each other, but is not limited to this. The common electrode CE is disposed between the first substrate 101 and the gate insulating layer 110. The capacitor electrode CPE is disposed between the gate insulating layer 110 and the insulating layer 120. Therefore, the capacitor electrode CPE, the common electrode CE, and the gate insulation layer 110 sandwiched therebetween form a storage capacitor. In other embodiments, the pixel structure PX may not include overlapping common electrodes CE and capacitor electrodes CPE. The conductive pattern CP is disposed between the insulation layers 120 and 130. In this embodiment, the display panel 10 may further include multiple common electrode lines CL on the first substrate 101. These common electrode lines CL connect the common electrodes CE of multiple pixel structures PX in series.

In this embodiment, the insulating layer 130 has an opening OP that overlaps the reflective electrode RE, and this opening OP exposes a portion of the surface of the conductive pattern CP. The reflective electrode RE of the pixel structure PX is disposed on the surface of the insulating layer 130 and is electrically connected to the conductive pattern CP via the opening OP in the insulating layer 130. The conductive pattern CP is electrically connected to the capacitor electrode CPE via the contact hole TH in the insulating layer 120. The capacitor electrode CPE may extend from the drain electrode DE of the active device T (i.e., the drain electrode DE and the capacitor electrode CPE are coupled to each other), but this is not limited to this embodiment. In other embodiments, the pixel structure PX may not include the conductive pattern CP, and the reflective electrode RE is electrically connected to the drain DE of the active device T via a through-hole penetrating the insulating layer 130 and the insulating layer 120.

It should be noted that the gate GE, source SE, drain DE, semiconductor pattern SC, gate insulating layer 110, passivation layer (i.e. insulating layer 120) and planar layer (i.e. insulating layer 130) can be any gate, source, drain, or other material known to those skilled in the art for display panels. The gate GE, source SE, drain DE, semiconductor pattern SC, gate insulating layer 110, passivation layer, and planarization layer can be implemented by any method known to those skilled in the art, and therefore will not be described in detail here.

Furthermore, the display panel 10 further includes a filter layer FL disposed on the second substrate 102. For example, the filter layer FL may include multiple filter patterns (not shown). These filter patterns overlap the multiple reflective electrodes RE of the multiple pixel structures PX, and are each adapted to allow red light, green light, or blue light to pass through. In other words, these filter patterns may include, but are not limited to, red, green, and blue color resists.

In this embodiment, a common electrode layer (CEL) and a cladding layer (150) may also be provided on the second substrate (102), but this is not limiting. In other embodiments, the common electrode layer (CEL) may be provided on the first substrate (101). The cladding layer (150) covers the light filter layer (FL) and is disposed on the cladding layer (150). The electric field generated between the common electrode layer (CEL) and the reflective electrode (RE) is suitable for driving the liquid crystal molecules (not shown) in the liquid crystal layer (LCL) to rotate, forming an arrangement corresponding to the direction and intensity of the electric field. By changing the arrangement of these liquid crystal molecules, the polarization state of light passing through the liquid crystal layer (LCL) is altered, resulting in an output brightness corresponding to the arrangement.

To align the liquid crystal molecules in the liquid crystal layer (LCL) in a natural state (i.e., without external forces), a first alignment layer AL1 covering the reflective electrodes RE may be provided on the first substrate 101, while a second alignment layer AL2 covering the common electrode layer CEL may be provided on the second substrate 102. The liquid crystal layer (LCL) is sandwiched between the first alignment layer AL1 and the second alignment layer AL2. For example, in this embodiment, the first alignment direction AD1 of the first alignment layer AL1 may be antiparallel to the second alignment direction AD2 of the second alignment layer AL2. This means that the liquid crystal layer (LCL) can be driven in an electrically controlled birefringence (ECB) mode, an in-plane switching (IPS) mode, or a fringe-field switching (FFS) mode. However, the present invention is not limited thereto. In other embodiments, the first alignment direction AD1 may be perpendicular to the second alignment direction AD2, that is, the liquid crystal layer LCL may be driven in a twisted nematic (TN) mode.

Because the opening OP of the insulating layer 130 has a significant topographical step, the portion of the first alignment layer AL1 within the opening OP is less easily rubbed by the hairs on the machine roller during the alignment process, resulting in weak alignment. This can cause poor alignment of the liquid crystal layer (LCL) near the opening OP, leading to dark-state light leakage. To address this issue, the display panel 10 of this embodiment further includes a light-shielding layer LSL, disposed on the second substrate 102 and covered by the light-filtering layer FL. The light-shielding layer LSL includes a light-shielding pattern LSP1 that overlaps the opening OP of the insulating layer 130. Specifically, the light-shielding pattern LSP1 overlaps the reflective electrode RE of the pixel structure PX.

In this embodiment, the orthographic projection of the opening OP of the insulating layer 130 on the substrate surface 101s of the first substrate 101 lies within the orthographic projection of the light-shielding pattern LSP1 on the substrate surface 101s. The provision of the light-shielding pattern LSP1 blocks light leakage caused by poor alignment of the liquid crystal layer LCL, thereby improving the dark-state performance of the display panel 10.

Referring to Figures 1, 2, and 4, in this embodiment, the reflective electrodes RE of the pixel structures PX may be arranged at intervals along directions D1 and D2, respectively. That is, a gap is provided between any two adjacent reflective electrodes RE along direction D1 or direction D2. For example, a gap G1 is provided between any two adjacent reflective electrodes RE arranged along direction D1, while a gap G2 is provided between any two adjacent reflective electrodes RE arranged along direction D2.

When driving the liquid crystal layer (LCL), any two adjacent reflective electrodes RE arranged along direction D1 or direction D2 may have voltages of opposite polarity. In other words, the display panel 10 of this embodiment drives multiple pixel structures PX using polarity inversion (e.g., row inversion or single-point inversion). Therefore, a voltage difference between any two adjacent reflective electrodes RE can easily cause poor alignment of the liquid crystal molecules between the two adjacent reflective electrodes RE in the liquid crystal layer (LCL), resulting in light leakage at gaps G1 and G2.

To prevent light leakage between the multiple reflective electrodes RE, the light-shielding layer LSL further includes light-shielding patterns overlapping the gaps. For example, light-shielding pattern LSP2a overlaps gap G1 and extends in direction D2, and light-shielding pattern LSP2b overlaps gap G2 and extends in direction D1. Of particular note, light-shielding pattern LSP2a includes microslits SLT1 and SLT2 arranged parallel to gap G1. Light-shielding pattern LSP2b includes microslits SLT3 and SLT4 arranged parallel to gap G2.

More specifically, microslits SLT1 and SLT2 are located on opposite sides of gap G1 along direction D1 and extend in direction D2. Microslits SLT3 and SLT4 are located on opposite sides of gap G2 along direction D2 and extend in direction D1. The provision of microslits reduces the area of the reflective surface of the reflective electrode RE blocked by the light-shielding patterns LSP2a and LSP2b while preventing light leakage through the gaps.

The provision of the aforementioned light-shielding layer LSL can shield the liquid crystal layer LCL from light leakage caused by poor alignment above the reflective electrode RE (e.g., near the opening OP of the insulating layer 130 in FIG3 ) and in the space between any two adjacent reflective electrodes RE (e.g., gap G1 or gap G2). This helps improve the dark state performance of the display panel 10, thereby enhancing its display contrast.

The following examples illustrate the present disclosure in detail. Identical components are denoted by the same symbols, and descriptions of identical technical contents are omitted. For omitted parts, please refer to the aforementioned examples and will not be further elaborated below.

Figure 5 is a schematic front view of a portion of the film layers of a display panel according to a second embodiment of the present invention. It should be noted that, aside from the layers shown in Figure 5, the film layers of display panel 10A are similar to those of display panel 10 of the aforementioned embodiment. Therefore, the structural illustrations and descriptions of the other film layers can be found in the relevant figures and explanatory paragraphs of the aforementioned embodiment and will not be further elaborated below.

Referring to Figure 5 , the display panel 10A of this embodiment differs from the display panel 10 of Figures 1 and 2 in the configuration of the light-shielding pattern. Specifically, the light-shielding pattern LSP2a-A and the light-shielding pattern LSP2b-A in the light-shielding layer LSL-A of this embodiment, which overlap gaps G1 and G2, respectively, can each have multiple wide portions wp and multiple narrow portions np.

For example, the multiple wide portions wp and the multiple narrow portions np of the light-shielding pattern LSP2a-A may be arranged alternately along direction D2 and connected to each other. The width W1 of any wide portion wp of the light-shielding pattern LSP2a-A along direction D1 is greater than the width W2 of any narrow portion np of the light-shielding pattern LSP2a-A along direction D1. Similarly, the multiple wide portions wp and the multiple narrow portions np of the light-shielding pattern LSP2b-A may be arranged alternately along direction D1 and connected to each other. The width W1" of any wide portion wp of the light-shielding pattern LSP2b-A along direction D2 is greater than the width W2" of any narrow portion np of the light-shielding pattern LSP2b-A along direction D2.

By designing the width of the light-shielding pattern in the extension direction (e.g., a saw-tooth design), the light-shielding pattern LSP2a-A and the light-shielding pattern LSP2b-A can reduce the area of the reflective surface of the reflective electrode RE that is blocked while blocking light leakage through the gap.

Figures 6 and 7 are schematic front views of portions of the film layers of a display panel according to the third embodiment of the present invention. Figures 8 and 9 are schematic cross-sectional views of the display panel shown in Figures 6 and 7. Figure 8 corresponds to line D-D' in Figures 6 and 7. Figure 9 corresponds to line E-E' and line F-F' in Figures 6 and 7. Specifically, Figures 6 and 7 are top views of the display panel 10B taken from one side of the second substrate 102 in Figures 8 and 9, respectively, along direction D3. For clarity, Figures 6 and 7 omit portions of the film layers shown in Figures 8 and 9.

Referring to Figures 6 to 8 , the display panel 10B of this embodiment differs from the display panel 10 of Figures 1 and 2 in the placement of the light-shielding layer. First, multiple spacers SP are disposed between the first substrate 101 and the second substrate 102 of the display panel 10B to define cavities filled with the liquid crystal layer LCL. In this embodiment, these spacers SP are dispersed on the second substrate 102 and overlap the multiple reflective electrodes RE of the pixel structures PX. These spacers SP are located between the second alignment layer AL2 and the second substrate 102. However, the present invention is not limited to this. In other embodiments, the spacers SP may be disposed on the first substrate 101 (i.e., between the first alignment layer AL1 and the first substrate 101).

In this embodiment, the spacer SP may completely overlap the reflective electrode RE. That is, the orthographic projection of the spacer SP on the substrate surface 101s is located within the orthographic projection of the reflective electrode RE on the substrate surface 101s, but this is not limited to the embodiment. In other embodiments, the spacer SP may be disposed between two adjacent pixel structures PX and overlap both reflective electrodes RE of the two pixel structures PX.

In this embodiment, the spacer SP has a first side edge se1 and a second side edge se2 that face each other and are arranged sequentially along the second alignment direction AD2. Specifically, because the spacer SP has a significant height difference compared to the film surface (e.g., the surface of the common electrode layer CEL) on which it stands, the alignment process (e.g., rubbing alignment) of the second alignment layer AL2 reduces the alignment effect of the portion of the second alignment layer AL2 along the second alignment direction AD2 that is blocked by the spacer SP (i.e., the portion of the second alignment layer AL2 near the second side edge se2 of the spacer SP). This, in turn, affects the alignment of portions of the liquid crystal layer LCL, resulting in light leakage when the display panel 10B is operating in the dark state.

To address light leakage caused by the spacers SP, the light-shielding layer LSL-B of this embodiment may further include a light-shielding pattern LSP4. The light-shielding pattern LSP4 overlaps the second side edge se2 of the spacer SP but does not overlap the first side edge se1 of the spacer SP. For example, in this embodiment, the orthographic projection of the spacer SP on the substrate surface 101s may be circular, and the orthographic projection of the light-shielding pattern LSP4 on the substrate surface 101s may be crescent-shaped (as shown in FIG. 7 ), but these are not limited to these configurations. In other embodiments, the configurations of the spacers SP and the light-shielding pattern LSP4 may be adjusted based on actual design requirements.

The configuration of the light-shielding pattern LSP4 can effectively improve dark-state light leakage caused by the weak alignment of the second alignment layer AL2 on the second side edge se2 of the spacer SP.

Referring to Figures 6, 7, and 9, in the light-shielding layer LSL-B of this embodiment, the light-shielding pattern LSP2 used to shield gap G1 may have a different configuration than the light-shielding pattern LSP3 used to shield gap G2. For example, in this embodiment, the light-shielding pattern LSP2 overlapping gap G1 may have a micro-slit SLT, while the light-shielding pattern LSP3 overlapping gap G2 does not.

Of particular note is that the micro-slit SLT of the light-shielding pattern LSP2 overlaps the gap G1, and the orthographic projection of the gap G2 on the substrate surface 101s lies within the orthographic projection of the light-shielding pattern LSP3 on the substrate surface 101s. The provision of the micro-slit SLT reduces the area of the reflective surface of the reflective electrode RE blocked at specific viewing angles while blocking light leakage through the gap.

Figures 10 and 11 are schematic front views of portions of the film layers of a display panel according to a fourth embodiment of the present invention. Figure 12 is a schematic cross-sectional view of the display panel of Figures 10 and 11. Figure 12 corresponds to section lines G-G' and H-H' in Figures 10 and 11. Specifically, Figures 10 and 11 are top views of display panel 10C taken from one side of the second substrate 102 in Figure 12 and along direction D3. For clarity, Figures 10 and 11 omit portions of the film layers in Figure 12. Referring to Figures 10 to 12, the only difference between display panel 10C of this embodiment and display panel 10B of Figures 6 and 7 is the configuration of the light-shielding pattern superimposed on gap G1.

Specifically, in the light-shielding layer LSL-C of this embodiment, the light-shielding pattern overlapping gap G1 only overlaps the scanning line GL or the common electrode line CL and does not extend in direction D2 to entirely block gap G1. For example, the common electrode line CL has a portion CLp overlapping gap G1, and the scanning line GL has a portion GLp overlapping gap G1. The light-shielding patterns LSP2c and LSP2d overlapping gap G1 in the light-shielding layer LSL-C overlap portions CLp and GLp of the common electrode line CL and scanning line GL, respectively. More specifically, the orthographic projection of the portion CLp of the common electrode line CL on the substrate surface 101s is located within the orthographic projection of the light-shielding pattern LSP2c on the substrate surface 101s, and the orthographic projection of the portion GLp of the scanning line GL on the substrate surface 101s is located within the orthographic projection of the light-shielding pattern LSP2d on the substrate surface 101s.

In particular, since the electric field from the common electrode lines CL and the scanning lines GL leaks through the gap G1, causing poor alignment of the liquid crystal molecules in the liquid crystal layer LCL near the gap G1, the provision of the light-shielding patterns LSP2c and LSP2d can alleviate light leakage caused by the intersections of the common electrode lines CL and the scanning lines GL with the gap G1, thereby improving the dark-state performance of the display panel 10C.

In this embodiment, the orthographic projection profiles of the light-shielding patterns LSP2c and LSP2d on the substrate surface 101s can be circular, but are not limited thereto. Furthermore, because the light-shielding patterns LSP2c and LSP2d do not extend to cover the entire gap G1, the area of the reflective surface of the reflective electrode RE blocked by the light-shielding layer LSL-C while blocking light leakage can be reduced.

Figure 13 is a schematic front view of a portion of the film layers of a display panel according to the fifth embodiment of the present invention. It should be noted that, aside from the layers shown in Figure 13 , the film layers of display panel 10D are similar to those of display panel 10 of the aforementioned embodiment. Therefore, the structural illustrations and descriptions of the other film layers can be found in the relevant figures and explanatory paragraphs of the aforementioned embodiment and will not be further elaborated below.

Referring to Figure 13 , the display panel 10D of this embodiment differs from the display panel 10 of Figures 1 and 2 in the configuration of the light-shielding layer. Specifically, in the light-shielding layer LSL-D of this embodiment, the light-shielding pattern LSP2-D and the light-shielding pattern LSP3-D, which overlap with gaps G1 and G2, respectively, do not include the micro-slits SLT1, SLT2, SLT3, and SLT4 shown in Figure 2 .

From another perspective, the orthographic projection of gap G1 on the first substrate 101 (or substrate surface 101s as shown in FIG12 ) lies within the orthographic projection of light-shielding pattern LSP2-D on the first substrate 101, while the orthographic projection of gap G2 on the first substrate 101 lies within the orthographic projection of light-shielding pattern LSP3-D on the first substrate 101. Of particular note, the width W3 of light-shielding pattern LSP2-D along direction D1 may be different from (e.g., greater than) the width W4 of light-shielding pattern LSP3-D along direction D2.

To address light leakage at the intersections of the common electrode lines CL and scanning lines GL with the gap G1 in the display panel 10C shown in Figures 10 and 11 , the light-shielding pattern LSP2-D of this embodiment also includes light-shielding portions LSP2p1 and LSP2p2, which function similarly to the light-shielding patterns LSP2c and LSP2d in Figure 11 . The light-shielding portion LSP2p1 overlaps the intersection of the common electrode line CL and the gap G1, while the light-shielding portion LSP2p2 overlaps the intersection of the scanning line GL and the gap G1.

Unlike the light-shielding pattern LSP2c and the light-shielding pattern LSP2d in FIG11 , the light-shielding portion LSP2p1 and the light-shielding portion LSP2p2 of this embodiment may each have a rectangular orthographic outline on the first substrate 101.

Figure 14 is a schematic front view of a portion of the film layers of a display panel according to the sixth embodiment of the present invention. Figures 15 and 16 are schematic cross-sectional views of the display panel of Figure 14 . Figure 15 corresponds to section line I-I' in Figure 14 . Figure 16 corresponds to section line J-J' in Figure 14 . It should be noted that, with the exception of the light-shielding layer LSL-E in Figures 14 and 15 , the other film layers of display panel 10E are similar to those of display panel 10 of the aforementioned embodiment. Therefore, the structural illustrations and descriptions of the other film layers can be found in the relevant figures and explanatory paragraphs of the aforementioned embodiments and will not be elaborated upon here.

Referring to Figures 14 to 16 , in this embodiment, the first substrate 101 of the display panel 10E includes a display area DA and a peripheral area PA outside the display area DA. The display area DA may include an edge display area eDA adjacent to the peripheral area PA and a central display area cDA distal from the peripheral area PA. Specifically, the edge display area eDA is located between the central display area cDA and the peripheral area PA.

In this embodiment, the plurality of pixel structures PX may include a plurality of pixel structures PXc disposed in the central display area cDA and a plurality of pixel structures PXe disposed in the edge display area eDA. A gap Gc is provided between the two reflective electrodes RE of any two adjacent pixel structures PXc arranged along the direction D1. A gap Ged is provided between the two reflective electrodes RE of any two adjacent pixel structures PXe arranged along the direction D1.

On the other hand, the light-shielding layer LSL-E includes a light-shielding pattern LSP2e overlapping the gap Gc and a light-shielding pattern (e.g., light-shielding pattern LSP2a1, light-shielding pattern LSP2a2, or light-shielding pattern LSP2a3) overlapping the gap Ged. The light-shielding pattern located in the edge display area eDA may have at least one micro-slit SLT, while the light-shielding pattern located in the central display area cDA does not have a micro-slit. In this embodiment, the orthographic projection of the gap Gc on the substrate surface 101s is located within the orthographic projection of the light-shielding pattern LSP2e on the substrate surface 101s. In other words, the gap Gc completely overlaps the light-shielding pattern LSP2e.

Of particular note is that the number of micro-slits SLT in the light-shielding pattern located in the edge display area eDA can gradually decrease as the pattern moves away from the peripheral area PA. For example, as shown in Figures 14 and 15 , three adjacent light-shielding patterns arranged along direction D1 in the edge display area eDA are arranged in descending order of distance from the peripheral area PA: light-shielding pattern LSP2a1, light-shielding pattern LSP2a2, and light-shielding pattern LSP2a3. Light-shielding pattern LSP2a1 can have three micro-slits SLT. Light-shielding pattern LSP2a2 can have two micro-slits SLT. Light-shielding pattern LSP2a3 can have one micro-slit SLT.

From another perspective, the width W of the distribution range of the light-shielding pattern LSP2a1, light-shielding pattern LSP2a2, and light-shielding pattern LSP2a3 along direction D1 gradually decreases as they move away from the peripheral area PA. This arrangement reduces the brightness differences between the periphery and center of the display area DA of the display panel 10E caused by manufacturing process factors, thereby improving the uniformity of the display brightness of the display panel 10E.

It should be understood that, although not shown in the diagram, the gap between the two reflective electrodes RE of any two pixel structures PXe located in the edge display area eDA and arranged adjacently along direction D2 may be overlapped by a light-shielding pattern extending in direction D1 and having at least one micro-slit. Similar to the light-shielding pattern extending in direction D2 and having micro-slits, the number of micro-slits in the light-shielding pattern extending in direction D1 decreases as the light-shielding pattern moves away from the peripheral area PA along direction D2.

In summary, in a display panel according to one embodiment of the present invention, the light-shielding pattern provided on the reflective electrode superimposed on the pixel structure is suitable for shielding light leakage caused by poor alignment of the liquid crystal layer above or at the edges of the reflective electrode, thereby improving the dark state performance of the display panel and thereby enhancing its display contrast.

10: Display Panel

101: First substrate

101s: Substrate Surface

102: Second substrate

110: Gate insulation layer

120, 130: Insulating layer

150: Covering layer

AD1: First alignment direction

AD2: Second alignment direction

AL1: First Alignment Layer

AL2: Second alignment layer

CE: Common Electrode

CEL: Common Electrode Layer

CP: Conductive Pattern

CPE: Capacitor Electrode

D3: direction

DE: Drain

FL: filter layer

GE: Gate

LCL: Liquid Crystal Layer

LSL: Light-shielding layer

LSP1: Shading pattern

OP: Open your mouth

PX: Pixel structure

RE:Reflective electrode

SC: semiconductor pattern

SE: source

T: Active element

TH: Contact hole

A-A’: section line

Claims (11)

A display panel includes: a first substrate and a second substrate, which are stacked in a stacking direction; a pixel structure, which is disposed on the first substrate and has an active element and a reflective electrode electrically connected to each other; a liquid crystal layer, which is disposed between the first substrate and the second substrate; a light shielding layer, which is disposed on the second substrate and includes a first light shielding pattern, which is stacked in the stacking direction on the pixel structure. The reflective electrode; and an insulating layer disposed on the first substrate and covering the active element, the insulating layer having an opening overlapping the reflective electrode of the pixel structure, wherein the reflective electrode is disposed on the insulating layer and extends into the opening to electrically connect to the active element, and an orthographic projection of the opening of the insulating layer on the substrate surface of the first substrate is located within an orthographic projection of the first light-shielding pattern on the substrate surface. A display panel as described in claim 1, wherein the multiple reflective electrodes of the multiple pixel structures are arranged at intervals along a first direction, a gap is provided between any two adjacent ones of the reflective electrodes, and the light-shielding layer further includes a second light-shielding pattern, the second light-shielding pattern overlapping the gap and having a first micro-gap and a second micro-gap, the first micro-gap and the second micro-gap being respectively located on opposite sides of the gap along the first direction. A display panel as described in claim 1, wherein the multiple reflective electrodes of the multiple pixel structures are arranged at intervals along a first direction, a gap is provided between any two adjacent ones of the reflective electrodes, and the shading layer further includes a second shading pattern, the second shading pattern overlaps the gap and has a plurality of wide portions and a plurality of narrow portions, the wide portions and the narrow portions are alternately arranged along a second direction and connected to each other, the first direction is perpendicular to the second direction, and the width of any one of the wide portions along the first direction is greater than the width of any one of the narrow portions along the first direction. A display panel as described in claim 1, wherein the multiple reflective electrodes of the multiple pixel structures are arranged at intervals along a first direction and a second direction, the first direction is perpendicular to the second direction, a first gap is provided between any two adjacent ones of the reflective electrodes arranged along the first direction, the light-shielding layer further includes a second light-shielding pattern, the second light-shielding pattern overlaps the first gap and has a micro-gap, the micro-gap overlaps the first gap, a second gap is provided between any two adjacent ones of the reflective electrodes arranged along the second direction, the light-shielding layer further includes a third light-shielding pattern, wherein the orthographic projection of the second gap on the surface of the substrate is located within the orthographic projection of the third light-shielding pattern on the surface of the substrate. The display panel as described in claim 4 further includes: a spacer, arranged between the first substrate and the second substrate; a first alignment layer, arranged on the first substrate and having a first alignment direction; and a second alignment layer, arranged on the second substrate and having a second alignment direction, wherein the spacer has a first side edge and a second side edge that are opposite to each other and arranged in sequence along the first alignment direction or the second alignment direction, and the shading layer further includes a fourth shading pattern, and in the overlapping direction, the fourth shading pattern overlaps with the second side edge of the spacer but does not overlap with the first side edge of the spacer. A display panel as described in claim 5, wherein the orthographic projection contour of the spacer on the surface of the substrate is circular, and the orthographic projection contour of the fourth shading pattern on the surface of the substrate is half-moon shaped. The display panel as described in claim 1 further includes: a common electrode, disposed on the first substrate and overlapping the reflective electrode of the pixel structure; and a common electrode line, disposed on the first substrate and connected to the common electrode, wherein a plurality of the reflective electrodes are arranged at intervals along a first direction, a gap is provided between any two adjacent ones of the reflective electrodes, and the gap extends in a second direction, the first direction being perpendicular to the second direction, the common electrode line has a portion overlapping the gap, and the shading layer further includes a second shading pattern, and the orthographic projection of the portion of the common electrode line on the substrate surface is located within the orthographic projection of the second shading pattern on the substrate surface. The display panel as described in claim 1 further includes: a scanning line, arranged on the first substrate and electrically connected to the active element of the pixel structure, wherein a plurality of the reflective electrodes are arranged at intervals along a first direction, a gap is provided between any two adjacent ones of the reflective electrodes, and the gap extends in a second direction, the first direction being perpendicular to the second direction, the scanning line has a portion overlapping the gap, and the shading layer further includes a second shading pattern, and the orthographic projection of the portion of the scanning line on the surface of the substrate is located within the orthographic projection of the second shading pattern on the surface of the substrate. A display panel as described in claim 1, wherein the multiple reflective electrodes of the multiple pixel structures are arranged at intervals along a first direction and a second direction, the first direction is perpendicular to the second direction, a first gap is provided between any two adjacent ones of the reflective electrodes arranged along the first direction, and a second gap is provided between any two adjacent ones of the reflective electrodes arranged along the second direction, the shading layer further includes a second shading pattern and a third shading pattern, the orthographic projection of the first gap on the surface of the substrate is located within the orthographic projection of the second shading pattern on the surface of the substrate, and the orthographic projection of the second gap on the surface of the substrate is located within the orthographic projection of the third shading pattern on the surface of the substrate, wherein the width of the second shading pattern along the first direction is different from the width of the third shading pattern along the second direction. The display panel as claimed in claim 1, wherein the first substrate has a display area and a peripheral area outside the display area, a plurality of pixel structures are arranged in the display area, the display area includes an edge display area adjacent to the peripheral area and a central display area away from the peripheral area, the pixel structures include: a plurality of first pixel structures, arranged in the edge display area; and a plurality of second pixel structures, arranged in the central display area, wherein any two of the first pixel structures arranged along the first direction are A first gap is provided between two adjacent reflective electrodes, and a second gap is provided between any two adjacent reflective electrodes in the second pixel structures arranged along the first direction. The light-shielding layer further includes a second light-shielding pattern and a third light-shielding pattern. The second light-shielding pattern overlaps the first gap and has at least one micro-gap. The third light-shielding pattern overlaps the second gap, and the orthographic projection of the second gap on the substrate surface is located within the orthographic projection of the third light-shielding pattern on the substrate surface. The display panel of claim 10, wherein the number of the at least one micro-slit of the second light-shielding pattern gradually decreases as it moves away from the peripheral area.