TWI803174B - Ball pad applied for ball grid array package substrate and the forming method thereof - Google Patents

Abstract

A ball pad applied for ball grid array package substrate is provided, which includes a substrate having a top surface and a bottom surface, and a plurality of vias therein and is passed through the top surface and bottom surface of the substrate. Each plurality of vias having a conducive plug therein, in which the top surface of conductive plug and the top surface of the substrate are the same plane, and the bottom surface of the conductive plug and the bottom surface of the substrate are the same plane. A circuit layer is arranged on the exposed part of the top surface of the substrate and on the exposed top surface of the conductive plug. A ball pad with a concave-convex structure thereon is disposed on the part bottom surface of the substrate and the bottom surface of the conductive plug.

Description

Ball pad applied to ball grid array package substrate and method for forming it

The invention relates to a ball grid array packaging substrate, in particular to a ball pad with a concave-convex structure applied to a ball grid array packaging substrate and a forming method thereof.

In recent years, as the growth of portable electronic products, handheld communication and consumer electronic products has surpassed traditional personal computer products, electronic components are constantly moving towards high-capacity, narrow-linewidth, high-density ratio, high-density frequency, low energy consumption, and multi-functional integration. In the field of integrated circuit (IC) packaging technology, in order to meet the requirements of high input/output (I/O), high heat dissipation, and package size reduction, chip scale package (CSP) ), wafer-level packaging (wafer level package) and other high-end packaging technology demand continues to rise.

Different from the traditional packaging technology that takes a single chip as the processing target, wafer-level packaging takes the wafer as the object of packaging processing. Its main purpose is to simplify the chip packaging process to save time and cost. After the integrated circuit on the wafer is manufactured, the entire wafer can be packaged directly, and then the wafer is cut to obtain a multi-chip package structure. The completed chip package structure can be installed on the carrier board superior.

When bonding the chip to the carrier board, in the prior art, bumps are formed on the pads of the chip, and conductive glue is filled between the bumps of the chip package structure and the pads of the carrier board. For example, the ball pad of the ball grid array package substrate is an entire circular plane. In the current era of thinness, shortness and high I/O count, it is an inevitable trend to reduce the ball diameter of the solder ball. However, in the existing technology, shrinking The ball diameter of the solder ball will cause the thrust of the solder ball to decrease, that is, the ability to resist falling.

According to the defects of the prior art, the main purpose of the present invention is to provide a ball pad applied to a ball grid array package substrate, the ball pad has a concave-convex structure, which is used to replace the flat ball pad of the ball grid array package substrate in the prior art, by which The concave-convex structure increases the joint surface between the solder ball and the ball pad, thereby increasing the drop resistance.

Another object of the present invention is to form a plurality of ribs on the ball pads by using electroplating process after the circuit is etched during the substrate manufacturing process, so as to change the original planar structure of the ball pads into a concave-convex structure to increase the contact area of the ball pads, and Increasing the bonding surface between the solder ball and the ball pad can increase the drop resistance of the entire ball grid array package component.

According to the above purpose, the present invention discloses a ball pad applied to a ball grid array package substrate, comprising: a substrate having an upper surface and a lower surface, and a plurality of guide holes penetrating the upper surface and the lower surface in the substrate, and in each There is a conductive post in the guide hole, and the upper surface of the conductive post is on the same plane as the upper surface of the substrate and the lower surface of the conductive post is on the same plane as the lower surface of the substrate; the circuit layer is arranged on the exposed part of the upper surface of the substrate and on the exposed upper surface of the conductive column; and a plurality of ball pads with concave-convex structure, each ball pad with concave-convex structure is arranged on part of the lower surface of the substrate and the lower surface of the conductive column.

The present invention also provides a method for forming a ball pad applied to a ball grid array package substrate, comprising: providing a substrate with a plurality of conductive pillars, the conductive pillars penetrate the substrate, the upper surface of each conductive pillar is the same plane as the upper surface of the substrate, and The lower surface of each conductive column is on the same plane as the lower surface of the substrate; a circuit layer is formed to cover the exposed part of the upper surface of the substrate and the exposed upper surface of each conductive column; a plurality of ball pads are formed to respectively cover the part of the substrate The lower surface and the lower surface of each conductive pillar; performing an electroplating process to form a plurality of ribs on the surface of each ball pad on the lower surface of the conductive pillar, so that each ball pad has a concave-convex structure. Accordingly, using the ball pad with a concave-convex structure In order to increase the contact area and increase the bonding surface with the solder balls, thereby increasing the drop resistance of the entire ball grid array package component.

10: Substrate

102: the upper surface of the substrate

104: the lower surface of the substrate

20: Guide hole

30: Conductive column

302: the upper surface of the conductive column

304: the lower surface of the conductive column

40: Line layer

50: ball cushion

502: Ribs

60, 62: Solder mask

70: Semiconductor components

70a, 70b, 70c: Wafers

72a: Non-conductive glue

72b, 72c: sticky glue

80a, 80b, 80c: wires

90: Encapsulation

95: solder ball

FIG. 1A is a schematic diagram showing the structure of multiple guide holes in the substrate according to the technology disclosed in the present invention; FIG. 1B is a schematic diagram showing the structure of multiple conductive columns in the substrate according to the technology disclosed in the present invention; FIG. 2 According to the technology disclosed in the present invention, it shows a schematic diagram of the structure of forming a circuit layer on the upper surface of the substrate and forming a ball pad on the lower surface of the substrate; FIG. 3 shows a ball on the lower surface of the substrate according to the technology disclosed in the present invention. Schematic diagram of the structure of ribs formed on the pad; FIG. 4 is a schematic diagram of the structure of forming a solder resist layer on the upper surface and the lower surface of the substrate and forming a semiconductor element and a package on the upper surface of the substrate according to the technology disclosed in the present invention; and FIG. 5 is a schematic diagram showing the structure of solder balls formed on ball pads with a concave-convex structure according to the technology disclosed in the present invention.

First, please refer to FIG. 1A and FIG. 1B . FIG. 1A is a schematic diagram showing a structure with a plurality of vias in a substrate and FIG. 1B is a schematic diagram showing a conductive layer formed in the vias to form conductive pillars. In FIG. 1A, the substrate 10 has an upper surface 102 and a lower surface 104, and there are a plurality of vias 20 in the substrate 10, wherein the vias 20 in the substrate 10 penetrate the upper surface 102 and the lower surface 104 of the substrate 10. , and these guide holes 20 are formed by laser drilling or mechanical drilling. Next, copper is electroplated in these guide holes 20 of the substrate 10 by electroplating process to form conductive pillars 30, as shown in FIG. Yes, the lower surface 304 of the conductive pillar 30 is on the same plane as the lower surface 104 of the substrate 10 .

Then please refer to Figure 2. FIG. 2 is a schematic diagram showing the structure of forming a circuit layer on the upper surface of the substrate and forming a ball pad on the lower surface of the substrate. In FIG. 2, a conductive layer (not shown) is formed on the upper surface 102 and the lower surface 104 of the substrate 10 respectively, and then a part of the conductive layer (not shown) is removed by photomask patterning and etching steps in the semiconductor manufacturing process. not shown in the figure), so that the circuit layer 40 is formed on the part of the upper surface 102 of the substrate 10 and the upper surface 302 corresponding to each conductive column 30 and at the same time on the part of the lower surface 104 of the substrate 10 and the lower surface corresponding to each conductive column 30 Ball pads 50 are formed on surface 304 . In another embodiment of the present invention, the circuit layer 40 is formed on the upper surface 302 of each conductive pillar 30 and the ball pad 50 is formed on a part of the lower surface 104 of the substrate 10 and under each conductive pillar 30 by using an electroplating process. On the surface.

Please refer to Figure 3 next. FIG. 3 is a schematic diagram showing the structure of ribs formed on the ball pads on the lower surface of the substrate. In FIG. 3, after the circuit layer 40 on the upper surface 102 of the substrate 10 is completed, electroplating is used to In this process, a plurality of ribs 502 protruding from the surface of the ball pad 50 are formed on the surface of the ball pad 50, so that the ball pad 50 changes from the original plane to a concave-convex structure, wherein the material of the ribs 502 and the ball pad 50 can be the same or different, In a preferred embodiment, the ribs 502 may be copper. In one embodiment of the present invention, the height and width of each rib 502 on the ball mat 50 can be the same size or different sizes, and the ribs 502 can be parallel to each other or arranged in a well-shaped structure. .

Please refer to Figure 4 next. FIG. 4 is a structural schematic view showing that a solder resist layer, a semiconductor element and a package are sequentially formed on the upper surface of the substrate, and a solder resist layer is formed on the lower surface of the substrate. In FIG. 4 , a solder resist layer 60 is formed on the exposed upper surface 102 of the substrate 10 to cover part of the upper surface 102 of the substrate 10 and part of the wiring layer 40 by using a semiconductor manufacturing process, and is electrically connected to the semiconductor element 70 to be formed subsequently. The connected wiring layer 40 is exposed. While the solder resist layer 60 is formed on the upper surface 102 of the substrate 10 , another layer of solder resist layer 62 is also formed on the lower surface 104 of the substrate 10 to expose the ball pads 50 of the concave-convex structure. Then, the semiconductor element 70 is arranged on the solder resist layer 60, wherein the semiconductor element 70 can be a wafer stack structure formed by stacking a plurality of wafers 70a, 70b, 70c, and between the wafers 70a, 70b, 70c is Use crystal glue 72b, 72c to bond, and the lower surface of the chip 70a, that is, the bottom surface of the semiconductor element 70, the solder mask layer 60 and the circuit layer 40 are bonded with the non-conductive glue 72a, and then use wire bonding. The manufacturing process electrically connects the chips 70 a , 70 b , and 70 c to the circuit layer 40 not covered by the solder resist layer 60 by wires 80 a , 80 b , and 80 c respectively. Finally, the encapsulation material (encapsulation material) is formed on the substrate 10 by molding technology to form the package body 90, and the circuit layer 40, the solder resist layer 60, the semiconductor element 70 and the wires on the upper surface 102 of the substrate 10 are covered. 80a, 80b, 80c.

Please refer to Figure 5 next. FIG. 5 is a schematic diagram showing the structure of forming solder balls on ball pads with a concave-convex structure. In FIG. 5 , solder balls 95 as conductive elements are correspondingly formed on the ball pads 50 with the concave-convex structure 502 by semiconductor manufacturing process, so as to complete the whole ball grid array package. Due to the prior art, When the ball diameter of solder ball 95 is reduced from 0.45 mm ball diameter of wBGA to 0.3 mm ball diameter according to product requirements, reducing the ball diameter will reduce the contact area between solder ball 95 and ball pad 50 and reduce the thrust , in order to improve the defect of the thrust drop caused by reducing the ball diameter of the solder ball 95, the concave-convex structure formed by the plurality of ribs 502 on the surface of the ball pad 50 can increase the contact area with the solder ball 95, thereby strengthening The interface bonding force between the ball pads 50 and the solder balls 95 improves the drop resistance of the entire BGA package.

10: Substrate

102: the upper surface of the substrate

104: the lower surface of the substrate

30: Conductive column

302: the upper surface of the conductive column

304: the lower surface of the conductive column

40: Line layer

50: ball cushion

502: Ribs

Claims (8)

A ball pad applied to a ball grid array package substrate, comprising: a substrate having an upper surface and a lower surface, and a plurality of guide holes penetrating through the upper surface and the lower surface in the substrate, and each of the guide holes There is a conductive column in the hole, and an upper surface of the conductive column is on the same plane as the upper surface of the substrate and a lower surface of the conductive column is on the same plane as the lower surface of the substrate; a circuit layer is arranged on the exposed On the part of the upper surface of the substrate and the exposed upper surface of the conductive column, a solder resist layer, a semiconductor element and a package are sequentially provided on the circuit layer, wherein the semiconductor element is on the on the solder resist layer and electrically connected with the circuit layer on the substrate by a wire, and the package is used to cover the upper surface of the substrate, the circuit layer, the solder resist layer and the semiconductor element; and has A plurality of ball pads with a concave-convex structure, each of the ball pads with the concave-convex structure is arranged on part of the lower surface of the substrate and the lower surface of the conductive pillar, and a tin is provided on the concave-convex structure of each of the ball pads. ball. The ball pad applied to a ball grid array package substrate according to claim 1, wherein the concave-convex structure has a plurality of ribs arranged in parallel on a surface of the ball pad. The ball pad applied to a ball grid array package substrate as claimed in claim 1, wherein the concave-convex structure is a plurality of ribs arranged in a grid pattern on a surface of the ball pad. A method for forming a ball pad applied to a ball grid array package substrate, comprising: providing a substrate with a plurality of conductive pillars, the conductive pillars penetrate the substrate, the upper surface of each conductive pillar and an upper surface of the substrate are on the same plane and the lower surface of each conductive post is on the same plane as the lower surface of the substrate; forming a circuit layer to cover part of the upper surface of the substrate and covering the upper surface of each of the conductive pillars; forming a plurality of ball pads to respectively cover part of the lower surface of the substrate and the lower surface of each of the conductive pillars; and An electroplating process is performed to form a plurality of ribs on a surface of each of the ball pads on the lower surface of each of the conductive pillars, so that each of the ball pads has a concave-convex structure. The method for forming a ball pad applied to a ball grid array package substrate as claimed in claim 4, wherein the ribs are made of copper. The method for forming a ball pad applied to a ball grid array package substrate as claimed in claim 4, wherein a height and a width of each of the ribs have different sizes or have the same size. The method for forming a ball pad applied to a ball grid array package substrate as claimed in claim 4, wherein the ribs may be arranged in parallel on the surface of the ball pad. The method for forming a ball pad applied to a ball grid array package substrate as claimed in claim 4, wherein the ribs may be arranged in a grid pattern on the surface of the ball pad.

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