TWI898624B - Circuit board with embedded component and method for fabricating the same - Google Patents

Abstract

A circuit board with embedded component and a method for fabricating the same are provided. The circuit board with at least one embedded component includes a circuit substrate, a conductive structure and an electronic component. The circuit substrate includes a circuit layer which is disposed on the surface of the circuit substrate. The conductive structure is embedded in the circuit substrate and is electrically connected to the circuit layer of the circuit substrate. The conductive structure has a cavity whose opening faces to the surface of the circuit substrate. The electronic component is disposed inside the trench. The source and the gate of the electronic component are electrically connected to the circuit layer, while the drain of the electronic component is electrically connected to the conductive structure. The drain of the electronic component is disposed away from the surface of the circuit substrate.

Description

Embedded component circuit board and manufacturing method thereof

The present invention relates to a circuit board, and more particularly to a circuit board with embedded components.

In current silicon carbide (SiC) power modules, electronic components (e.g., bare die or chips) are often electrically connected to the module's internal circuit layer via wire bonding. However, because SiC power modules often require high-frequency switching, the parasitic inductance introduced by wire bonding becomes a significant issue, impacting power module performance. To mitigate this parasitic inductance, power modules have been developed that embed electronic components within the circuit substrate.

On the other hand, the source and drain electrodes of electronic components embedded in the circuit substrate are located on opposite sides of the components. Therefore, they must be electrically connected to components outside the circuit substrate through external wiring layers on opposite sides of the circuit substrate. This electrical connection not only limits the layout design of embedded component circuit boards, affecting their operational performance, but also hinders electrical measurement during the circuit board manufacturing process.

Therefore, the present invention provides a circuit board with embedded components to improve the process yield of the circuit board.

At least one embodiment of the present invention also provides a method for manufacturing the above-mentioned embedded component circuit board.

At least one embodiment of the present invention provides a circuit board with embedded components, comprising a circuit substrate, a conductive structure, and an electronic component. The circuit substrate includes a circuit layer disposed on a first surface of the circuit substrate. The conductive structure is embedded in the circuit substrate and electrically connected to the circuit layer of the circuit substrate. The conductive structure has a recess, with the recess opening facing the first surface of the circuit substrate. The electronic component is disposed within the recess of the conductive structure. A source and a gate of the electronic component are electrically connected to the circuit layer, and a drain of the electronic component is electrically connected to the conductive structure. The drain of the electronic component is disposed remotely from the first surface.

In at least one embodiment of the present invention, the circuit substrate further includes an insulating material encapsulating the conductive structure and the electronic component. The circuit layer covers the insulating material, and a portion of the insulating material is located between the circuit layer and the groove of the conductive structure.

In at least one embodiment of the present invention, the electronic component further includes a main body disposed on the bottom surface of the recess. The source and gate electrodes of the electronic component are located on a first plane of the main body, and the drain electrode of the electronic component is located on a second plane of the main body. The first plane and the second plane are located on opposite sides of the main body, and the second plane faces the bottom surface of the recess.

In at least one embodiment of the present invention, the embedded component circuit board further includes a metal sintered layer disposed on the bottom surface of the recess, the metal sintered layer being located between the conductive structure and the electronic component. The electronic component is electrically connected to the conductive structure via the metal sintered layer.

In at least one embodiment of the present invention, an end surface of the conductive structure is exposed on a second surface of the circuit substrate, and the first surface and the second surface of the circuit substrate are located on opposite sides of the circuit substrate.

In at least one embodiment of the present invention, the conductive structure further includes a first metal layer, a thermally conductive insulating layer, and a second metal layer. The first metal layer is connected to the electronic component, and the groove of the conductive structure is located in the first metal layer. The thermally conductive insulating layer is disposed on the first metal layer and is located between the thermally conductive insulating layer and the circuit layer of the circuit substrate. The second metal layer is disposed on the thermally conductive insulating layer, and the end surface of the conductive structure is located on the second metal layer. The thermally conductive insulating layer is located between the first metal layer and the second metal layer, and there is no direct electrical connection between the second metal layer and the first metal layer.

In at least one embodiment of the present invention, the thermal conductivity of the thermally conductive insulating layer is greater than 10 W/mK.

The present invention also provides a method for manufacturing a circuit board with embedded components, comprising providing a first circuit substrate; disposing a second circuit substrate and at least one first bonding substrate on the first circuit substrate. The first bonding substrate is positioned between the first and second circuit substrates; removing a portion of the first circuit substrate, a portion of the second circuit substrate, and a portion of the first bonding substrate to form an opening in the first circuit substrate, the second circuit substrate, and the first bonding substrate. The opening connects the first circuit substrate, the second circuit substrate, and the first bonding substrate; and providing an embedded structure comprising a conductive structure having a groove and an electronic component. The electronic component is disposed in the groove of the conductive structure, with a drain electrode of the electronic component disposed on a bottom surface of the groove, and a source electrode and a gate electrode of the electronic component disposed away from the bottom surface of the groove. The drain of the electronic component is electrically connected to the conductive structure; a buried structure is disposed in the opening; after the buried structure is disposed in the opening, at least one second bonding substrate and a first metal layer are disposed on the first circuit substrate, such that the second bonding substrate and the first metal layer cover the buried structure and the second bonding substrate is located between the first metal layer and the first circuit substrate; the first circuit substrate, the first bonding substrate, the second circuit substrate, the second bonding substrate, and the first metal layer are pressed together to form an initial third circuit substrate; after forming the initial third circuit substrate, a plurality of conductive blind vias are formed in the initial third circuit substrate. The first metal layer is electrically connected to the buried structure through the conductive blind vias; and after forming the conductive blind vias, the first metal layer is patterned to form a first circuit layer, thereby converting the initial third circuit substrate into a third circuit substrate. The first circuit layer is electrically connected to the conductive structure and electronic components.

In at least one embodiment of the present invention, the embedded structure is formed by providing a conductive substrate; removing a portion of the conductive substrate to form at least one recess in the conductive substrate; placing an electronic component in the recess of the conductive substrate; and after placing the electronic component in the recess, attaching at least a third bonding substrate and a second metal layer to a first surface of the conductive substrate so that the third bonding substrate forms an insulating material, and the insulating material and the second metal layer cover the electronic component and the recess, and the insulating material is located on the second metal layer. The method comprises forming a first surface of the conductive substrate and a second metal layer between the insulating material and the conductive substrate; after laminating a third bonding substrate and a second metal layer to the first surface of the conductive substrate, forming a plurality of conductive buried vias in the insulating material and the second metal layer, and electrically connecting the second metal layer to the conductive substrate and the electronic component through the conductive buried vias; after forming the conductive buried vias, patterning the second metal layer to form a second circuit layer; and after forming the second circuit layer, cutting the second circuit layer, the insulating material, and the conductive substrate along a normal line of the second circuit layer to form a buried structure.

In at least one embodiment of the present invention, disposing the embedded structure within the opening includes laminating a tape to a second surface of a second circuit substrate. The second circuit substrate is positioned between the tape and the first bonding substrate, with the tape overlapping the opening. After laminating the tape to the second surface of the second circuit substrate, the embedded structure is disposed on the tape, with the opening of the recess of the conductive structure facing away from the tape. After forming the initial third circuit substrate, the tape is removed to expose an end surface of the conductive structure, with the second surface of the second circuit substrate aligned with the end surface of the conductive structure.

Based on the above, when the source (and gate) and drain of an electronic component in at least one embodiment of the present invention are located on opposite sides of the electronic component, a conductive structure having a groove is provided in the circuit substrate, and the electronic component is placed within the groove of the conductive structure, so that both the source and drain of the electronic component are electrically connected to the same side of the circuit substrate. This facilitates electrical measurements during the circuit board manufacturing process, thereby improving the circuit board manufacturing yield.

100: Embedded component circuit board

103v: Conductive buried vias

110: Solder mask

113v: Conductive blind vias

120,210,230: Circuit substrate

120f, 120s, 230s, 340s: Surface

122a, 122b, 122c, 122d, 122e, 322: Line layer

124a,124b: Insulating layer

126: Insulation Materials

140:Conductive structure

140e: End face

142: Groove

142b: Bottom surface

144a,144b,322b,344a,344b,422:Metal layer

146,346: Thermal insulation layer

160: Electronic components

160d: Drain

160g: Gate

160s: Source

165: Subject

165f, 165s: plane

180: Metal sintered layer

190: Electroplated through-holes

205: Tape

250, 350, 450: Bonding substrate

270: Opening

290: Embedded structure

340: Conductive substrate

420: Initial circuit substrate

N1: normal line

w1,w2: width

The present invention will be understood from the following detailed description when reviewed in conjunction with the accompanying drawings. It should be noted that many features are not drawn to scale as is standard practice in the industry. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion.

Figure 1 shows a cross-sectional view of an embedded component circuit board according to at least one embodiment of the present invention.

Figures 2A and 2B are cross-sectional views illustrating a method for manufacturing an embedded component circuit board according to at least one embodiment of the present invention.

Figures 3A to 3F are cross-sectional views illustrating a method for manufacturing an embedded structure in an embedded component circuit board according to at least one embodiment of the present invention.

Figures 4A and 4B are cross-sectional views illustrating a method for manufacturing an embedded component circuit board according to at least one embodiment of the present invention.

The present invention will be described in detail using the following embodiments. It should be noted that the following descriptions of the embodiments of the present invention are for illustrative purposes only and are not intended to be exhaustive or to limit the present invention to specific embodiments. For example, the phrase "a first feature formed on a second feature" encompasses various implementations, including both direct contact between the first and second features and additional features formed between the first and second features without direct contact. Furthermore, identical reference numbers are used throughout the drawings and description to represent identical or similar components whenever possible.

Spatially relative terms, such as "inferior," "lower than," "beneath," "above," and related terms, are used herein to simply describe the relationship of one component or feature to another component or feature as shown in the diagram. These spatially relative terms encompass not only the orientation depicted in the diagram but also various orientations during use or operation of the device. Furthermore, when a component is rotatable (90 degrees or other angles), the spatially relative descriptors used herein should be interpreted accordingly.

Furthermore, when words such as "approximately" or "about" are used to describe a number or a range of numbers, such words are intended to encompass numbers within a reasonable range, taking into account the natural variations in manufacturing processes that are understood by those skilled in the art. Numerical ranges encompass a reasonable range of the described number, for example, within +/- 10% of the described number, based on known manufacturing tolerances associated with the characteristics of the manufactured feature. For example, a material layer having a thickness of "approximately 5 nanometers" may encompass a range of sizes from 4.25 nanometers to 5.75 nanometers, where the manufacturing tolerances for depositing the material layer are +/- 15%, which are known to those skilled in the art. Furthermore, the present invention may repeat numbers and/or designations in various examples. This repetition is for simplicity and clarity and is not intended to indicate a relationship between the various implementations and/or configurations discussed here.

At least one embodiment of the present invention provides an embedded component circuit board 100. Referring to FIG. 1 , embedded component circuit board 100 includes a circuit substrate 120, a conductive structure 140, and an electronic component 160. Circuit substrate 120 includes circuit layers 122a, 122b, 122c, 122d, and 122e, insulating layers 124a and 124b, and insulating material 126. Insulating layer 124a is located between circuit layers 122b and 122c, and insulating layer 124b is located between circuit layers 122d and 122e. It is worth noting that, although circuit substrate 120 is a multi-layer board including multiple circuit layers (and multiple insulation layers) in this embodiment, the present invention is not limited thereto. Circuit substrate 120 may also be a double-layer board including only two circuit layers and an insulation layer disposed between the two circuit layers.

Circuit substrate 120 has a first surface 120f and a second surface 120s, located on opposite sides of circuit substrate 120. Circuit layer 122a is disposed on first surface 120f of circuit substrate 120. Meanwhile, conductive structure 140 is embedded within circuit substrate 120 and electrically connected to circuit layer 122a. As shown in Figure 1, conductive structure 140 has a groove 142, with an opening (not shown) facing first surface 120f of circuit substrate 120.

It is worth noting that the conductive structure 140 also has an end surface 140e, and the end surface 140e and the groove 142 are respectively disposed on opposite sides of the conductive structure 140. In other words, the end surface 140e of the conductive structure 140 faces the second surface 120s of the circuit substrate 120.

The electronic component 160 is disposed within the recess 142 of the conductive structure 140. The source 160s and gate 160g of the electronic component 160 are disposed toward the first surface 120f and are electrically connected to the circuit layer 122a. Meanwhile, the drain 160d of the electronic component 160 is disposed away from the first surface 120f and is electrically connected to the conductive structure 140. In other words, the distance between the source 160s and gate 160g and the first surface 120f is smaller than the distance between the drain 160d and the first surface 120f.

Specifically, the electronic component 160 further includes a body 165 disposed on the bottom surface 142b of the recess 142. The source 160s and gate 160g of the electronic component 160 are located on a first plane 165f of the body 165, and the drain 160d of the electronic component 160 is located on a second plane 165s of the body 165. The first plane 165f and the second plane 165s are located on opposite sides of the body 165, respectively, and the second plane 165s faces the bottom surface 142b of the recess 142.

Specifically, the circuit layer 122a includes a source region, a gate region, and a drain region (not labeled). The source 160s of the electronic component 160 is connected to the source region of the circuit layer 122a, the gate 160g of the electronic component 160 is connected to the gate region of the circuit layer 122a, and the drain 160d of the electronic component 160 is connected to the drain region of the circuit layer 122a.

The electronic component 160 can be an unpackaged die, but the present invention is not limited thereto. In other embodiments, the electronic component 160 can also be a packaged chip. Each conductive structure 140 has a recess 142, and each recess 142 houses an electronic component 160. It is worth noting that while the circuit substrate 120 has two conductive structures 140 in the embodiment shown in FIG1 , the present invention is not limited thereto. In other embodiments, the circuit substrate 120 can have more than one conductive structure 140, for example, one or three conductive structures 140.

The insulating material 126 of the circuit substrate 120 covers the conductive structure 140 and the electronic component 160. The circuit layer 122a covers the insulating material 126, and a portion of the insulating material 126 is located between the circuit layer 122a and the groove 142 of the conductive structure 140. The insulating material 126 can include a material with a coefficient of thermal expansion (CTE) less than 10 ppm/°C (i.e., a low thermal expansion material), such as polyphenylene oxide (PPO), polyphenylene ether (PPE), or the like.

The embedded component circuit board 100 further includes a metal sintered layer 180 disposed on the bottom surface 142b of the recess 142 and located between the conductive structure 140 and the electronic component 160. In other words, the electronic component 160 is electrically connected to the conductive structure 140 via the metal sintered layer 180. It is worth noting that the metal sintered layer 180 may include a metal material with a high thermal conductivity, such as silver, to improve the efficiency of transferring heat from the electronic component 160 to the conductive structure 140.

Conductive structure 140 further includes metal layers 144a and 144b and a thermally conductive insulation layer 146. Metal layer 144a is connected to electronic component 160, thermally conductive insulation layer 146 is disposed on metal layer 144a, and metal layer 144b is disposed on thermally conductive insulation layer 146. Specifically, metal layer 144a is located between thermally conductive insulation layer 146 and circuit layer 122a of circuit substrate 120, while thermally conductive insulation layer 146 is located between metal layer 144a and metal layer 144b.

Because end surface 140e and groove 142 are located on opposite sides of conductive structure 140, groove 142 of conductive structure 140 is located in metal layer 144a, while end surface 140e of conductive structure 140 is located in metal layer 144b. It is worth noting that thermally conductive insulation layer 146 completely isolates metal layers 144a and 144b. Therefore, there is no direct electrical connection between metal layers 144a and 144b. In other words, metal layers 144a and 144b are isolated from each other and do not touch each other, and current cannot be transferred between metal layers 144a and 144b through other conductors.

The metal layers 144a and 144b can be made of a conductive material with a high thermal conductivity, such as copper. The thermally conductive insulating layer 146 can be made of an organic insulating material with a thermal conductivity greater than 10 W/mK, such as thermally conductive adhesive or the like. Furthermore, in this embodiment, the end surface 140e of the conductive structure 140 is exposed to the second surface 120s of the circuit substrate 120. This facilitates the outward conduction of heat generated by the electronic component 160. In other words, the rate at which heat generated by the electronic component 160 is conducted toward the second surface 120s through the metal layer 144a, the thermally conductive insulating layer 146, and the metal layer 144b of the conductive structure 140 is increased.

Embedded component circuit board 100 may also include a plurality of conductive buried vias 103v and conductive blind vias 113v. Conductive structure 140 and electronic component 160 are connected to circuit layer 122b via conductive buried vias 103v, respectively. Circuit layer 122b is connected to circuit layer 122a via conductive blind vias 113v. Thus, conductive structure 140 (and electronic component 160) are electrically connected to circuit substrate 120.

It is worth noting that the embedded component circuit board 100 may also include at least one layer of solder mask 110. Solder mask 110 may cover the circuit layers 122a and 122e to reduce solder contamination during the soldering process. Furthermore, the embedded component circuit board 100 may also include plating through holes (PTHs) 190. These PTHs connect opposite sides of the embedded component circuit board 100, and the various circuit layers within the embedded component circuit board 100 (i.e., circuit layers 122a, 122b, 122c, 122d, and 122e) may be electrically connected to each other via the PTHs 190.

At least one embodiment of the present invention provides a method for manufacturing an embedded component circuit board. Taking embedded component circuit board 100 as an example, this method may include several steps as shown in Figures 2A-2B, 3A-3F, and 4A-4B. Referring to Figure 2A, a circuit substrate 210 is first provided. Circuit substrate 210 and two bonding substrates 250 are then disposed on circuit substrate 230, with bonding substrates 250 positioned between circuit substrate 210 and circuit substrate 230.

Circuit substrate 210 is similar to circuit substrate 230. That is, both circuit substrates 210 and 230 include two circuit layers and an insulating layer located between the two circuit layers. For example, circuit substrate 210 is formed by patterning a metal layer (not shown) on a conventional copper clad laminate (CCL) to form circuit layers 122b and 122c located on either side of insulating layer 124a. It is important to note that while this embodiment illustrates a two-layer circuit substrate (i.e., circuit substrates 210 and 230), the present invention is not limited thereto. In various embodiments, the number of circuit substrates may be any number, one or more, such as three.

Next, as shown in FIG2A , a portion of circuit substrate 210, a portion of circuit substrate 230, and a portion of bonding substrate 250 can be removed, for example, by mechanical cutting or laser grooving, to form openings 270 in circuit substrate 210, circuit substrate 230, and bonding substrate 250. Openings 270 connect circuit substrate 210, circuit substrate 230, and bonding substrate 250. In other words, openings 270 connect opposite sides of the stacked structure (not shown) of circuit substrate 210, circuit substrate 230, and bonding substrate 250. While this embodiment uses two openings 270 as an example, the present invention is not limited thereto. In other embodiments, more than one opening 270, for example, three openings 270, may be formed.

Referring to FIG. 2B , a buried structure 290 is provided, and one buried structure 290 is disposed within each opening 270 . The buried structure 290 includes the conductive structure 140 and the electronic component 160 shown in FIG. The drain 160 d of the electronic component 160 is disposed on the bottom surface 142 b of the recess 142 of the conductive structure 140 , while the source 160 s and gate 160 g of the electronic component 160 are disposed away from the bottom surface 142 b of the recess 142 .

In this embodiment, the embedded structure 290 is formed by the steps shown in Figures 3A to 3F. First, referring to Figure 3A , a conductive substrate 340 is provided. This conductive substrate 340 includes two metal layers 344a and 344b, and a thermally conductive insulation layer 346 located between the metal layers 344a and 344b. Specifically, the conductive substrate 340 can be formed by forming the metal layers 344a and 344b on opposite sides of the thermally conductive insulation layer 346, for example, using thick copper plating.

The thickness of the conductive substrate 340 can range from 635 μm to 2385 μm. Specifically, the thickness of the metal layer 344 a can range from 500 μm to 2000 μm, the thickness of the metal layer 344 b can range from 35 μm to 210 μm, and the thickness of the thermally conductive insulation layer 346 can range from 100 μm to 175 μm.

Next, referring to FIG. 3B , a portion of the conductive substrate 340 can be removed by, for example, mechanical machining (e.g., CNC machining) or laser grooving to form at least one groove 142 (two grooves 142 are used as an example in this embodiment) on the conductive substrate 340 . The groove 142 is located in the metal layer 344a of the conductive substrate 340 .

Next, referring to Figure 3C , an electronic component 160 is disposed within the recess 142 of the conductive substrate 340 . The process of disposing the electronic component 160 within the recess 142 of the conductive structure 140 includes: disposing a metal sintered material (not shown) on the bottom surface 142b of the recess 142 and placing the electronic component 160 on the metal sintered material. Subsequently, the metal sintered material is heated to adhere between the bottom surface 142b of the recess 142 and the electronic component 160, forming a metal sintered layer 180 connecting the electronic component 160 to the conductive substrate 340.

After the electronic component 160 is placed in the groove 142, refer to Figure 3D . At least one bonding substrate 350 (Figure 3D illustrates the bonding of two bonding substrates) and a metal layer 322b are bonded to the surface 340s of the conductive substrate 340, for example, by thermal compression bonding. This allows the bonding substrate 350 to form the insulating material 126 shown in Figure 1 . The insulating material 126 and the metal layer 322b cover the electronic component 160 and the groove 142. The insulating material 126 is located between the metal layer 322b and the conductive substrate 340.

After bonding the bonding substrate 350 and the metal layer 322b to the surface 340s of the conductive substrate 340, referring to Figure 3E , a plurality of conductive buried vias 103v, as shown in Figure 1, can be formed in the insulating material 126 and the metal layer 322b (shown in Figure 3D ) through mechanical grinding, mechanical drilling, and electroplating. The metal layer 322b is electrically connected to the conductive substrate 340 and the electronic component 160 via these conductive buried vias 103v. After forming the conductive buried vias 103v, the metal layer 322b can be patterned through methods such as lithography and etching to form the circuit layer 322 (i.e., a portion of the circuit layer 122b in Figure 1 ).

After forming the circuit layer 322, referring to Figure 3F, the circuit layer 322, the insulating material 126, and the conductive substrate 340 are cut along the normal line N1 of the circuit layer 322, such as by mechanical cutting, laser cutting, or ion beam cutting, to form a plurality of completely separated embedded structures 290. During the cutting process, a cutting device p sequentially passes through the circuit layer 322, the insulating material 126, and the conductive substrate 340. The cutting device p can be a cutting tool, a laser beam, or an ion beam.

Next, referring back to Figure 2B , the step of disposing embedded structure 290 within opening 270 includes laminating tape 205 (e.g., polyethylene terephthalate tape) or the like onto surface 230s of circuit substrate 230. Circuit substrate 230 is positioned between tape 205 and bonding substrate 250, with tape 205 overlapping opening 270. After laminating tape 205 onto surface 230s of circuit substrate 230, embedded structure 290 formed through the steps of Figures 3A to 3F is positioned on tape 205, with the opening of recess 142 of conductive structure 140 facing away from tape 205.

After the embedded structure 290 is disposed within the opening 270, refer to Figure 4A . At least one bonding substrate 450 and one metal layer 422 are disposed on the circuit substrate 210, such that the bonding substrate 450 and the metal layer 422 cover the embedded structure 290. Figure 4A illustrates the arrangement of two bonding substrates 450. The bonding substrate 450 is positioned between the metal layer 422 and the circuit substrate 210. Subsequently, the circuit substrate 210, bonding substrate 250, circuit substrate 230, bonding substrate 450, and metal layer 422 are pressed together by thermal compression to form the initial circuit substrate 420.

It is worth noting that, referring to both Figures 2B and 4B , the difference between the width w1 of opening 270 and the width w2 of embedded structure 290 is greater than 0.4 mm. Consequently, a gap (not shown) forms between the inner surface of opening 270 and the side surface of embedded structure 290. Bonding substrates 250, 350, and 450 may be prepregs made of a low-expansion material, and the glass transition temperature ( _Tg ) of these bonding substrates may be within the range of 200°C to 230°C. Therefore, when the process temperature of the thermal compression bonding reaches (or even exceeds) the range of 100°C to 140°C, the bonding substrate is heated and becomes fluid, filling the gap between the inner surface of the opening 270 and the side surface of the embedded structure 290. Furthermore, to achieve better insulation, in some embodiments, the number of bonding substrates 250 (or bonding substrates 350 or bonding substrates 450) may be two or more.

In this embodiment, the method for manufacturing the embedded component circuit board 100 further includes: after forming the initial circuit substrate 420, the tape 205 may be removed to expose the end surface 140e of the conductive structure 140, and the surface 230s of the circuit substrate 230 is flush with the end surface 140e of the conductive structure 140.

Referring to Figure 4B , after forming the initial circuit substrate 420, a plurality of conductive blind vias 113v can be formed in the initial circuit substrate 420 through mechanical grinding, mechanical drilling, and electroplating. The metal layer 422 is electrically connected to the embedded structure 290 (indicated in the figure) through these conductive blind vias 113v.

After forming the conductive blind vias 113v, the metal layer 422 can be patterned through lithography and etching to form the circuit layer 122a shown in FIG. This converts the initial circuit substrate 420 into the circuit substrate 120 shown in FIG. The method for manufacturing the embedded component circuit board 100 of this embodiment further includes forming plated through-holes 190 in the circuit substrate 120 through methods such as mechanical drilling and electroplating after patterning the metal layer 422 to form the circuit layer 122a. At this point, the embedded component circuit board 100 shown in FIG. 1 is substantially formed.

In summary, when the source (and gate) and drain of an electronic component in an embedded component circuit board are located on opposite sides of the electronic component, a conductive structure with a recess is provided in the circuit substrate, and the electronic component is placed within the recess of the conductive structure. This allows both the source and drain of the electronic component to be electrically connected to the same side of the circuit substrate. In other words, the source of the electronic component is connected to a circuit layer located on one side of the circuit substrate, while the drain of the electronic component is connected to the conductive structure. Because the conductive structure is limited to electrically connecting to the aforementioned circuit layer, the drain of the electronic component can also be connected (through the conductive structure) only to this circuit layer. In this way, since the source and drain of the electronic component are both electrically connected to the same side of the circuit substrate, it can improve the convenience of performing electrical measurements during the circuit board manufacturing process, thereby improving the circuit board process yield.

On the other hand, the end faces of the conductive structure are exposed on the surface of the circuit substrate. Since the electronic components are connected to the conductive structure, the rate at which heat generated by the electronic components is transferred to the external environment through the conductive structure is increased, thereby improving the heat dissipation efficiency of the circuit board with embedded electronic components. This reduces the heat energy accumulated in the electronic components and helps to increase the lifespan of the electronic components.

Although the embodiments of the present invention have been disclosed above, they are not intended to limit the embodiments of the present invention. Anyone with ordinary skill in the art may make minor changes and modifications without departing from the spirit and scope of the embodiments of the present invention. Therefore, the scope of protection of the embodiments of the present invention shall be determined by the scope of the attached patent application.

100: Embedded component circuit board

103v: Conductive buried vias

110: Solder mask

113v: Conductive blind vias

120:Circuit substrate

120f, 120s: Surface

122a, 122b, 122c, 122d, 122e: Circuit layer

124a,124b: Insulating layer

126: Insulation Materials

140:Conductive structure

140e: End face

142: Groove

142b: Bottom surface

144a,144b: Metal layer

146: Thermal insulation layer

160: Electronic components

160d: Drain

160g: Gate

160s: Source

165: Subject

165f, 165s: plane

180: Metal sintered layer

190: Electroplated through-holes

Claims (9)

A circuit board with embedded components comprises: A circuit substrate comprising: A circuit layer disposed on a first surface of the circuit substrate; A conductive structure embedded in the circuit substrate and electrically connected to the circuit layer of the circuit substrate, wherein the conductive structure has a groove with an opening facing the first surface of the circuit substrate, wherein the conductive structure further comprises: A first metal layer, wherein the groove of the conductive structure is located in the first metal layer; A thermally conductive insulating layer disposed on the first metal layer, wherein the first metal layer is located between the thermally conductive insulating layer and the circuit layer of the circuit substrate; and A second metal layer disposed on the thermally conductive insulating layer, with an end surface of the conductive structure located on the second metal layer, wherein the thermally conductive insulating layer is located between the first metal layer and the second metal layer, and there is no direct electrical connection between the second metal layer and the first metal layer; and an electronic component connected to the first metal layer and disposed in the recess of the conductive structure, wherein a source and a gate of the electronic component are electrically connected to the circuit layer, and a drain of the electronic component is electrically connected to the conductive structure, and the drain is located away from the first surface. The embedded component circuit board of claim 1, wherein the circuit substrate further comprises: An insulating material covering the conductive structure and the electronic component, wherein the circuit layer covers the insulating material, and a portion of the insulating material is located between the circuit layer and the groove of the conductive structure. The embedded component circuit board of claim 1, wherein the electronic component further comprises: A body disposed on a bottom surface of the recess, wherein the source and gate of the electronic component are located on a first plane of the body, and the drain of the electronic component is located on a second plane of the body, wherein the first plane and the second plane are located on opposite sides of the body, and the second plane faces the bottom surface of the recess. The embedded component circuit board of claim 3 further comprises: A metal sintered layer disposed on the bottom surface of the recess and between the conductive structure and the electronic component, wherein the electronic component is electrically connected to the conductive structure via the metal sintered layer. The embedded component circuit board as described in claim 1, wherein the end surface of the conductive structure is exposed on a second surface of the circuit substrate, and the first surface and the second surface of the circuit substrate are respectively located on opposite sides of the circuit substrate. The embedded component circuit board as described in claim 1, wherein the thermal conductivity coefficient of the thermally conductive insulation layer is greater than 10W/mK. A method for manufacturing a circuit board with embedded components comprises: providing a first circuit substrate; disposing a second circuit substrate and at least one first bonding substrate on the first circuit substrate, wherein the first bonding substrate is located between the first circuit substrate and the second circuit substrate; removing a portion of the first circuit substrate, a portion of the second circuit substrate, and a portion of the first bonding substrate to form an opening in the first circuit substrate, the second circuit substrate, and the first bonding substrate, wherein the opening connects the first circuit substrate, the second circuit substrate, and the first bonding substrate; providing an embedded structure, wherein the embedded structure comprises: a conductive structure having a groove, wherein the conductive structure further comprises: a first metal layer, wherein the groove of the conductive structure is located in the first metal layer; a thermally conductive insulating layer disposed on the first metal layer; and A second metal layer disposed on the thermally conductive insulating layer, with an end surface of the conductive structure located on the second metal layer, wherein the thermally conductive insulating layer is located between the first metal layer and the second metal layer, and there is no direct electrical connection between the second metal layer and the first metal layer; and An electronic component connected to the first metal layer and disposed within the recess of the conductive structure, wherein a drain of the electronic component is disposed on a bottom surface of the recess, and a source and a gate of the electronic component are disposed remote from the bottom surface of the recess, wherein the drain of the electronic component is electrically connected to the conductive structure; The embedded structure is disposed within the opening; After the embedded structure is disposed within the opening, at least one second bonding substrate and a third metal layer are disposed on the first circuit substrate, such that the second bonding substrate and the third metal layer cover the embedded structure and the second bonding substrate is located between the third metal layer and the first circuit substrate. The first circuit substrate, the first bonding substrate, the second circuit substrate, the second bonding substrate, and the third metal layer are pressed together to form an initial third circuit substrate. After forming the initial third circuit substrate, a plurality of conductive blind vias are formed in the initial third circuit substrate, wherein the third metal layer is electrically connected to the embedded structure through the conductive blind vias. After forming the conductive blind vias, the third metal layer is patterned to form a first circuit layer, and the initial third circuit substrate is transformed into a third circuit substrate, wherein the first circuit layer is electrically connected to the conductive structure and the electronic component, and the first metal layer is located between the thermally conductive insulation layer and the first circuit layer of the third circuit substrate. The method of claim 7, wherein the embedded structure is formed by: providing a conductive substrate; removing a portion of the conductive substrate to form the recess on the conductive substrate; placing the electronic component in the recess of the conductive substrate; after placing the electronic component in the recess, attaching at least a third bonding substrate and a fourth metal layer to a first surface of the conductive substrate so that the third bonding substrate forms an insulating material, the insulating material and the fourth metal layer covering the electronic component and the recess, wherein the insulating material is located between the fourth metal layer and the conductive substrate; After laminating the third bonding substrate and the fourth metal layer to the first surface of the conductive substrate, a plurality of conductive buried vias are formed in the insulating material and the fourth metal layer, wherein the fourth metal layer is electrically connected to the conductive substrate and the electronic component through the conductive buried vias. After forming the conductive buried vias, the fourth metal layer is patterned to form a second circuit layer. After forming the second circuit layer, the second circuit layer, the insulating material, and the conductive substrate are cut along a normal to the second circuit layer to form the embedded structure. The method of claim 7, wherein disposing the embedded structure within the opening comprises: Attaching a tape to a second surface of the second circuit substrate, wherein the second circuit substrate is positioned between the tape and the first bonding substrate, and the tape overlaps the opening; After attaching the tape to the second surface of the second circuit substrate, disposing the embedded structure on the tape, wherein the opening of the recess of the conductive structure faces away from the tape; and After forming the initial third circuit substrate, removing the tape to expose the end surface of the conductive structure, with the second surface of the second circuit substrate being flush with the end surface of the conductive structure.