TWI898407B - Liquid crystal reflective array structure - Google Patents
Liquid crystal reflective array structureInfo
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Abstract
Description
本發明是有關一種液晶陣列反射結構,特別是一種具有在任一接收端形成波束成形、高指向性的反射性能,並能達成實時重構之液晶陣列反射結構。The present invention relates to a liquid crystal array reflective structure, and in particular to a liquid crystal array reflective structure having a high directivity reflective performance and capable of real-time reconstruction, with beamforming at any receiving end.
頻率選擇面(Frequency selective surface ,FSS)的發明使知具有週期性金屬結構的設計可以減少訊號干擾並且使特定頻段通過進而濾除其餘波段,並提升訊雜比,故被廣泛運用在雷達、天線等設備上應用。The invention of the frequency selective surface (FSS) has made it possible to design a periodic metal structure that can reduce signal interference, allow specific frequency bands to pass, filter out the remaining bands, and improve the signal-to-noise ratio. As a result, it has been widely used in equipment such as radar and antennas.
當反射式頻率選擇面的陣列結構被發現並應用在天線上後更是使天線有了高增益、低結構複雜性、低成本且平面式結構的優點。然而固定相位的反射波使其成為了缺點。When the reflective frequency-selective surface array structure was discovered and applied to antennas, it provided the advantages of high gain, low structural complexity, low cost, and a planar structure. However, the fixed phase of the reflected wave became a disadvantage.
電磁波在經由四大傳播模式(直射,繞射,穿透跟反射)時,會經過障礙物,像現實生活中的牆壁,樹,車子,甚至是空氣,在這些物體都會有介電常數以及介電損耗,它會影響電磁波傳播的效能。When electromagnetic waves propagate through the four major modes (direct radiation, diffraction, penetration, and reflection), they pass through obstacles such as walls, trees, cars, and even air in real life. These objects have dielectric constants and dielectric losses, which affect the efficiency of electromagnetic wave propagation.
在現今5G的時代,行動通訊頻段越高,通訊速度越快,頻寬更大,但相對越高頻段的電磁波繞射性能越差,這也是為什麼現今5G通訊需要廣設基地台,透過基地台與天線接收進入到室內,因為5G電磁波並無法直接繞射跟穿透牆壁到我們每個使用者,然而廣設基地台所需的成本往往不如預期。In today's 5G era, higher mobile communication frequency bands offer faster speeds and greater bandwidth, but these bands also have poorer electromagnetic wave diffraction performance. This is why 5G communications require widespread deployment of base stations, which transmit signals indoors through base stations and antennas. 5G electromagnetic waves cannot directly diffract or penetrate walls to reach individual users. However, the cost of deploying base stations is often lower than expected.
陣列天線反射面用來提升電磁波傳播過程中的效能,應用在天線更能提升增益與指向性。解決了電磁波直射穿透損耗的問題,透過改變天線電極單元大小以改變相位使進行相位補償,達到了反射相位一致的效果,解決了波束成形與低增益的問題。Array antenna reflectors are used to enhance electromagnetic wave propagation efficiency. Their application in antennas can improve gain and directivity. This solves the problem of electromagnetic wave penetration loss. By varying the size of the antenna electrode units and thus the phase compensation, phase alignment is achieved, resolving beamforming and low gain issues.
然而,傳統反射面之天線電極單元,由於無法隨時改變大小,固定的反射相位成為陣列天線反射面的主要問題。However, the antenna electrode units of traditional reflectors cannot be resized at any time, and the fixed reflection phase becomes the main problem of array antenna reflectors.
因此,本案液晶陣列反射結構,能夠透過連接電壓控制器改變電壓,以改變液晶介電係數不同,使多個反射單元之調整後的相位可聚焦於接收端,如此將不需透過改變導電貼片大小產生預設電磁波反射方向,因此本發明應為一最佳解決方案。Therefore, the liquid crystal array reflective structure of this invention can change the voltage by connecting to a voltage controller to change the dielectric constant of the liquid crystal, so that the adjusted phase of multiple reflective units can be focused on the receiving end. This will eliminate the need to produce a preset electromagnetic wave reflection direction by changing the size of the conductive patch, and therefore this invention should be an optimal solution.
一種液晶陣列反射結構,係包括:一第一基板層,係於一表面上係設置排列有數個第一導電貼片,其中每兩個上下排列之第一導電貼片係進行連接,該第一基板層係區隔出多個第一表面單元,而該第一表面單元係對應於至少一個第一導電貼片之位置;一第二基板層,係於任一表面上設置排列有數個第二導電貼片或數個第三導電貼片,或是於不同表面上分別設置排列數個第二導電貼片及數個第三導電貼片,其中該第二導電貼片之位置係對於該第三導電貼片之位置,該第二基板層係區隔出多個第二表面單元,而該第二表面單元係對應於至少一個第二導電貼片或/及至少一個第三導電貼片之位置;以及一液晶層,係位於該第一基板層與該第二基板層之間,而該液晶層上係具有一格狀間隔物,該格狀間隔物用以區隔出多個液晶區域;其中,每一個液晶區域係對應於該第一基板層之第一表面單元及該第二基板層之第二表面單元,並透過該第一表面單元、該第二表面單元、該第一導電貼片、該第三導電貼片或/及該第二導電貼片形成一反射單元。A liquid crystal array reflective structure includes: a first substrate layer, on which a plurality of first conductive patches are arranged and arranged, wherein every two first conductive patches arranged one above the other are connected, and the first substrate layer is divided into a plurality of first surface units, and the first surface units correspond to the position of at least one first conductive patch; a second substrate layer, on which a plurality of second conductive patches or a plurality of third conductive patches are arranged and arranged on any surface, or a plurality of second conductive patches and a plurality of third conductive patches are arranged and arranged on different surfaces, wherein the position of the second conductive patch is corresponding to the position of the third conductive patch, and the second conductive patches are arranged and arranged on different surfaces, respectively. The substrate layer is divided into a plurality of second surface units, and the second surface units correspond to the positions of at least one second conductive patch and/or at least one third conductive patch; and a liquid crystal layer is located between the first substrate layer and the second substrate layer, and the liquid crystal layer has a grid spacer, which is used to separate a plurality of liquid crystal regions; wherein each liquid crystal region corresponds to the first surface unit of the first substrate layer and the second surface unit of the second substrate layer, and a reflective unit is formed by the first surface unit, the second surface unit, the first conductive patch, the third conductive patch and/or the second conductive patch.
更具體的說,所述第二基板層係設置有至少一個穿孔,該穿孔內部係填充有一導體材料,用以使該第二導電貼片與該第三導電貼片能夠電性連接,該導體材料係為一具有導電特性的金屬材料。More specifically, the second substrate layer is provided with at least one through-hole, the interior of which is filled with a conductive material for electrically connecting the second conductive patch and the third conductive patch, and the conductive material is a metal material with conductive properties.
更具體的說,所述液晶陣列反射結構,更包含有一第一電壓控制器及一第二電壓控制器,該第一電壓控制器用以連接數個第一導電貼片,用以提供一第一電壓值,該第二電壓控制器用以連接數個第二導電貼片或數個第三導電貼片,用以提供一第二電壓值,其中任一個第一導電貼片之第一電壓值,與該第一導電貼片對應之該第二導電貼片或該第三導電貼片的第二電壓值具有一電壓差值。More specifically, the liquid crystal array reflective structure further includes a first voltage controller and a second voltage controller. The first voltage controller is used to connect to a plurality of first conductive patches to provide a first voltage value, and the second voltage controller is used to connect to a plurality of second conductive patches or a plurality of third conductive patches to provide a second voltage value. The first voltage value of any first conductive patch has a voltage difference with the second voltage value of the second conductive patch or the third conductive patch corresponding to the first conductive patch.
更具體的說,所述電壓差值之改變,用以使該反射單元之液晶區域之液晶長軸分子轉向,並使該液晶區域之介電係數變化,以個別改變每個反射單元的相位,以改變該反射單元之反射方向。More specifically, the change in the voltage difference is used to rotate the long axis molecules of the liquid crystal region of the reflective unit and change the dielectric constant of the liquid crystal region to individually change the phase of each reflective unit and thus change the reflection direction of the reflective unit.
更具體的說,所述第一電壓控制器用以使該數個第一導電貼片具有不同或相同的第一電壓值,該第二電壓控制器用以使該數個第二導電貼片或是數個第三導電貼片具有不同或相同的第二電壓值。More specifically, the first voltage controller is used to make the first conductive patches have different or the same first voltage values, and the second voltage controller is used to make the second conductive patches or the third conductive patches have different or the same second voltage values.
更具體的說,所述第一導電貼片、該第二導電貼片、該第三導電貼片之形狀係為矩形、十字形、框形、圓形或是狹縫。More specifically, the shapes of the first conductive patch, the second conductive patch, and the third conductive patch are rectangular, cross, frame, circular, or slit.
更具體的說,所述液晶陣列反射結構,更包含有一第一配向層及一第二配向層,該第一配向層係位於該第一基板層與該液晶層之間,該第二配向層係位於該液晶層與該第二基板層之間。More specifically, the liquid crystal array reflective structure further includes a first alignment layer and a second alignment layer. The first alignment layer is located between the first substrate layer and the liquid crystal layer, and the second alignment layer is located between the liquid crystal layer and the second substrate layer.
更具體的說,所述第一表面單元內係對應數個第一導電貼片,而數個第一導電貼片係以縱向及橫向進行連接為一第一導電貼片組,其中該第一導電貼片組內的每兩個第一導電貼片之橫向間隔距離及每一個第一導電貼片(第一導電貼片中心之傾斜對應反射角度),用以改變該第一表面單元所對應之反射單元的電磁波出射方向。More specifically, the first surface unit corresponds to a plurality of first conductive patches, which are connected vertically and horizontally to form a first conductive patch group. The horizontal spacing between every two first conductive patches in the first conductive patch group and each first conductive patch (the tilt of the center of the first conductive patch corresponds to the reflection angle) are used to change the electromagnetic wave emission direction of the reflective unit corresponding to the first surface unit.
更具體的說,所述每一個液晶區域之中心位置係對應於該第一表面單元之中心位置及該第二表面單元之中心位置,而該第一導電貼片、該第二導電貼片、該第三導電貼片之中心位置係對應於該液晶區域之中心位置。More specifically, the center position of each liquid crystal area corresponds to the center position of the first surface unit and the center position of the second surface unit, and the center positions of the first conductive patch, the second conductive patch, and the third conductive patch correspond to the center position of the liquid crystal area.
有關於本發明其他技術內容、特點與功效,在以下配合參考圖式之較佳實施例的詳細說明中,將可清楚的呈現。Other technical contents, features and effects of the present invention will be clearly presented in the following detailed description of the preferred embodiments with reference to the drawings.
請參閱第1A~1F圖,為分解示意圖、組合示意圖、剖面示意圖、第一表面單元之範圍示意圖、第二表面單元之範圍示意圖,由圖中可知,液晶陣列反射結構係包括一第一基板層1、一第二基板層2及一液晶層3,該第一基板層1與該第二基板層2係平行對置。Please refer to Figures 1A to 1F, which are a schematic diagram of an exploded view, a schematic diagram of an assembled view, a schematic diagram of a cross-section, a schematic diagram of the scope of a first surface unit, and a schematic diagram of the scope of a second surface unit. As can be seen from the figures, the liquid crystal array reflective structure includes a first substrate layer 1, a second substrate layer 2, and a liquid crystal layer 3. The first substrate layer 1 and the second substrate layer 2 are parallel and opposite.
該第一基板層1及該第二基板層2係為PCB板、玻璃基板、低介電損耗板或是陶瓷基板。The first substrate layer 1 and the second substrate layer 2 are PCB boards, glass substrates, low dielectric loss boards or ceramic substrates.
該第一基板層1與該第二基板層2係重疊對向,且尺寸大小一致,該第一基板層1與該第二基板層2之長度與寬度能夠設定為發射頻率的半波長(但實際使用不限於半波長),該第一基板層1與該第二基板層2之高度能夠設定為發射頻率的四分之一波長(但實際使用不限於四分之一波長),其中發射頻率為天線發射頻率內設計的頻率在自由空間的波長。The first substrate layer 1 and the second substrate layer 2 overlap and oppose each other, and have identical dimensions. The length and width of the first substrate layer 1 and the second substrate layer 2 can be set to half a wavelength of the transmission frequency (but actual use is not limited to half a wavelength), and the height of the first substrate layer 1 and the second substrate layer 2 can be set to a quarter wavelength of the transmission frequency (but actual use is not limited to a quarter wavelength). The transmission frequency is the wavelength of the designed frequency within the antenna transmission frequency in free space.
該第二基板層2係設置有至少一個穿孔20,該穿孔20係位於該第二表面單元211之中心位置,該穿孔20內部係填充(填滿)有一導體材料200,用以使該第二導電貼片2111與該第三導電貼片2211能夠電性連接,該導體材料係為一具有導電特性的金屬材料;其中第二導電貼片2111與第三導電貼片2211透過穿孔20連接,因此相連接之第二導電貼片2111與第三導電貼片2211之電壓為相同。The second substrate layer 2 is provided with at least one through-hole 20, which is located at the center of the second surface unit 211. The through-hole 20 is filled with a conductive material 200 to electrically connect the second conductive patch 2111 and the third conductive patch 2211. The conductive material is a metal material with conductive properties. The second conductive patch 2111 and the third conductive patch 2211 are connected through the through-hole 20, so the voltage of the connected second conductive patch 2111 and the third conductive patch 2211 is the same.
本案於基板表面上具有表面單元,並於表面單元內設置貼片,但由於避免圖面線條過於複雜,故並未於第1A及1B圖中顯示表面單元的虛線,而僅顯示表面單元內的貼片,並分別於第1D、1E及1F圖中顯示說明。This case has a surface unit on the surface of the substrate and a patch is set within the surface unit. However, to avoid overly complex lines in the drawings, the dotted lines of the surface unit are not shown in Figures 1A and 1B. Instead, only the patch within the surface unit is shown, and the explanations are shown in Figures 1D, 1E, and 1F, respectively.
該第一基板層1係於第一表面11上分配出多個第一表面單元111,並由多個第一表面單元111以陣列方式排列形成一第一表面層。The first substrate layer 1 is provided with a plurality of first surface units 111 on the first surface 11, and the plurality of first surface units 111 are arranged in an array to form a first surface layer.
如第1D圖所示,本案第一表面單元111是一個預設的空間區域,用以分配第一表面11的可用空間,同時更方便於設計第一表面單元111內部貼片的尺寸,如第1D圖所示,每一個第一表面單元111內係具有第一導電貼片1111(金屬材質,例如銅箔,其厚度為0.035mm),而任兩個上下排列之第一導電貼片1111係能夠進行串接,以組成一第一導電貼片組112,而每兩個第一導電貼片組112之間具有一間隙。As shown in FIG1D , the first surface unit 111 of the present invention is a preset space area used to allocate the available space of the first surface 11 and to facilitate the design of the size of the internal patch of the first surface unit 111. As shown in FIG1D , each first surface unit 111 has a first conductive patch 1111 (metal material, such as copper foil, with a thickness of 0.035 mm), and any two first conductive patches 1111 arranged vertically can be connected in series to form a first conductive patch group 112, and there is a gap between each two first conductive patch groups 112.
進一步說明,由於第一導電貼片組112係由多個第一導電貼片1111串接形成,故僅一個第一導電貼片1111連接電壓源,該第一導電貼片組112內的多個第一導電貼片1111係皆有相同的第一電壓值,而不同的第一導電貼片組112內的多個第一導電貼片1111,其第一電壓值能夠相同或是不同。To further explain, since the first conductive patch group 112 is formed by multiple first conductive patches 1111 connected in series, only one first conductive patch 1111 is connected to the voltage source. The multiple first conductive patches 1111 in the first conductive patch group 112 all have the same first voltage value, and the multiple first conductive patches 1111 in different first conductive patch groups 112 can have the same or different first voltage values.
該第二基板層2係於第二上表面21分配出多個第二表面單元211,並由多個第二表面單元211以陣列方式排列形成一第二表面層。The second substrate layer 2 is provided with a plurality of second surface units 211 on the second upper surface 21 , and the plurality of second surface units 211 are arranged in an array to form a second surface layer.
如第1E圖所示,本案第二表面單元211是一個預設的空間區域,用以分配第二上表面21上的可用空間,同時更方便於設計第二表面單元211內部貼片的尺寸,如第1E圖所示,每一個第二表面單元211內係具有第二導電貼片2111(金屬材質,例如銅箔),其中每兩個第二導電貼片2111之間係具有一間隙。As shown in FIG1E , the second surface unit 211 of the present invention is a preset space area used to allocate the available space on the second upper surface 21 , and at the same time, it is more convenient to design the size of the internal patch of the second surface unit 211 . As shown in FIG1E , each second surface unit 211 has a second conductive patch 2111 (metal material, such as copper foil), and there is a gap between every two second conductive patches 2111 .
該第二基板層2係於第二下表面22分配出多個第三表面單元221,並由多個第三表面單元221以陣列方式排列形成一第三表面層。The second substrate layer 2 is provided with a plurality of third surface units 221 on the second lower surface 22 , and the plurality of third surface units 221 are arranged in an array to form a third surface layer.
如第1F圖所示,本案第三表面單元221是一個預設的空間區域,用以分配第二下表面22上的可用空間,同時更方便於設計第三表面單元221內部貼片的尺寸,如第1E圖所示,每一個第三表面單元221內係具有第三導電貼片2211(金屬材質,例如銅箔),其中該第二導電貼片2111之位置係對於該第三導電貼片2211之位置,其中每兩個第三導電貼片2211之間係具有一間隙。As shown in FIG1F , the third surface unit 221 of the present invention is a preset space area used to allocate the available space on the second lower surface 22 , and is more convenient for designing the size of the internal patch of the third surface unit 221 . As shown in FIG1E , each third surface unit 221 has a third conductive patch 2211 (metal material, such as copper foil), wherein the position of the second conductive patch 2111 is corresponding to the position of the third conductive patch 2211 , and there is a gap between every two third conductive patches 2211 .
如第2A圖所示,該第一導電貼片1111之貼片中心圖案設計係為矩形(a)、框形(b)、十字狹縫(c)、十字形(d)、菱形(e)、圓形(f),由於每兩個上下排列之第一導電貼片1111要進行串接,如第1A圖所示,每一個第一導電貼片1111上下端皆具有矩形線1112。As shown in FIG2A , the center pattern design of the first conductive patch 1111 is a rectangle (a), a frame (b), a cross slit (c), a cross (d), a diamond (e), or a circle (f). Since every two first conductive patches 1111 arranged vertically are connected in series, as shown in FIG1A , each first conductive patch 1111 has a rectangular line 1112 at its upper and lower ends.
如第2B圖所示,該第二導電貼片2111之形狀係為矩形(a)、框形(b)、十字狹縫(c)、十字形(d)、菱形(e)、圓形(f)。As shown in FIG. 2B , the shapes of the second conductive patch 2111 are rectangle (a), frame (b), cross slit (c), cross (d), diamond (e), and circle (f).
如第3圖所示,該第一表面單元111係對應於至少一個第一導電貼片1111之位置,而該第一表面單元111之長度L、寬度W係大於該第一導電貼片1111之長度L1、寬度L2(而長度L1加上兩個矩形線1112之長度係等於長度L,另外第一表面單元111之長度L、寬度W亦能夠設計等於該第一導電貼片1111之長度L1、寬度L2),而每一個第二導電貼片2111之高度皆為相同。As shown in Figure 3, the first surface unit 111 corresponds to the position of at least one first conductive patch 1111, and the length L and width W of the first surface unit 111 are greater than the length L1 and width L2 of the first conductive patch 1111 (and the length L1 plus the length of the two rectangular lines 1112 is equal to the length L. In addition, the length L and width W of the first surface unit 111 can also be designed to be equal to the length L1 and width L2 of the first conductive patch 1111), and the height of each second conductive patch 2111 is the same.
如第3圖所示,該第二表面單元211係對應於該第二導電貼片2111之位置,如圖中所示,由於該第一表面單元111之長寬相同於該第二表面單元211之長寬,故藉用第一表面單元111之長寬來進行對比。As shown in FIG3 , the second surface unit 211 corresponds to the position of the second conductive patch 2111 . As shown in the figure, since the length and width of the first surface unit 111 are the same as those of the second surface unit 211 , the length and width of the first surface unit 111 are used for comparison.
如第3圖所示,該第二表面單元211之長度L、寬度W係大於該第二導電貼片2111之長度L2、寬度W2(但第二表面單元211之長度L、寬度W亦能夠設計等於該第二導電貼片2111之長度L2、寬度W2),而每一個第二導電貼片2111之高度皆為相同。As shown in Figure 3, the length L and width W of the second surface unit 211 are greater than the length L2 and width W2 of the second conductive patch 2111 (but the length L and width W of the second surface unit 211 can also be designed to be equal to the length L2 and width W2 of the second conductive patch 2111), and the height of each second conductive patch 2111 is the same.
如第3圖所示,該第三表面單元221係對應於該第三導電貼片2211之位置,如圖中所示,該第三表面單元221之長度L、寬度W係大於該第三導電貼片2211之長度L3、寬度W3(但第三表面單元221之長度L、寬度W亦能夠設計等於該第三導電貼片2211之長度L3、寬度W3),而每一個第三導電貼片2211之高度皆為相同。As shown in Figure 3, the third surface unit 221 corresponds to the position of the third conductive patch 2211. As shown in the figure, the length L and width W of the third surface unit 221 are greater than the length L3 and width W3 of the third conductive patch 2211 (but the length L and width W of the third surface unit 221 can also be designed to be equal to the length L3 and width W3 of the third conductive patch 2211), and the height of each third conductive patch 2211 is the same.
如第3圖所示之內容,進一步整理說明如下: (1) 以反射單元之表面單元的邊界虛框為最大邊長(第一表面單元111、第二表面單元211及第三表面單元221之長度L、寬度W)。 (2) 該第三導電貼片2211(長度L3、寬度W3),為小於最大邊長的形狀,其功用除了外接偏壓外,還有防止入射電磁波透射的損耗。 (3) 該第二導電貼片2111(長度L2、寬度W2),係小於或等於第三導電貼片2211的大小,目的在於不使相鄰單元下導電層相互連接。 (4) 該第一導電貼片1111(長度L1、寬度W1),其圖形設計為一側需延伸等於最大邊長,其餘無限制,目的在於使一側相鄰單元的第一導電貼片1111之間相互連接。 The content shown in Figure 3 is further explained as follows: (1) The boundary virtual frame of the surface unit of the reflective unit is the maximum side length (the length L and width W of the first surface unit 111, the second surface unit 211 and the third surface unit 221). (2) The third conductive patch 2211 (length L3, width W3) is smaller than the maximum side length. In addition to its function of external bias, it also prevents the loss of incident electromagnetic waves from transmission. (3) The second conductive patch 2111 (length L2, width W2) is smaller than or equal to the size of the third conductive patch 2211. The purpose is to prevent the conductive layers under adjacent units from being connected to each other. (4) The first conductive patch 1111 (length L1, width W1) is designed so that one side needs to extend to the maximum side length, and the rest is unlimited. The purpose is to connect the first conductive patches 1111 of adjacent units on one side to each other.
於本實施例中,係將多個第一導電貼片1111之長度與寬度設計為相同(每一個第一導電貼片1111之厚度亦設計為相同),但若應用於不同實施例,多個第一導電貼片1111之長度、寬度、厚度之任一或任多參數係能夠不同。In this embodiment, the length and width of the multiple first conductive patches 1111 are designed to be the same (the thickness of each first conductive patch 1111 is also designed to be the same), but if applied to different embodiments, any one or more parameters of the length, width, and thickness of the multiple first conductive patches 1111 can be different.
於本實施例中,係將該第三導電貼片2211之長度、寬度設計大於或等於該第二導電貼片2111之長度、寬度(該第二導電貼片2111與該第三導電貼片2211之厚度係設計為相同),但若應用於不同實施例,長度、寬度、厚度之任一或任多參數係能夠不同。In this embodiment, the length and width of the third conductive patch 2211 are designed to be greater than or equal to the length and width of the second conductive patch 2111 (the thickness of the second conductive patch 2111 and the third conductive patch 2211 are designed to be the same), but if applied to different embodiments, any one or more parameters of the length, width, and thickness can be different.
另外,基於電磁波的反射性能,該第一導電貼片1111、該第二導電貼片2111、該第三導電貼片2211基本上使用導體製成。亦或是具有導電性能物如氧化銦錫等金屬氧化物,其中氧化銦錫普遍做於ITO,為一透明導電物質。In addition, based on the reflection properties of electromagnetic waves, the first conductive patch 1111, the second conductive patch 2111, and the third conductive patch 2211 are generally made of a conductor, or a conductive material such as metal oxides such as indium tin oxide. Indium tin oxide is commonly used in ITO and is a transparent conductive material.
另外,該第一導電貼片1111、該第二導電貼片2111、該第三導電貼片2211皆能夠做為反射面使用,用以避免電磁波洩漏。In addition, the first conductive patch 1111, the second conductive patch 2111, and the third conductive patch 2211 can all be used as reflective surfaces to prevent electromagnetic wave leakage.
另外,每兩個第一導電貼片組112之間並無電阻器連接,而每兩個第一導電貼片1111也無電阻器連接。In addition, there is no resistor connection between every two first conductive patch groups 112, and there is no resistor connection between every two first conductive patches 1111.
該液晶層3係位於該第一基板層1與該第二基板層2之間,而該液晶層3間係具有一格狀間隔物31,該格狀間隔物31用以區隔出多個液晶區域32。The liquid crystal layer 3 is located between the first substrate layer 1 and the second substrate layer 2 . A lattice spacer 31 is provided in the liquid crystal layer 3 . The lattice spacer 31 is used to separate a plurality of liquid crystal regions 32 .
該液晶層3於本實施例中,所使用材料為熱致型長條狀相列型的液晶。In this embodiment, the liquid crystal layer 3 is made of thermotropic elongated nematic liquid crystal.
該液晶區域32之中心位置係對應於該第一表面單元111之中心位置及該第二表面單元211之中心位置,而該第一導電貼片1111、該第二導電貼片2111、該第三導電貼片2211之中心位置係對應於該液晶區域32之中心位置。The center position of the liquid crystal region 32 corresponds to the center position of the first surface unit 111 and the center position of the second surface unit 211 , and the center positions of the first conductive patch 1111 , the second conductive patch 2111 , and the third conductive patch 2211 correspond to the center position of the liquid crystal region 32 .
該液晶層3之頂面與底面係分別具有一第一配向層41及一第二配向層42,該第一配向層41係位於該第一基板層1與該液晶層3之間,該第二配向層42係位於該液晶層3與該第二基板層2之間,如第4圖所示,該第一配向層41與該第二配向層42之配向方向相同,而該液晶層3之液晶分子方向亦與該第一配向層41與該第二配向層42之配向方向是相同方向。The top and bottom surfaces of the liquid crystal layer 3 respectively have a first alignment layer 41 and a second alignment layer 42. The first alignment layer 41 is located between the first substrate layer 1 and the liquid crystal layer 3, and the second alignment layer 42 is located between the liquid crystal layer 3 and the second substrate layer 2. As shown in Figure 4, the alignment directions of the first alignment layer 41 and the second alignment layer 42 are the same, and the direction of the liquid crystal molecules in the liquid crystal layer 3 is also the same as the alignment directions of the first alignment layer 41 and the second alignment layer 42.
該第一配向層41係為一平面,同時平行設置於該液晶層3之頂面。The first alignment layer 41 is a plane and is arranged parallel to the top surface of the liquid crystal layer 3 .
該第二配向層42係為一平面,同時平行設置於該液晶層3之底面。The second alignment layer 42 is a plane and is disposed parallel to the bottom surface of the liquid crystal layer 3 .
該第一配向層41及該第二配向層42所使用材料為絕緣物,塗佈方式為旋轉滾筒式塗佈,使用塗佈機對配向層進行同方向塗佈,進而產生預傾角,可使液晶分子長軸方向,與配向方向同方向排列,因此當並未給予電壓的狀態下(未給予電場時)能穩定排列。The first alignment layer 41 and the second alignment layer 42 are made of an insulating material and are coated using a rotary drum coating method. A coating machine is used to coat the alignment layers in the same direction, thereby generating a pre-tilt angle. This allows the long axis of the liquid crystal molecules to be aligned in the same direction as the alignment direction, so that they can be stably aligned when no voltage is applied (when no electric field is applied).
該第一配向層41及該第二配向層42之厚度,係完全覆蓋於該第一導電貼片1111、該第二導電貼片2111、該第三導電貼片2211,而間隔物的硬性材質能有效使導電貼片(該第一導電貼片1111、該第二導電貼片2111、該第三導電貼片2211)不因壓力而重疊造成電性連接,且如液晶為密封狀態,將不會因施加外力而溢出而產生誤差。The thickness of the first alignment layer 41 and the second alignment layer 42 completely covers the first conductive patch 1111, the second conductive patch 2111, and the third conductive patch 2211. The hard material of the spacer can effectively prevent the conductive patches (the first conductive patch 1111, the second conductive patch 2111, and the third conductive patch 2211) from overlapping due to pressure and causing electrical connection. If the liquid crystal is in a sealed state, it will not overflow due to the application of external force and cause errors.
由於該液晶層3之液晶為相變材料,其中可透過電,熱與光進行相變,在本發明的實施例中,使用電來進行相變。相變方式為液晶分子中長軸方向的改變,當在液晶的對向方向施加上下層偏壓時,電場具有方向性,長軸會由電場大小不同進行旋轉,旋轉時介電係數會改變,簡單說明,在液晶有效施加電壓範圍中,最大跟最小為ɛ∥與ɛ⊥,Δɛ為平行的介電係數減去垂直的介電係數,當為大於0時,此液晶稱為正型液晶,意即施偏壓後液晶分子長軸方向與電場方向平行排列。Because the liquid crystal in liquid crystal layer 3 is a phase-change material, it can undergo phase changes through electricity, heat, and light. In the embodiment of the present invention, electricity is used to induce phase change. The phase change occurs by changing the direction of the long axis of the liquid crystal molecules. When a bias voltage is applied to the upper and lower layers in opposite directions of the liquid crystal, the electric field becomes directional, and the long axis rotates due to the difference in the magnitude of the electric field. During this rotation, the dielectric constant changes. Simply put, within the effective applied voltage range of the liquid crystal, the maximum and minimum values are ɛ∥ and ɛ⊥, respectively. Δɛ is the parallel dielectric constant minus the perpendicular dielectric constant. When it is greater than 0, the liquid crystal is called a positive type liquid crystal, meaning that after the bias voltage is applied, the long axis of the liquid crystal molecules is aligned parallel to the direction of the electric field.
本案是依據電磁波的震盪方向(入射方向) 來決定配向方式,當電磁波的入射(震盪)方向是水平入射,其液晶配向方向也是水平的,電磁波會感受到水平的介電系數;而當液晶偏轉90度,會與入射電磁波呈現垂直狀態,電磁波會感受到垂直的介電系數,這時候相位跟頻率都會被改變。In this case, the alignment is determined by the electromagnetic wave's oscillation direction (incident direction). When the electromagnetic wave is incident (oscillated) horizontally, the liquid crystal alignment is also horizontal, and the electromagnetic wave experiences a horizontal dielectric constant. However, when the liquid crystal is deflected 90 degrees, becoming perpendicular to the incident electromagnetic wave, the electromagnetic wave experiences a perpendicular dielectric constant, altering both the phase and frequency.
若液晶配向方向是垂直的,電磁波也是垂直入射,當液晶偏轉時,則會與入射電磁波垂直,所以不論液晶怎麼偏轉,電磁波都是感受到垂直的介電系數,其特性完全不會改變。If the liquid crystal is aligned vertically, the electromagnetic wave is also incident vertically. When the liquid crystal deflects, it becomes perpendicular to the incident electromagnetic wave. Therefore, no matter how the liquid crystal deflects, the electromagnetic wave will feel the vertical dielectric constant, and its characteristics will not change at all.
如第1C圖所示,該液晶陣列反射結構能夠區分出多個反射單元5(圖中為了避免線條混亂,僅標示一個反射單元5),反射單元5係由上至下排列組成一單獨具有反射功能之單元,其中每一個液晶區域32係對應於該第一表面單元111、第二表面單元211及第三表面單元221,而每一個第一導電貼片1111係與該第二導電貼片2111、該第三導電貼片2211相互對應,以透過該第一表面單元111、該第二表面單元211、第三表面單元221、該第一導電貼片1111、該第二導電貼片2111、該第三導電貼片2211形成該反射單元5。As shown in FIG1C , the liquid crystal array reflective structure can distinguish a plurality of reflective units 5 (only one reflective unit 5 is shown in the figure to avoid line confusion). The reflective units 5 are arranged from top to bottom to form a single unit with a reflective function, wherein each liquid crystal region 32 corresponds to the first surface unit 111, the second surface unit 211, and the third surface unit 221, and each first conductive patch 1111 corresponds to the second conductive patch 2111 and the third conductive patch 2211, so as to form the reflective unit 5 through the first surface unit 111, the second surface unit 211, the third surface unit 221, the first conductive patch 1111, the second conductive patch 2111, and the third conductive patch 2211.
如第5A~5C圖所示,本案實施能夠連接第一電壓控制器61(或是獨立電壓源,能夠一對一控制電壓,或是一對多控制電壓)及一第二電壓控制器62(或是獨立電壓源,能夠一對一控制電壓,或是一對多控制電壓)。As shown in Figures 5A-5C, the present embodiment can connect a first voltage controller 61 (or an independent voltage source capable of one-to-one voltage control or one-to-many voltage control) and a second voltage controller 62 (or an independent voltage source capable of one-to-one voltage control or one-to-many voltage control).
該第一電壓控制器61用以連接數個第一導電貼片1111,用以提供一第一電壓值,該第二電壓控制器62用以連接數個第三導電貼片2211,用以提供一第二電壓值。The first voltage controller 61 is used to connect to a plurality of first conductive patches 1111 to provide a first voltage value, and the second voltage controller 62 is used to connect to a plurality of third conductive patches 2211 to provide a second voltage value.
該第一電壓控制器61用以使該數個第一導電貼片1111具有不同或相同的第一電壓值,於本實施例中,每一組的第一導電貼片1111僅需輸入一電壓,並透過該第一電壓控制器61進行控制第一電壓值大小。The first voltage controller 61 is used to enable the plurality of first conductive patches 1111 to have different or the same first voltage values. In this embodiment, each group of first conductive patches 1111 only needs to input a voltage, and the first voltage value is controlled by the first voltage controller 61.
該第二電壓控制器62用以使該數個第三導電貼片2211具有不同或相同的第二電壓值,於本實施例中,每一個的第三導電貼片2211皆需輸入一電壓並透過該第二電壓控制器62進行控制第二電壓值大小。The second voltage controller 62 is used to enable the plurality of third conductive patches 2211 to have different or the same second voltage values. In this embodiment, each third conductive patch 2211 needs to input a voltage and the second voltage value is controlled by the second voltage controller 62.
本實施例在液晶未改變介電係數時即電場為0時(第一電壓與第二電壓控制器未給予偏壓),入射電磁波至反射面後的反射電磁波將會有散射,反射等狀態,並無法聚焦於接收端。In this embodiment, when the dielectric constant of the liquid crystal does not change, that is, when the electric field is zero (the first voltage controller and the second voltage controller do not provide a bias), the incident electromagnetic wave will be reflected by the reflecting surface and will be scattered and reflected, and will not be able to focus on the receiving end.
由於該第一電壓值與第二電壓值具有一電壓差值,當第一電壓值與第二電壓值不同時,會產生電場,電場方向依電壓差的大小改變,進而使該反射單元5之液晶區域32之液晶長軸分子轉向,並使該液晶區域32之介電係數變化,以個別改變每個反射單元5的相位,以改變該反射單元5之反射方向,藉此達到相位補償與實時重構接收端相位,智慧變化波束成形與指向性。Because the first voltage value and the second voltage value have a voltage difference, when the first voltage value and the second voltage value are different, an electric field is generated. The direction of the electric field changes according to the magnitude of the voltage difference, thereby causing the long-axis liquid crystal molecules in the liquid crystal region 32 of the reflective unit 5 to rotate and the dielectric constant of the liquid crystal region 32 to change. This individually changes the phase of each reflective unit 5 and changes the reflection direction of the reflective unit 5, thereby achieving phase compensation and real-time reconstruction of the receiving end phase, intelligently changing beamforming and directivity.
更進一步說明,本案配向層之功能,當電場為0時(外接電壓為0),能使液晶分子均勻排列,因此當從0伏開始施加偏壓後,各單元間液晶分子偏轉,介電常數改變,使電磁波反射相位也改變,於是透過本案之設計,可以簡單的計算出接收端的反射相位,並與各單元所需補償的相位值,透過電壓控制器時實調整壓差至與補償相位值吻合,達成智慧調控的效果,即任意接收端能達成預期的天線增益與指向性。To further explain, the function of the alignment layer in this case is to uniformly align the liquid crystal molecules when the electric field is zero (the external voltage is zero). Therefore, when a bias voltage is applied starting from 0 volts, the liquid crystal molecules between each unit deflect, the dielectric constant changes, and the phase of the electromagnetic wave reflection also changes. Therefore, through this design, the reflection phase at the receiver can be easily calculated and combined with the phase value required for compensation of each unit. Through the voltage controller, the voltage difference is adjusted in real time to match the compensated phase value, achieving the effect of intelligent regulation, that is, any receiving end can achieve the expected antenna gain and directivity.
因此,透過調整電壓差值,則能夠使每個反射單元5的相位可依需求達到控制,並聚焦於接收端。Therefore, by adjusting the voltage difference, the phase of each reflector unit 5 can be controlled as required and focused on the receiving end.
進一步說明第5A圖,第一導電貼片1111以排列方式連接,其排列導電層個別外接一電壓源於第一電壓控制器61而有一第一電壓值,如圖所示,由左排列至右排列,其第一電壓值個別為V1至V5。Further explaining FIG. 5A , the first conductive patches 1111 are connected in an array, and each of the arrayed conductive layers is externally connected to a voltage source from the first voltage controller 61 and has a first voltage value. As shown in the figure, from left to right, the first voltage values are V1 to V5.
進一步說明第5B圖,由於第二電壓控制器62會連接每一個第三導電貼片2211,故線條會非常混亂,因此於圖中框出一範圍來表示「第二電壓控制器62連接每一個第三導電貼片2211」。Further explaining FIG. 5B , since the second voltage controller 62 is connected to each third conductive patch 2211 , the lines are very confusing, so a region is framed in the figure to indicate that “the second voltage controller 62 is connected to each third conductive patch 2211 .”
進一步說明第5B圖,第二導電貼片2111與第三導電貼片2211,其為個別排列並無互相連接,其第二導電貼片2111透過穿孔20連接第三導電貼片2211,該第三導電貼片2211亦是個別外接該第二電壓控制器62而有一第二電壓值,如圖所示,由左邊個別排列至右邊個別排列,其第二電壓值分別為V6至V30。Further explaining Figure 5B, the second conductive patch 2111 and the third conductive patch 2211 are individually arranged and not connected to each other. The second conductive patch 2111 is connected to the third conductive patch 2211 through the through hole 20. The third conductive patch 2211 is also individually connected to the second voltage controller 62 and has a second voltage value. As shown in the figure, from the left to the right, the second voltage values are V6 to V30 respectively.
由第5A~5C圖可知,本實施例舉例第一反射單元至第n反射單元(在此示意圖中只至第三十反射單元,但實際不限於此),其第一單元的第一電壓差值,是反射單元5之第一導電貼片1111與第三導電貼片2211所產生,其壓差個別為1(V1,V6) , 2(V1,V7) , 3(V1,V8) , 4(V1,V9) , 5(V1,V10) , 6(V2,V11) , 7(V2,V12) , 8(V2,V13) , 9(V2,V14) , 10(V2,V15) , 11(V3,V16) , 12(V3,V17) , 13(V3,V18) , 14(V3,V19) , 15(V3,V20) , 16(V4,V21) , 17(V4,V22) , 18(V4,V23) , 19(V4,V24) , 20(V4,V25) , 21(V5,V26) , 22(V5,V27) , 23(V5,V28) , 24(V5,V29) , 25(V5,V30) ,以此類推,其中括弧前為第某個單元表示,括弧內左為第一導電貼片1111排列外接第一電壓控制器61之第一電壓值,右為第三導電貼片2211個別排列外接第二電壓控制器62之第二電壓值。As can be seen from Figures 5A to 5C, this embodiment exemplifies the first reflective unit to the nth reflective unit (in this schematic diagram, only up to the 30th reflective unit, but not limited to this). The first voltage difference of the first unit is generated by the first conductive patch 1111 and the third conductive patch 2211 of the reflective unit 5. The voltage differences are 1(V1, V6), 2(V1, V7), 3(V1, V8), 4(V1, V9), 5(V1, V10), 6(V2, V11), 7(V2, V12), 8(V2, V13), 9(V2, V14), 10(V2, V15), 11(V3, V16), 12(V3, V17), 13(V3,V18) , 14(V3,V19) , 15(V3,V20) , 16(V4,V21) , 17(V4,V22) , 18(V4,V23) , 19(V4,V24) , 20(V4,V25) , 21(V5,V26) , 22(V5,V27) , 23(V5,V28) , 24(V5,V29) , 25(V5,V30) , and so on, where the number before the bracket is a certain unit representation, the left side of the bracket is the first voltage value of the first conductive patch 1111 arranged externally connected to the first voltage controller 61, and the right side is the second voltage value of the third conductive patch 2211 arranged individually and externally connected to the second voltage controller 62.
上述5A~5C圖,是一種實施樣態,第一電壓控制器61於第一導電貼片組(包含多個第一導電貼片1111)輸入第一電壓值,第二電壓控制器62於個別的第三導電貼片2211輸入第二電壓值,以產生如第5C圖的反射單元壓差示意圖(圖中的x是代表每一個反射單元的中心位置),上述之設計,將能夠造成各反射單元的壓差能夠單獨個別控制,比如當要調整第6反射單元(6(V2,V11))壓差時,只需調整V11則可,如此將非常方便個別控制每個反射單元的相位。The above Figures 5A to 5C are an implementation mode. The first voltage controller 61 inputs a first voltage value to the first conductive patch group (including multiple first conductive patches 1111), and the second voltage controller 62 inputs a second voltage value to the individual third conductive patches 2211 to generate a reflector unit voltage difference schematic diagram as shown in Figure 5C (x in the figure represents the center position of each reflector unit). The above design will enable the voltage difference of each reflector unit to be individually controlled. For example, when adjusting the voltage difference of the sixth reflector unit (6(V2, V11)), only V11 needs to be adjusted. This will make it very convenient to individually control the phase of each reflector unit.
然而,本案更具有另一種實施樣態,則是將第三導電貼片2211,如同第一導電貼片1111一般,使用如第2A圖所示的結構,將多個第三導電貼片2211透過矩形線串接形成多個第三導電貼片組。However, this case has another implementation mode, which is to use the third conductive patch 2211, like the first conductive patch 1111, using the structure shown in Figure 2A, and connect multiple third conductive patches 2211 in series through rectangular lines to form multiple third conductive patch groups.
延續說明書[0059]的實施樣態,能夠由第一電壓控制器61於第一導電貼片組112(包含多個第一導電貼片1111)輸入第一電壓值,第二電壓控制器62於多個第三導電貼片組輸入第二電壓值,以產生如第6圖的反射單元壓差示意圖(圖中的x是代表反射單元的中心位置),其中由左排列至右個別為V1至V5,而由上排列至下個別為V6至V10,其壓差個別為1(V1,V6) , 2(V1,V7) , 3(V1,V8) , 4(V1,V9) , 5(V1,V10) , 6(V2,V6) , 7(V2,V7) , 8(V2,V8) , 9(V2,V9) , 10(V2,V10) , 11(V3,V6) , 12(V3,V7) , 13(V3,V8) , 14(V3,V9) , 15(V3,V10) , 16(V4,V6) , 17(V4,V7) , 18(V4,V8) , 19(V4,V9) , 20(V4,V10) , 21(V5,V6) , 22(V5,V7) , 23(V5,V8) , 24(V5,V9) , 25(V5,V10)。Continuing with the embodiment of the specification [0059], the first voltage controller 61 can input a first voltage value to the first conductive patch group 112 (including a plurality of first conductive patches 1111), and the second voltage controller 62 can input a second voltage value to the plurality of third conductive patch groups to generate a voltage difference diagram of the reflective unit as shown in Figure 6 (x in the figure represents the center position of the reflective unit). From left to right, they are V1 to V5, and from top to bottom, they are V6 to V10. Their voltage differences are 1 (V1, V6), 2 (V1, V7), 3 (V1, V8), 4 (V1, V9), 5 (V1, V10), 6 (V2, V6), 7 (V2, V7), and 8 (V2, V8). , 9(V2,V9) , 10(V2,V10) , 11(V3,V6) , 12(V3,V7) , 13(V3,V8) , 14(V3,V9) , 15(V3,V10) , 16(V4,V6) , 17(V4,V7) , 18(V4,V8) , 19(V4,V9) , 20(V4,V10) , 21(V5,V6) , 22(V5,V7) , 23(V5,V8) , 24(V5,V9) , 25(V5,V10).
然而,說明書[0059]所述之設計,會造成各反射單元的壓差距有相依性,比如當要調整第6反射單元(6(V2,V6))壓差時,會間接影響同樣使用V2的反射單元或使用V6的反射單元,如此對於要個別控制每個反射單元的相位,將會不容易且難以計算,故該第二導電貼片2111與該第三導電貼片2211仍以單獨個別控制會優於分組控制,本案之技術可應用於單獨個別控制或是分組控制。However, the design described in the specification [0059] will cause the voltage difference of each reflective unit to be dependent on each other. For example, when the voltage difference of the sixth reflective unit (6(V2, V6)) is to be adjusted, it will indirectly affect the reflective unit using V2 or the reflective unit using V6. In this way, it will be difficult and difficult to control the phase of each reflective unit individually. Therefore, it is better to control the second conductive patch 2111 and the third conductive patch 2211 individually rather than in groups. The technology of this case can be applied to either individual control or group control.
然而,本案更具有另一種實施樣態,如第7圖所示,則是不使用穿孔20,如前所述,將該第一電壓控制器連接數個第一導電貼片1111,用以提供一第一電壓值,將該第二電壓控制器用以連接數個第三導電貼片2211,用以提供一第二電壓值,其中透過第三導電貼片2211電場與第一導電貼片1111電場產生電力線使液晶偏轉,但其電場因會經過第一基板層1及第二基板層2,第一基板層1及第二基板層2為絕緣物質,會影響電場強度,且與相鄰之單元電場會相互影響,故其雖有簡易設計與實作上的優點,但其性能相較於說明書[0020]所述結構,由於基板層是絕緣物質,因此會降低電場強度。However, this case has another embodiment, as shown in FIG. 7 , in which the through hole 20 is not used. As mentioned above, the first voltage controller is connected to a plurality of first conductive patches 1111 to provide a first voltage value, and the second voltage controller is connected to a plurality of third conductive patches 2211 to provide a second voltage value, wherein the electric field of the third conductive patch 2211 is connected to the first conductive patch 111. 1 The electric field generates electric lines that deflect the liquid crystal. However, the electric field passes through the first substrate layer 1 and the second substrate layer 2. The first substrate layer 1 and the second substrate layer 2 are insulating materials, which will affect the electric field strength and will affect the electric fields of adjacent cells. Therefore, although it has the advantages of simple design and implementation, its performance is inferior to the structure described in [0020] of the specification. Since the substrate layer is an insulating material, the electric field strength is reduced.
若是要採用說明書[0063]之結構,亦能夠不使用第二基板層2,於該第二基板層2之第二上表面21不需設計數個第二導電貼片2111,如第8圖所示,如此可以減少設計的難度與設計的成本。If the structure of specification [0063] is to be adopted, the second substrate layer 2 can be omitted, and a plurality of second conductive patches 2111 do not need to be designed on the second upper surface 21 of the second substrate layer 2, as shown in FIG8 . This can reduce the difficulty and cost of the design.
另外,本案更具有另一種實施樣態,如第9A及9B圖所示,於一個反射單元7內,設計多個第一導電貼片1111進行串聯或並聯形式(透過矩形線上下串接,並再透過矩形線左右並接),並透過改變D1至D5的距離跟θ角(透過改變導電貼片圖案的樣式,根據頻率選擇面原理,相位會在特定頻率有不同的現象),可有預設反射電磁波方向,以使液晶可更精確地達到微調的作用。In addition, the present invention has another embodiment, as shown in Figures 9A and 9B. In this embodiment, multiple first conductive patches 1111 are designed to be connected in series or in parallel within a reflective unit 7 (connected in series vertically via rectangular lines and then connected in parallel horizontally via rectangular lines). By changing the distance and angle θ between D1 and D5 (by changing the pattern of the conductive patches, the phase will have different phenomena at specific frequencies according to the principle of frequency selective surface), the direction of the reflected electromagnetic wave can be preset, so that the liquid crystal can be fine-tuned more accurately.
另外,本案更具有另一種實施樣態,由於當第三導電貼片2211數量龐大時,當每一個第三導電貼片2211都要外接第二電壓控制器,將會使實作上增加難度,若是能夠進行群組化設計,將能夠解決如此問題,而每個單元間反射至接收端的電磁波相位差距極小,故能夠進行群組化的設計。In addition, this case has another implementation method. When the number of third conductive patches 2211 is large, each third conductive patch 2211 must be connected to an external second voltage controller, which will increase the implementation difficulty. If this problem can be solved, a cluster design will be able to solve this problem. The phase difference of the electromagnetic wave reflected from each unit to the receiving end is extremely small, so a cluster design is possible.
實施樣態如第10A圖所示,進一步說明如下: (1) 將數個第二導電貼片2111組成數個第二導電貼片組212,其中每一個第二導電貼片組212內的第二導電貼片2111朝內會透過矩形線連接,如第10D圖所示,每兩個第二導電貼片組212之間並不會連接,其圖形設計如第10C圖所示,其圖形能夠為多個圓形連接(a)、多個矩形連接(b)、多個菱形連接(c)、多個框形連接(d)。 (2) 將數個第三導電貼片換成數個第三導電貼片組222,其中每一個第三導電貼片組222會變為一大矩形,如第10F圖所示,該第三導電貼片組222大小為不超過群組單元最大邊長。 (3) 由於第二導電貼片組212與第三導電貼片組222之群組化設計,故能夠減少穿孔20的數量,如第10E圖所示,於每一個區域內最少能僅需設計一個穿孔20,而減少穿孔將能使基板不因密集的穿孔而破裂。 (4) 第二導電貼片組212與第三導電貼片組222之群組化設計,可以減少外接第二電壓控制器的數量。 (5) 第一導電貼片組112本身亦是群組化設計,也能夠減少外接第一電壓控制器的數量。 (6) 本案之第一導電貼片組能夠外接群組電壓,如第10B圖,因此第一導電貼片組群組皆為同電壓,與其他第一導電貼片組群組電壓可相同或不同;而透過改變第二電壓控制器改變第三導電貼片電壓,使與第一導電貼片群組產生壓差,每個群組不同壓差而有不同相位,達到控制電磁波反射相位。 The implementation is shown in FIG10A and is further described as follows: (1) A plurality of second conductive patches 2111 are grouped into a plurality of second conductive patch groups 212, wherein the second conductive patches 2111 in each second conductive patch group 212 are connected inwardly through rectangular lines, as shown in FIG10D. No two second conductive patch groups 212 are connected to each other. The pattern design is shown in FIG10C, and the pattern can be a plurality of circular connections (a), a plurality of rectangular connections (b), a plurality of diamond connections (c), and a plurality of frame connections (d). (2) A plurality of third conductive patches are replaced with a plurality of third conductive patch groups 222, wherein each third conductive patch group 222 becomes a large rectangle, as shown in FIG10F. The size of the third conductive patch group 222 does not exceed the maximum side length of the group unit. (3) Due to the grouped design of the second conductive patch group 212 and the third conductive patch group 222, the number of through-holes 20 can be reduced. As shown in FIG. 10E , at least one through-hole 20 is required in each region. Reducing the number of through-holes will prevent the substrate from being broken due to dense through-holes. (4) The grouped design of the second conductive patch group 212 and the third conductive patch group 222 can reduce the number of external second voltage controllers. (5) The first conductive patch group 112 itself is also a grouped design, which can also reduce the number of external first voltage controllers. (6) The first conductive patch group in this case can be connected to an external group voltage, as shown in Figure 10B. Therefore, the first conductive patch groups are all at the same voltage, which can be the same or different from the voltage of other first conductive patch groups. By changing the second voltage controller, the voltage of the third conductive patch is changed, so that a voltage difference is generated with the first conductive patch group. Each group has a different voltage difference and a different phase, thereby achieving the control of the electromagnetic wave reflection phase.
本發明所提供之液晶陣列反射結構,與其他習用技術相互比較時,其優點如下: (1) 本發明之液晶陣列反射結構,能夠透過電壓控制器改變電壓,以改變液晶介電係數不同,使多個反射單元之調整後的相位可聚焦於接收端,如此將不需透過改變導電貼片大小產生預設電磁波反射方向。 (2) 本發明調整後的相位可聚焦於接收端,更重要的是,可實時的透過電壓控制器改變電壓,達到在任意接收端皆可聚焦的性能,故為智慧反射面的原理。 (3) 本發明不需施加電阻器,其一為實作困難,其二為電壓源即使在每個第一導電貼片組一致,依然可由第三導電貼片的個別偏壓達成每個單元的電場不同,意即不會有限制性的必須為漸大或漸小的偏壓,而為任意大小的偏壓。 (4) 本發明有別於陣列反射面,不需透過改變導電貼片大小產生預設電磁波反射方向,本案只需改變液晶介電係數即可達成所需性能,且設計容易,不需計算預設反射方向的導電貼片大小,本實施例導電貼片大小一致。 (5) 本發明由於每個反射單元皆具有間隔物,因此各個第一導電貼片與第二導電貼片或第三導電貼片在施加偏壓後的電場不會因上下斜向電場影響,使相位更為精準,差異更小。 (6) 本發明利用穿孔基板方式,使夾在基板間的液晶層能在各單元間個別偏壓,並透過間隔物區分液晶層,使相鄰液晶層的分子轉向之垂直電場方向不受相鄰單元影響,透過每個單元反射相位的補償,解決了傳統反射陣列天線只能反射固定相位的問題。 (7) 本發明透過單元群組化的設計,使陣列所需穿孔減少,準確度不變,改善成本、設計更容易、陣列擴大化、不易損壞的優勢。 The advantages of the liquid crystal array reflective structure provided by the present invention compared with other conventional technologies are as follows: (1) The liquid crystal array reflective structure of the present invention can change the voltage through a voltage controller to change the dielectric constant of the liquid crystal, so that the adjusted phases of multiple reflective units can be focused on the receiving end. This eliminates the need to produce a preset electromagnetic wave reflection direction by changing the size of the conductive patch. (2) The adjusted phase of the present invention can be focused on the receiving end. More importantly, the voltage can be changed in real time through the voltage controller to achieve the performance of focusing at any receiving end. This is the principle of a smart reflective surface. (3) The present invention does not require the addition of resistors. Firstly, this is difficult to implement. Secondly, even if the voltage source is the same in each first conductive patch group, the individual bias of the third conductive patch can still achieve a different electric field for each unit. This means that there is no restriction on a gradually increasing or decreasing bias, but rather a bias of any size. (4) Unlike array reflective surfaces, the present invention does not require the size of the conductive patch to produce a preset electromagnetic wave reflection direction. In this case, the desired performance can be achieved by simply changing the dielectric constant of the liquid crystal. The design is also simple, and there is no need to calculate the size of the conductive patch for the preset reflection direction. In this embodiment, the size of the conductive patch is consistent. (5) In the present invention, since each reflective unit has a spacer, the electric field of each first conductive patch and the second conductive patch or the third conductive patch after bias is applied will not be affected by the vertical oblique electric field, making the phase more precise and the difference smaller. (6) The present invention uses a perforated substrate method to enable the liquid crystal layer sandwiched between the substrates to be individually biased between each unit, and uses spacers to separate the liquid crystal layer so that the vertical electric field direction of the molecules of the adjacent liquid crystal layer is not affected by the adjacent units. By compensating the reflection phase of each unit, the problem of traditional reflective array antennas that can only reflect a fixed phase is solved. (7) The present invention reduces the number of perforations required for the array through the design of unit clustering, while maintaining accuracy, improving cost, making the design easier, expanding the array, and preventing damage.
本發明已透過上述之實施例揭露如上,然其並非用以限定本發明,任何熟悉此一技術領域具有通常知識者,在瞭解本發明前述的技術特徵及實施例,並在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,因此本發明之專利保護範圍須視本說明書所附之請求項所界定者為準。The present invention has been disclosed through the above embodiments, but they are not intended to limit the present invention. Anyone familiar with this technical field and having ordinary knowledge, after understanding the above technical features and embodiments of the present invention, can make certain changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of patent protection of the present invention shall be determined by the definition of the claims attached to this specification.
1:第一基板層 11:第一表面 111:第一表面單元 1111:第一導電貼片 1112:矩形線 112:第一導電貼片組 2:第二基板層 20:穿孔 200:導體材料 21:第二上表面 211:第二表面單元 2111:第二導電貼片 212:第二導電貼片組 22:第二下表面 221:第三表面單元 2211:第三導電貼片 222:第三導電貼片組 3:液晶層 31:格狀間隔物 32:液晶區域 41:第一配向層 42:第二配向層 5:反射單元 61:第一電壓控制器 62:第二電壓控制器 7:反射單元 1: First substrate layer 11: First surface 111: First surface unit 1111: First conductive patch 1112: Rectangular line 112: First conductive patch assembly 2: Second substrate layer 20: Perforation 200: Conductive material 21: Second upper surface 211: Second surface unit 2111: Second conductive patch 212: Second conductive patch assembly 22: Second lower surface 221: Third surface unit 2211: Third conductive patch 222: Third conductive patch assembly 3: Liquid crystal layer 31: Grid spacer 32: Liquid crystal region 41: First alignment layer 42: Second alignment layer 5: Reflective unit 61: First voltage controller 62: Second voltage controller 7: Reflection unit
[第1A圖]係本發明液晶陣列反射結構之分解示意圖。 [第1B圖]係本發明液晶陣列反射結構之組合示意圖。 [第1C圖]係本發明液晶陣列反射結構之剖面示意圖。 [第1D圖]係本發明液晶陣列反射結構之第一表面單元之範圍示意圖。 [第1E圖]係本發明液晶陣列反射結構之第二表面單元之範圍示意圖。 [第1F圖]係本發明液晶陣列反射結構之第二表面單元之範圍示意圖。 [第2A圖]係本發明液晶陣列反射結構之導電貼片之形狀示意圖。 [第2B圖]係本發明液晶陣列反射結構之導電貼片之形狀示意圖。 [第3圖]係本發明液晶陣列反射結構之導電貼片之不同尺寸對比示意圖。 [第4圖]係本發明液晶陣列反射結構之配向層的配向方向示意圖。 [第5A圖]係本發明液晶陣列反射結構之導電貼片之第一電壓連接示意圖。 [第5B圖]係本發明液晶陣列反射結構之導電貼片之第二電壓連接示意圖。 [第5C圖]係本發明液晶陣列反射結構之導電貼片之反射單元壓差示意圖。 [第6圖]係本發明液晶陣列反射結構之導電貼片之另一實施之反射單元壓差示意圖。 [第7圖]係本發明液晶陣列反射結構之導電貼片之無穿孔之剖面示意圖。 [第8圖]係本發明液晶陣列反射結構之導電貼片之無穿孔及無第二導電貼片之剖面示意圖。 [第9A圖]係本發明液晶陣列反射結構之導電貼片之第一導電貼片串並聯之第一電壓連接示意圖。 [第9B圖]係本發明液晶陣列反射結構之導電貼片之第一導電貼片串並聯之距離調整與角度調整示意圖。 [第10A圖]係本發明液晶陣列反射結構之導電貼片之另一實施之分解示意圖。 [第10B圖]係本發明液晶陣列反射結構之導電貼片之另一實施之反射單元壓差示意圖。 [第10C圖]係本發明液晶陣列反射結構之另一實施之導電貼片之形狀示意圖。 [第10D圖]係本發明液晶陣列反射結構之另一實施之第二導電貼片之分組示意圖。 [第10E圖]係本發明液晶陣列反射結構之另一實施之穿孔之分組示意圖。 [第10F圖]係本發明液晶陣列反射結構之另一實施之第三導電貼片之分組示意圖。 [Figure 1A] is a schematic exploded view of the liquid crystal array reflective structure of the present invention. [Figure 1B] is a schematic view of the assembled liquid crystal array reflective structure of the present invention. [Figure 1C] is a schematic cross-sectional view of the liquid crystal array reflective structure of the present invention. [Figure 1D] is a schematic view of the first surface unit of the liquid crystal array reflective structure of the present invention. [Figure 1E] is a schematic view of the second surface unit of the liquid crystal array reflective structure of the present invention. [Figure 1F] is a schematic view of the second surface unit of the liquid crystal array reflective structure of the present invention. [Figure 2A] is a schematic view of the shape of the conductive patch of the liquid crystal array reflective structure of the present invention. [Figure 2B] is a schematic view of the shape of the conductive patch of the liquid crystal array reflective structure of the present invention. [Figure 3] is a schematic diagram comparing different sizes of the conductive patch of the liquid crystal array reflective structure of the present invention. [Figure 4] is a schematic diagram illustrating the alignment direction of the alignment layer of the liquid crystal array reflective structure of the present invention. [Figure 5A] is a schematic diagram illustrating the first voltage connection of the conductive patch of the liquid crystal array reflective structure of the present invention. [Figure 5B] is a schematic diagram illustrating the second voltage connection of the conductive patch of the liquid crystal array reflective structure of the present invention. [Figure 5C] is a schematic diagram illustrating the voltage difference of a reflective unit of the conductive patch of the liquid crystal array reflective structure of the present invention. [Figure 6] is a schematic diagram illustrating the voltage difference of a reflective unit of another embodiment of the conductive patch of the liquid crystal array reflective structure of the present invention. [Figure 7] is a schematic diagram illustrating a cross-section of the conductive patch of the liquid crystal array reflective structure of the present invention without a perforation. [Figure 8] is a schematic cross-sectional view of a conductive patch without perforations and without a second conductive patch in the liquid crystal array reflective structure of the present invention. [Figure 9A] is a schematic diagram illustrating the first voltage connection of the first conductive patch in a series-parallel connection of the conductive patch in the liquid crystal array reflective structure of the present invention. [Figure 9B] is a schematic diagram illustrating the distance and angle adjustment of the first conductive patch in a series-parallel connection of the conductive patch in the liquid crystal array reflective structure of the present invention. [Figure 10A] is an exploded schematic view of another embodiment of the conductive patch in the liquid crystal array reflective structure of the present invention. [Figure 10B] is a schematic diagram illustrating the voltage difference of a reflective unit in another embodiment of the conductive patch in the liquid crystal array reflective structure of the present invention. [Figure 10C] is a schematic diagram illustrating the shape of the conductive patch in another embodiment of the liquid crystal array reflective structure of the present invention. [Figure 10D] is a schematic diagram illustrating the grouping of the second conductive patches in another embodiment of the liquid crystal array reflective structure of the present invention. [Figure 10E] is a schematic diagram illustrating the grouping of the perforations in another embodiment of the liquid crystal array reflective structure of the present invention. [Figure 10F] is a schematic diagram illustrating the grouping of the third conductive patches in another embodiment of the liquid crystal array reflective structure of the present invention.
1:第一基板層 1: First substrate layer
11:第一表面 11: First Surface
1111:第一導電貼片 1111: The first conductive patch
2:第二基板層 2: Second substrate layer
20:穿孔 20: Perforation
200:導體材料 200: Conductor material
21:第二上表面 21: Second upper surface
2111:第二導電貼片 2111: Second conductive patch
22:第二下表面 22: Second lower surface
2211:第三導電貼片 2211: Third Conductive Patch
31:格狀間隔物 31: Grid spacer
32:液晶區域 32: Liquid crystal area
41:第一配向層 41: First alignment layer
42:第二配向層 42: Second alignment layer
5:反射單元 5: Reflection unit
Claims (8)
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| TW113103019A TWI898407B (en) | 2024-01-25 | 2024-01-25 | Liquid crystal reflective array structure |
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| TW113103019A TWI898407B (en) | 2024-01-25 | 2024-01-25 | Liquid crystal reflective array structure |
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| TWI898407B true TWI898407B (en) | 2025-09-21 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW202032222A (en) * | 2018-12-12 | 2020-09-01 | 日商夏普股份有限公司 | Scanning antenna and method for manufacturing scanning antenna |
| JP2022025914A (en) * | 2020-07-30 | 2022-02-10 | 株式会社ジャパンディスプレイ | Driving method of phased array antenna and driving method of reflector |
| CN116613536A (en) * | 2023-03-30 | 2023-08-18 | 浙江大学 | Wide stop band low insertion loss high selectivity frequency selection surface and application |
| CN117203856A (en) * | 2021-03-31 | 2023-12-08 | 株式会社日本显示器 | Radio wave reflection board |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW202032222A (en) * | 2018-12-12 | 2020-09-01 | 日商夏普股份有限公司 | Scanning antenna and method for manufacturing scanning antenna |
| JP2022025914A (en) * | 2020-07-30 | 2022-02-10 | 株式会社ジャパンディスプレイ | Driving method of phased array antenna and driving method of reflector |
| CN117203856A (en) * | 2021-03-31 | 2023-12-08 | 株式会社日本显示器 | Radio wave reflection board |
| CN116613536A (en) * | 2023-03-30 | 2023-08-18 | 浙江大学 | Wide stop band low insertion loss high selectivity frequency selection surface and application |
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