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TWI894428B - A method for back grinding a wafer and a method for manufacturing an electronic device - Google Patents

A method for back grinding a wafer and a method for manufacturing an electronic device

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Publication number
TWI894428B
TWI894428B TW111102625A TW111102625A TWI894428B TW I894428 B TWI894428 B TW I894428B TW 111102625 A TW111102625 A TW 111102625A TW 111102625 A TW111102625 A TW 111102625A TW I894428 B TWI894428 B TW I894428B
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Taiwan
Prior art keywords
wafer
protective
layer
grinding method
backside
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TW111102625A
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Chinese (zh)
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TW202236407A (en
Inventor
畦崇
安井浩登
谷本周穂
鈴木孝
木下仁
Original Assignee
日商三井化學艾喜緹瑪蒂莉亞股份有限公司
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Publication of TW202236407A publication Critical patent/TW202236407A/en
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Publication of TWI894428B publication Critical patent/TWI894428B/en

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23DPLANING; SLOTTING; SHEARING; BROACHING; SAWING; FILING; SCRAPING; LIKE OPERATIONS FOR WORKING METAL BY REMOVING MATERIAL, NOT OTHERWISE PROVIDED FOR
    • B23D5/00Planing or slotting machines cutting otherwise than by relative movement of the tool and workpiece in a straight line
    • B23D5/02Planing or slotting machines cutting otherwise than by relative movement of the tool and workpiece in a straight line involving rotary and straight-line movements only, e.g. for cutting helical grooves
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B7/00Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor
    • B24B7/04Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor involving a rotary work-table
    • H10P52/00
    • H10P95/00

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  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Grinding Of Cylindrical And Plane Surfaces (AREA)
  • Milling, Broaching, Filing, Reaming, And Others (AREA)

Abstract

An object of the present invention is to provide a method for back grinding a wafer capable of suppressing the influence of surface unevenness of the wafer on back grinding and improving operability of the wafer after thinning. A solution to such object is a method for back grinding a wafer having unevenness on a surface, which has the following steps prior to the back grinding of the wafer: step (1) of forming a protective layer on the surface of the wafer; step (2) of planarizing a surface of the protective layer not in contact with the wafer; and step (3) of adhering the surface of the protective layer not in contact with the wafer to a support body via an adhesive layer.

Description

晶圓的背面研磨方法及電子裝置的製造方法 Wafer backside grinding method and electronic device manufacturing method

本發明係有關在表面具有凹凸之晶圓進行薄化處理等的方法中之晶圓之背面研磨方法,更具體而言,係有關一種晶圓之背面研磨方法,其係以保護層保護晶圓的表面之後,藉由使前述保護層之不與晶圓相接的面平坦化,可抑制晶圓表面的凹凸之影響,且在晶圓薄化後之各式各樣的處理製程中提高操作性。 The present invention relates to a method for back grinding a wafer, particularly in a process for thinning a wafer having irregularities on its surface. More specifically, the invention relates to a method for back grinding a wafer that protects the wafer surface with a protective layer and then flattens the surface of the protective layer that does not contact the wafer. This method suppresses the effects of the irregularities on the wafer surface and improves workability in various subsequent wafer thinning processes.

為了半導體裝置之高度積體化,或為了製造高性能的半導體裝置,遂廣泛進行使形成有電路之晶圓以均勻的厚度且細薄地進行研磨之背面研磨。但,在半導體裝置等之電子裝置的製造步驟中,在所謂的前步驟中會在矽、或鎵-砷等之半導體晶圓的表面形成電路等,或由於凸塊電極等,而可能在晶圓之表面存在凹凸。如此的電子裝置之中,尤其,在反向器或轉換器等之電力轉換器所使用的電力裝置中,由於其特性、構造、及製造步驟等理由,而具有晶圓表面之凹凸。在所謂之後步驟中,若製作保護黏著膠帶等之保護層,直接進行背面研磨,則晶圓表面之凹凸會被轉印於晶圓之背側,而使凹凸被反映至晶圓之成品 厚度,尤其,在電力裝置中係對裝置特性造成影響。 To achieve high integration of semiconductor devices or to produce high-performance semiconductor devices, back grinding, in which wafers with circuits formed thereon are ground to a uniform and fine thickness, is widely practiced. However, in the manufacturing process of electronic devices such as semiconductor devices, circuits are formed on the surface of semiconductor wafers made of silicon or gallium-arsenic in the so-called back-end process, or bump electrodes are formed, resulting in unevenness on the wafer surface. Such electronic devices, particularly those used in power converters such as inverters and converters, have unevenness on the wafer surface due to their characteristics, structure, and manufacturing steps. If back grinding is performed directly after applying a protective layer such as protective adhesive tape in the subsequent steps, the surface irregularities of the wafer will be transferred to the backside of the wafer, causing these irregularities to be reflected in the thickness of the finished wafer. This can affect device characteristics, particularly in power devices.

就抑制晶圓表面之凹凸的影響之晶圓的背面研磨方法而言,已知有以黏著膠帶支撐晶圓之後,藉由平面刨床而使膠帶之基材平坦化,以使晶圓之背面研磨的成品厚度均勻化之方法(專利文獻1)。但,在該方法雖然可抑制晶圓之成品厚度的參差不齊,但仍有薄化後之晶圓的輸送性等操作性困難化之課題。 One known method for back-grinding wafers to minimize the effects of surface irregularities is to support the wafer with adhesive tape and then use a planer to flatten the tape substrate to achieve a uniform thickness for the finished wafer (Patent Document 1). However, while this method can minimize variations in wafer thickness, it still presents operational challenges, such as difficulty transporting the thinned wafer.

另一方面,就提高薄化晶圓之操作性的方法而言,已知有一種方法,其係藉由保護層而使晶圓與支撐基板暫時固定而容易進行操作的方法(專利文獻2)。然而,在該方法中,由於起因於晶圓表面之凹凸等的理由,會有因為保護層之塗佈不均等而使晶圓之成品厚度的參差不齊之抑制不充分的情形。 Meanwhile, a method known for improving the handling efficiency of thinned wafers is to temporarily secure the wafer to a supporting substrate using a protective layer, thereby facilitating handling (Patent Document 2). However, this method may not adequately suppress variations in wafer thickness due to unevenness in the protective layer coating caused by, for example, irregularities on the wafer surface.

[先前技術文獻] [Prior Art Literature] [專利文獻] [Patent Literature]

[專利文獻1] 日本特開第2009-43931號公報 [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-43931

[專利文獻2] 日本特開第2004-64040號公報 [Patent Document 2] Japanese Patent Application Laid-Open No. 2004-64040

有鑑於上述技術背景,本發明之目的在於提供一種晶圓之背面研磨方法,其係可抑制晶圓表面之凹凸的影響,並提升晶圓薄化後之操作性。 In view of the above technical background, the object of the present invention is to provide a wafer backside grinding method that can suppress the impact of unevenness on the wafer surface and improve the operability after wafer thinning.

本發明人等係經致力研究之結果,發現在晶圓之背面研磨之前,以保護層保護晶圓之表面後,使保護層之不與晶圓相接的面平坦化,並隔著黏接 著層而使經平坦化之保護層的不與晶圓相接的面與支撐體接著,可解決上述課題,終於完成本發明。 The inventors of this invention have discovered, through diligent research, that before back grinding, the wafer surface can be protected with a protective layer, the surface of the protective layer not in contact with the wafer can be flattened, and the flattened surface of the protective layer not in contact with the wafer can be bonded to a support via an adhesive layer. This approach solves the aforementioned problems and ultimately leads to the completion of the present invention.

亦即,本發明係有關下述者: That is, the present invention relates to the following:

〔1〕有關一種晶圓之背面研磨方法,係在表面具有凹凸的晶圓的背面研磨方法,而該背面研磨方法係在晶圓的背面研磨之前,具備下列步驟:步驟(1),係在前述晶圓之表面形成保護層;步驟(2),係使前述保護層之不與晶圓相接的面平坦化;及,步驟(3),係隔著黏接著層而使前述保護層之不與晶圓相接的面與支撐體接著。 [1] A method for back grinding a wafer is provided, which is a method for back grinding a wafer having uneven surfaces on its surface. The method comprises the following steps before back grinding the wafer: step (1) forming a protective layer on the surface of the wafer; step (2) flattening the surface of the protective layer that is not in contact with the wafer; and step (3) bonding the surface of the protective layer that is not in contact with the wafer to a support body via an adhesive layer.

以下,〔2〕至〔15〕之任一者皆為本發明之較佳的一態樣或一實施型態。 Any of the following [2] to [15] is a preferred embodiment or implementation of the present invention.

〔2〕如〔1〕所述之晶圓的背面研磨方法,其中,前述保護層為保護黏著膠帶。 [2] The backside grinding method of a wafer as described in [1], wherein the protective layer is a protective adhesive tape.

〔3〕如〔2〕所述之晶圓的背面研磨方法,其中,前述保護黏著膠帶之基材層為含有選自由PET、PEN、PBT、LCP、PI、PA、PEEK及PPS所組成的群組中之至少1種的樹脂。 [3] The wafer backside grinding method as described in [2], wherein the base layer of the protective adhesive tape comprises at least one resin selected from the group consisting of PET, PEN, PBT, LCP, PI, PA, PEEK and PPS.

〔4〕如〔1〕至〔3〕中任一項所述之晶圓的背面研磨方法,其中,前述表面具有凹凸之晶圓為藉由形成於表面之電極、電路圖型、聚醯亞胺、不良標記、或凸塊之至少1者具有凹凸之晶圓。 [4] The back grinding method of a wafer as described in any one of [1] to [3], wherein the wafer having a surface irregularity is a wafer having a surface irregularity formed by at least one of an electrode, a circuit pattern, polyimide, a defective mark, or a bump.

〔5〕如〔1〕至〔4〕中任一項所述之晶圓的背面研磨方法,其中,前述平坦化之步驟為藉由切削、研磨、或拋光進行平坦化之步驟。 [5] The backside grinding method of a wafer as described in any one of [1] to [4], wherein the planarization step is a planarization step performed by cutting, grinding, or polishing.

〔6〕如〔5〕所述之晶圓的背面研磨方法,其中,前述切削為藉由刀具(bite)切削來進行。 [6] The backside grinding method of a wafer as described in [5], wherein the cutting is performed by cutting with a bite.

〔7〕如〔1〕至〔6〕中任一項所述之晶圓的背面研磨方法,其中,前述黏接著層為液狀接著劑或黏接著膠帶。 [7] The backside grinding method of a wafer as described in any one of [1] to [6], wherein the adhesive layer is a liquid adhesive or an adhesive tape.

〔8〕如〔1〕至〔7〕中任一項所述之晶圓的背面研磨方法,其中,前述支撐體為由玻璃、矽、陶瓷、金屬、樹脂或此等之複合材料所構成。 [8] The back grinding method of a wafer as described in any one of [1] to [7], wherein the support body is made of glass, silicon, ceramic, metal, resin or a composite material thereof.

〔9〕如〔1〕至〔8〕中任一項所述之晶圓的背面研磨方法,其中,在前述步驟(2)之後,於前述步驟(3)之前,包含下列步驟:在經平坦化之前述保護層的不與晶圓相接的面、前述支撐體之表面或其兩者,形成前述黏接著層。 [9] A method for back grinding a wafer as described in any one of [1] to [8], wherein, after the aforementioned step (2) and before the aforementioned step (3), the method comprises the following step: forming the aforementioned adhesive layer on the surface of the protective layer not in contact with the wafer before planarization, the surface of the aforementioned support body, or both.

〔10〕如〔1〕至〔9〕中任一項所述之晶圓的背面研磨方法,其中,在晶圓之背面研磨後,更包含晶圓之背面處理步驟。 [10] The backside grinding method of a wafer as described in any one of [1] to [9], wherein after the backside grinding of the wafer, the backside processing step of the wafer is further included.

〔11〕如〔10〕所述之晶圓的背面研磨方法,其中,前述晶圓之背面處理步驟為包含蝕刻、電極形成、離子佈植、退火之中的至少1者。 [11] The backside grinding method of a wafer as described in [10], wherein the backside processing step of the wafer comprises at least one of etching, electrode formation, ion implantation, and annealing.

〔12〕如〔1〕至〔11〕中任一項所述之晶圓的背面研磨方法,其中,前述晶圓的背面研磨後之厚度為200μm以下。 [12] The backside grinding method of a wafer as described in any one of [1] to [11], wherein the thickness of the backside of the wafer after grinding is less than 200 μm.

〔13〕一種電子裝置之製造方法,係在製造步驟中包含〔1〕至〔12〕中任一項所述之晶圓的背面研磨方法。 [13] A method for manufacturing an electronic device, wherein the manufacturing step includes a backside grinding method of a wafer as described in any one of [1] to [12].

〔14〕如〔13〕所述之電子裝置的製造方法,其中,前述電子裝置為在背面側亦具備電極之裝置。 [14] A method for manufacturing an electronic device as described in [13], wherein the electronic device is a device having an electrode on the back side.

〔15〕如〔14〕所述之電子裝置的製造方法,其中,前述電子裝置為電力裝置。 [15] The method for manufacturing an electronic device as described in [14], wherein the electronic device is an electric power device.

若依據本發明之晶圓的背面研磨方法,在晶圓之背面研磨時,可抑制晶圓表面之凹凸的影響,且提升晶圓薄化後之操作性,並在薄化後經各式各樣之處理製程中可安定地處理晶圓,故可防止於晶圓所形成之電路等損傷,並抑 制在半導體裝置等之電子裝置的特性出現意料外之影響,且對晶圓以高生產性與良率實施多數之及/或各式各樣的步驟,大幅地貢獻於半導體裝置等之電子裝置的生產性提升。 The wafer backside grinding method of the present invention can suppress the effects of surface irregularities during wafer backside grinding, improve wafer handling after thinning, and enable stable wafer handling during various post-thinning processing steps. This prevents damage to circuits formed on the wafer and suppresses unintended effects on the characteristics of electronic devices such as semiconductors. Furthermore, multiple and/or various steps can be performed on the wafer with high productivity and yield, significantly contributing to improved productivity of electronic devices such as semiconductors.

1:半導體晶圓、晶圓 1: Semiconductor wafers, wafers

3:保護黏著膠帶 3: Protective adhesive tape

4:黏接著層 4: Adhesive layer

5:支撐體 5: Support body

11:晶圓之表面、表面 11: Wafer surface, surface

12:晶圓之背面、背面 12: Backside and backside of wafer

31:保護黏著膠帶之基材層、基材層 31: Protective adhesive tape base layer, base layer

32:保護黏著膠帶之黏著層 32: Adhesive layer of protective adhesive tape

33:經平坦化的保護黏著膠帶之基材層 33: Planarized protective adhesive tape substrate layer

圖1係說明本發明之一實施型態的步驟之示意圖。(a)係表示藉由本發明研磨背面12之晶圓1。(b)係表示使用保護黏著膠帶3作為保護層而藉由步驟(1),在晶圓1之表面11黏貼有保護黏著膠帶3之晶圓1。(c)係表示藉由步驟(2)使保護黏著膠帶3之基材層31經平坦化的晶圓1。(d)係表示在步驟(2)所得到之經平坦化的保護黏著膠帶3之基材層33形成黏接著層4之晶圓1。(e)係表示藉由步驟(3),隔著黏接著層4使支撐體5與經平坦化的保護黏著膠帶3之基材層33接著之晶圓1。 FIG1 is a schematic diagram illustrating the steps of one embodiment of the present invention. (a) shows a wafer 1 having its back surface 12 ground by the present invention. (b) shows a wafer 1 having a protective adhesive tape 3 adhered to its surface 11 by step (1) using the protective adhesive tape 3 as a protective layer. (c) shows a wafer 1 having its base layer 31 of the protective adhesive tape 3 flattened by step (2). (d) shows a wafer 1 having an adhesive layer 4 formed on the base layer 33 of the flattened protective adhesive tape 3 obtained by step (2). (e) shows a wafer 1 having a support 5 bonded to the base layer 33 of the flattened protective adhesive tape 3 via the adhesive layer 4 by step (3).

本發明之晶圓的背面研磨方法,係在表面具有凹凸的晶圓之背面研磨方法,該晶圓之背面研磨方法係在晶圓的背面研磨之前,具備下列步驟:步驟(1),係在前述晶圓之表面形成保護層;步驟(2),係使前述保護層之不與晶圓相接的面平坦化;及,步驟(3),係隔著黏接著層而使前述保護層之不與晶圓相接的面與支撐體接著。 The wafer back grinding method of the present invention is a method for grinding the back of a wafer having uneven surfaces. The wafer back grinding method comprises the following steps before grinding the back of the wafer: step (1) forming a protective layer on the surface of the wafer; step (2) flattening the surface of the protective layer that is not in contact with the wafer; and step (3) bonding the surface of the protective layer that is not in contact with the wafer to a support body via an adhesive layer.

表面具有凹凸之晶圓: Wafers with uneven surfaces:

藉由本發明之方法而被背面研磨的晶圓係在表面具有凹凸。晶圓之表面的 凹凸係可列舉例如:電極、電路圖型、屬於保護膜之厚的聚醯亞胺(5至20μm)、用以判別不良晶片之不良標記(5至100μm)、源自取代導線接合之凸塊接合用的金凸塊(10至100μm)或焊料凸塊(50至300μm)等,凹凸的高度可為5至300μm。 The wafer back-ground using the method of the present invention has surface irregularities. Examples of these irregularities include electrodes, circuit patterns, thick polyimide films (5 to 20 μm) used as protective films, defective wafer markers (5 to 100 μm), gold bumps (10 to 100 μm) or solder bumps (50 to 300 μm) used for wire-bonding replacement bump bonding. The height of the irregularities can range from 5 to 300 μm.

晶圓之材料係可使用通常使用於電子裝置之製造,並可形成電子電路等的材料,且期待會作為被研磨基材而被薄化者。可列舉例如:矽晶圓或者SiC、AlSb、AlAs、AlN、AlP、BN、BP、BAs、GaSb、GaAs、GaN、GaP、InSb、InAs、InN、或InP等之化合物半導體晶圓、水晶晶圓、藍寶石或玻璃等,但不限定於此等。矽晶圓或化合物半導體晶圓係可被摻雜。 The wafer material can be any material commonly used in the manufacture of electronic devices, capable of forming electronic circuits, and expected to be thinned as a polished substrate. Examples include, but are not limited to, silicon wafers or compound semiconductor wafers made of SiC, AlSb, AlAs, AlN, AlP, BN, BP, BAs, GaSb, GaAs, GaN, GaP, InSb, InAs, InN, or InP, crystal wafers, sapphire, or glass. Silicon wafers or compound semiconductor wafers may be doped.

尤其,在表面具有凹凸之晶圓係可列舉以電子裝置使用於逆向器或轉換器等電力轉換器的電力裝置之晶圓。 In particular, wafers having uneven surfaces are wafers used in power devices such as inverters and converters.

步驟(1): Step (1):

步驟(1)係在晶圓之表面形成保護層之步驟。 Step (1) is a step of forming a protective layer on the surface of the wafer.

保護層: Protective layer:

保護層係在晶圓之背面研磨時,用以防止晶圓表面之電子電路等損傷、或者受到研磨屑或研磨水等污染者。為了研磨晶圓之背面,一般係採用進給(infeed)研磨,其係使晶圓吸附並保持於真空吸盤式之吸盤台,並藉由使該吸盤台旋轉,一邊使晶圓自轉一邊使磨石等研磨工具按壓於晶圓之背面;在如此地研磨晶圓之背面時,係以保護層被覆晶圓之表面,以顧及到使晶圓表面不會直接接觸吸盤台之保持面而使晶圓之表面的電子電路等受到損傷。 A protective layer is used during backside grinding of wafers to prevent damage to electronic circuitry on the wafer surface and contamination from grinding debris or polishing water. Infeed grinding is typically used to grind the backside of a wafer. This involves suctioning and holding the wafer on a vacuum chuck. The chuck rotates, pressing a grinding tool such as a grindstone against the backside of the wafer while the wafer spins. During backside grinding, the protective layer covers the wafer surface to prevent direct contact with the chuck holding surface, potentially damaging the electronic circuitry on the wafer surface.

在一態樣中,保護層可列舉例如:保護黏著膠帶、保護樹脂層等,保護層較佳係保護黏著膠帶。 In one embodiment, the protective layer may be, for example, a protective adhesive tape, a protective resin layer, etc., and the protective layer is preferably a protective adhesive tape.

本發明之保護層係具有適合於晶圓表面之保護的厚度,同時,在 後述步驟(2)中可承受平坦化,亦即,對於必需的切削厚度具有多餘的厚度。 The protective layer of the present invention has a thickness suitable for protecting the wafer surface and can withstand planarization in the subsequent step (2), that is, it has a thickness that is redundant with the required cutting thickness.

保護層係以使用保護黏著膠帶為較佳。保護層為保護黏著膠帶時,步驟(1)係使保護黏著膠帶黏貼於晶圓表面之步驟。保護黏著膠帶對晶圓表面之黏貼係可以習知之公知方法來進行,但較佳係使用自動黏貼裝置來進行,較佳係依照晶圓及保護黏著膠帶之材質或種類等而適當調整壓力、溫度、時間等。 The protective layer is preferably formed of a protective adhesive tape. When the protective layer is a protective adhesive tape, step (1) is to adhere the protective adhesive tape to the surface of the wafer. The adhesive tape can be adhered to the wafer surface by a known method, but preferably, an automatic adhesive device is used. The pressure, temperature, time, etc. are preferably adjusted appropriately according to the material or type of the wafer and the protective adhesive tape.

保護黏著膠帶 Protective adhesive tape

作為使用於本發明方法之較佳的保護層之保護黏著膠帶係只要以在後述步驟(2)中可承受平坦化的黏著性、切削加工性、及可承受後述背面研磨的黏著性、可承受後述背面處理步驟的耐藥性、耐熱性、及最後可降低晶圓表面之污染的狀態從晶圓去除即可,並無特別限制,一般為了半導體晶圓之背面研磨,較佳係選自作為保護黏著膠帶所使用者,並亦可使用。 The protective adhesive tape used as the preferred protective layer in the method of the present invention is not particularly limited as long as it has the adhesiveness and cutting properties required to withstand the planarization in the later step (2), the adhesiveness required to withstand the later back grinding, the chemical resistance and heat resistance required to withstand the later back treatment step, and the ability to reduce contamination on the wafer surface. It can be removed from the wafer in a state where there is no particular restriction. Generally, for the back grinding of semiconductor wafers, it is preferably selected from the user of the protective adhesive tape and can also be used.

保護黏著膠帶之基材層的材料可列舉例如:高密度聚乙烯(HDPE)、中密度聚乙烯(MDPE)、低密度聚乙烯(LDPE)、超低密度聚乙烯(VLDPE)、直鏈狀低密度聚乙烯(L-LDPE)、無規共聚合聚丙烯(random PP)、嵌段共聚合聚丙烯(嵌段PP)、均質聚丙烯(均質PP)、聚丁烯(PB)、聚甲基戊烯(PMP)、乙烯-/乙酸乙烯酯共聚物(EVA)、乙烯/丙烯酸共聚物或乙烯/甲基丙烯酸共聚物與此等之金屬交聯體(離子聚合物:ionomer)等聚烯烴類,又,聚對苯二甲酸乙二酯(PET)、聚萘二甲酸乙二酯(PEN)、聚對苯二甲酸丁二酯(PBT)、液晶聚合物(LCP)等聚酯類,再者,可列舉如:聚胺基甲酸乙酯(PU)、聚碳酸酯(PC)、聚醯亞胺(PI)、聚醚醚酮(PEEK)、聚醚醯亞胺(PEI)、聚醯胺(PA)、全芳香族聚醯胺、聚苯基硫醚(PPS)、氟樹脂、聚氯乙烯、聚偏二氯乙烯、纖維素系樹脂等。又,可單獨使用前述樹脂作為單層基材,亦可形成為組合前述複數之樹脂並經摻混者或相異的 樹脂之複層構成者。從耐熱性之觀點而言,較佳係具有融點或玻璃轉移溫度100℃以上之基材,以150℃以上為特佳。 The materials of the base layer of the protective adhesive tape can be listed as follows: high density polyethylene (HDPE), medium density polyethylene (MDPE), low density polyethylene (LDPE), very low density polyethylene (VLDPE), linear low density polyethylene (L-LDPE), random copolymer polypropylene (random Examples of the polyolefins include polypropylene (PP), block copolymer polypropylene (block PP), homogeneous polypropylene (homogeneous PP), polybutene (PB), polymethylpentene (PMP), ethylene-vinyl acetate copolymer (EVA), ethylene-acrylic acid copolymer or ethylene-methacrylic acid copolymer and metal crosslinkers thereof (ionomers); polyesters include polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polybutylene terephthalate (PBT), and liquid crystal polymer (LCP); and polyurethane (PU), polycarbonate (PC), polyimide (PI), polyetheretherketone (PEEK), polyetherimide (PEI), polyamide (PA), wholly aromatic polyamide, polyphenylene sulfide (PPS), fluororesins, polyvinyl chloride, polyvinylidene chloride, and cellulose-based resins. Furthermore, the aforementioned resins may be used alone as a single-layer substrate, or a combination of multiple resins, such as a blend, or a composite structure of different resins may be used. From the perspective of heat resistance, a substrate having a melting point or glass transition temperature of 100°C or higher, particularly 150°C or higher, is preferred.

在一實施型態中,保護黏著膠帶之基材層若考量以下之條件,特佳係包含PET、PEN、PBT、LCP、PI、PA、PEEK、PPS。 In one embodiment, the backing layer of the protective adhesive tape preferably includes PET, PEN, PBT, LCP, PI, PA, PEEK, or PPS, taking the following conditions into consideration.

保護黏著膠帶之基材層必須可承受平坦化,故較佳係平坦化前之厚度為10至1000μm,以25至500μm為特佳。若保護黏著膠帶之基材層的厚度變薄,則保護層薄,平坦化時可研磨之量受限定,故有使保護層平坦化之效果變小之傾向。因此,晶圓表面上之凹凸形狀大時,因其影響,會有研磨後之晶圓厚度精度降低之情形。另一方面,若平坦化前之保護層變厚,則保護層之剛性高,會有因膠帶形狀造成加工性降低,將膠帶裁切成晶圓形狀時之裁切性降低之傾向。又,因其剛性,保護黏著膠帶不易變形,故在晶圓之背面研磨後的保護層去除步驟之剝離性有降低之傾向。 The base layer of the protective adhesive tape must be able to withstand flattening, so the thickness before flattening is preferably 10 to 1000 μm, with 25 to 500 μm being particularly preferred. If the thickness of the base layer of the protective adhesive tape becomes thinner, the protective layer becomes thinner, and the amount that can be polished during flattening is limited, so there is a tendency for the flattening effect of the protective layer to be reduced. Therefore, when the uneven shape on the wafer surface is large, the thickness accuracy of the wafer after polishing will be reduced due to its influence. On the other hand, if the protective layer before flattening becomes thicker, the rigidity of the protective layer is high, and there is a tendency for the processability to be reduced due to the shape of the tape, and the cutting performance when the tape is cut into the shape of the wafer to be reduced. Furthermore, due to its rigidity, the protective adhesive tape is not easily deformed, so the peelability during the protective layer removal step after back grinding of the wafer tends to be reduced.

又,保護膠帶之基材層較佳係依據JIS K7113在23℃之拉伸彈性係數為1×107Pa以上,拉伸彈性係數以5×107Pa以上為更佳。若拉伸彈性係數變低,會有對保護膠帶之基材層的平坦化造成影響之傾向。具體而言,即使平坦化後,因晶圓表面之凹凸所造成的影響,背面研磨後之晶圓厚度精度有降低之傾向。另一方面,從基材層之加工性、切割性、彎曲性等之點而言,拉伸彈性係數係以1×1010Pa以下者為佳,以6×109Pa以下者更佳。 Furthermore, the base layer of the protective tape preferably has a tensile modulus of 1×10 7 Pa or greater at 23°C in accordance with JIS K7113, with a tensile modulus of 5×10 7 Pa or greater being more preferred. A lower tensile modulus tends to affect the planarization of the base layer of the protective tape. Specifically, even after planarization, the unevenness of the wafer surface can reduce the wafer thickness accuracy after back grinding. On the other hand, considering the processability, cutting properties, and bendability of the base layer, a tensile modulus of 1×10 10 Pa or less is preferred, and 6×10 9 Pa or less is even more preferred.

在保護黏著膠帶之黏著層係可使用一般所使用的壓敏性黏著劑或硬化型黏著劑等。又,一般該黏著層可為單層亦可為複數層,從追隨晶圓表面之凹凸的觀點而言,可為使柔軟的中間層與低污染的黏著層積層而成之複層構成。 The adhesive layer of the protective adhesive tape can be made of commonly used pressure-sensitive adhesives or curing adhesives. Furthermore, the adhesive layer can be a single layer or multiple layers. To conform to the unevenness of the wafer surface, a multi-layer structure consisting of a flexible intermediate layer and a low-contamination adhesive layer can be used.

上述壓敏性黏著劑可列舉如:丙烯酸系黏著劑、橡膠系黏著劑、聚矽氧系黏著劑等黏著劑。從半導體晶圓或基材層之黏接著性、保護黏著膠帶剝離後之晶圓以超純水或醇類等有機溶劑所產生的清淨洗淨性等之點而言,較佳係丙烯酸系聚合物作為基底聚合物之丙烯酸系黏著劑。 Examples of pressure-sensitive adhesives include acrylic adhesives, rubber adhesives, and silicone adhesives. In terms of adhesion to semiconductor wafers or substrate layers, and the ability to clean the wafer after the protective adhesive tape is removed using ultrapure water or organic solvents such as alcohols, acrylic adhesives with an acrylic polymer as the base polymer are preferred.

上述硬化型接著劑可列舉如:藉由光照射進行交聯、硬化之光硬化型接著劑、或者藉由加熱進行交聯、硬化之熱硬化型接著劑。上述光硬化型接著劑可列舉例如:以聚合性聚合物作為主成分,並含有光聚合起始劑之光硬化型接著劑。上述熱硬化型接著劑可列舉例如:以聚合性聚合物作為主成分,並含有熱聚合起始劑之熱硬化型接著劑。 Examples of the aforementioned curable adhesive include photocurable adhesives that crosslink and cure by light irradiation, and thermocurable adhesives that crosslink and cure by heating. Examples of the aforementioned photocurable adhesive include those containing a polymerizable polymer as a main component and a photopolymerization initiator. Examples of the aforementioned thermocurable adhesive include those containing a polymerizable polymer as a main component and a thermal polymerization initiator.

保護黏著膠帶之黏著層若剝離黏著力小,相對於使保護黏著膠帶之基材層平坦化時之剪力,對晶圓之黏著力會不足,會有保護黏著膠帶從晶圓完全剝離之問題。另一方面,若剝離黏著力大,有可能使保護黏著膠帶從晶圓剝離變困難。因此,從最後的晶圓剝離之觀點而言,其厚度係以5至500μm為佳,以10至100μm為特佳。除了使被附體作為矽鏡面晶圓以外,其餘係依據JIS Z0237(2009)之180°剝離黏著力(剝離速度300mm/分鐘)以0.3至10N/25mm為佳,以0.5至7N/25mm為特佳。在該範圍之中依據製程而進行適當調整。 If the adhesive layer of the protective tape has a weak peeling force, the adhesive force on the wafer will be insufficient to withstand the shear force applied when flattening the tape's base layer, making it difficult to completely peel the tape from the wafer. On the other hand, if the peeling force is too strong, it may become difficult to peel the tape from the wafer. Therefore, from the perspective of final wafer peeling, the thickness is preferably between 5 and 500 μm, with 10 to 100 μm being particularly preferred. Except when the substrate is a silicon mirror wafer, the 180° peel adhesion (peel speed 300mm/min) according to JIS Z0237 (2009) is preferably 0.3 to 10N/25mm, with 0.5 to 7N/25mm being particularly preferred. Adjust appropriately within this range based on the process.

保護層亦可使用保護樹脂層。保護層為保護樹脂層時,保護樹脂層係以使溶解於溶劑之原料樹脂或者液狀之原料樹脂本身(以下,亦稱為前驅體樹脂液)旋轉塗佈等公知之方法進行塗佈,並藉由光照射、加熱、乾燥等而使其硬化,發揮作為固體之保護層功能。亦可以複數層形成。 A protective resin layer can also be used as the protective layer. When the protective layer is a protective resin layer, it is applied by known methods such as rotational coating of a raw resin dissolved in a solvent or a liquid raw resin itself (hereinafter referred to as a precursor resin liquid). The layer is then hardened by light irradiation, heating, drying, etc., to function as a solid protective layer. Multiple layers can also be formed.

保護樹脂層: Protective resin layer:

可使用來作為保護層之保護樹脂層係只要以在後述步驟(2)中可承受平坦化 之接著性、切削加工性、及可承受後述背面研磨的接著性、可承受後述背面處理步驟的耐藥性、耐熱性、及最後地降低晶圓表面之污染之狀態從晶圓去除即可,並無特別限制,較佳係選自使裝置晶圓暫時固定於支撐體之公知的材料,亦可使用。前驅體樹脂液可列舉例如:使橡膠、彈性體等溶解於溶劑之橡膠系樹脂液、以環氧、胺基甲酸乙酯等作為基底之單液型熱硬化型樹脂液、以環氧、胺基甲酸乙酯、丙烯酸等作為基底之二液型混合反應型樹脂液、熱熔型接著劑、以丙烯酸、環氧等作為基底之紫外線(UV)或者電子束硬化型樹脂液、水分散型樹脂液。適合使用胺基甲酸乙酯丙烯酸酯、環氧基丙烯酸酯或聚酯丙烯酸酯等之具有聚合性乙烯基的寡聚物及/或丙烯酸或者甲基丙烯酸單體中添加光聚合起始劑、及、視情況之添加劑的UV硬化型樹脂液。添加劑可列舉如:增稠劑、塑化劑、分散劑、填充劑、耐燃劑及抗熱老化劑等。保護樹脂層亦可以複數層形成。 The protective resin layer that can be used as the protective layer is not particularly limited as long as it has good adhesion and machinability to withstand the planarization in the later-described step (2), good adhesion to withstand the later-described back grinding, good chemical resistance and heat resistance to withstand the later-described back surface treatment step, and finally reduces contamination of the wafer surface. It can be removed from the wafer in a state where it is not particularly limited. It is preferably selected from a known material that temporarily fixes the device wafer to the support body, and can also be used. Examples of precursor resins include: rubber-based resins in which rubber, elastomers, etc. are dissolved in a solvent; one-component thermosetting resins based on epoxies, urethanes, etc.; two-component mixed reaction resins based on epoxies, urethanes, acrylics, etc.; hot melt adhesives; ultraviolet (UV) or electron beam curing resins based on acrylics, epoxies, etc.; and water-dispersible resins. Suitable UV curing resins are those made by adding a photopolymerization initiator and, as appropriate, additives to polymerizable vinyl oligomers such as urethane acrylates, epoxy acrylates, or polyester acrylates and/or acrylic or methacrylic monomers. Additives include thickeners, plasticizers, dispersants, fillers, flame retardants, and thermal aging agents. The protective resin layer can also be formed in multiple layers.

步驟(2): Step (2):

步驟(2)係使保護層之不與晶圓相接的面平坦化之步驟。 Step (2) is a step for flattening the surface of the protective layer that is not in contact with the wafer.

例如,保護層為保護黏著膠帶時,為使保護黏著膠帶之基材層平坦化之步驟。若在步驟(1)中,在晶圓之表面黏貼保護黏著膠帶,則晶圓之表面的凹凸會被轉印至保護黏著膠帶之基材層,再者,若直接進行背面研磨,背面磨床之力不會均勻地施加,而反映出保護黏著膠帶之基材層的凹凸,凹凸亦轉印至晶圓之背面。由保護樹脂層形成保護層時,僅以旋轉塗佈有時係無法充分的平坦化,有時還是會在保護層表面產生凹凸,且被轉印至晶圓之背面。 For example, when the protective layer is a protective adhesive tape, the step is to flatten the base layer of the protective adhesive tape. If the protective adhesive tape is attached to the surface of the wafer in step (1), the unevenness of the wafer surface will be transferred to the base layer of the protective adhesive tape. Furthermore, if back grinding is performed directly, the force of the back grinder will not be applied evenly, and the unevenness of the base layer of the protective adhesive tape will be reflected, and the unevenness will also be transferred to the back of the wafer. When the protective layer is formed by a protective resin layer, it is sometimes not possible to fully flatten it by simply rotating the coating, and sometimes unevenness will still be generated on the surface of the protective layer and transferred to the back of the wafer.

如此地在背面研磨之前使被轉印有凹凸之保護黏著膠帶的基材層平坦化,使背面磨床之力均勻地施加,可防止凹凸轉印至晶圓之背面。 This flattens the backing layer of the protective adhesive tape onto which the irregularities have been transferred before back grinding, allowing the back grinder's force to be applied evenly and preventing the irregularities from being transferred to the back side of the wafer.

平坦化係只要可防止凹凸轉印至上述晶圓之背面即可,並無特別 限制,較佳係例如滿足以下之條件者。 There are no specific restrictions on planarization, as long as it prevents the unevenness from being transferred to the back surface of the wafer. However, it is preferred that the following conditions be met.

涵蓋被切削之面整體,前述保護層之不與晶圓相接的面之凹部與凸部之差以5μm以下為佳,以3μm以下更佳,以1μm以下為特佳。 Covering the entire surface being cut, the difference between the concave and convex portions of the surface of the protective layer not in contact with the wafer is preferably 5 μm or less, more preferably 3 μm or less, and particularly preferably 1 μm or less.

在一實施型態中,前述平坦化係藉由切削、研磨或拋光而實施。 In one embodiment, the planarization is performed by cutting, grinding, or polishing.

在一實施型態中,前述切削係藉由刀具切削來進行。藉由刀具切削,相較於以磨床進行拋光而進行平坦化的情形,可解決拋光時之磨石阻塞等的問題,並可容易地進行平坦化。刀具切削係可藉由平面刨床(surface planar)來實施。 In one embodiment, the cutting is performed using a tool. Compared to flattening by polishing on a grinder, tool cutting can solve problems such as grinding stone clogging during polishing and facilitate flattening. Tool cutting can be performed using a surface planer.

步驟(3): Step (3):

步驟(3)係隔著黏接著層而使前述保護層之不與晶圓相接的面與支撐體接著,並形成積層體之步驟。 Step (3) is to connect the surface of the protective layer that is not in contact with the wafer to the support body via the adhesive layer to form a laminate.

黏接著層 Adhesive layer

黏接著層係為了使保護層之不與晶圓相接的面與支撐體接著而使用。黏接著層係將晶圓暫時固定於支撐體,在加工完成後,例如,可施用藉由IR雷射法、UV照射法、雷射去除法、溶劑剝離法、熱/UV發泡法、機械剝離法等而可容易分離支撐體之公知的暫時固定材,藉由旋轉塗佈等塗佈液狀接著劑(溶解於溶劑之接著劑等)而形成者亦可為黏接著膠帶。黏接著層係可形成於支撐體上、保護層上、或其兩者。黏接著層之不均厚度係以5μm以下為佳,以3μm以下更佳,以1μm以下為特佳。 The adhesive layer is used to bond the surface of the protective layer that is not in contact with the wafer to the support. The adhesive layer temporarily secures the wafer to the support. After processing is complete, the support can be easily separated using methods such as IR laser irradiation, UV irradiation, laser ablation, solvent stripping, heat/UV foaming, or mechanical stripping. A known temporary fixing material can be used, such as an adhesive tape applied by spin coating or other methods using a liquid adhesive (such as an adhesive dissolved in a solvent). The adhesive layer can be formed on the support, the protective layer, or both. The uneven thickness of the adhesive layer is preferably 5 μm or less, more preferably 3 μm or less, and particularly preferably 1 μm or less.

黏接著層係選自丙烯酸系、聚矽氧系、聚醯亞胺系、橡膠系之至少1種。黏接著層為黏接著膠帶時,黏接著膠帶可為單層,亦可為複數之層的積層體,亦可為在層之中包含基材膜而成的雙面膠帶。 The adhesive layer is at least one selected from acrylic, silicone, polyimide, and rubber. When the adhesive layer is an adhesive tape, the adhesive tape may be a single layer, a laminate of multiple layers, or a double-sided tape including a base film.

支撐體 Support body

支撐體較佳係具有充分的強度與剛性,且耐熱性、耐藥性、厚度精度優異者。使用如此支撐體,即使為在研磨後晶圓經薄化的情形,亦可安定地操作晶圓,不產生彎曲等,可使晶圓供給至多數之及/或各式各樣的製程。 The support preferably possesses sufficient strength and rigidity, as well as excellent heat resistance, chemical resistance, and thickness accuracy. Using such a support allows for stable wafer handling without warping, even after wafer thinning after polishing, enabling wafers to be fed into a wide variety of processes.

在支撐體係可使用公知之支撐體,較佳使用的材料可列舉如:矽、藍寶石、水晶、金屬(例如鋁、銅、鋼、不鏽鋼)、各種之玻璃及陶瓷、樹脂(例如聚醯亞胺、聚醯胺、環氧、酚、聚苯醚、聚醚醚酮、聚醚醯亞胺、全芳香族聚醯胺、聚苯基硫醚樹脂)。支撐體係可以單一的材料所構成,亦可以複數之材料所構成,可包含堆積於基材上之其他材料。例如,在矽晶圓上可具有氮化矽等之蒸鍍層。特別佳係支撐體由玻璃、矽、陶瓷、金屬、樹脂、或此等之複合材料所構成。 The support can be made of any known material. Preferred materials include silicon, sapphire, crystal, metals (such as aluminum, copper, steel, and stainless steel), various types of glass and ceramics, and resins (such as polyimide, polyamide, epoxy, phenol, polyphenylene oxide, polyetheretherketone, polyetherimide, wholly aromatic polyamide, and polyphenylene sulfide). The support can be composed of a single material or a combination of materials, including other materials deposited on a substrate. For example, a silicon wafer can have a deposited layer of silicon nitride or the like. Particularly preferred are supports composed of glass, silicon, ceramics, metal, resin, or a composite of these materials.

在一實施型態中,前述黏接著層係可在步驟(2)經平坦化之前述保護黏著膠帶的基材層所製作成,又,可在前述支撐體之表面所製作成,亦可形成於兩面。黏接著層之製作方法可列舉例如:黏接著層為液狀接著劑(溶解於溶劑之接著劑等)時係藉由旋轉塗佈來進行,黏著層為膠帶時係藉由膠帶之貼合來進行的方法,但不限定於此等。 In one embodiment, the adhesive layer can be formed on the base layer of the protective adhesive tape before being flattened in step (2), or on the surface of the support, or on both surfaces. The adhesive layer can be formed by, for example, spin coating when the adhesive layer is a liquid adhesive (such as an adhesive dissolved in a solvent), or by laminating the adhesive tape when the adhesive layer is an adhesive tape, but the method is not limited to these.

背面研磨步驟: Back grinding steps:

背面研磨步驟典型上係晶圓之研磨、拋光處理,但不限定於此,而可包含單片化等。 The backside grinding step typically involves grinding and polishing the wafer, but is not limited to this and can also include singulation.

使在表面上形成電極之晶圓進行研磨或拋光時,電極之非形成面(背面)係經研磨或拋光。如此背面之研磨或拋光後的晶圓之厚度係所得到的半導體裝置依所使用的電子機器而異,但較佳係設定於200μm以下,更佳係設定於50μm以 下。藉此,進行所得到的半導體裝置之薄型化,並實現使用如此的半導體裝置之電子機器的小型化。 When grinding or polishing a wafer with electrodes formed on its surface, the non-electrode surface (back surface) is also ground or polished. The thickness of the wafer after back grinding or polishing varies depending on the electronic device used in the resulting semiconductor device, but is preferably set to 200μm or less, and more preferably 50μm or less. This reduces the thickness of the resulting semiconductor device, and contributes to the miniaturization of the electronic device using such a semiconductor device.

將晶圓進行研磨或拋光時,在步驟(3),隔著黏接著層而與剛性的支撐體積層而厚度精度佳地形成積層體,可以更優異的加工精度研磨晶圓等,以及,在此研磨等之後,不對晶圓造成損傷,而使晶圓供給至後述背面處理步驟,或可從支撐體及黏接著層容易地分離。 When the wafer is ground or polished, in step (3), a laminate is formed with good thickness accuracy through the adhesive layer and the rigid support layer, so that the wafer can be ground with better processing accuracy, and after this grinding, the wafer is not damaged and can be supplied to the back side processing step described later, or can be easily separated from the support and the adhesive layer.

在一實施型態中,本發明之晶圓的背面研磨方法係在晶圓之背面研磨後,可更包含晶圓之背面處理步驟、支撐體去除步驟、黏接著層去除步驟、或保護黏著膠帶去除步驟之至少1個步驟。 In one embodiment, the wafer backside grinding method of the present invention may further include at least one of a wafer backside processing step, a support removal step, an adhesive layer removal step, or a protective adhesive tape removal step after the wafer backside grinding.

背面處理步驟: Backside processing steps:

本發明之晶圓的背面研磨方法係進一步在晶圓之背面研磨後具有作為背面處理步驟之將晶圓進行加工處理及/或化學處理之步驟。 The wafer backside grinding method of the present invention further includes a step of processing and/or chemically treating the wafer as a backside treatment step after backside grinding of the wafer.

上述加工處理可列舉例如:退火處理、背面電極形成(濺射:Sputtering)、蒸鍍、蝕刻、化學氣相沉積法(CVD)、物理氣相沉積法(PVD)、阻劑塗佈/圖型化、回焊、摻雜之離子佈植等,但不限定於此等。 Examples of the aforementioned processing include, but are not limited to, annealing, back electrode formation (sputtering), evaporation, etching, chemical vapor deposition (CVD), physical vapor deposition (PVD), resist coating/patterning, reflow, and doping ion implantation.

上述化學處理典型上係使用酸、鹼或有機溶劑之處理,可列舉例如:電解鍍敷、無電解鍍敷等鍍敷處理、或者以氟酸、氫氧化四甲基銨水溶液(TMAH)等濕式蝕刻處理、或者以N-甲基-2-吡咯啶酮、單乙醇胺、DMSO等之阻劑剝離製程、或以濃硫酸、氨水、過氧化氫溶液等之洗淨製程等,但不限定於此等。 The chemical treatments described above typically utilize acids, alkalis, or organic solvents. Examples include, but are not limited to, plating processes such as electrolytic plating and electroless plating, wet etching processes using hydrofluoric acid or tetramethylammonium hydroxide (TMAH), resist stripping processes using N-methyl-2-pyrrolidone, monoethanolamine, or DMSO, and cleaning processes using concentrated sulfuric acid, ammonia, or hydrogen peroxide solutions.

在一實施型態中,在上述背面處理係包含蝕刻、電極形成、離子佈植、退火處理之中的至少1者。 In one embodiment, the back surface treatment includes at least one of etching, electrode formation, ion implantation, and annealing.

支撐體去除步驟: Support removal steps:

支撐體去除步驟係從前述積層體去除前述支撐體之步驟。支撐體之去除方法可列舉例如:IR雷射法、UV照射法、雷射去除法、溶劑剝離法、熱/UV發泡法、機械剝離法等,但不限定於此等。 The support removal step is a step of removing the support from the laminate. Examples of support removal methods include, but are not limited to, IR laser removal, UV irradiation, laser removal, solvent stripping, thermal/UV foaming, and mechanical stripping.

保護層及黏接著層去除步驟 Protective layer and adhesive layer removal steps

保護層及黏接著層去除步驟係從薄化晶圓去除保護層等之步驟,保護層及黏接著層係可同時去除,亦可逐次地去除。去除方法可列舉如:剝離、洗淨等。 The protective layer and adhesive layer removal step involves removing the protective layer from the thinned wafer. The protective layer and adhesive layer can be removed simultaneously or sequentially. Removal methods include peeling and cleaning.

在一態樣中,提供一種電子裝置之製造方法,其係在製造步驟中包含本發明之晶圓的背面研磨方法。亦即,可將以本發明之晶圓的背面研磨方法所研磨處理之晶圓進一步供給至其後的步驟,而製造最終製品。在晶圓上形成電路等之情形,進行通常使用於晶切、黏晶、封裝、及密封等之半導體裝置、或電子裝置之製造的步驟,並可製造作為製品之半導體裝置、電子裝置。 In one aspect, a method for manufacturing an electronic device is provided, wherein the wafer backside grinding method of the present invention is included in the manufacturing steps. Specifically, a wafer processed by the wafer backside grinding method of the present invention can be further supplied to subsequent steps to produce a final product. When forming circuits, etc. on the wafer, steps commonly used in the manufacture of semiconductor devices or electronic devices, such as wafer dicing, die bonding, packaging, and sealing, are performed, and the resulting semiconductor device or electronic device can be manufactured as a finished product.

在一實施型態中,前述電子裝置為電力裝置。如前述,電力裝置係使用於逆向器或轉換器等電力轉換器,從其特性、構造、及製造步驟等在晶圓之表面具有凹凸。依據本發明,可抑制由其凹凸之影響所致的裝置特性之影響。 In one embodiment, the electronic device is an electrical device. As previously mentioned, electrical devices are used in power converters such as inverters and converters, and due to their characteristics, structure, and manufacturing steps, they may have irregularities on the surface of the wafer. According to the present invention, the effects of these irregularities on device characteristics can be suppressed.

又,不僅在晶圓之背面研磨中,在各式各樣的處理製程中,可抑制凹凸之影響並提升操作性,故例如,亦可應用在垂直貫穿矽基板之電極(TSV)或者凹凸大的凸塊晶圓之研磨用途中。 Furthermore, it can suppress the effects of unevenness and improve workability in various processing steps, not only during wafer backside grinding, but also in polishing vertical through-silicon vias (TSVs) or wafers with large bumps.

以下,參照圖面而更進一步說明本發明之一實施型態的晶圓之背面研磨方法,但本發明係不限定於此等之實施型態。 The following further describes a wafer backside grinding method according to one embodiment of the present invention with reference to the drawings. However, the present invention is not limited to this embodiment.

(實施型態1) (Implementation Type 1)

圖1(a)之符號1係表示經背面研磨而薄化之半導體晶圓(以下,稱為晶圓)。該 晶圓1係矽晶圓等,且加工前之厚度例如為700μm至800μm且被均勻化。在晶圓1之表面11係藉由格子狀之分割預定線而區劃複數之方形的裝置。在裝置係形成電極等,且在晶圓1之表面11上產生凹凸。 Reference numeral 1 in Figure 1(a) represents a semiconductor wafer (hereinafter referred to as a wafer) that has been thinned by back grinding. Wafer 1 is a silicon wafer, for example, and has a uniform thickness of, for example, 700 to 800 μm before processing. Surface 11 of wafer 1 is divided into a plurality of square devices by predetermined grid-like dividing lines. Electrodes and other components are formed on the devices, creating irregularities on surface 11 of wafer 1.

本實施型態之晶圓的背面研磨方法係如圖1(a)至(e)所示,在晶圓1之表面11黏貼保護黏著膠帶3,然後,使其保護黏著膠帶3之基材層31藉由刀具研磨進行平坦化,然後,隔著黏接著層4而使經平坦化的保護黏著膠帶3之基材層33與支撐體5接著,然後,研磨晶圓1之背面12而薄化至目的之厚度(例如200μm以下)者。以下,詳述其過程。 The wafer backside grinding method of this embodiment is shown in Figures 1(a) to (e). A protective adhesive tape 3 is applied to the surface 11 of the wafer 1. The base layer 31 of the protective adhesive tape 3 is then flattened by tool grinding. The flattened base layer 33 of the protective adhesive tape 3 is then bonded to a support 5 via an adhesive layer 4. Finally, the backside 12 of the wafer 1 is ground to a desired thickness (e.g., less than 200μm). The process is described in detail below.

如上述,本實施型態首先係在晶圓1之表面11黏貼保護黏著膠帶3。黏貼係使用自動黏貼裝置而減壓至100Pa以下,在100℃以下加熱來進行。如圖1(b)所示,晶圓1之表面11上的凹凸被轉印至被黏貼之保護黏著膠帶3的基材層31。 As described above, this embodiment first applies protective adhesive tape 3 to surface 11 of wafer 1. This application is performed using an automated laminating device, reducing the pressure to below 100 Pa and heating the surface to below 100°C. As shown in Figure 1(b), the unevenness on surface 11 of wafer 1 is transferred to the base layer 31 of the applied protective adhesive tape 3.

在表面11黏貼有保護黏著膠帶3之晶圓1係接著平坦地切削其保護黏著膠帶3之基材層31。其切削係使用平面刨床。若依據該平面刨床,使晶圓1之背面12吸附於真空吸盤式之吸盤台的吸附面而保持,保護黏著膠帶3之基材層31藉由切削單元的旋轉之切削工具的咬合而平坦地切削。 Wafer 1, with protective adhesive tape 3 attached to its surface 11, is then flattened by cutting its base layer 31. This cutting is performed using a planer. This planer holds the backside 12 of wafer 1 on the suction surface of a vacuum chuck. The rotating cutting tool of the cutting unit engages and flattens the base layer 31 of protective adhesive tape 3.

然後,在經平坦化的保護黏著膠帶之基材層33形成黏接著層4。為了形成該黏接著層4,係適宜採用所謂的旋轉塗佈法,其係在被旋轉驅動之台上,經平坦化的保護黏著膠帶之基材層33露出的狀態,且以使晶圓1之中心與台之旋轉軸一致之方式載置晶圓1並保持,使台旋轉,並在旋轉之晶圓1的中心滴入液狀接著劑,使黏接著劑以離心力全面地塗佈於經平坦化的保護黏著膠帶之基材層33。以如此方式而如圖1(d)所示,在經平坦化的保護黏著膠帶之基材層33上係形 成黏接著層4。 Next, an adhesive layer 4 is formed on the flattened protective adhesive tape base layer 33. To form this adhesive layer 4, a so-called spin coating method is preferably employed. This method involves placing the flattened protective adhesive tape base layer 33 on a rotating table, with the wafer 1's center aligned with the table's rotation axis. The table is then rotated, and liquid adhesive is dripped onto the center of the rotating wafer 1. This adhesive is then applied centrifugally to the entire surface of the flattened protective adhesive tape base layer 33. In this manner, as shown in Figure 1(d), an adhesive layer 4 is formed on the flattened protective adhesive tape base layer 33.

然後,藉由在黏接著層4接合支撐體5,可獲得圖1(e)所示之積層體。如此方式所得到的積層體係在經平坦化的保護黏著膠帶3之基材層33無凹凸,故以晶圓1背面12之研磨,並無轉印晶圓1表面11之凹凸,即使藉由背面研磨使晶圓1薄化,亦具有支撐體5,故在其後之處理製程中不喪失輸送性等之操作性。 Then, by bonding the support 5 to the adhesive layer 4, the laminate shown in Figure 1(e) is obtained. The laminate obtained in this manner has no unevenness on the flattened base layer 33 of the protective adhesive tape 3. Therefore, polishing the back surface 12 of the wafer 1 does not transfer the unevenness of the wafer surface 11. Even if the wafer 1 is thinned by backside grinding, the support 5 is still present, ensuring that subsequent handling processes maintain ease of transport and other handling characteristics.

然後,研磨晶圓1之背面12而使晶圓1薄化成目的之厚度。在晶圓1之背面研磨係適宜使用進給研磨之研磨裝置。若依據該研磨裝置,使支撐體5吸附於真空吸盤式之吸盤台的吸附面而保持積層體,藉由2台研磨單元(粗研磨用與精加工研磨用)而對於晶圓1之背面12依序進行粗研磨與精加工研磨。 Next, the back side 12 of the wafer 1 is polished to thin the wafer 1 to the desired thickness. A feed-type polishing device is suitable for backside polishing of the wafer 1. This polishing device holds the laminate by attaching the support 5 to the suction surface of a vacuum chuck-type chuck table. Two polishing units (one for rough polishing and one for finish polishing) sequentially perform rough and finish polishing on the back side 12 of the wafer 1.

此時,為了卸下薄化之晶圓1,在去除支撐體5之後,去除保護黏著膠帶3。支撐體5之去除係將去除劑插入支撐體5與黏接著層4之界面,並以拉起支撐體5之機械剝離法來進行。保護黏著膠帶3之去除係使保護黏著膠帶3從晶圓1撕離來進行。藉由使用保護黏著膠帶3,剝離後之晶圓的洗淨步驟可為不需要或最小限,故作業性優異,並可將半導體裝置、電子裝置之製造成本控制至更低。 To remove the thinned wafer 1, the protective adhesive tape 3 is removed after the support 5. Support 5 is removed by mechanically peeling by inserting a remover into the interface between support 5 and adhesive layer 4 and pulling up support 5. Protective adhesive tape 3 is removed by peeling it from wafer 1. Using protective adhesive tape 3 eliminates or minimizes the need for cleaning the wafer after peeling, resulting in excellent workability and lowering manufacturing costs for semiconductor and electronic devices.

(實施型態2) (Implementation Type 2)

使用保護樹脂層取代實施型態1之保護黏著膠帶3,可保護晶圓1之表面11。此時,適宜採用所謂的旋轉塗佈法,其係在旋轉驅動之台上,在晶圓1之表面11露出的狀態,且以使晶圓1之中心與台之旋轉軸為一致之方式載置晶圓1並保持,使台旋轉,並在旋轉之晶圓1的中心滴入前驅體樹脂液,使前驅體樹脂液以離心力全面地塗佈於晶圓1之表面11。將旋轉塗佈後之塗膜放置於熱板上使其乾燥,完全去除膜內之溶劑而成為保護層。其以外之步驟係與實施型態1相同。 Using a protective resin layer instead of the protective adhesive tape 3 of Embodiment 1 protects the surface 11 of wafer 1. A spin coating method is suitable for this purpose. Wafer 1 is placed and held on a rotating table, with its surface 11 exposed, so that its center aligns with the table's rotation axis. The table rotates, and a precursor resin liquid is dripped onto the center of the rotating wafer 1. This liquid is then applied centrifugally to the entire surface 11 of wafer 1. The resulting film is then dried on a hot plate to completely remove the solvent from the film, forming a protective layer. The remaining steps are the same as those of Embodiment 1.

此時,藉由洗淨步驟去除保護層以取代上述實施型態1之保護黏 著膠帶3的剝離。在洗淨步驟中係使保護層朝上,在旋轉驅動之台上固定晶圓1,噴霧洗淨溶劑,並載置洗淨溶劑,經靜置之後,捨去洗淨溶劑,重新地以同樣方式載置洗淨溶劑並靜置,以同樣操作重複2次之後,一邊使晶圓1旋轉,一邊噴霧異丙醇(IPA)而進行清洗。 At this point, the protective layer is removed during a cleaning step, replacing the peeling of the protective adhesive tape 3 in Embodiment 1. During the cleaning step, with the protective layer facing upward, the wafer 1 is mounted on a rotating table. A cleaning solvent is sprayed on the wafer and placed on the table. After allowing the cleaning solvent to stand, the cleaning solvent is discarded and the cleaning solvent is reapplied and placed on the table again in the same manner. This process is repeated twice, and the wafer 1 is then rotated while being cleaned by spraying with isopropyl alcohol (IPA).

[產業上之可利用性] [Industrial Availability]

本發明之晶圓的背面研磨方法係可抑制晶圓表面之凹凸的影響,且可在晶圓薄化後之各式各樣的處理製程中提升操作性,故大幅地貢獻於半導體裝置、電子裝置等之生產性提升,並在包含半導體製程產業之電子零件產業、使用電子零件之電性電子產業、輸送機械產業、資訊通信產業、精密機器產業等產業的各領域中具有高的可利用性。 The wafer backside grinding method of the present invention can suppress the effects of surface irregularities on the wafer and improve operability in various post-wafer thinning processing steps. Therefore, it significantly contributes to productivity improvements in semiconductor and electronic devices. It has high applicability in various industries, including the electronic component industry within the semiconductor manufacturing industry, the electrical and electronics industry using electronic components, the transportation machinery industry, the information and communications industry, and the precision machinery industry.

1:半導體晶圓 1: Semiconductor wafer

3:保護黏著膠帶 3: Protective adhesive tape

4:黏接著層 4: Adhesive layer

5:支撐體 5: Support body

11:晶圓之表面 11: Wafer surface

12:晶圓之背面 12: Back side of wafer

31:保護黏著膠帶之基材層 31: Protective adhesive tape substrate layer

32:保護黏著膠帶之黏著層 32: Adhesive layer of protective adhesive tape

33:經平坦化的保護黏著膠帶之基材層 33: Planarized protective adhesive tape substrate layer

Claims (14)

一種晶圓之背面研磨方法,係表面具有凹凸的晶圓之背面研磨方法,該背面研磨方法係在晶圓的背面研磨之前,具備下列步驟: 步驟(1),其係在前述晶圓之表面形成保護層; 步驟(2),係使前述保護層之不與晶圓相接的面平坦化;及 步驟(3),係隔著黏接著層而使前述保護層之不與晶圓相接的面與支撐體接著, 其中,前述保護層為保護黏著膠帶,且 前述表面具有凹凸之晶圓為藉由形成於表面之電極、電路圖型、聚醯亞胺、不良標記、或者凸塊之至少1者而具有凹凸之晶圓。 A back grinding method for a wafer is a back grinding method for a wafer having a surface with uneven surfaces. The back grinding method comprises the following steps before grinding the back of the wafer: Step (1) is to form a protective layer on the surface of the wafer; Step (2) is to flatten the surface of the protective layer that is not in contact with the wafer; and Step (3) is to bond the surface of the protective layer that is not in contact with the wafer to a support via an adhesive layer, Wherein, the protective layer is a protective adhesive tape, and The wafer having an uneven surface is a wafer having uneven surfaces formed by at least one of an electrode, a circuit pattern, polyimide, a bad mark, or a bump formed on the surface. 如請求項1所述之晶圓之背面研磨方法,其中,前述保護黏著膠帶之基材層為含有選自由PET、PEN、PBT、LCP、PI、PA、PEEK及PPS所組成的群組中之至少1種的樹脂。The wafer back grinding method as described in claim 1, wherein the base layer of the protective adhesive tape comprises at least one resin selected from the group consisting of PET, PEN, PBT, LCP, PI, PA, PEEK and PPS. 如請求項1或2所述之晶圓之背面研磨方法,其中,前述表面具有凹凸之晶圓為具有5至300μm的高度的凹凸之晶圓。The back grinding method of a wafer as described in claim 1 or 2, wherein the wafer having the uneven surface has an uneven surface with a height of 5 to 300 μm. 如請求項1或2所述之晶圓之背面研磨方法,其中,前述平坦化之步驟為藉由切削、研磨、或拋光進行平坦化之步驟。The wafer backside grinding method as described in claim 1 or 2, wherein the planarization step is a planarization step performed by cutting, grinding, or polishing. 如請求項4所述之晶圓之背面研磨方法,其中,前述切削為藉由刀具切削來進行。The back grinding method of a wafer as described in claim 4, wherein the cutting is performed by tool cutting. 如請求項1或2所述之晶圓之背面研磨方法,其中,前述黏接著層為液狀接著劑或黏接著膠帶。The wafer backside grinding method according to claim 1 or 2, wherein the adhesive layer is a liquid adhesive or an adhesive tape. 如請求項1或2所述之晶圓之背面研磨方法,其中,前述支撐體為由玻璃、矽、陶瓷、金屬、樹脂或此等之複合材料所構成。The wafer backside grinding method as described in claim 1 or 2, wherein the support body is composed of glass, silicon, ceramic, metal, resin or a composite material thereof. 如請求項1或2所述之晶圓之背面研磨方法,其中,在前述步驟(2)之後,於前述步驟(3)之前,包含下列步驟:在經平坦化之前述保護層的不與晶圓相接的面、前述支撐體之表面或其兩者,形成前述黏接著層。A back grinding method for a wafer as described in claim 1 or 2, wherein, after the aforementioned step (2) and before the aforementioned step (3), the following step is included: forming the aforementioned adhesive layer on the surface of the protective layer not in contact with the wafer before flattening, the surface of the aforementioned support body, or both. 如請求項1或2所述之晶圓之背面研磨方法,其中,在晶圓之背面研磨後,更包含晶圓之背面處理步驟。The wafer backside grinding method as described in claim 1 or 2, wherein after the backside grinding of the wafer, the backside processing step of the wafer is further included. 如請求項9所述之晶圓之背面研磨方法,其中,前述晶圓之背面處理步驟為包含蝕刻、電極形成、離子佈植、退火之中的至少1者。The backside grinding method of a wafer as described in claim 9, wherein the backside processing step of the wafer includes at least one of etching, electrode formation, ion implantation, and annealing. 如請求項1或2所述之晶圓之背面研磨方法,其中,前述晶圓的背面研磨後之厚度為200μm以下。The wafer backside grinding method as described in claim 1 or 2, wherein the thickness of the wafer after backside grinding is less than 200 μm. 一種電子裝置之製造方法,係在製造步驟中包含請求項1至11中任一項所述之晶圓之背面研磨方法。A method for manufacturing an electronic device includes the backside grinding method of a wafer as described in any one of claims 1 to 11 in the manufacturing steps. 如請求項12所述之電子裝置之製造方法,其中,前述電子裝置為在背面側亦具備電極之裝置。A method for manufacturing an electronic device as described in claim 12, wherein the electronic device is a device having an electrode on the back side. 如請求項13所述之電子裝置之製造方法,其中,前述電子裝置為電力裝置。A method for manufacturing an electronic device as described in claim 13, wherein the electronic device is an electrical device.
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