TWI894034B - Flyback switching power supply and primary and secondary control circuits - Google Patents

Abstract

The present invention provides a flyback switching power supply and its primary and secondary control circuits. The flyback switching power supply includes a transformer, a primary control circuit connected to the transformer's primary winding, and a Universal Serial Bus (USB) interface connected to the transformer's secondary winding. The secondary control circuit used in the flyback switching power supply is connected to the transformer's secondary winding and is configured to, under normal operation, enter a zero-power standby state upon detecting that the USB interface is not electrically connected to an electronic device. The transformer also transmits a first predetermined code to notify the primary control chip to also enter the zero-power standby state.

Description

Flyback switching power supply and primary and secondary control circuits

The present invention relates to the field of circuits, and more specifically to a flyback switching power supply and its primary and secondary control circuits.

In recent years, with people's reliance on electronic devices rapidly increasing, their output power has become increasingly higher, charging times have become increasingly shorter, and power conversion efficiency has become increasingly higher. However, electronic devices spend most of their time in standby mode, where they are not charging. Their chargers are often not disconnected from the power supply, leaving them in an "idle" standby state. While the power consumption of a device may not be significant when viewed individually, the total power consumption accumulated over long periods of standby time is still considerable. Reducing this power consumption is a topic of growing concern in the industry.

According to an embodiment of the present invention, a secondary-side control circuit for use in a flyback switching power supply includes a transformer, a primary-side control circuit connected to the transformer's primary winding, and a Universal Serial Bus (USB) interface connected to the transformer's secondary winding. The secondary-side control circuit is connected to the transformer's secondary winding and is configured to, in normal operation, enter a zero-power standby state upon detecting that no electrical connection is established between the USB interface and an electronic device. The secondary-side control circuit also notifies the primary-side control chip to enter a zero-power standby state by transmitting a first predetermined code via the transformer.

According to an embodiment of the present invention, a primary-side control circuit for use in a flyback switching power supply includes a transformer and a secondary-side control circuit connected to the secondary winding of the transformer. The primary-side control circuit is connected to the primary winding of the transformer and is configured to, in normal operation, determine whether the secondary winding of the transformer is demagnetized based on a demagnetization detection signal indicating demagnetization of the secondary winding of the transformer. Whether the winding has completed demagnetization; and when it is determined that the secondary winding of the transformer has completed demagnetization, when it is detected that the primary current detection signal representing the current flowing through the primary winding of the transformer is a negative voltage, the amplitude of the primary current detection signal is lower than a second predetermined voltage, and the duration of the negative voltage of the primary current detection signal reaches a third predetermined time, starting to recognize a predetermined code from the secondary control circuit.

The flyback switching power supply according to an embodiment of the present invention includes: a transformer; the secondary-side control circuit connected to the secondary winding of the transformer; and the primary-side control circuit connected to the primary winding of the transformer.

1,2: Predetermined encoding

100: Flyback switching power supply

102: Primary side control chip

104: Secondary control chip

AVDD: internal power supply

Cbulk: Primary bulk capacitance

CC1: Universal Serial Bus Communication Channel 1

CC2: Universal Serial Bus Communication Channel 2

Cdd: Chip power supply capacitor

Co: Secondary side output capacitance

CS: Current detection

D1: Rectifier diode

D2: Body diode

DEMG: Demagnetization detection pin

DN: Universal Serial Bus data signal line negative

DP: Universal Serial Bus data signal line positive

Drain: Power transistor drain

FB: Feedback Leads

Gate: Output switch drive pin

GND: Chip ground

HV: High Voltage Pins

IFB: Current Feedback Compensation Pin

ISN: Output current detection negative pin

ISP: Output current detection positive pin

M: Transistor

Naux: Auxiliary winding

Np: Primary Winding

Ns: Secondary Winding

OPTO: Optocoupler Pin

PS: Power module

Q, Q1: Power transistors

Q2: Synchronous rectifier power transistor

Q3: Synchronous rectification auxiliary transistor

R1, R2: voltage divider resistors

Rs: Primary side current detection resistor

Rst: Start resistor

RT: Over temperature protection pin

S102, S104, S106, S108: Steps

Sense: Output current detection resistor

SR gate: synchronous rectification control signal

SR Isk, I1: Current

SR Vdrain: Drain voltage

T1: Transformer

Tdemg: demagnetization time

Tring: Resonance time

TYPE-C: Common Serial Bus

Vbus: output voltage bus pin

VBUS: output voltage bus

Vcs: Primary side current detection signal

VDD, VIN: Chip power supply pins

Vdem, Vdemg: Demagnetization detection signal

Vdrain: Synchronous rectifier power transistor drain pin

VFB: Voltage Feedback Compensation Pin

Vgate: Transistor control signal

Vo: System output voltage

The present invention can be better understood from the following description of specific embodiments of the present invention in conjunction with the drawings, wherein:

Figure 1 shows a schematic structural diagram of a flyback switching power supply according to an embodiment of the present invention.

Figure 2 shows waveforms of multiple signals of the flyback switching power supply shown in Figure 1 under normal operating conditions.

Figure 3 shows an example flow chart of the operating state transition process of the flyback switching power supply shown in Figure 1.

Figure 4 shows a schematic diagram of the circuit modules related to entering and exiting the zero-power standby state in the primary and secondary control chips shown in Figure 1.

Figure 5 shows the waveforms of multiple signals of the flyback switching power supply shown in Figure 1 during the coding cycle and normal operation cycle.

Figure 6 shows waveforms of multiple signals when the flyback switching power supply shown in Figure 1 enters a zero-power standby state.

Figure 7 shows waveforms of multiple signals when the flyback switching power supply shown in Figure 1 exits the zero-power standby state.

The following describes in detail the features and exemplary embodiments of various aspects of the present invention. In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the present invention. However, it will be apparent to those skilled in the art that the present invention can be practiced without some of these specific details. The following description of the embodiments is intended merely to provide a better understanding of the present invention by illustrating examples thereof. The present invention is in no way limited to any specific configuration and algorithm set forth below, but rather encompasses any modifications, substitutions, and improvements to the elements, components, and algorithms without departing from the spirit of the present invention. In the drawings and the following description, well-known structures and technologies are not shown to avoid unnecessarily obscuring the present invention. In addition, it should be noted that the term "A and B are connected" used here can mean "A and B are directly connected" or "A and B are indirectly connected via one or more other components."

According to energy standards, standby power consumption of less than 5 milliwatts is considered zero. Based on this, the flyback switching power supply according to the present invention is proposed. It can achieve ultra-low standby power consumption without charging electronic devices, thereby significantly reducing energy waste.

Figure 1 shows a schematic diagram of the structure of a flyback switching power supply according to an embodiment of the present invention. As shown in Figure 1 , the flyback switching power supply 100 includes a transformer T1 (including a primary winding Np, a secondary winding Ns, and an auxiliary winding Naux), a primary-side control chip 102 with a built-in power transistor Q1, a secondary-side control chip 104 with a built-in synchronous rectifier power transistor Q2, and a Universal Serial Bus (USB)/Type-C interface.

As shown in Figure 1, when the flyback switching power supply 100 is in normal operation, the secondary-side control chip 104 enters a zero-power standby state when it detects, via the DP/DN or CC1/CC2 signal lines, that there is no electrical connection between the USB/TYPE-C interface and the electronic device. The secondary-side control chip 104 also enters a zero-power standby state by sending a predetermined code 1 via transformer T1, notifying the primary-side control chip 102 to also enter a zero-power standby state. At this point, most functional modules in the primary-side control chip 102 and the secondary-side control chip 104 cease operation, leaving only a very small number of functional modules in operation. The entire circuit system enters a zero-power standby state. When the flyback switching power supply 100 is in zero-power standby mode, the secondary-side control chip 104 detects an electrical connection between the USB/TYPE-C interface and an electronic device via the DP/DN or CC1/CC2 signal lines, thereby exiting zero-power standby mode. The secondary-side control chip 104 then sends a predetermined code 2 via transformer T1 to notify the primary-side control chip 102 to also exit zero-power standby mode. The entire circuit system then exits zero-power standby mode in less than 150ms.

As shown in FIG1 , in a flyback switching power supply 100, when an AC input voltage is connected, the electromagnetic interference (EMI) filtering circuit, the AC high voltage startup circuit, and the power supply module (PS) inside the primary control chip 102 charge the chip power supply capacitor Cdd connected to the chip power supply pin VDD of the primary control chip 102. When the voltage on the chip power supply capacitor Cdd (i.e., the chip power supply voltage of the primary control chip 102) is higher than the under voltage lockout (UVL) of the primary control chip 102, the power supply capacitor Cdd is turned off. When the system output voltage Vo is lower than the UVLO voltage, the primary control chip 102 starts operating. When the system output voltage Vo is lower, the body diode D2 of the synchronous rectifier power transistor Q2 inside the secondary control chip 104 is in the on state, and the system output voltage Vo gradually increases. When the system output voltage Vo is higher than the UVLO voltage of the secondary control chip 104, the secondary control chip 104 starts operating.

As shown in Figure 1, the working process of the flyback switching power supply 100 in normal operation includes the following stages:

In the first stage, when power transistor Q1 is in the on state, the primary winding Np of transformer T1 stores energy, and the secondary output capacitor Co provides energy to the secondary control chip 104 and the output load.

In the second stage, when power transistor Q1 switches from on to off, synchronous rectifier power transistor Q2 switches from off to on. While power transistor Q1 is off and synchronous rectifier power transistor Q2 is on, the energy stored in transformer T1's primary winding Np is released into transformer T1's secondary winding Ns, providing energy to the output load and charging the secondary-side output capacitor Co. The voltage on transformer T1's auxiliary winding Naux is divided by divider resistors R1 and R2 to generate a demagnetization detection signal Vdemg, which indicates the demagnetization of transformer T1's secondary winding Ns.

In the third stage, after the synchronous rectifier power transistor Q2 transitions from the on state to the off state, the inductance of transformer T1's primary winding Np resonates with the output capacitance of power transistor Q1. Depending on the output load, the primary-side control chip 102 controls the power transistor Q1 from the off state to the on state at different resonance valleys, repeating the above three stages. Ultimately, the desired output voltage, output current, and/or protection functions are provided to the electronic device via the USB/TYPE-C interface.

Figure 2 shows waveforms of multiple signals of the flyback switching power supply shown in Figure 1 under normal operation, where Vgate represents the transistor control signal for controlling the on/off state of the power transistor Q1; Vdemg represents the demagnetization detection signal representing the demagnetization of the secondary winding Ns of the transformer T1; Vcs represents the primary current detection signal representing the current flowing through the primary winding Np of the transformer T1; SR Vdrain represents the drain voltage of the synchronous rectifier power transistor Q2; SR gate represents the synchronous rectification control signal used to control the on and off state of the synchronous rectifier power transistor Q2; SRIsk represents the current flowing through the synchronous rectifier power transistor Q2 (i.e., the current flowing through the secondary winding Ns of transformer T1, also called the secondary-side current); Tdemg represents the demagnetization time of the secondary winding Ns of transformer T1; and Tring represents the resonance time between the inductance of the primary winding Np of transformer T1 and the output capacitance of the power transistor Q1.

FIG3 shows an example flow chart of the working state transition process of the flyback switching power supply shown in FIG1. As shown in FIG3, the working state transition process of the flyback switching power supply 100 includes: step S102, when the flyback switching power supply 100 starts working, it first enters the normal working state; step S104, the flyback switching power supply 100 detects whether the USB/TYPE-C interface is electrically connected to the electronic device. If so, it goes to step S102 (i.e., continues to be in the normal working state); otherwise, it goes to step S106; step S106, it returns to the normal working state. The flyback switching power supply 100 enters a zero-power standby state (e.g., first enters a no-load standby state, then enters a zero-power standby state). In step S108, the flyback switching power supply 100 detects whether the USB/TYPE-C interface is electrically connected to the electronic device. If so, the process proceeds to step S102 (e.g., first enters a no-load standby state, then enters a normal operating state). Otherwise, the process proceeds to step S106 (i.e., continues in the zero-power standby state).

Figure 4 shows a schematic diagram of the circuit modules related to entering and exiting the zero-power standby state in the primary and secondary control chips shown in Figure 1. As shown in Figure 4, in the secondary control chip 104, the DP/DM input/output (I/O) module or CC1/CC2 I/O module generates and sends a control signal to the digital control module upon detecting the absence or presence of an electrical connection between the USB/TYPE-C interface and the electronic device. This notifies the digital control module of the absence or presence of an electrical connection between the USB/TYPE-C interface and the electronic device. Upon receiving the control signal, the digital control module generates and sends a zero-power standby enable signal to the zero-power standby control module for enabling or disabling the zero-power standby state. The power consumption standby control module controls the relevant modules in the secondary-side control chip 104 to stop or restart operation based on the zero-power standby enable signal, and generates and sends a zero-power standby notification signal to the logic control module for notifying the exit or entry into the zero-power standby state; the synchronous rectification control module generates and sends a synchronous rectification control signal to the logic control module based on the drain voltage of the synchronous rectification power transistor Q2; the logic control module generates a predetermined code 1 or 2 based on the zero-power standby notification signal and the synchronous rectification control signal; the driver module drives the synchronous rectification power transistor Q2 to switch between the on state and the off state based on the predetermined code 1 or 2. Correspondingly, in the primary-side control chip 102, after determining that demagnetization of the transformer T1's secondary winding Ns has completed based on the demagnetization detection signal Vdem, the decoding module identifies a predetermined code 1 or 2 based on the primary-side current detection signal Vcs, generates and transmits the decoding result to the zero-power standby control module. Based on the decoding result, the zero-power standby control module controls the relevant modules in the primary-side control chip 102 to stop or restart operation and generates a transistor control signal for controlling the on and off state of the power transistor Q1. The driver module drives the power transistor Q1 between the on and off states based on the transistor control signal.

The following diagrams describe the operating process of the flyback switching power supply 100 when it enters and exits the zero-power standby state.

1) The process of exiting the zero-power standby state

In some embodiments, the secondary-side control chip 104 can transmit a predetermined code 1 by controlling the turn-off timing of the synchronous rectifier power transistor Q2 from the on state to the off state. To prevent false detection, the predetermined code 1 can include multiple flag bits, each flag bit corresponding to a coding cycle or a normal operating cycle of the flyback switching power supply 100. For example, flag bit 1 can correspond to a coding cycle of the flyback switching power supply 100, and flag bit 0 can correspond to a normal operating cycle of the flyback switching power supply 100. The secondary-side control chip 104 can control the turn-off timing of the synchronous rectifier power transistor Q2 during the coding cycle to be delayed by a predetermined duration (e.g., 5 μs) compared to the turn-off timing during the normal operating cycle.

Figure 5 shows waveforms of multiple signals of the flyback switching power supply shown in Figure 1 during the coding cycle and normal operating cycle. As shown in Figure 5, during the coding cycle (i.e., the cycle corresponding to flag bit 1), the synchronous rectifier power transistor Q2 changes from the on state to the off state after a predetermined delay (e.g., 5us) relative to the normal operating cycle (i.e., the cycle corresponding to flag bit 0). The current SRIsk flowing through the synchronous rectifier power transistor Q2 continues to increase in a negative direction to Isk1 after crossing zero. The system output voltage Vo reversely excites the secondary winding Ns of the transformer T1, and the voltage clamp on the auxiliary winding Naux of the transformer T1 is Vaux = ( Vo * Naux ) / Ns. , the demagnetization detection signal Vdemg maintains a plateau voltage; after the synchronous rectifier power transistor Q2 changes from the on state to the off state, the secondary winding Ns of the transformer T1 transfers the energy stored by reverse magnetization to the primary winding Np of the transformer T1, and the primary winding Np of the transformer T1 is reversely demagnetized. The reverse demagnetization energy flows back to the primary-side bulk capacitor Cbulk through the primary winding Np of the transformer T1 and the primary-side current detection resistor Rs.

As shown in Figure 5, during the coding cycle, the synchronous rectifier power transistor Q2 switches from the on state to the off state after a predetermined delay relative to the normal operating cycle. Therefore, the primary-side current detection signal Vcs is a negative voltage, significantly different from the positive voltage during the normal operating cycle. Therefore, after the primary control chip 102 determines that the secondary winding Ns of the transformer T1 has completed demagnetization based on the demagnetization detection signal Vdem, it can begin recognizing the predetermined code 1 when it detects that the primary current detection signal Vcs is a negative voltage, the amplitude of the primary current detection signal Vcs is lower than a predetermined voltage (e.g., -100mV), and the duration of the negative voltage of the primary current detection signal Vcs reaches a predetermined time (e.g., 150ns).

When the flyback switching power supply 100 is in fast-charge mode and the system output voltage Vo exceeds 5V, according to the charger fast-charge protocol, once the USB/TYPE-C interface is electrically disconnected from the electronic device, the system output voltage Vo quickly returns to 5V via the discharge circuit, and the transistor M on the output bus switches from the on state to the off state.

Figure 6 shows waveforms of multiple signals when the flyback switching power supply shown in Figure 1 enters a zero-power standby state. As shown in Figure 6, the secondary-side control chip 104 can use 1010 as the predetermined code 1 to notify the secondary-side control chip 104 to enter the zero-power standby state. After the zero-power standby enable signal transitions from a logically low level to a logically high level and a delay, the secondary-side control chip 104 enters the zero-power standby state. This state shuts down most functional modules, leaving only a few detection modules operational. This reduces the operating current of the secondary-side control chip 104 while maintaining power to the secondary-side control chip 104. Furthermore, upon recognizing the predetermined code 1, the primary control chip 102 enters a zero-power standby state, shutting down multiple functional modules to reduce the operating current of the primary control chip 102. This enables ultra-low operating currents for both the primary control chip 102 and the secondary control chip 104, achieving zero standby power consumption for the entire system.

After entering the zero-power standby state, to maintain system output without power loss, the primary-side control chip 102 and the secondary-side control chip 104 have the following power supply states:

When the primary-side control chip 102 detects that the voltage on the chip supply capacitor Cdd is lower than the sum of the primary-side control chip 102's UVLO voltage and a predetermined voltage (e.g., 0.5V), it controls the power transistor Q1 to switch from the off state to the on state. Furthermore, when the power transistor Q1 remains in the on state for a predetermined period of time, it controls the power transistor Q1 to switch from the on state to the off state. In other words, when the primary-side control chip 102 detects that the voltage on the chip supply capacitor Cdd reaches or falls below the sum of the primary-side control chip 102's UVLO voltage and 0.5V, it controls the power transistor Q1 to remain on for a minimum conduction time (Tonmin) to prevent the primary-side control chip 102 from powering down.

When the secondary-side control chip 104 detects that the system output voltage Vo is lower than the sum of the UVLO voltage of the secondary-side control chip 104 and a predetermined voltage (e.g., 0.5V), it controls the synchronous rectifier power transistor Q2 to change from the off state to the on state, and when the synchronous rectifier power transistor Q2 is in the on state for a predetermined time, it controls the synchronous rectifier power transistor Q2 to change from the on state to the off state. In other words, once the secondary side control chip 104 detects that the system output voltage Vo is lower than the sum of the UVLO voltage of the secondary side control chip 104 and 0.5V, it controls the synchronous rectifier power transistor Q2 to be turned on for a short period of time, and couples a negative small pulse to the demagnetization detection pin DEMG of the primary side control chip 102. The primary side control chip 102 is turned off through the DEMG pin. When the pin detects a small negative pulse with an amplitude lower than a preset threshold (e.g., -125mV) and a pulse width greater than a preset duration (e.g., 150ns), and no similar small negative pulse is received within the preset time, some functional modules are temporarily enabled to control the conduction time of power transistor Q1 to the minimum Tonmin time to prevent the secondary-side control chip 104 from losing power.

2) The process of exiting the zero-power standby state

In some embodiments, the secondary-side control chip 104 can transmit the predetermined code 2 by controlling the synchronous rectifier power transistor Q2 to switch between an on state and an off state. For example, the secondary-side control chip 104 can transmit the predetermined code 2 by controlling the synchronous rectifier auxiliary transistor Q3 (by limiting the current I1 to achieve weak conduction of the synchronous rectifier auxiliary transistor Q3) to switch between an on state and an off state during a plurality of synchronous rectifier weak conduction cycles at a fixed frequency.

FIG7 shows waveforms of multiple signals when the flyback switching power supply shown in FIG1 exits the zero-power standby state. As shown in Figure 7, the predetermined code 2 consists of multiple (e.g., eight) fixed-frequency synchronous rectification weak conduction cycles. A small negative pulse is coupled out of the demagnetization detection pin DEMG of the primary-side control chip 102. When the primary-side control chip 102 detects multiple small negative pulses with an amplitude less than a predetermined threshold (e.g., -125mV) and a pulse width of a predetermined duration (e.g., 150ns) via the demagnetization detection pin DEMG within a predetermined duration (e.g., 500us), the power transistor Q1 is controlled to conduct for a short period of time, causing the system output voltage Vo to return to 5V, thus exiting the zero-power standby state (e.g., entering the no-load standby state).

The flyback switching power supply according to the present embodiment enters a zero-power standby state when there is no electrical connection between the USB/TYPE-C interface and the electronic device, achieving ultra-low standby power consumption and significantly reducing energy waste. Furthermore, the flyback switching power supply according to the present embodiment requires no additional components, resulting in low system cost and a simple and reliable implementation.

The present invention may be implemented in other specific forms without departing from its spirit and essential characteristics. For example, the algorithms described in the specific embodiments may be modified without departing from the basic spirit of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, and the scope of the invention is to be defined by the appended claims rather than the foregoing description, and all changes coming within the meaning and range of equivalents of the claims are intended to be included within the scope of the invention.

100: Flyback switching power supply

102: Primary side control chip

104: Secondary control chip

AVDD: internal power supply

Cbulk: Primary bulk capacitance

CC1: Universal Serial Bus Communication Channel 1

CC2: Universal Serial Bus Communication Channel 2

Cdd: Chip power supply capacitor

Co: Secondary side output capacitance

CS: Current detection

D1: Rectifier diode

D2: Body diode

DEMG: Demagnetization detection pin

DN: Universal Serial Bus data signal line negative

DP: Universal Serial Bus data signal line positive

Drain: Power transistor drain

FB: Feedback Leads

Gate: Output switch drive pin

GND: Chip ground

HV: High Voltage Pins

I1: Current

IFB: Current Feedback Compensation Pin

ISN: Output current detection negative pin

ISP: Output current detection positive pin

M: Transistor

Naux: Auxiliary winding

Np: Primary Winding

Ns: Secondary Winding

OPTO: Optocoupler Pin

PS: Power module

Q1: Power transistor

Q2: Synchronous rectifier power transistor

Q3: Synchronous rectification auxiliary transistor

R1, R2: voltage divider resistors

Rs: Primary side current detection resistor

Rst: Start resistor

RT: Over-temperature protection detection

Sense: Output current detection resistor

T1: Transformer

TYPE-C: Common Serial Bus

Vbus: output voltage bus pin

VBUS: output voltage bus

VDD: Chip power supply pin

Vdrain: Synchronous rectifier power transistor drain voltage pin

VFB: Voltage Feedback Compensation Pin

VIN: Chip power supply pin

Vo: System output voltage

Claims (13)

A secondary-side control circuit for use in a flyback switching power supply includes a transformer, a primary-side control circuit connected to the transformer's primary winding, and a Universal Serial Bus (USB) interface connected to the transformer's secondary winding. The secondary-side control circuit is connected to the transformer's secondary winding and is configured to, under normal operation, enter a zero-power standby state upon detecting that no electrical connection is made between the USB interface and an electronic device. The transformer also transmits a first predetermined code to notify the primary-side control chip to enter the zero-power standby state. The secondary-side control circuit of claim 1, wherein the flyback switching power supply further includes a synchronous rectifier transistor connected to the secondary winding of the transformer, and the secondary-side control circuit is further configured to transmit the first predetermined code by controlling the timing at which the synchronous rectifier transistor changes from an on state to an off state. The secondary-side control circuit of claim 2, wherein the first predetermined code includes a plurality of flag bits, each of the plurality of flag bits corresponds to a coding cycle or a normal operating cycle of the flyback switching power supply, and the secondary-side control circuit is further configured to control the synchronous rectifier transistor to turn off during the coding cycle so that the timing is delayed by a first predetermined time compared to the timing during the normal operating cycle. The secondary-side control circuit of claim 3, wherein the plurality of flag bits include a start flag bit, and the start flag bit corresponds to a coding cycle of the flyback switching power supply. The secondary-side control circuit of claim 4 is further configured to, when in the zero-power standby state, control the synchronous rectifier transistor to switch from an off state to an on state upon detecting that the system output voltage of the flyback switching power supply is lower than the sum of an undervoltage lockout voltage of the secondary-side control circuit and a first predetermined voltage, and to control the synchronous rectifier transistor to switch from an on state to an off state when the synchronous rectifier transistor remains in the on state for a second predetermined time period. The secondary-side control circuit of claim 1 is further configured to, when in the zero-power standby state, exit the zero-power standby state upon detecting an electrical connection between the USB interface and the electronic device, and to send a second predetermined code via the transformer to notify the primary-side control chip to also exit the zero-power standby state. The secondary-side control circuit of claim 6, wherein the flyback switching power supply further includes a synchronous rectification auxiliary transistor connected to the secondary winding of the transformer, and the secondary-side control circuit is further configured to transmit the second predetermined code by controlling the synchronous rectification auxiliary transistor to switch between an on state and an off state. The secondary-side control circuit of claim 7, wherein the secondary-side control circuit is further configured to transmit the second predetermined code by controlling the synchronous rectification auxiliary transistor to switch between an on state and an off state during a plurality of synchronous rectification weak conduction cycles at a fixed frequency. A primary-side control circuit for a flyback switching power supply includes a transformer and a secondary-side control circuit connected to a secondary winding of the transformer. The primary-side control circuit is connected to the primary winding of the transformer and is configured to, in a normal operating state, determine whether the secondary winding of the transformer is demagnetized based on a demagnetization detection signal indicating demagnetization of the secondary winding of the transformer. Whether the secondary winding has completed demagnetization; and if it is determined that the secondary winding of the transformer has completed demagnetization, when it is detected that a primary-side current detection signal representing the current flowing through the primary winding of the transformer is a negative voltage and the amplitude of the primary-side current detection signal is lower than a second predetermined voltage and the duration of the negative voltage reaches a third predetermined time, starting to recognize a predetermined code from the secondary-side control circuit. The primary-side control circuit of claim 9 is further configured to enter the zero-power standby state upon recognizing that the predetermined code is a predetermined code for notifying the primary-side control circuit to enter the zero-power standby state. The primary-side control circuit of claim 10, wherein the flyback switching power supply further includes a power transistor connected between the primary winding of the transformer and ground, and the primary-side control circuit is further configured to, when in the zero-power standby state: control the power transistor to switch from an off state to an on state when it is detected that the supply voltage for the primary-side control circuit is lower than the sum of an undervoltage lockout voltage of the primary-side control circuit and a third predetermined voltage, and control the power transistor to switch from an on state to an off state when the power transistor remains in the on state for a fourth predetermined time period. The primary-side control circuit of claim 10 is further configured to, when in the zero-power standby state, exit the zero-power standby state upon detecting that a demagnetization detection signal indicating demagnetization of the secondary winding of the transformer exhibits a plurality of negative small pulses having a minimum voltage value lower than a fourth predetermined voltage and a pulse width reaching a sixth predetermined duration within a fifth predetermined duration. A flyback switching power supply comprises: a transformer; a secondary-side control circuit as described in any one of claims 1 to 8, connected to the secondary winding of the transformer; and a primary-side control circuit as described in any one of claims 9 to 12, connected to the primary winding of the transformer.