TWI893676B - Nitride semiconductor light-emitting element - Google Patents

Abstract

A nitride semiconductor light-emitting element includes an n-type semiconductor layer including Al, Ga and N, an active layer that is formed on one side of the n-type semiconductor layer and has a multiple quantum well structure with a plurality of well layers comprising Al, Ga and N, and a p-type semiconductor layer formed on a side of the active layer opposite to the n-type semiconductor layer. Silicon is included in the active layer. A full width at half maximum of an X-ray rocking curve for a (10-12) plane of the n-type semiconductor layer is not more than 812 arcsec.

Description

Nitride semiconductor light-emitting device

The present invention relates to a nitride semiconductor light-emitting device.

Patent Document 1 discloses a nitride semiconductor device having an n-type cladding layer formed of n-type AlGaN and an active layer formed of AlGaN. Patent Document 1 discloses that by setting the AlGaN mix value, which is the half-width of the X-ray wobble curve with respect to the (10-12) plane of the n-type cladding layer, to less than 500 arcsec, the luminous output of the nitride semiconductor device is improved. [Prior Art Document] (Patent Document)

Patent document 1: Japanese Patent Application Publication No. 2019-121655.

[Problem to be Solved by the Invention] The following new findings indicate that the relationship between the n-AlGaN mixture and luminous output differs when silicon is included in the active layer compared to when silicon is not included in the active layer.

The present invention was developed in light of the above-mentioned circumstances, and its purpose is to provide a nitride semiconductor light-emitting device that can achieve improved light output while including silicon in the active layer. [Technical Solution]

To achieve the aforementioned objectives, the present invention provides a nitride semiconductor light-emitting device comprising: an n-type semiconductor layer containing Al, Ga, and N; an active layer having a multi-quantum well structure comprising a plurality of well layers containing Al, Ga, and N, formed on one side of the n-type semiconductor layer; and a p-type semiconductor layer formed on the side of the active layer opposite to the side of the n-type semiconductor layer. In this nitride semiconductor light-emitting device, the half-width of an X-ray wobble curve with respect to the (10-12) plane of the n-type semiconductor layer is 812 arcsec or less, and the active layer contains silicon. [Effects of the Invention]

According to the present invention, it is possible to provide a nitride semiconductor light-emitting device that can achieve improved light output even when silicon is included in the active layer.

[Embodiment] The embodiment of the present invention will be described with reference to Figure 1. The embodiment described below represents a portion of the technical matters of various preferred aspects as appropriate specific examples for implementing the present invention, but the technical scope of the present invention is not limited to these specific aspects.

(Nitride Semiconductor Light-Emitting Element 1) Figure 1 is a schematic diagram schematically showing the structure of the nitride semiconductor light-emitting element 1. The dimensional ratios of the layers of the nitride semiconductor light-emitting element 1 (hereinafter referred to as "light-emitting element 1") in Figure 1 do not necessarily correspond to actual dimensions. Hereinafter, the stacking direction of the layers of the light-emitting element 1 will be referred to as the up-down direction. Furthermore, one side of the up-down direction, i.e., the side of the substrate 2 on which the semiconductor layers are grown (e.g., the upper side in Figure 1), will be referred to as the upper side, and the opposite side (e.g., the lower side in Figure 1) will be referred to as the lower side. The up-down designations are for convenience of explanation and do not, for example, limit the state of the light-emitting element 1 relative to the vertical direction during use.

Light-emitting element 1 is, for example, a light-emitting diode (LED) or a semiconductor laser (LD). In this embodiment, light-emitting element 1 is a light-emitting diode capable of emitting light in the ultraviolet region. In particular, light-emitting element 1 in this embodiment can emit ultraviolet light with a central wavelength of 250 nm to 365 nm. Light-emitting element 1 can be used in fields such as sterilization (e.g., air purification, water purification), medicine (e.g., phototherapy, measurement, and analysis), and UV curing.

Light-emitting element 1 comprises, in order, a buffer layer 3, an n-type cladding layer 4, a composition-inclined layer 5, an active layer 6, an electron blocking layer 7, and a p-type semiconductor layer 8 on a substrate 2. Furthermore, light-emitting element 1 includes an n-side electrode 11 disposed on n-type cladding layer 4 and a p-side electrode 12 disposed on p-type semiconductor layer 8.

As the semiconductor constituting the light-emitting element 1, for example, a binary to quaternary Group III nitride semiconductor represented by Al _a Ga _b In _1-ab N (0 ≤ a ≤ 1, 0 ≤ b ≤ 1, 0 ≤ a+b ≤ 1) can be used. In this embodiment, a binary or ternary Group III nitride semiconductor represented by Al _c Ga _1-c N (0 ≤ c ≤ 1) is used as the semiconductor constituting the light-emitting element 1. Some of these Group III elements may be substituted with boron (B), tritium (Tl), or the like. Furthermore, some of the nitrogen may be substituted with phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), or the like.

Substrate 2 is made of a material that transmits light emitted by active layer 6. For example, substrate 2 is a sapphire ( _Al2O3 ) substrate. The top surface of substrate 2 (i.e., the side of light-emitting element 1 on which the semiconductor layers are stacked) is a c-plane. This c-plane may have an off-angle. Alternatively, substrate ₂ may be made of, for example, an aluminum nitride (AlN) substrate or an aluminum gallium nitride (AlGaN) substrate.

Buffer layer 3 is formed on substrate 2. In this embodiment, buffer layer 3 is formed of aluminum nitride. However, when substrate 2 is an aluminum nitride substrate or an aluminum-gallium nitride substrate, buffer layer 3 is not necessarily required. Alternatively, buffer layer 3 may include a semiconductor layer composed of undoped _{AlpGa1 -pN} (0≦p≦1) formed on a semiconductor layer composed of aluminum nitride.

The n-type cladding layer 4 is an n-type semiconductor layer formed on the buffer layer 3. The n-type cladding layer 4 is formed, for example, of _{AlqGa1 -qN} (0≦q≦1) doped with n-type impurities. In this form, silicon (Si) is used as the n-type impurity. Furthermore, germanium (Ge), selenium (Se), or tellurium (Te) can be used as the n-type impurity. The Al composition ratio q of the n-type cladding layer 4 is preferably set to, for example, not less than 20%, and more preferably not less than 25% and not more than 70%. Furthermore, the Al composition ratio is also referred to as the AlN molar fraction. The film thickness of the n-type cladding layer 4 can be set to, for example, not less than 1 μm and not more than 4 μm.

The half-width (HWHM) of the X-ray swing curve of the n-type AlGaN crystal constituting the n-type cladding layer 4, obtained by X-ray diffraction ω scanning relative to the (10-12) plane (hereinafter referred to as the "n-AlGaN intermixing value"), is 812 arcsec or less. The n-AlGaN intermixing value is an indicator of the crystal quality of the n-type cladding layer 4, and the lower the value, the better the crystal quality of the n-type cladding layer 4. As shown in the experimental examples described below, in the light-emitting element 1 in which the active layer 6 includes silicon, the light output is improved by setting the n-AlGaN intermixing value to 812 arcsec or less. From the perspective of improving light output, the n-AlGaN intermixing value is preferably 760 arcsec or less.

In this embodiment, the n-type cladding layer 4 has a single-layer structure, but it can also have a multiple-layer structure. When the n-type cladding layer 4 has a multiple-layer structure, the n-AlGaN intermixing value of the semiconductor layer closest to the active layer 6 among the semiconductor layers constituting the n-type cladding layer 4 is set to be 812 arcsec or less (preferably 760 arcsec or less). This is because the luminescence intensity of the active layer 6 is believed to be dependent on the crystallinity of the active layer 6, and the crystallinity of the active layer 6 is dependent on the crystallinity of the semiconductor layer closest to the active layer 6 among the multiple layers of the n-type cladding layer 4.

The composition-inclined layer 5 is formed on the n-type cladding layer 4. The composition-inclined layer 5 is composed of silicon-doped Al _r Ga _1-r N (0 ≤ r ≤ 1). The Al composition ratio at each position in the composition-inclined layer 5 in the vertical direction increases toward the active layer 6. Furthermore, the composition-inclined layer 5 may include, for example, a very small region in the vertical direction (e.g., less than 5% of the total vertical region of the composition-inclined layer 5) where the Al composition ratio does not increase toward the active layer 6.

The Al composition ratio of the composition-inclined layer 5 at its end on the n-type cladding layer 4 side is preferably substantially the same as the Al composition ratio at the end of the n-type cladding layer 4 on the composition-inclined layer 5 side (e.g., within 5%). Furthermore, the Al composition ratio of the composition-inclined layer 5 at its end on the active layer 6 side is preferably substantially the same as the Al composition ratio at the end of the active layer 6 on the composition-inclined layer 5 side (e.g., within 5%). The thickness of the composition-inclined layer 5 can be, for example, not less than 5 nm and not more than 50 nm.

Active layer 6 is formed on tilted layer 5. Active layer 6 has a multi-quantum well structure comprising multiple well layers 621 to 623. The band gap of active layer 6 is adjusted to emit ultraviolet light with a central wavelength of 250 nm to 365 nm.

In this embodiment, each active layer 6 comprises three barrier layers 61 and three well layers 621-623, with the barrier layers 61 and well layers 621-623 being alternately layered. In the active layer 6, the barrier layers 61 are located at the ends on the side of the inclined layer 5, while the well layers 623 are located at the ends on the side of the electron blocking layer 7. The number of barrier layers 61 and well layers 621-623 in the active layer 6 is not particularly limited, as long as there are at least two well layers.

Each barrier layer 61 is formed of _{AlsGa1 -sN} (0<s<1). The Al composition ratio s of each barrier layer 61 is, for example, 75% to 95%. The thickness of each barrier layer 61 is, for example, 2 nm to 50 nm.

The well layers 621 - 623 are formed of _Alt Ga _1-t N (0 < t < 1). The Al composition ratio t of each well layer 621 - 623 is smaller than the Al composition ratio s of the barrier layer 61 (ie, t < s).

The three well layers 621-623 are referred to as the first well layer 621, the second well layer 622, and the third well layer 623, starting from the inclined layer 5. The thickness of the first well layer 621 is greater than the thickness of each of the second well layer 622 and the third well layer 623 by at least 1 nm. This allows the layers of the active layer 6 to be flattened, and the monochromaticity of the output light is improved. The difference between the thickness of the first well layer 621 and the thickness of each of the second well layer 622 and the third well layer 623 is preferably set to be greater than 2 nm and less than 4 nm. In this form, the second well layer 622 and the third well layer 623 each have a thickness of greater than 2 nm and less than 4 nm, and the first well layer 621 has a thickness of greater than 4 nm and less than 6 nm.

Furthermore, the Al composition ratio of the first well layer 621 is at least 2% greater than the Al composition ratios of the second well layer 622 and the third well layer 623. By setting the Al composition ratio of the first well layer 621 higher than the Al composition ratios of the second well layer 622 and the third well layer 623, the crystallinity of the first well layer 621 is improved. This is because the difference in Al composition ratio between the first well layer 621 and the n-type cladding layer 4 is reduced. By improving the crystallinity of the first well layer 621, the crystallinity of each semiconductor layer formed on the first well layer 621 in the active layer 6 is also improved. This improves the mobility of carriers in the active layer 6, thereby increasing light output. This effect becomes more pronounced as the thickness of the first well layer 621 increases. However, in order to suppress an increase in the resistance value of the entire light-emitting element 1, the thickness of the first well layer 621 is designed to be equal to or less than a specific value.

In this embodiment, the second well layer 622 and the third well layer 623 each have an Al composition ratio of 25% to 45%, while the first well layer 621 has an Al composition ratio of 35% to 55%. For example, the multiple well layers 621-623 can be configured such that the Al composition ratio increases toward the side of the compositionally inclined layer 5.

The active layer 6 contains silicon. As will be described later, in this embodiment, no silicon source is supplied during the formation of the active layer 6. The silicon present in each layer of the active layer 6 diffuses from the substrate 2 side of the active layer 6 of the light-emitting element 1. Silicon in the active layer 6 tends to be particularly readily absorbed in locations with a low Al composition ratio in the vertical direction of the active layer 6, and is also readily absorbed in layers of the active layer 6 that are close to the compositionally tilted layer 5.

The silicon concentration of each barrier layer 61 increases as it approaches the side of the component-tilted layer 5. Similarly, the silicon concentration of each well layer 621-623 increases as it approaches the side of the component-tilted layer 5. In this embodiment, the silicon concentration of each layer of the active layer 6 is highest in the first well layer 621, which is the well layer closest to the n-type semiconductor layer among the multiple well layers 621-623. The maximum value of the silicon concentration distribution of the active layer 6 in the vertical direction is preferably not less than 8.0×10 ¹⁸ atoms/cm ³ , and more preferably not less than 1.0×10 ¹⁹ atoms/cm ³ and not more than 6.0×10 ¹⁹ atoms/cm ^3. When the maximum value of the silicon concentration distribution of the active layer 6 in the vertical direction is within the aforementioned numerical range, it has been confirmed that the light output of the light-emitting element 1 is likely to be improved.

A plurality of pits (e.g., so-called V-pits) (not shown) are formed in the active layer 6. As will be described later, during the manufacture of the light-emitting element 1 and before the formation of the active layer 6 (specifically, after the formation of the composition-inclined layer 5 and before the formation of the active layer 6), a silicon source is supplied into the chamber. This changes the growth pattern of the semiconductor layer's parent phase, resulting in pits in the active layer 6. The formation of pits in the active layer 6 is believed to facilitate the supply of holes from the p-type semiconductor layer 8 to the active layer 6 via the pits, resulting in improved light output from the light-emitting element 1. Furthermore, the inclusion of silicon in the active layer 6 is believed to facilitate the formation of pits in the active layer 6.

Electron blocking layer 7 is formed on active layer 6. Electron blocking layer 7 has the function of suppressing the overflow of electrons from active layer 6 to p-type semiconductor layer 8 (hereinafter referred to as the electron blocking effect), thereby improving the efficiency of electron injection into active layer 6. In this embodiment, electron blocking layer 7 is formed of undoped Al _u Ga _1-u N (0.7 ≤ u ≤ 1). In other words, electron blocking layer 7 is composed of a semiconductor layer with an Al composition ratio u of 70% or more. The electron blocking layer 7 has a laminated structure, in which a first electron blocking layer 71 and a second electron blocking layer 72 are laminated in order from the side of the active layer 6. The electron blocking layer 7 may be formed into three or more layers.

The first electron blocking layer 71 is provided in contact with the active layer 6. Among the multiple semiconductor layers comprising the electron blocking layer 7 (in this embodiment, the first electron blocking layer 71 and the second electron blocking layer 72), the first electron blocking layer 71 has a relatively high Al content compared to the other semiconductor layers comprising the electron blocking layer 7 (i.e., the second electron blocking layer 72) and the barrier layer 61. The Al content of the first electron blocking layer 71 is, for example, 90% or greater, and may also be 100% (i.e., the first electron blocking layer 71 may be composed of AlN). The film thickness of the first electron blocking layer 71 is, for example, 0.5 nm to 5.0 nm.

The Al composition ratio of the second electron blocking layer 72 is lower than that of the first electron blocking layer 71, for example, 70% to 90%. The second electron blocking layer 72 has a greater thickness than the first electron blocking layer 71, for example, 15 nm to 100 nm.

Semiconductor layers with higher Al content have higher resistance. Therefore, if the thickness of the first electron blocking layer 71, which has a high Al content, is too thick, the resistance of the entire light-emitting element 1 will increase excessively. Therefore, it is preferable to reduce the thickness of the first electron blocking layer 71 to a certain extent. On the other hand, reducing the thickness of the first electron blocking layer 71 increases the probability of electrons passing through the first electron blocking layer 71 from the active layer 6 toward the p-type semiconductor layer 8 due to the tunneling effect. Therefore, in this embodiment of the light-emitting element 1, by forming the second electron blocking layer 72 on the first electron blocking layer 71, electrons can be prevented from passing through the entire electron blocking layer 7.

The first electron blocking layer 71 and the second electron blocking layer 72 can each be an undoped layer, a layer containing n-type impurities, a layer containing p-type impurities, or a layer containing both n-type and p-type impurities. Magnesium (Mg) can be used as the p-type impurity. In addition to Mg, zinc (Zn), benzene (Be), calcium (Ca), strontium (Sr), barium (Ba), or carbon (C) can also be used. The same applies to semiconductor layers containing other p-type impurities. When each electron blocking layer 7 contains impurities, the impurities contained in each electron blocking layer 7 may be contained in the entire electron blocking layer 7 or in a portion of each electron blocking layer 7. In addition, the electron blocking layer 7 may be formed as a single layer, may be formed as three or more layers, or may be omitted.

Silicon may be included between electron blocking layer 7 and p-type semiconductor layer 8. Magnesium is easily adsorbed by silicon, and hydrogen easily bonds with magnesium. Therefore, the presence of silicon between electron blocking layer 7 and p-type semiconductor layer 8 suppresses the diffusion of magnesium and hydrogen from p-type semiconductor layer 8 toward active layer 6, thereby extending the life of light-emitting element 1. Furthermore, the inclusion of silicon between electron blocking layer 7 and p-type semiconductor layer 8 allows for the formation of a layer with pits between the electron blocking layer 7 and p-type semiconductor layer 8. The pits are formed by supplying a silicon source to a location where dislocations exist. Therefore, by forming the pits, the dislocations can be suppressed from developing above the pits, thereby extending the life of the light-emitting element 1.

The p-type semiconductor layer 8 is formed on the electron blocking layer 7. The p-type semiconductor layer is formed of p-type Al _v Ga _1-v N (0≦v<0.7). In other words, the p-type semiconductor layer 8 is a semiconductor layer having an Al composition ratio of less than 70%.

The p-type semiconductor layer 8 includes a p-type contact layer. This layer is connected to the p-side electrode 12 and is formed from Al _v Ga _1-v N (0 ≤ v < 0.7) that is highly doped with p-type impurities. To achieve ohmic contact with the p-side electrode 12, the p-type contact layer is preferably constructed with a low Al composition ratio. From this perspective, p-type gallium nitride (GaN) is preferred. Semiconductor layers composed of p-type gallium nitride readily absorb ultraviolet light. Therefore, to prevent ultraviolet absorption and thereby improve the light output of light-emitting element 1, the p-type contact layer thickness is preferably 30 nm or less. Furthermore, to prevent short circuits, the p-type contact layer thickness is preferably 5 nm or greater.

The p-type semiconductor layer 8 may further include a p-type cladding layer on the electron blocking layer 7 side of the p-type contact layer. The p-type cladding layer is composed of p-type AlGaN having an Al composition ratio of less than 70%. The p-type cladding layer may be composed of, for example, a single layer or a plurality of layers. When the p-type cladding layer is composed of a plurality of layers, for example, the p-type cladding layer may include: a first p-type cladding layer formed on the second electron blocking layer 72 side; and a second p-type cladding layer formed between the first p-type cladding layer and the p-type contact layer. The Al composition ratio of the second p-type cladding layer at each position in the vertical direction may be set to decrease as the position approaches the p-type contact layer side. Furthermore, the second p-type cladding layer may include, for example, a region in a very small vertical region (e.g., less than 5% of the entire vertical region of the second p-type cladding layer) where the Al composition ratio does not decrease as it approaches the p-type cladding layer side. The second p-type cladding layer preferably has an Al composition ratio at an end portion on the first p-type cladding layer side that is substantially the same as the Al composition ratio at an end portion on the second p-type cladding layer side of the first p-type cladding layer (e.g., within 5%). Furthermore, the second p-type cladding layer preferably has an Al composition ratio at an end portion on the p-type contact layer side that is substantially the same as the Al composition ratio at an end portion on the second p-type cladding layer side of the p-type contact layer (e.g., within 5%).

In light-emitting element 1, the total optical thickness of the semiconductor layers located above active layer 6 (i.e., electron blocking layer 7 and p-type semiconductor layer 8) is preferably designed so that light emitted upward from active layer 6 and reflected by p-side electrode 12 toward the downward direction is mutually reinforced with light emitted directly downward from active layer 6. When the center wavelength of light emitted from active layer 6 is λ [nm], for example, the total optical thickness of the semiconductor layers located above active layer 6 is preferably 0.5λ or greater and 1.4λ or less, more preferably 0.5λ or greater and 0.8 or less, or 1.0λ or greater and 1.3 or less, and even more preferably 0.5λ or greater and 0.8 or less.

The n-side electrode 11 is formed on the upper side of the n-type cladding layer 4 and on the exposed surface 41 from the active layer 6. For example, the n-side electrode 11 can be formed as a multilayer film in which titanium (Ti), aluminum, titanium, and gold (Au) are sequentially layered on the n-type cladding layer 4. Furthermore, when the light-emitting element 1 is flip-chip mounted, as described later, the n-side electrode 11 can be formed of a material that reflects ultraviolet light emitted by the active layer 6.

The p-side electrode 12 is formed on the upper surface of the p-type semiconductor layer 8. The p-side electrode 12 can be made of, for example, indium tin oxide (ITO). Furthermore, when the light-emitting element 1 is flip-chip mounted as described later, the p-side electrode 12 can be made of a material that reflects ultraviolet light emitted by the active layer 6.

The light-emitting element 1 can be flip-chip mounted on a package substrate (not shown). Specifically, the n-side electrode 11 and p-side electrode 12 are oriented vertically toward the package substrate. The n-side electrode 11 and p-side electrode 12 are each mounted on the package substrate using gold bumps or the like. The flip-chip mounted light-emitting element 1 extracts light from the substrate 2. Furthermore, the light-emitting element 1 can also be mounted on the package substrate using wire bonding or other methods. In this embodiment, the light-emitting element 1 is a so-called horizontal light-emitting element 1, in which both the n-side electrode 11 and the p-side electrode 12 are disposed on the upper side of the light-emitting element 1. However, this is not limited to a horizontal light-emitting element 1; a vertical light-emitting element 1 is also possible. A vertical light-emitting element 1 is one in which the active layer 6 is sandwiched between the n-side electrode 11 and the p-side electrode 12. Furthermore, when the light-emitting element 1 is a vertical light-emitting element, the substrate 2 and the buffer layer 3 are preferably removed by laser lift-off or the like.

(Method for Manufacturing Light-Emitting Element 1) Next, an example of a method for manufacturing the light-emitting element 1 of this embodiment will be described. In this embodiment, a buffer layer 3, an n-type cladding layer 4, a composition-inclined layer 5, an active layer 6, an electron-blocking layer 7, and a p-type semiconductor layer 8 are sequentially epitaxially grown on a disc-shaped substrate 2 using metal organic chemical vapor deposition (MOCVD). Specifically, in this embodiment, the disc-shaped substrate 2 is placed in a pocket on a carrier disposed within a chamber. Then, raw material gases for each semiconductor layer to be formed on substrate 2 are introduced into the chamber, thereby forming each semiconductor layer on substrate 2. Furthermore, MOCVD is sometimes referred to as Metal Organic Vapor Phase Epitaxy (MOVPE).

As raw material gases for epitaxial growth of each layer, trimethylaluminum (TMA) can be used as an aluminum source, trimethylgallium (TMG) as a gallium source, ammonia (NH ₃ ) as a nitrogen source, tetramethylsilane (TMSi) as a silicon source, and bis(cyclopentadienyl)magnesium (Cp ₂ Mg) as a magnesium source.

In this embodiment of the method for manufacturing the light-emitting element 1, a silicon source is not supplied into the chamber during the formation of the active layer 6. Silicon supplied before the formation of the active layer 6 diffuses into the active layer 6. In this embodiment, for example, a silicon source is supplied into the chamber during the formation of the n-type cladding layer 4, during the formation of the composition-inclined layer 5, and immediately before the formation of the active layer 6 (i.e., after the formation of the composition-inclined layer 5 and before the formation of the active layer 6). Only the silicon source is supplied into the chamber immediately before the formation of the active layer 6, and this step is hereinafter referred to as the "silicon source supply step." During the silicon source supply step, only the silicon source can be supplied into the chamber as the raw material gas, or a gas other than the raw material gas (e.g., a carrier gas such as hydrogen) can be introduced into the chamber. For example, by adjusting the amount of silicon source supplied during the silicon source supply step, the amount of silicon contained in each layer of the active layer 6 can be adjusted. Furthermore, during the silicon source supply step, by supplying the silicon source to locations where dislocations exist, the growth pattern of the matrix phase of the semiconductor layer is altered, resulting in the formation of pits during the formation of the active layer 6.

Furthermore, as manufacturing conditions such as growth temperature, growth pressure, and growth time for epitaxially growing each semiconductor layer on the wafer, conditions can be appropriately adopted according to the structure of each semiconductor layer.

Furthermore, when each semiconductor layer is to be epitaxially grown on the substrate 2, other epitaxial growth methods such as molecular beam epitaxy (MBE) and halogen vapor phase epitaxy (HVPE) can also be used.

After forming each semiconductor layer on a disc-shaped substrate 2, a mask is formed on a portion of the p-type semiconductor layer 8, excluding the portion that will become the exposed surface 41 of the n-type cladding layer 4. The unmasked area is then removed by etching from the top surface of the p-type semiconductor layer 8 to the middle of the n-type cladding layer 4 in the vertical direction. This creates an upward-facing exposed surface 41 on the n-type cladding layer 4. After the exposed surface 41 is formed, the mask is removed.

Next, an n-side electrode 11 is formed on the exposed surface 41 of the n-type cladding layer 4, and a p-side electrode 12 is formed on the p-type semiconductor layer 8. The n-side electrode 11 and the p-side electrode 12 can be formed using conventional methods such as electron beam evaporation and sputtering. The resulting wafer is cut into desired sizes, allowing multiple light-emitting devices 1, as shown in FIG1 , to be manufactured from a single wafer.

(Functions and Effects of Implementation) In this embodiment of the light-emitting device 1, the half-width (HWF) of the X-ray wobble curve for the (10-12) plane of the n-type cladding layer 4 (i.e., the n-AlGaN intermixing ratio) is 812 arcsec or less, and silicon is included in the active layer 6. As demonstrated in experimental examples described below, this improves the light output of the light-emitting device 1. The finding that setting the n-AlGaN intermixing ratio to 812 arcsec or less in the light-emitting device 1 containing silicon in the active layer 6 improves light output is a novel finding.

Furthermore, the n-AlGaN mixing value is preferably below 760 arcsec. At this point, as shown in the experimental examples described below, further improvements in luminous output are easily achieved.

Furthermore, the silicon concentration of the multiple well layers 621-623 of the active layer 6 increases as they are closer to the well layers 621-623 of the n-type cladding layer 4. This configuration has been shown to improve the light output of the light-emitting element 1. This is facilitated by forming a composition-inclined layer 5 containing silicon between the n-type cladding layer 4 and the active layer 6. In other words, silicon diffuses from the composition-inclined layer 5 toward the active layer 6, making it easier to achieve a configuration in which the silicon concentration increases as the well layers 621-623 are closer to the n-type cladding layer 4.

Furthermore, the maximum value of the silicon concentration distribution of the active layer 6 in the vertical direction is not less than 8.0×10 ¹⁸ atoms/cm ³ . This confirms that the light output of the light-emitting element 1 is more easily improved.

Furthermore, p-type semiconductor layer 8 includes a p-type contact layer formed of p-type GaN, and the thickness of the p-type contact layer is less than 30 nm. P-type contact layers composed of p-type GaN readily absorb ultraviolet light. Therefore, reducing the thickness of the p-type contact layer to less than 30 nm suppresses ultraviolet light absorption, thereby improving the light output of light-emitting element 1.

As described above, this aspect can provide a nitride semiconductor light-emitting device that can achieve improved light output even when silicon is included in the active layer. [Experimental Example]

This experimental example evaluated the relationship between n-AlGaN mixing and luminescence output for Comparative Examples 1-14, wafers without silicon in the active layer, and Examples 1-461, wafers with silicon in the active layer. In this experimental example, terms used in conjunction with previously described terms refer to the same concepts as those in the previously described embodiments unless otherwise specified.

Comparative Examples 1-14 have wafers with the same basic structure as the light-emitting device shown in the embodiment, except that they lack a tilted layer and do not contain silicon in the active layer. Comparative Examples 1-14 have the same basic structure as the light-emitting device shown in the embodiment, except that the n-AlGaN mixing ratio varies.

Examples 1 to 344 of Examples 1 to 461 have wafers with the same basic structure as Comparative Examples 1 to 14, except that silicon is included in the active layer. Examples 1 to 344 have the same basic structure as Comparative Examples 1 to 14, except that the n-AlGaN mixing values are different.

Among Examples 1 to 461, Examples 345 to 461 utilize wafers with different p-type semiconductor layer structures, including silicon between the electron blocking layer and the p-type semiconductor layer, compared to Examples 1 to 344. Examples 345 to 461 share the same basic structure, except for the different n-AlGaN mixing ratios.

The structures, film thicknesses, Al composition ratios, and silicon concentrations of Comparative Examples 1 to 14 are shown in Table 1 below. Furthermore, the structures, film thicknesses, Al composition ratios, and silicon concentrations of Examples 1 to 344 are shown in Table 2 below. Furthermore, the structures, film thicknesses, Al composition ratios, and silicon concentrations of Examples 345 to 461 are shown in Table 3 below.

[Table 1] Structure (Comparative Examples 1 to 14) Film thickness Al composition ratio [%] Si concentration [atoms/cm ³ ] substrate 430±25[um] - BG buffer layer 2000±200[nm] 100 n-type semiconductor layer 2000±200[nm] 55±10 (1.5±1.00)E+19 Active layer (3QW) barrier layer 7±5[nm] 85±10 BG First well layer 3±1[nm] 45±10 barrier layer 7±5[nm] 85±10 Second well layer 3±1[nm] 35±10 barrier layer 7±5[nm] 85±10 Third well layer 3±1[nm] 35±10 electron blocking layer First electron blocking layer 1.5±1[nm] 95±5 Second electron blocking layer 25±10[nm] 80±10 p-type semiconductor layer p-type contact layer 700±100[nm] 0

[Table 2] Structure (Examples 1 to 344) Film thickness Al composition ratio [%] Si concentration [atoms/cm ³ ] substrate 430±25[um] - BG buffer layer 2000±200[nm] 100 n-type semiconductor layer 2000±200[nm] 55±10 (1.5±1.00)E+19 Composition inclined layer 15±5[nm] 55→85 BG～Peak concentration of the first well layer※ Active layer (3QW) barrier layer 7±5[nm] 85±10 First well layer 5±1[nm] 45±10 (3.50±2.50) E+19 (peak concentration) barrier layer 7±5[nm] 85±10 BG～Peak concentration of the first well layer※ Second well layer 3±1[nm] 35±10 BG～1.00E+19※ barrier layer 7±5[nm] 85±10 Third well layer 3±1[nm] 35±10 BG～1.00E+18※ electron blocking layer First electron blocking layer 1.5±1[nm] 95±5 BG Second electron blocking layer 25±10[nm] 80±10 p-type semiconductor layer p-type contact layer 700±100[nm] 0

[Table 3] Structure (Examples 345 to 461) Film thickness Al composition ratio [%] Si concentration [atoms/cm ³ ] substrate 430±25[um] - BG buffer layer 2000±200[nm] 100 n-type semiconductor layer 2000±200[nm] 55±10 (1.5±1.00)E+19 Composition inclined layer 15±5[nm] 55→85 BG～Peak concentration of the first well layer※ Active layer (3QW) barrier layer 7±5[nm] 85±10 First well layer 5±1[nm] 45±10 (3.50±2.50) E+19 (peak concentration) barrier layer 7±5[nm] 85±10 BG～Peak concentration of the first well layer※ Second well layer 3±1[nm] 35±10 BG～1.00E+19※ barrier layer 7±5[nm] 85±10 Third well layer 3±1[nm] 35±10 BG～1.00E+18※ electron blocking layer First electron blocking layer 1.5±1[nm] 95±5 BG Second electron blocking layer 25±10[nm] 80±10 BG (peak concentration between the electron blocking layer and the p-type semiconductor layer): (2.00±1.00) E+19 p-type semiconductor layer First p-type cladding layer 25±10[nm] 55±10 Second p-type cladding layer 3±1[nm] 55→0 BG P-type contact layer 20±5[nm] 0 BG

The film thicknesses of each layer listed in Tables 1 through 3 were measured using transmission electron microscopy (TEM). Furthermore, the Al composition ratios of each layer listed in Tables 1 through 3 are estimated values based on the Al secondary ion intensity measured by SIMS (Secondary Ion Mass Spectrometry). The Al composition ratio columns for the composition-inclined layers in Tables 2 and 3 show the Al composition ratio at each position in the composition-inclined layer, varying from 55% to 85% from the n-type cladding layer side toward the active layer side. Similarly, the Al composition ratio column for the second p-type cladding layer in Table 3 shows the Al composition ratio at each position in the upper and lower directions of the second p-type cladding layer, varying from 55% to 0% as it moves from the first p-type cladding layer side toward the p-type contact layer side. Furthermore, the silicon concentration values for each layer listed in Tables 1 through 3 are obtained using secondary ion mass spectrometry. In Tables 1 through 3, where the Si concentration column is marked with a "*," this indicates that the semiconductor layer is thin, making accurate Si concentration measurement difficult. Furthermore, the designation "BG" in the Si concentration column in Tables 1 through 3 indicates background concentration levels. The background level of silicon concentration is the silicon concentration detected in the absence of silicon doping.

Furthermore, in this experimental example, the luminous output of each of Comparative Examples 1 to 14 and Examples 1 to 461 was measured when a current of 20 mA was passed through the wafer in an on-wafer state. The luminous output was measured using a photodetector installed on the substrate side of the wafer for each of Comparative Examples 1 to 14 and Examples 1 to 461. The relationship between the n-AlGaN mixing value and the luminous output for each of Comparative Examples 1 to 14 and Examples 1 to 461 is shown in Figure 2. In Figure 2, the results of Comparative Examples 1 to 14 are marked with triangles, the results of Examples 1 to 344 are marked with squares, and the results of Examples 345 to 461 are marked with circles. Furthermore, in Figure 2, the markings of the quadrilateral marks overlap with each other, and the markings of the circular marks overlap with each other, but the results of Examples 1 to 344 (i.e., the markings of the quadrilateral marks) are within the range of luminous output 1.00 [a.u. (arbitrary unit)] to 1.50 [a.u.], and the results of Examples 345 to 461 (i.e., the markings of the circular marks) meet the luminous output of 1.50 [a.u.] or above.

As shown in Figure 2, when examining the results of Comparative Examples 1 to 14, which do not contain silicon in the active layer, it is clear that setting the n-AlGaN mixing value to 500 arcsec or less is optimal from the perspective of improving luminous output. This result is consistent with the results shown in Figure 3 of Japanese Patent Application Publication No. 2019-121655. In other words, it can be seen that the experimental example in Figure 3 of Japanese Patent Application Publication No. 2019-121655 is the result of using a light-emitting device that does not contain silicon in the active layer.

On the other hand, Figure 2 shows that the results of Examples 1-461, which include silicon in the active layer, show that high luminescence output is achieved in the region where the n-AlGaN intermixing ratio is 812 arcsec or less. In other words, in light-emitting devices that include silicon in the active layer, high luminescence output can be achieved even when the n-AlGaN intermixing ratio exceeds 500 arcsec, as long as the n-AlGaN intermixing ratio is kept below 812 arcsec, unlike Comparative Examples 1-14.

Here, among the circular markers in Figure 2 (i.e., the results of Examples 345-461), P1, which has the highest n-AlGaN mixing value, has an n-AlGaN mixing value of 812.1 arcsec, and its luminous output is relatively low. Therefore, it can be seen that in structures containing silicon in the active layer (i.e., Examples 1-461), setting the n-AlGaN mixing value below 812 arcsec is necessary to improve luminous output.

Furthermore, among the results marked with squares (i.e., the results of Examples 1-344), P2 exhibits the highest n-AlGaN intermixing value among the results with higher luminous output. The n-AlGaN intermixing value for P2 is 760.0 arcsec, indicating that in structures containing silicon in the active layer, it is more desirable to set the n-AlGaN intermixing value to 760 arcsec or less.

Furthermore, a comparison of the results of Examples 1-344 with those of Examples 345-461 reveals that Examples 345-461 achieve higher light output. This is believed to be due to the thinner p-type contact layer in Examples 345-461 than in Examples 1-344, which suppresses the absorption of ultraviolet light by the p-type contact layer.

Furthermore, the minimum n-AlGaN intermixing value in Examples 1-344 is 394.2 arcsec, and in Examples 345-461, the minimum n-AlGaN intermixing value is 460.5 arcsec. Lower n-AlGaN intermixing values (i.e., higher crystalline quality of the n-type cladding layer) tend to improve luminous output. Therefore, it is speculated that the luminous output of examples with n-AlGaN intermixing values lower than those in Examples 1-461 is the same as or slightly improved.

(Overview of the Embodiments) The technical concepts realized by the embodiments described above are described below using reference symbols, etc., as used in the embodiments. However, the reference symbols, etc., used below are not intended to limit the components of the invention to those specifically shown in the embodiments.

[1] A first embodiment of the present invention is a nitride semiconductor light-emitting element 1 comprising: an n-type semiconductor layer 4 containing Al, Ga, and N; an active layer 6 having a multi-quantum well structure including a plurality of well layers 621 to 623 containing Al, Ga, and N, formed on one side of the n-type semiconductor layer 4; and a p-type semiconductor layer 8 formed on the side of the active layer 6 opposite to the side of the n-type semiconductor layer 4; the half-width of the X-ray wobble curve relative to the (10-12) plane of the n-type semiconductor layer 4 is less than 812 arcsec, and the active layer 6 contains silicon. This allows the nitride semiconductor light-emitting element 1, in which the active layer 6 includes silicon, to improve light output.

[2] A second embodiment of the present invention is that in the first embodiment, the half width is set to 760 arcsec or less. Thereby, in the nitride semiconductor light-emitting element 1 including silicon in the active layer 6, the light output is further improved.

[3] A third embodiment of the present invention is that, in the first or second embodiment, the silicon concentration of the plurality of well layers 621-623 of the active layer 6 increases as the well layers 621-623 are closer to the n-type semiconductor layer 4. This further improves the light output of the nitride semiconductor light-emitting element 1.

[4] A fourth embodiment of the present invention is that in the third embodiment, the maximum value of the silicon concentration distribution of the active layer 6 in the stacking direction of the n-type semiconductor layer 4, the active layer 6, and the p-type semiconductor layer 8 is 8.0×10 ¹⁸ atoms/cm ³ or more. This further improves the light output of the nitride semiconductor light-emitting element 1.

[5] A fifth embodiment of the present invention is a configuration in which, in the third or fourth embodiment, a composition-inclined layer 5 is formed between the n-type semiconductor layer 4 and the active layer 6, wherein the composition-inclined layer 5 has an Al composition ratio that increases toward the side of the active layer 6 and contains silicon. This configuration can easily achieve the configuration of the third embodiment.

[6] A sixth embodiment of the present invention is one of the first to fifth embodiments, wherein the p-type semiconductor layer includes a p-type contact layer formed of p-type GaN, and the thickness of the p-type contact layer is 30 nm or less. Thereby, the light output of the nitride semiconductor light-emitting element 1 is further improved.

(Note) The above describes the embodiments of the present invention. However, these embodiments are not intended to limit the scope of the patent application. Furthermore, it should be noted that not all combinations of features described in the embodiments are necessarily required to achieve the technical solution to the problem to be solved by the invention. Furthermore, the present invention is capable of various modifications within the spirit and scope of the invention.

1: Nitride semiconductor light-emitting element 4: n-type cladding layer (n-type semiconductor layer) 5: Inclined layer 6: Active layer 621: First well layer 622: Second well layer 623: Third well layer 8: P-type semiconductor layer

Figure 1 is a schematic diagram schematically illustrating the structure of a nitride semiconductor light-emitting device in an embodiment. Figure 2 is a graph showing the relationship between the n-AlGaN mixing ratio and light output in an experimental example.

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Claims (5)

A nitride semiconductor light-emitting device comprising: an n-type semiconductor layer containing Al, Ga, and N; an active layer having a multi-quantum well structure formed on one side of the n-type semiconductor layer and comprising a plurality of well layers containing Al, Ga, and N; and a p-type semiconductor layer formed on the side of the active layer opposite to the side of the n-type semiconductor layer. In the nitride semiconductor light-emitting device, the active layer contains silicon; the half-width of an X-ray wobble curve relative to the (10-12) plane of the n-type semiconductor layer is 812 arcsec or less. In the plurality of well layers of the active layer, the closer to the well layer of the n-type semiconductor layer, the higher the silicon concentration. The nitride semiconductor light-emitting device as described in claim 1, wherein the half width is less than 760 arcsec. The nitride semiconductor light-emitting device according to claim 1 or 2, wherein the maximum value of the silicon concentration distribution of the active layer in the stacking direction of the n-type semiconductor layer, the active layer, and the p-type semiconductor layer is 8.0×10 ¹⁸ atoms/cm ³ or more. A nitride semiconductor light-emitting element as described in claim 1 or 2, wherein a composition-inclined layer is formed between the n-type semiconductor layer and the active layer, wherein the composition-inclined layer has an Al composition ratio that increases toward the side of the active layer and contains silicon. The nitride semiconductor light-emitting device according to claim 1 or 2, wherein the p-type semiconductor layer includes a p-type contact layer formed of p-type GaN, and the p-type contact layer has a thickness of 30 nm or less.