TWI892732B - Display panel - Google Patents

Abstract

A display panel including a substrate, a first metal layer, a second metal layer, a common electrode layer and a light shielding layer. The first metal layer includes a plurality of first scan lines, and the first scan lines extend along a first direction. The second metal layer includes a plurality of data lines, and the data lines extend along a second direction. The second direction is not parallel to the first direction. A vertical projection of the common electrode layer on the first scan lines forms a plurality of first overlapping areas, which are separated from each other. A vertical projection of the light shielding layer on the first scan lines does not overlap at least one of the first overlapping areas.

Description

Display Panel

The present invention relates to a display panel.

With the increasing development of the technology industry, displays have become widely used in daily life. In traditional displays, a black matrix and a common electrode layer are usually placed on the scanning lines, resulting in a reduced aperture ratio and increased light energy loss.

The present invention provides a display panel with good aperture ratio and transmittance.

According to one embodiment of the present invention, a display panel is provided, comprising a substrate, a first metal layer, a second metal layer, a common electrode layer, and a light shielding layer. The first metal layer is located on the substrate, and the first metal layer includes a plurality of first scan lines extending along a first direction. The second metal layer is located on the substrate, and the second metal layer includes a plurality of data lines extending along a second direction. The second direction is not parallel to the first direction. The vertical projections of the common electrode layer on the first scan lines form a plurality of first overlapping regions separated from each other. The vertical projections of the light shielding layer on the first scan lines do not overlap at least one of the first overlapping regions.

Based on the above, in the display panel provided by the embodiment of the present invention, the vertical projection of the common electrode layer on the scan line can form multiple discrete overlapping regions, and the vertical projection of the light shielding layer on the scan line does not overlap these overlapping regions. As a result, the display panel can have a higher aperture ratio and transmittance.

In order to make the above features and advantages of the present invention more clearly understood, embodiments are given below and described in detail with reference to the accompanying drawings.

1A, 1B, and 1C. FIG1A is a partial plan view of a display panel according to an embodiment of the present invention, FIG1B is a cross-sectional view along the dotted line AA' in FIG1A, and FIG1C is a cross-sectional view along the dotted line BB' in FIG1A.

As shown in Figure 1A , the display panel 100 includes a plurality of sub-pixels SP, a plurality of scan lines SL, and a plurality of data lines DL corresponding to the boundaries of these sub-pixels SP. The scan lines SL extend along the X-direction, and the data lines DL extend along the Y-direction. Each sub-pixel SP includes an active element and a pixel electrode (not shown). Each active element is electrically connected to a corresponding scan line SL and a corresponding data line DL. The pixel electrode of each sub-pixel SP is electrically connected to the corresponding active element.

As shown in Figures 1B and 1C , display panel 100 includes a stacked substrate 101, a first metal layer M1, a second metal layer M2, a pixel electrode layer 104, a common electrode layer 103, a color-resist layer CF, a light-shielding layer BM, and a substrate 102. The first metal layer M1 includes scan lines SL and the gate electrodes of each active element. The second metal layer M2 includes data lines DL and the source and drain electrodes of each active element. The pixel electrode layer 104 includes the pixel electrodes of each sub-pixel SP.

Referring first to Figure 2 , in some comparative examples, a display panel includes scan lines SL, a common electrode layer 203, and a light shielding layer BM. The vertical projection of the common electrode layer 203 onto the scan lines SL is continuously distributed, and this vertical projection overlaps with the vertical projection of the light shielding layer BM onto the scan lines SL. In other comparative examples, the display panel includes scan lines SL and the common electrode layer 203, and the vertical projection of the common electrode layer 203 onto the scan lines SL is continuously distributed.

Referring again to Figures 1A and 1B , Figure 1A shows a partial enlarged view of the area corresponding to dashed line AA'. Compared to Figure 2 , the vertical projection of the common electrode layer 103 of this embodiment onto the scan line SL (first metal layer M1) forms multiple, discrete overlapping areas OA (as shown in Figure 1A ), and the vertical projection of the light shielding layer BM onto the scan line SL (first metal layer M1) does not overlap with at least one of these overlapping areas OA, as shown in Figure 1B . Consequently, the display panel 100 of this embodiment can have a higher aperture ratio and transmittance than the display panel of the comparative example. According to one embodiment, the display panel 100 of this embodiment may have a relative transmittance of 101.5% compared to the display panel of the comparative example (relative transmittance of 100%).

Referring also to FIG1B , the second metal layer M2 is connected in parallel with the scan line SL via conductive vias provided in the interlayer insulating layer GI, thereby reducing resistance. However, the present invention is not limited thereto. In some embodiments, the scan line SL in FIG1B may not be connected in parallel with the second metal layer M2. In some embodiments, the second metal layer M2 may not be disposed on the scan line SL in FIG1B .

The vertical projection of the data line DL onto the scan line SL (first metal layer M1) overlaps with and falls within the vertical projection of the light-shielding layer BM onto the scan line SL (first metal layer M1), as shown in Figure 1B . This prevents color mixing between different sub-pixels SP.

In addition, the vertical projection of the data line DL on the scanning line SL (first metal layer M1) overlaps the vertical projection of the common electrode layer 103 on the scanning line SL (first metal layer M1) and falls within the vertical projection of the common electrode layer 103, as shown in FIG. 1B .

1C , the vertical projection of the data line DL on the substrate 101 overlaps with the vertical projection of the common electrode layer 103 on the substrate 101 and falls within the vertical projection of the common electrode layer 103. Furthermore, the vertical projection of the light shielding layer BM on the substrate 101 overlaps with the vertical projection of the common electrode layer 103 on the substrate 101 and falls within the vertical projection of the common electrode layer 103.

To fully illustrate the various embodiments of the present invention, further embodiments of the present invention are described below. It should be noted that the following embodiments retain the component numbers and some of the content of the previous embodiments, with the same reference numerals used to represent identical or similar components, and descriptions of the same technical content omitted. For explanations of omitted portions, please refer to the previous embodiments, and the following embodiments will not be repeated.

3A and 3B . FIG3A is a partial plan view of a display panel according to an embodiment of the present invention, and FIG3B is a cross-sectional view along a dotted line CC' in FIG3A .

The display panel 200 in this embodiment has substantially the same structure as the display panel 100 shown in Figures 1A to 1C. Specifically, the cross-sectional view along the dashed line AA' in Figure 3A has substantially the same structure as that shown in Figure 1B, and the cross-sectional view along the dashed line BB' in Figure 3A has substantially the same structure as that shown in Figure 1C, which will not be further described here.

The display panel 200 of this embodiment differs primarily from the display panel 100 shown in Figures 1A to 1C in that, in the cross-sectional schematic diagram corresponding to dashed line CC' (Figure 3B), the vertical projection of the common electrode layer 103 onto the scan line SL (first metal layer M1) forms a continuously distributed overlapping area CA. In other words, in the display panel 100 shown in Figures 1A to 1C, the vertical projection of the portion of the common electrode layer 103 corresponding to any scan line SL onto that scan line SL forms a plurality of discrete overlapping areas OA (as shown in Figure 1A). In contrast, in the display panel 200 shown in Figures 3A and 3B, the vertical projections of the portion of the common electrode layer 103 corresponding to the portion of the scanning lines SL on these scanning lines SL can form a plurality of discrete overlapping areas OA (corresponding to the dotted lines AA'), and the vertical projections of the portion of the common electrode layer 103 corresponding to the portion of the scanning lines SL on these scanning lines SL form continuously distributed overlapping areas CA (corresponding to the dotted lines CC'), thereby improving the uniformity of the common electrode potential (Vcom).

According to some embodiments, in the display panel 200, the scan lines SL on which the common electrode layer 103 shown in FIG3B is disposed (hereinafter referred to as second scan lines) and the scan lines SL on which the common electrode layer 103 shown in FIG1B is disposed (hereinafter referred to as first scan lines) can be arranged alternately along the Y direction. Specifically, in some embodiments, the gap between two adjacent second scan lines in the Y direction can correspond to N sub-pixels SP, where N is an integer greater than or equal to 2. For example, if N is equal to 2, the order along the Y direction is first scan line, second scan line, first scan line, second scan line, and so on. For example, if N is 3, then the order along the Y direction is: first scan line, first scan line, second scan line, first scan line, first scan line, first scan line, second scan line, first scan line, and so on. In some preferred embodiments, N is an integer greater than or equal to 2 and less than or equal to 10 to ensure both the transmittance of the display panel 200 and the uniformity of the common electrode potential.

In summary, in the display panel provided by the embodiments of the present invention, the vertical projection of the common electrode layer on the scan line can form multiple discrete overlapping regions, and the vertical projection of the light shielding layer on the scan line does not overlap these overlapping regions. As a result, the display panel can have a higher aperture ratio and transmittance.

100, 200: Display panel 101, 102: Substrate 103, 203: Common electrode layer 104: Pixel electrode layer BL: Buffer layer BM: Light shielding layer CF: Color resist layer GI: Interlayer insulation layer IL: Insulation layer M1: First metal layer M2: Second metal layer OA, CA: Overlapping area PL: Planarization layer SP: Subpixel SL: Scan line DL: Data line

Figure 1A is a schematic partial plan view of a display panel according to an embodiment of the present invention. Figure 1B is a schematic cross-sectional view taken along dashed line AA' in Figure 1A . Figure 1C is a schematic cross-sectional view taken along dashed line BB' in Figure 1A . Figure 2 is an enlarged schematic partial view of a display panel according to a comparative example. Figure 3A is a schematic partial plan view of a display panel according to another embodiment of the present invention. Figure 3B is a schematic cross-sectional view taken along dashed line CC' in Figure 3A .

100: Display Panel

103: Common electrode layer

M1: First metal layer

OA: Overlapping Area

SP: Sub-pixel

SL: Scan Line

DL: Data Line

Claims (8)

A display panel comprises: a substrate; a first metal layer located on the substrate, the first metal layer including a plurality of first scan lines extending along a first direction; a second metal layer located on the substrate, the second metal layer including a plurality of data lines extending along a second direction that is non-parallel to the first direction, wherein at least a portion of the second metal layer is arranged in parallel with the plurality of first scan lines; a common electrode layer, wherein a vertical projection of the plurality of first scan lines onto the plurality of first scan lines forms a plurality of separate first overlapping regions; and a light shielding layer, wherein a vertical projection of the plurality of first scan lines onto the plurality of first scan lines does not overlap at least one of the plurality of first overlapping regions. A display panel as described in claim 1, wherein the vertical projections of the multiple data lines on the multiple first scanning lines overlap the vertical projections of the light shielding layer on the multiple first scanning lines and fall within the vertical projections of the light shielding layer on the multiple first scanning lines. The display panel as described in claim 1, wherein vertical projections of the plurality of data lines on the plurality of first scan lines overlap the vertical projections of the common electrode layer on the plurality of first scan lines and fall within the vertical projections of the common electrode layer on the plurality of first scan lines. The display panel as described in claim 1, wherein the vertical projections of the plurality of data lines on the substrate overlap the vertical projection of the common electrode layer on the substrate and fall within the vertical projection of the common electrode layer on the substrate. The display panel as described in claim 1, wherein the vertical projection of the light shielding layer on the substrate overlaps the vertical projection of the common electrode layer on the substrate and falls within the vertical projection of the common electrode layer on the substrate. The display panel as described in claim 1, wherein the first metal layer further includes a plurality of second scanning lines, the plurality of second scanning lines extending along the first direction, and the vertical projections of the common electrode layer on the plurality of second scanning lines form a continuously distributed second overlapping area. The display panel as described in claim 6, wherein the gaps between two adjacent second scanning lines in the second direction correspond to N sub-pixels, where N is an integer greater than or equal to 2. A display panel as described in claim 7, wherein N is an integer less than or equal to 10.