TWI891855B - Method for strengthening bonding between substrate layer and resistor layer of chip resistor - Google Patents

Abstract

A method for strengthening the bonding between a substrate layer and a resistor layer of a chip resistor includes forming a bonding-strengthening layer on top of the substrate layer of the chip resistor before forming the resistor layer. The bonding-strengthening layer electrically connects two ends of the resistor layer to a pair of top-surface conductive metal layers. The bonding-strengthening layer comprises a ceramic material and glass. The bonding-strengthening layer enhances the interfacial bonding strength between the resistor layer and the top surface of the substrate layer.

Description

Method for strengthening bonding between substrate layer and resistor layer of chip resistor

The present invention relates to a process for manufacturing a chip resistor, and more particularly to a method for strengthening the bonding between a substrate layer and a resistor layer of a chip resistor.

Chip resistors are widely used in various electronic devices, instruments, and communications equipment. Chip resistors are generally divided into two types: thick-film chip resistors and thin-film chip resistors. Thick-film chip resistors use printing and sintering techniques to manufacture their electrodes and resistor layers, while thin-film chip resistors use sputtering techniques to manufacture their electrodes and resistor layers.

A typical chip resistor structure consists of a substrate layer, a pair of back-conductive metal layers formed on the back side of the substrate layer, a pair of top-conductive metal layers formed on the top surface of the substrate layer, a resistor layer covering a portion of the substrate layer's top surface corresponding to the top-conductive metal layers, and an insulating protective layer covering the resistor layer's surface. The two ends of the substrate layer are formed, in that order, with a conductive layer, a nickel layer, and a tin layer.

In the conventional chip resistor structure described above, the resistance across the chip resistor is determined by the impedance of the resistor layer. The base layer is typically made of ceramic or alumina, while the resistor layer is primarily composed of metal materials (e.g., Ag, Pd, Ru, Pt, NiCr, NiCrAl, CuNi, CuNiMn, FeCrAl, etc.). The resistor layer material is deposited on the surface of the base layer through coating and sintering processes, forming an electrical connection between the two corresponding top conductive metal layers.

However, it has been discovered that during the sintering process of the resistor layer, due to the different material properties of the substrate layer and the resistor layer (for example, the ratio of ceramic components in each material), the resistor layer often fails to achieve a good interfacial bond with the substrate layer's surface. This causes the resistor layer to peel off or partially separate from the substrate layer's surface during the sintering process. This not only affects the mechanical stability of the bond between the resistor layer and the substrate layer, but can also affect the electrical properties of the resistor layer.

Therefore, the main purpose of the present invention is to provide an improved method for manufacturing chip resistors, which can overcome the above-mentioned deficiencies in the prior art by improving the manufacturing process of the chip resistors.

The present invention addresses the problems of conventional techniques by forming a bonding-strengthening layer on top of the substrate layer of a chip resistor before forming the resistor layer. The two ends of the resistor layer are electrically connected to a pair of top-surface conductive metal layers. The bonding-strengthening layer comprises a ceramic material and glass. This bonding-strengthening layer enhances the interfacial bonding strength between the resistor layer and the top surface of the substrate layer.

In another embodiment of the present invention, the strengthening bonding layer may cover approximately the middle section of the top surface of the substrate layer or may cover the entire surface of the top surface of the substrate layer.

Compared to conventional techniques, the manufacturing process of the present invention effectively enhances the interfacial bonding strength between the resistor layer and the top surface of the substrate layer by forming a strengthening bonding layer between the resistor layer and the top surface of the substrate layer. This prevents the resistor layer from peeling off from the top surface of the substrate layer during the sintering process, thereby achieving good bonding between the resistor layer and the substrate layer.

The specific structure adopted by this invention will be further described through the following embodiments and accompanying drawings.

Referring to FIG1 , which shows a cross-sectional view of the structure of the first embodiment of the present invention, the chip resistor mainly includes a substrate layer 1, which can be a ceramic substrate layer made of a ceramic material or an aluminum oxide substrate layer made of an aluminum oxide material.

A pair of back conductive metal layers 31 and 32 are formed by printing on the back side of the substrate layer 1, and a distance is provided between the pair of back conductive metal layers 31 and 32.

A strengthening bonding layer 2 is formed approximately in the middle section of the top surface of the substrate layer 1, and an uncovered section is reserved at each end of the substrate layer 1 for a corresponding pair of top conductive metal layers 33 and 34 to be subsequently formed on the uncovered section of the top surface of the substrate layer 1 and a portion of the surface at both ends of the strengthening bonding layer 2.

The strengthening bonding layer 2 comprises ceramic material and glass. During fabrication, a material comprising a filler (e.g. _{, Al2O3} , ZnO, _SiO2 , _TiO2 ), a sintering aid (e.g., _SiO2 , _{BaO, B2O3, Al2O3, V2O5 , ZnO ) ,} a resin, and an organic solvent is applied to the top surface of the substrate layer 1. The layer is then sintered at a predetermined temperature (e.g., 900°C) to form a bonded layer on top of the _substrate layer 1.

A resistor layer 4 is then formed over the surface of the bonding-strengthening layer 2 and a portion of the surface corresponding to the top conductive metal layers 33 and 34. Thus, the two ends of the resistor layer 4 are electrically connected to the top conductive metal layers 33 and 34. The resistor layer 4 may include a laser-trimmed groove 41, which uses laser energy to precisely trim the resistor layer 4 to a desired resistance value.

The resistor layer 4 is primarily composed of a noble metal material (e.g., Ag, Pd, Ru, Pt, NiCr, NiCrAl, CuNi, CuNiMn, FeCrAl, etc.). After being coated on the bonding-strengthening layer 2 and the top conductive metal layers 33 and 34, the resistor layer 4 undergoes a sintering process, forming a portion of the surface of the bonding-strengthening layer 2 corresponding to the top conductive metal layers 33 and 34.

Compared to conventional techniques, the structural design of the present invention effectively enhances the interfacial bonding strength between the resistor layer 4 and the top surface of the substrate layer 1 by forming a reinforcing bonding layer between the resistor layer 4 and the substrate layer 1, thereby preventing the resistor layer 4 from peeling off from the top surface of the substrate layer 1 during the sintering process.

After the resistor layer 4 is completed, a glass layer 5 is formed on the surface of the resistor layer 4 and an insulating protective layer 6 is used to cover the glass layer 5, the resistor layer 4, and a portion of the surface corresponding to the top conductive metal layers 33 and 34.

Finally, a conductive layer 71 is formed on the sidewalls of the two end electrodes 11 and 12 of the substrate layer 1 and on a portion of the surface of the back conductive metal layers 31 and 32 and the top conductive metal layers 33 and 34 to electrically connect the pair of back conductive metal layers 31 and 32 and the pair of top conductive metal layers 33 and 34. A nickel layer 72 and a tin layer 73 are sequentially formed on the surface of the conductive layer 71.

Figure 2 shows a flow chart for fabricating the structure of the first embodiment of the present invention. The fabrication process of the present invention is described below with reference to the structure shown in Figure 1: Step 101: Prepare a substrate layer 1; Step 102: Print a pair of spaced-apart back conductive metal layers 31 and 32 on the back surface of substrate layer 1; Step 103: Form a strengthening bonding layer 2 approximately midway along the top surface of substrate layer 1, leaving an uncovered section at each end of substrate layer 1; Step 104: Form a pair of spaced-apart top conductive metal layers 33 and 34 on the uncovered top surface of substrate layer 1 and on a portion of the surface at each end of strengthening bonding layer 2; Step 105: A resistor layer 4 is formed over the surface of the bonding strengthening layer 2 and a portion of the surface corresponding to the pair of top conductive metal layers 33 and 34, so that both ends of the resistor layer 4 are electrically connected to the pair of top conductive metal layers 33 and 34. Step 106: A glass layer 5 is formed on the surface of the resistor layer 4. Step 107: Laser trimming grooves 41 are formed in the resistor layer 4 using laser energy to trim the resistance of the resistor layer 4. Step 108: An insulating protective layer 6 is formed on the surface of the glass layer 5, a portion of the surface of the resistor layer 4, and a portion of the surface corresponding to the pair of top conductive metal layers 33 and 34. Step 109: Forming a conductive layer 71 on the sidewalls of both end electrodes of substrate layer 1 and on portions of the back conductive metal layers 31, 32 and the top conductive metal layers 33, 34 to electrically connect the back conductive metal layers 31, 32 and the top conductive metal layers 33, 34. Step 110: Forming a nickel layer 72 and a tin layer 73 in sequence on the surface of the conductive layer 71.

Figure 3 shows a cross-sectional view of the structure of the second embodiment of the present invention. The components of this embodiment are substantially the same as those of the first embodiment, so identical components are numbered for reference. This embodiment also includes the following components: substrate layer 1, bonding strengthening layer 2, back conductive metal layers 31 and 32, top conductive metal layers 33 and 34, resistor layer 4, glass layer 5, insulating protective layer 6, conductive layer 71, nickel layer 72, and tin layer 73. However, the strengthening bonding layer 2 covers the entire top surface of the substrate layer 1, while the pair of top conductive metal layers 33 and 34 are located on the surfaces of the strengthening bonding layer 2 at both ends adjacent to the two end poles 11 and 12 of the substrate layer 1, respectively. Moreover, the resistor layer 4 is located on the surface of the strengthening bonding layer 2 and a portion of the surface corresponding to the pair of top conductive metal layers 33 and 34.

Figure 4 shows a flow chart for fabricating the structure of the second embodiment of the present invention. The fabrication process of the present invention is described below with reference to the structure shown in Figure 3: Step 201: Prepare a substrate layer 1; Step 202: Print a pair of spaced-apart back-side conductive metal layers 31 and 32 on the back side of substrate layer 1; Step 203: Form a strengthening bonding layer 2 over the entire top surface of substrate layer 1; Step 204: Form a pair of top-side conductive metal layers 33 and 34 on the surfaces of strengthening bonding layer 2 adjacent to the two end poles 11 and 12 of substrate layer 1, respectively; Step 205: A resistor layer 4 is formed over the surface of the bonding strengthening layer 2 and a portion of the surface corresponding to the pair of top conductive metal layers 33 and 34, so that both ends of the resistor layer 4 are electrically connected to the pair of top conductive metal layers 33 and 34. Step 206: A glass layer 5 is formed on the surface of the resistor layer 4. Step 207: Laser trimming grooves 41 are formed in the resistor layer 4 using laser energy to trim the resistance of the resistor layer 4. Step 208: An insulating protective layer 6 is formed on the surface of the glass layer 5, a portion of the surface of the resistor layer 4, and a portion of the surface corresponding to the pair of top conductive metal layers 33 and 34. Step 209: Forming a conductive layer 71 on the sidewalls of both end electrodes of substrate layer 1 and on portions of the back conductive metal layers 31, 32 and the top conductive metal layers 33, 34 to electrically connect the back conductive metal layers 31, 32 and the top conductive metal layers 33, 34. Step 210: Forming a nickel layer 72 and a tin layer 73 in sequence on the surface of the conductive layer 71.

Figure 5 shows a cross-sectional view of the structure of the third embodiment of the present invention. The components of this embodiment are substantially the same as those of the first embodiment. This embodiment also includes the substrate layer 1, the strengthening bonding layer 2, the back conductive metal layers 31 and 32, the top conductive metal layers 33 and 34, the resistor layer 4, the glass layer 5, the insulating protective layer 6, the conductive layer 71, the nickel layer 72, and the tin layer 73. The strengthening bonding layer 2 also covers the middle section of the top surface of the substrate layer 1, leaving an uncovered section at each of the two end electrodes 11 and 12 of the substrate layer. However, the pair of top conductive metal layers 33 and 34 are located on the uncovered section of the substrate layer 1 and a portion of the surface at both ends of the bonding-strengthening layer 2, respectively. The resistor layer 4 is located between the surface of the bonding-strengthening layer 2 and the pair of top conductive metal layers 33 and 34, and the surface of the resistor layer 4 and the surfaces of the pair of top conductive metal layers 33 and 34 are coplanar. Furthermore, the connection points between the two ends of the resistor layer 4 and the pair of top conductive metal layers 33 and 34 each form a stepped structure 42.

FIG6 shows a flow chart of the method for manufacturing the structure of the third embodiment of the present invention. The manufacturing process of the present invention is described below with reference to the structure shown in Figure 5: Step 301: Prepare a substrate layer 1; Step 302: Print a pair of spaced-apart back-side conductive metal layers 31 and 32 on the back side of substrate layer 1; Step 303: Form a strengthening bonding layer 2 approximately midway along the top surface of substrate layer 1, leaving an uncovered section at each end of substrate layer 1; Step 304: Cover the surface of strengthening bonding layer 2 with a resistor layer 4, preferably leaving an uncovered section at each end of the strengthening bonding layer 2 and forming a stepped structure 42 at each end of the resistor layer 4; Step 305: Form a pair of top conductive metal layers 33 and 34 on the uncovered portion of the top surface of the substrate layer 1, the uncovered portions of the end surfaces of the bonding-strengthening layer 2, and the ends of the resistor layer 4, respectively. Preferably, the surface of the resistor layer 4 and the surfaces of the pair of top conductive metal layers 33 and 34 are coplanar. Step 306: Use laser energy to form laser trimming grooves 41 in the resistor layer 4 to adjust the resistance of the resistor layer 4. Step 307: Form an insulating protective layer 6 on the surface of the resistor layer 4 and on a portion of the surface corresponding to the pair of top conductive metal layers 33 and 34. Step 308: Form a conductive layer 71 on the sidewalls of both end electrodes of substrate layer 1 and on a portion of the surface of back conductive metal layers 31, 32 and top conductive metal layers 33, 34, respectively, to electrically connect the back conductive metal layers 31, 32 and the top conductive metal layers 33, 34. Step 309: Form a nickel layer 72 and a tin layer 73 in sequence on the surface of conductive layer 71.

Figure 7 shows a cross-sectional view of the structure of the fourth embodiment of the present invention. The components of this embodiment are substantially the same as those of the second embodiment described above. This embodiment also includes a substrate layer 1, a strengthening bonding layer 2, back conductive metal layers 31 and 32, top conductive metal layers 33 and 34, a resistor layer 4, a glass layer 5, an insulating protective layer 6, a conductive layer 71, a nickel layer 72, and a tin layer 73. The strengthening bonding layer 2 covers the entire top surface of the substrate layer 1, while the top conductive metal layers 33 and 34 are located on the surfaces of the strengthening bonding layer 2, adjacent to the two terminals 11 and 12 of the substrate layer 1, respectively. The resistor layer 4 is located between the surface of the bonding-strengthening layer 2 and the pair of top-surface conductive metal layers 33 and 34. The surface of the resistor layer 4 and the surfaces of the top-surface conductive metal layers 33 and 34 are coplanar. Furthermore, the connection points between the two ends of the resistor layer 4 and the top-surface conductive metal layers 33 and 34 each form a stepped structure 42.

Figure 8 shows a flow chart for fabricating the structure of the fourth embodiment of the present invention. The fabrication process of the present invention is described below with reference to the structure shown in Figure 7: Step 401: Prepare a substrate layer 1; Step 402: Print a pair of spaced-apart back-side conductive metal layers 31 and 32 on the back side of substrate layer 1; Step 403: Form a strengthening bonding layer 2 over the entire top surface of substrate layer 1; Step 404: Cover the surface of strengthening bonding layer 2 with a resistor layer 4, preferably leaving an uncovered section at each end of the strengthening bonding layer 2 and forming a stepped structure 42 at each end of the resistor layer 4; Step 405: Forming a pair of top conductive metal layers 33 and 34 on the uncovered portion of the top surface of the substrate layer 1, the uncovered portions of the end surfaces of the bonding-strengthening layer 2, and the ends of the resistor layer 4, respectively. Preferably, the surface of the resistor layer 4 and the surfaces of the pair of top conductive metal layers 33 and 34 are coplanar. Step 406: Using laser energy, forming a laser trimming groove 41 in the resistor layer 4 to adjust the resistance of the resistor layer 4. Step 407: Forming an insulating protective layer 6 on the surface of the resistor layer 4 and on a portion of the surface corresponding to the pair of top conductive metal layers 33 and 34. Step 408: Form a conductive layer 71 on the sidewalls of both end electrodes of substrate layer 1 and on portions of the back conductive metal layers 31, 32 and the top conductive metal layers 33, 34 to electrically connect the back conductive metal layers 31, 32 and the top conductive metal layers 33, 34. Step 409: Form a nickel layer 72 and a tin layer 73 in sequence on the surface of the conductive layer 71.

The above embodiments illustrate a resistor layer disposed on the top surface of a substrate layer. In actual product applications, the resistor layer can also be located on the bottom surface of the substrate layer, with a bonding-strengthening layer disposed between the lower resistor layer and the bottom surface of the substrate layer. Furthermore, the present invention can also be applied to products having a double-layer resistor layer, i.e., an upper resistor layer and a lower resistor layer disposed on the top and bottom surfaces of the substrate layer, respectively, with a bonding-strengthening layer disposed between the upper resistor layer and the top surface of the substrate layer, and between the lower resistor layer and the bottom surface of the substrate layer.

The above embodiments are only used to illustrate the present invention and are not intended to limit the scope of the present invention. Any other equivalent modifications or replacements that do not deviate from the spirit disclosed by the present invention should be included in the scope of the patent application described below.

1: Substrate layer 11, 12: Terminations 2: Bonding reinforcement layer 31, 32: Back conductive metal layer 33, 34: Top conductive metal layer 4: Resistor layer 41: Laser-trimmed trench 42: Step structure 5: Glass layer 6: Insulation protection layer 71: Conductive layer 72: Nickel layer 73: Tin layer

Figure 1 shows a cross-sectional view of the structure of the first embodiment of the present invention. Figure 2 shows a flow chart for manufacturing the structure of the embodiment of Figure 1 according to the present invention. Figure 3 shows a cross-sectional view of the structure of the second embodiment of the present invention. Figure 4 shows a flow chart for manufacturing the structure of the embodiment of Figure 3 according to the present invention. Figure 5 shows a cross-sectional view of the structure of the third embodiment of the present invention. Figure 6 shows a flow chart for manufacturing the structure of the embodiment of Figure 5 according to the present invention. Figure 7 shows a cross-sectional view of the structure of the fourth embodiment of the present invention. Figure 8 shows a flow chart for manufacturing the structure of the embodiment of Figure 7 according to the present invention.

Claims (6)

A method for strengthening the bonding between a substrate layer and a resistor layer of a chip resistor comprises the following steps: (a) preparing a substrate layer, the substrate layer being made of one of a ceramic substrate layer and an alumina substrate layer; (b) printing a pair of spaced-apart back conductive metal layers on the back of the substrate layer; (c) forming a strengthening bonding layer approximately in the middle of the top surface of the substrate layer, and leaving an uncovered section at each end of the substrate layer, the strengthening bonding layer comprising _a ceramic material and glass, and the strengthening bonding layer being made of a filler selected from _{one of Al2O3} , ZnO, _SiO2 , and TiO2, a filler selected from _{one of SiO2} , BaO, _B2O3 , _Al2O3 , _{V2O5 ,} and _{the like.} (d) forming a pair of top conductive metal layers spaced apart from each other on the uncovered section of the top surface of the substrate layer and a portion of the surface at both ends of the strengthening bonding layer; and (e) covering a resistive layer on the surface of the strengthening bonding layer and the pair of top conductive metal layers corresponding to the surface of the strengthening bonding layer. (f) forming an insulating protective layer on the surface of the resistor layer and a portion of the surface corresponding to the top conductive metal layer; (g) forming a conductive layer on the sidewalls of the two end poles of the substrate layer and a portion of the surface of the back conductive metal layer and the top conductive metal layer to electrically connect the pair of back conductive metal layers and the pair of top conductive metal layers. A method for strengthening the bonding between a substrate layer and a resistor layer of a chip resistor comprises the following steps: (a) preparing a substrate layer, wherein the substrate layer is made of one of a ceramic substrate layer and an alumina substrate layer; (b) printing a pair of back conductive metal layers spaced apart from each other on the back surface of the substrate layer; ( _c ) forming a strengthening bonding layer on the entire surface of the top surface of the substrate layer, wherein the strengthening bonding layer comprises a ceramic material and glass, and the strengthening bonding layer comprises a filler selected from _one of _Al2O3 , ZnO, _SiO2 , and TiO2, a filler selected from _one of _SiO2 , BaO, _B2O3 , _Al2O3 , _{V2O5 , etc.} (d) forming a pair of top conductive metal layers on the surfaces of the strengthening bonding layer adjacent to the two ends of the substrate layer; (e) covering a portion of the surface of the strengthening bonding layer and the top conductive metal layers corresponding to the surface of the strengthening bonding layer with a resistor layer; , so that the two ends of the resistor layer are electrically connected to the top conductive metal layer; (f) an insulating protection layer is formed on the surface of the resistor layer and a portion of the surface corresponding to the top conductive metal layer; (g) a conductive layer is formed on the side walls of the two end poles of the substrate layer and a portion of the surface of the back conductive metal layer and the top conductive metal layer to electrically connect the back conductive metal layer and the top conductive metal layer. A method for strengthening the bonding between a substrate layer and a resistor layer of a chip resistor comprises the following steps: (a) preparing a substrate layer, the substrate layer being made of one of a ceramic substrate layer and an alumina substrate layer; (b) printing a pair of spaced-apart back conductive metal layers on the back of the substrate layer; (c) forming a strengthening bonding layer approximately in the middle of the top surface of the substrate layer, and leaving an uncovered section at each end of the substrate layer, the strengthening bonding layer comprising _a ceramic material and glass, and the strengthening bonding layer being made of a filler selected from _{one of Al2O3} , ZnO, _SiO2 , and TiO2, a filler selected from _{one of SiO2} , BaO, _B2O3 , _Al2O3 , _{V2O5 ,} and _{the like.} (d) a resistive layer is coated on the surface of the strengthening bonding layer, and an uncovered section is reserved at each end of the surface of the strengthening bonding layer; (e) a resistive layer is coated on the top surface of the substrate layer, and a resistive layer is coated on the top surface of the substrate layer, and a resistive layer is coated on the top surface of the substrate layer, and a resistive layer is coated on the top surface of the substrate layer, and a resistive layer is coated on the top surface of the strengthening bonding layer. (f) forming an insulating protective layer on a surface of the resistor layer and a portion of a surface corresponding to the pair of top conductive metal layers; and (g) forming a conductive layer on the sidewalls of the two end poles of the substrate layer and a portion of a surface of the back conductive metal layer and the top conductive metal layer to electrically connect the pair of back conductive metal layers and the pair of top conductive metal layers. A method for strengthening the bonding between a substrate layer and a resistor layer of a chip resistor comprises the following steps: (a) preparing a substrate layer, wherein the substrate layer is made of one of a ceramic substrate layer and an aluminum oxide substrate layer; (b) printing a pair of back conductive metal layers spaced apart from each other on the back surface of the substrate layer; ( _c ) forming a strengthening bonding layer on the entire surface of the top surface of the substrate layer, wherein the strengthening bonding layer comprises a ceramic material and glass, and the strengthening bonding layer comprises a filler selected from _one of _Al2O3 , ZnO, _SiO2 , and TiO2, a filler selected from _one of _SiO2 , BaO, _B2O3 , _Al2O3 , _{V2O5 , etc.} (d) a resistive layer is coated on the surface of the strengthening bonding layer, and an uncovered section is reserved at both ends of the surface of the strengthening bonding layer; (e) a resistive layer is formed between the uncovered section of the strengthening bonding layer and the two ends of the resistive layer; (f) forming an insulating protective layer on the surface of the resistor layer and a portion of the surface corresponding to the pair of top conductive metal layers; (g) forming a conductive layer on the sidewalls of the two end poles of the substrate layer and a portion of the surface of the back conductive metal layer and the top conductive metal layer to electrically connect the pair of back conductive metal layers and the pair of top conductive metal layers. The method for strengthening the bonding between a chip resistor substrate layer and a resistive layer as described in claim 1, 2, 3, or 4, wherein after the resistive layer covers the surface of the bonding strengthening layer, the method further includes forming a laser trimming groove in the resistive layer using laser energy to trim the resistance value of the resistive layer. A method for strengthening the bonding of a chip resistor substrate layer and a resistor layer as described in claim 3 or 4, wherein the surface of the resistor layer and the surface of the top conductive metal layer are in the same plane.