TWI891494B - Electronic device and method for managing floating point unit resources - Google Patents

Abstract

A method for managing resources of a floating point unit (FPU) is applied to an electronic device. The electronic device includes a computing circuit and a memory. The memory stores a first variable and a second variable. The computing circuit includes the FPU. The FPU contains an FPU register. The computing circuit operates in one of a first state, a second state, and a third state. The management method includes the following steps: (A) pointing the first variable to the address of the second variable when the computing circuit switches from the first state to the second state, and the first variable is in an initial state; (B) storing the FPU resource content of the second variable in the FPU register; and (C) controlling the computing circuit to switch to the second state.

Description

Electronic device and floating point computing unit resource management method thereof

The present invention relates to electronic devices, and more particularly to resource management of floating-point computing units.

Figure 1 illustrates the hardware resources of a conventional electronic device. Conventional electronic devices typically include a central processing unit (CPU) and memory (volatile memory and/or nonvolatile memory). The CPU includes a floating point unit (FPU) and multiple CPU registers (e.g., control registers, general registers, and status registers). The FPU is used to perform floating-point operations and includes multiple FPU registers. Therefore, as shown in Figure 1, the hardware resources 100 of the electronic device include CPU resources 110 (e.g., the contents of CPU registers), memory resources 120 (e.g., memory pointers), and FPU resources 130 (e.g., the contents of FPU registers).

Today's operating systems typically support multitasking. During task switching, the operating system must properly preserve hardware resources 100 to maintain the correct operation of electronic devices. Preserving hardware resources 100 is also crucial for multi-state CPUs, especially when the multiple states correspond to different multisystems. Otherwise, data processing errors may occur during state switching, or even cause a system crash.

In view of the shortcomings of the prior art, one object of the present invention is to provide an electronic device and a floating-point computing unit resource management method thereof to improve the shortcomings of the prior art.

One embodiment of the present invention provides an electronic device comprising: a computing circuit and a memory. The computing circuit comprises a floating-point computing unit. The floating-point computing unit comprises a floating-point computing unit register. The computing circuit operates in one of a first state, a second state, and a third state. The memory is used to store a first variable and a second variable. When the computing circuit switches from the first state to the second state, and the first variable is in an initial state, the computing circuit performs the following steps: (A) points the first variable to the address of the second variable; and (B) fills the floating-point computing unit register with a floating-point computing unit resource content of the second variable.

Another embodiment of the present invention provides a method for managing floating-point computing unit resources, which is applied to an electronic device. The electronic device includes a computing circuit and a memory. The memory stores a first variable and a second variable. The computing circuit includes a floating-point computing unit. The floating-point computing unit includes a floating-point computing unit register. The computing circuit operates in one of a first state, a second state, and a third state. The management method includes: (A) when the computing circuit switches from the first state to the second state and the first variable is an initial state, the first variable is pointed to the address of the second variable; (B) a floating-point computing unit resource content of the second variable is filled into the floating-point computing unit register; and (C) controlling the computing circuit to switch to the second state.

Another embodiment of the present invention provides a method for managing floating-point calculation unit resources, which is applied to an electronic device. The electronic device includes a calculation circuit and a memory. The memory stores a first variable and a second variable. The calculation circuit includes a floating-point calculation unit. The floating-point calculation unit includes a floating-point calculation unit register. The calculation circuit operates in one of a first state, a second state, and a third state. The management method includes: when the first variable is not an initial state and the first variable does not point to the address of the second variable, saving the content of the floating-point calculation unit register to a task control block of a task pointed to by the first variable. The task belongs to the first state, and the task control block is stored in the memory.

The technical means embodied in the embodiments of the present invention can improve at least one of the shortcomings of the prior art. Therefore, the present invention can improve the security and stability of the system compared to the prior art.

The features, implementation, and effects of the present invention are described in detail below with reference to the accompanying drawings.

The technical terms used in the following descriptions are based on customary terms in the technical field. If this manual provides explanations or definitions for certain terms, the interpretation of those terms shall be based on the explanations or definitions in this manual.

The disclosure of the present invention includes an electronic device and a method for managing floating-point computing unit resources thereof. Because some components included in the electronic device of the present invention may individually be known components, details regarding known components will be omitted in the following description without affecting the full disclosure and feasibility of the device invention. Furthermore, some or all of the processes of the floating-point computing unit resource management method of the present invention may be in the form of software and/or firmware and may be executed by the electronic device of the present invention or its equivalent. Without affecting the full disclosure and feasibility of the method invention, the following description of the method invention will focus on the steps rather than the hardware.

Please refer to Figure 2, which is a functional block diagram of one embodiment of an electronic device of the present invention. Electronic device 200 includes a computing circuit 210 and a memory 220 (including but not limited to volatile memory and/or non-volatile memory) coupled to each other. Computing circuit 210 includes an FPU 215 and is further coupled to an external memory 230 (including but not limited to volatile memory and/or non-volatile memory). Memory 220 stores program code and/or program instructions. Computing circuit 210 can be a circuit or electronic component with program execution capabilities, such as a CPU, a microprocessor, a microprocessing unit, a digital signal processor, an application-specific integrated circuit (ASIC), or an equivalent circuit thereof. The computing circuit 210 executes the program codes and/or program instructions to execute the operating system and/or application programs of the electronic device 200. In the following description, it is assumed that the computing circuit 210 is implemented as a CPU, but the present invention is not limited thereto.

Computing circuitry 210 can execute at least one operating system and process multiple tasks. Figure 3 shows a task control block (TCB) for a task. Task control block 300 is a memory space (e.g., a portion of memory 220) used to store task status and information during execution. Task control block 300 includes information such as the task's identifier 310, priority 320, name 330, and FPU resource context 340. FPU resource context 340 is used to store the values of FPU 215 registers.

The computing circuit 210 can operate in multiple states to execute multiple systems. Please refer to Figure 4, which is a schematic diagram of the computing circuit of the present invention switching between multiple states. The computing circuit 210 executes a first operating system in the first state 410 and a second operating system in the second state 420. When the computing circuit 210 switches from the first state 410 to the second state 420, or from the second state 420 to the first state 410, the computing circuit 210 first enters the third state 430. The third state 430 is a temporary state with ultra-high privileges (also known as monitor mode). The privileges of the third state 430 are higher than those of the first state 410 and the second state 420. In the third state 430, the computing circuit 210 has permission to switch states and executes monitor firmware to perform context switching (also known as environment switching) between operating systems (or states) (described in detail below with reference to Figures 8 and 9). In some embodiments, the first state 410 is a security state, while the second state 420 is a non-security state, and the permissions of the first state 410 are higher than those of the second state 420. In some embodiments, the first operating system is a simple operating system (Simple OS), while the second operating system is a rich operating system (Rich OS).

Please refer to Figure 5, which is a schematic diagram of context switching according to the present invention. In the example of Figure 5, the computing circuit 210 switches from the previous task TAp (corresponding to the hardware resource content 500P) to the current task TAc (corresponding to the hardware resource content 500C). More specifically, during a task switch, the operating system of the computing circuit 210 first saves the hardware resources used by the previous task TAP (including the contents of the CPU registers 510, the contents of the FPU registers 520, and the memory pointers 530) to the hardware resource contents 500P of the previous task TAP. It then restores the hardware resource contents 500C of the current task TAc (i.e., stores the hardware resource contents 500C in the CPU registers 510, the FPU registers 520, and the memory pointers 530). The computing circuit 210 then executes the current task TAc. The FPU registers 520 are included in the FPU 215. In some embodiments, the contents of the FPU register 520 are saved to the task control block 300 of the previous task TAp (more specifically, to the FPU resource contents 340).

Please refer to Figure 6, which is a flowchart of one embodiment of intra-state task switching according to the present invention. When the computing circuit 210 switches from the previous task TAP to the current task TAc, the computing circuit 210 (or the operating system it executes) performs a context switch (step S610, see the description of Figure 5) and shuts down the FPU 215 (step S620), then executes the current task TAc (step S630). When the current task TAc is about to use the FPU 215, because the FPU 215 is in a shut-down state, the computing circuit 210 generates an exception signal. After the operating system detects this exception signal, it executes the corresponding exception handling process. During this exception handling process, the operating system will enable the FPU 215 and, as appropriate, save and/or restore FPU resources (described in detail below with reference to FIG. 7 ). When the computing circuit 210 performs a task switch again (i.e., the process of FIG. 6 ), the FPU 215 will be disabled again (step S620 ).

In some embodiments, the computing circuit 210 (or the operating system it executes) turns the FPU 215 on or off by changing the value of a control register.

Please refer to Figure 7, which is a flow chart of one embodiment of the FPU resource management method of the present invention. In the following description, it is assumed that the computing circuit 210 is operating in the first state 410 or the second state 420 and is switching from the previous task TAp to the current task TAc. The flow chart of Figure 7 is part of an operating system and includes the following steps.

Step S710: The operating system receives an exception signal indicating that the current task TAc contains a floating-point instruction, and the floating-point instruction will use the FPU 215.

Step S720: The computing circuit 210 determines whether variable A points to the current task TAc (i.e., the task currently being executed by the computing circuit 210). More specifically, variable A points to a task control block 300 or the FPU resource contents 340 of that task control block 300. Variable A may be stored in memory 220. A yes result in step S720 indicates that the current task TAc has undergone several context switches since it last used the FPU 215, and that no previously executed tasks have used the FPU 215.

Step S730: The computing circuit 210 does not change the contents of the FPU register 520, nor does it save the contents of the FPU register 520. As described in the previous step, since the contents of the FPU register 520 have not changed since the last time the FPU 215 was used, the computing circuit 210 (more specifically, the FPU 215) can now continue to execute floating-point instructions of the current task TAc based on the current contents of the FPU register 520 (step S740).

Step S750: The calculation circuit 210 determines whether the variable A is in an initial state. The initial state can be that the variable A is unassigned or that the variable A is a default value. When the electronic device 200 is first started, the variable A is in the initial state (i.e., unassigned or equal to the default value).

When variable A is in the initial state (yes in step S750, indicating that the FPU 215 has not been used since the electronic device 200 was powered on), the operating system restores the FPU resource contents 340 of the current task TAc, that is, it fills the FPU resource contents 340 of the current task TAc into the FPU register 520 (step S770). It should be noted that when the current task TAc has not used the FPU 215, the FPU resource contents 340 of the current task TAc are initialized FPU resource contents.

When variable A is not in the initial state (step S750 is No, indicating that the FPU 215 has been used since the electronic device 200 was powered on), the operating system saves the contents of the FPU register 520 to the FPU resource contents 340 of the previous task TAp (step S760), and then executes step S770.

Step S780: The operating system points variable A to the current task TAc (to indicate that the task that most recently used the FPU 215 is the current task TAc), and then executes the current task TAc (step S740).

In some embodiments, both the first state 410 and the second state 420 manage FPU resources based on the process of Figure 7. In different embodiments, the first state 410 manages FPU resources based on the process of Figure 7, while the second state 420 manages FPU resources based on other methods (e.g., the known eager loading method).

Please refer to Figure 8, which is a flow chart illustrating one embodiment of state switching according to the present invention. When the computing circuit 210 switches from the second state 420 to the first state 410, the operating system in the second state 420 controls the computing circuit 210 to enter the third state 430 (step S810). The monitoring firmware in the third state 430 then shuts down the FPU 215 (step S820) and then controls the computing circuit 210 to switch back to the first state 410 (step S830).

Please refer to Figure 9, which is a flow chart of another embodiment of the FPU resource management method of the present invention. In this embodiment, variables A and B are stored in a shared memory of the electronic device 200 (for example, a portion of the memory 220) and are shared by the operating system in the first state 410 and the monitoring firmware in the third state 430. Variable B is used to store the contents of the FPU register 520 when the computing circuit 210 is about to switch from the second state 420 to the first state 410. Variable A points to the address where variable B is located, or a task in the first state 410. In the following description, it is assumed that the computing circuit 210 is about to switch from the first state 410 to the second state 420, and the operating system in the second state 420 may use the FPU 215. The process of FIG9 is executed in the third state 430 (ie, a portion of the monitoring firmware) and includes the following steps.

Step S910: The calculation circuit 210 determines whether the variable A is in the initial state. Please refer to the description of step S750.

When variable A is in the initial state (yes in step S910, indicating that the operating system in the first state 410 has not yet used the FPU 215), the computing circuit 210 points variable A to the address of variable B (e.g., an address in memory 220) (step S920), then populates the FPU resource contents of variable B into the FPU register 520 (step S930), and then controls the computing circuit 210 to switch to the second state 420 (step S960). It should be noted that when the operating system in the second state 420 has not yet used the FPU 215, the FPU resource contents of variable B are initialized FPU resource contents.

When variable A is not in the initial state (step S910 is no, indicating that the FPU 215 has been used), the calculation circuit 210 determines whether variable A points to the address where variable B is located (step S940).

When variable A points to the address of variable B (step S940 is yes, indicating that during the most recent operation of the operating system in the first state 410, all tasks did not use the FPU 215), the monitoring firmware in the third state 430 controls the computing circuit 210 to switch to the second state 420 (step S960).

If variable A does not point to the address of variable B (step S940 is negative, indicating that task TAx used FPU 215 during the most recent operating system run in first state 410), the monitoring firmware in third state 430 saves the contents of FPU register 520 to task control block 300 (more specifically, to FPU resource content 340) of the task pointed to by variable A (i.e., task TAx in first state 410) (step S950). After executing steps S920 and S930, the monitoring firmware controls computing circuit 210 to switch to second state 420 (step S960).

In summary, the present invention provides a comprehensive FPU resource management method (i.e., register save and/or restore strategy) that allows the computing circuit 210 to properly manage FPU resources both within a state (corresponding to the processes of Figures 6-7) and between states (corresponding to the processes of Figures 8-9). This significantly reduces the time and space overhead of saving and/or restoring FPU resources when switching between states of the computing circuit 210, supporting multiple systems, while also ensuring safety and stability. Furthermore, when the computing circuit 210 switches from the second state 420 to the first state 410, no FPU resource preservation costs are incurred (only the FPU 215 needs to be shut down, see FIG8 ). Furthermore, when the computing circuit 210 switches from the first state 410 to the second state 420, the frequency of saving and/or restoring FPU resources is significantly lower than that of conventional active loading methods. Therefore, the present invention not only ensures security and stability before and after state transitions, but also significantly reduces the time overhead of saving and/or restoring FPU resources caused by program code using the FPU, making transitions between states faster and more time-efficient.

Although the embodiments of the present invention are described above, these embodiments are not intended to limit the present invention. Those skilled in the art may modify the technical features of the present invention based on the explicit or implicit content of the present invention. All such modifications may fall within the scope of the patent protection sought by the present invention. In other words, the scope of patent protection for the present invention shall be determined by the scope of the patent application in this specification.

100: Hardware Resources 110: CPU Resources 120: Memory Resources 130: FPU Resources 200: Electronic Devices 210: Computing Circuits 215: FPU (Floating Point Unit) 220: Memory 230: External Memory 300: Task Control Block 310: Identifier 320: Priority 330: Name 340: FPU Resource Details 410: First State 420: Second State 430: Third State 500C, 500P: Hardware Resource Details 510: CPU Registers 520: FPU Registers 530: Memory Pointers S610,S620,S630,S710,S720,S730,S740,S750,S760,S770,S780,S810,S820,S830,S910,S920,S930,S940,S950,S960: Step

Figure 1 illustrates hardware resources of a known electronic device; Figure 2 is a functional block diagram of an embodiment of an electronic device according to the present invention; Figure 3 illustrates a task control block of a task; Figure 4 is a schematic diagram illustrating switching between multiple states of a computing circuit according to the present invention; Figure 5 is a schematic diagram illustrating context switching according to the present invention; Figure 6 is a flowchart of an embodiment of intra-state task switching according to the present invention; Figure 7 is a flowchart of an embodiment of an FPU resource management method according to the present invention; Figure 8 is a flowchart of an embodiment of inter-state switching according to the present invention; and Figure 9 is a flowchart of another embodiment of an FPU resource management method according to the present invention.

S910, S920, S930, S940, S950, S960: Steps

Claims (17)

An electronic device comprises: a computing circuit, wherein the computing circuit includes a floating-point computing unit, the floating-point computing unit includes a floating-point computing unit register, and the computing circuit operates in one of a first state, a second state, and a third state; and a memory for storing a first variable and a second variable; When the computing circuit switches from the first state to the second state and the first variable is in an initial state, the computing circuit performs the following steps: (A) points the first variable to the address of the second variable; and (B) populates the floating-point computing unit register with a floating-point computing unit resource content of the second variable. An electronic device as claimed in claim 1, wherein, when the first variable is not in the initial state and the first variable does not point to the address of the second variable, the computing circuit saves the contents of the floating-point computing unit register to a task control block of a task pointed to by the first variable, the task belongs to the first state, and the task control block is stored in the memory. The electronic device of claim 1, wherein when the computing circuit switches from the second state to the first state, the computing circuit turns off the floating-point computing unit. The electronic device of claim 1, wherein when the computing circuit operates in the first state and a current task uses the floating-point computing unit, the computing circuit points the first variable to the current task. An electronic device as claimed in claim 4, wherein the floating-point computing unit resource content is a first floating-point computing unit resource content, the computing circuit executes a previous task before executing the current task, the computing circuit further saves the content of the floating-point computing unit register to a first task control block of the previous task, and fills the floating-point computing unit register with a second floating-point computing unit resource content of a second task control block of the current task. The electronic device of claim 4, wherein the computing circuit executes a previous task before executing the current task, and when the computing circuit switches from the previous task to the current task, the computing circuit turns off the floating-point computing unit. The electronic device of claim 1, wherein step (A) and step (B) are performed in the third state, and a third permission of the third state is higher than a first permission of the first state and a second permission of the second state. A floating-point computation unit resource management method is applied to an electronic device. The electronic device includes a computing circuit and a memory, the memory storing a first variable and a second variable. The computing circuit includes a floating-point computation unit, the floating-point computation unit including a floating-point computation unit register. The computing circuit operates in one of a first state, a second state, and a third state. The management method includes: (A) when the computing circuit switches from the first state to the second state and the first variable is in an initial state, pointing the first variable to the address of the second variable; (B) filling the floating-point computation unit register with the floating-point computation unit resource content of the second variable; and (C) controlling the computing circuit to switch to the second state. The management method of claim 8, further comprising: (D) when the first variable is not in the initial state and does not point to the address of the second variable, saving the contents of the floating-point calculation unit register to a task control block of a task pointed to by the first variable; wherein, the task is in the first state and the task control block is stored in the memory. The management method of claim 8 further includes: (D) turning off the floating-point calculation unit when the calculation circuit switches from the second state to the first state. The management method of claim 8, further comprising: (D) when the computing circuit operates in the first state and a current task uses the floating-point computing unit, pointing the first variable to the current task. The management method of claim 11, wherein the floating-point computing unit resource content is a first floating-point computing unit resource content, and the computing circuit executed a previous task before executing the current task, the management method further comprising: (E) saving the content of the floating-point computing unit register to a first task control block of the previous task; and (F) filling the floating-point computing unit register with a second floating-point computing unit resource content from a second task control block of the current task. The management method of claim 11, wherein the computing circuit executes a previous task before executing the current task, the management method further comprising: (E) turning off the floating-point computing unit when the computing circuit switches from the previous task to the current task. The management method of claim 8, wherein step (A), step (B) and step (C) are performed in the third state, and a third permission of the third state is higher than a first permission of the first state and a second permission of the second state. A floating-point unit resource management method is applied to an electronic device. The electronic device includes a computing circuit and a memory. The memory stores a first variable and a second variable. The computing circuit includes a floating-point unit. The floating-point unit includes a floating-point unit register. The computing circuit operates in one of a first state, a second state, and a third state. The management method includes: (A) when the first variable is not in an initial state and does not point to the address of the second variable, saving the contents of the floating-point unit register to a task control block of a task pointed to by the first variable; The task is in the first state, and the task control block is stored in the memory. The management method of claim 15 further includes: (B) turning off the floating-point calculation unit when the calculation circuit switches from the second state to the first state. The management method of claim 15 further includes: (B) when the computing circuit operates in the first state and a current task uses the floating-point computing unit, pointing the first variable to the current task.