TWI891391B - AMOLED pixel compensation circuit, OLED display device and information processing device - Google Patents
AMOLED pixel compensation circuit, OLED display device and information processing deviceInfo
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Abstract
一種AMOLED像素補償電路,其具有一開關電路、一PMOS電晶體、一儲存電容及一OLED元件,該開關電路係用以執行一開關操作程序以驅使該PMOS電晶體產生一驅動電流以使該OLED元件產生一亮度,該開關操作程序包括:以一第一初始電壓設定該PMOS電晶體之閘極電壓,以一正直流供應電壓設定該PMOS電晶體之源極電壓,及以一第二初始電壓設定該OLED元件的陽極電壓;使該PMOS電晶體與該儲存電容串聯於一資料電壓與該第二初始電壓之間以使該儲存電容儲存的電壓為該第二初始電壓與(該資料電壓與該PMOS電晶體之閾值電壓之和)之差;以及 使該儲存電容的兩端分別耦接該PMOS電晶體的該閘極和該源極而產生該驅動電流。An AMOLED pixel compensation circuit includes a switching circuit, a PMOS transistor, a storage capacitor, and an OLED element. The switching circuit is configured to perform a switching operation to drive the PMOS transistor to generate a driving current to increase the brightness of the OLED element. The switching operation includes: setting a gate voltage of the PMOS transistor with a first initial voltage; The source voltage of the PMOS transistor is set with a positive DC supply voltage, and the anode voltage of the OLED element is set with a second initial voltage. The PMOS transistor and the storage capacitor are connected in series between a data voltage and the second initial voltage so that the voltage stored in the storage capacitor is the difference between the second initial voltage and the sum of the data voltage and the threshold voltage of the PMOS transistor. The drive current is generated by coupling two terminals of the storage capacitor to the gate and source of the PMOS transistor, respectively.
Description
本發明係有關積體電路領域,尤指一種AMOLED像素補償電路。The present invention relates to the field of integrated circuits, and more particularly to an AMOLED pixel compensation circuit.
一般AMOLED(active mode organic light emitting diode;主動模式有機發光二極體)顯示模組之各像素係由一像素電路構成,該像素電路包括一OLED單元及用以產生一驅動電流以驅動該OLED(organic light emitting diode;有機發光二極體)單元之一電晶體電路,該電晶體電路一般包含多個電晶體及一個儲存電容,例如7T1C(七個PMOS電晶體及一個儲存電容)架構,且係依該儲存電容所儲存的顯示資料電壓產生一定電流,及依一脈衝調變信號控制該定電流的輸出時間以決定該驅動電流的等效值,從而驅使該OLED單元呈現一預定亮度。Each pixel in a typical AMOLED (active mode organic light emitting diode) display module is composed of a pixel circuit. This pixel circuit includes an OLED unit and a transistor circuit for generating a drive current to drive the OLED (organic light emitting diode) unit. This transistor circuit typically includes multiple transistors and a storage capacitor, such as a 7T1C (seven PMOS transistors and a storage capacitor) structure. A constant current is generated based on the display data voltage stored in the storage capacitor. The output time of this constant current is controlled by a pulse modulation signal to determine the equivalent value of the drive current, thereby driving the OLED unit to present a predetermined brightness.
然而,由於製程存在變異,該些像素電路中的電晶體會有閾值電壓不均勻的情形,導致各像素之顯示亮度不均而使顯示畫面有Mura(殘痕)現象。However, due to process variations, the threshold voltages of the transistors in these pixel circuits may be uneven, resulting in uneven display brightness across pixels and causing mura (mura) on the display screen.
另外,為增加行動裝置的續航力,當其顯示的畫面為靜態畫面時,一般的AMOLED顯示模組會降低顯示掃描刷新率以節省功耗。然而,當顯示掃描刷新率降低時,該電晶體電路中的電晶體漏電流卻會讓該儲存電容的儲存電壓下降,從而影響該OLED單元的顯示亮度。Furthermore, to increase the battery life of mobile devices, typical AMOLED display modules reduce the display refresh rate when displaying a static image to save power. However, when the display refresh rate is reduced, transistor leakage current in the transistor circuit causes the storage capacitor's voltage to drop, thereby affecting the display brightness of the OLED unit.
為解決上述問題,本領域亟需一種新穎的 AMOLED像素補償電路架構。To solve the above problems, a novel AMOLED pixel compensation circuit architecture is urgently needed in this field.
本發明之一目的在於提供一種AMOLED像素補償電路,其可在顯示一幀畫面的過程中先快速均一化各OLED像素的電流源電晶體的源-閘極電壓,從而極小化電流源電晶體之源-閘極寄生電容之遲滯電壓對顯示畫面所造成的短期殘影。One objective of the present invention is to provide an AMOLED pixel compensation circuit that can quickly equalize the source-gate voltage of the current source transistor of each OLED pixel during the display of a frame, thereby minimizing the short-term residual effect on the displayed image caused by the hysteresis voltage of the source-gate parasitic capacitance of the current source transistor.
本發明之另一目的在於提供一種AMOLED像素補償電路,其可補償電流源電晶體之閾值電壓以極小化因製程偏差及供應電壓的電壓降所帶來的顯示不均及Mura現象。Another object of the present invention is to provide an AMOLED pixel compensation circuit that can compensate the threshold voltage of a current source transistor to minimize display unevenness and mura caused by process variations and supply voltage drops.
本發明之另一目的在於揭露一種AMOLED像素補償電路,其可延長儲存電容的電壓保持時間以支持低畫面刷新率。Another object of the present invention is to disclose an AMOLED pixel compensation circuit that can extend the voltage retention time of a storage capacitor to support low screen refresh rates.
本發明之另一目的在於揭露一種OLED顯示裝置,其可藉由前述的AMOLED像素補償電路極小化顯示畫面的短期殘影。Another object of the present invention is to disclose an OLED display device that can minimize short-term afterimages on the display screen by using the aforementioned AMOLED pixel compensation circuit.
本發明之另一目的在於揭露一種OLED顯示裝置,其可藉由前述的AMOLED像素補償電路極小化因製程偏差及供應電壓的電壓降所帶來的顯示不均及Mura現象,以及延長儲存電容的電壓保持時間以支持低畫面刷新率。Another object of the present invention is to disclose an OLED display device that can minimize display unevenness and mura caused by process variations and supply voltage drops through the aforementioned AMOLED pixel compensation circuit, and extend the voltage retention time of the storage capacitor to support low refresh rates.
本發明之又一目的在於揭露一種資訊處理裝置,其可藉由前述的AMOLED像素補償電路優化顯示效果及支持低畫面刷新率。Another object of the present invention is to disclose an information processing device that can optimize display effects and support low refresh rates by using the aforementioned AMOLED pixel compensation circuit.
為達到前述目的,一種AMOLED像素補償電路乃被提出,其具有一開關電路、一PMOS電晶體、一儲存電容及一OLED元件,該開關電路係用以執行一開關操作程序以驅使該PMOS電晶體產生一驅動電流以使該OLED元件產生一亮度,該開關操作程序包括: 以一第一初始電壓設定該PMOS電晶體之閘極電壓,以一正直流供應電壓設定該PMOS電晶體之源極電壓,及以一第二初始電壓設定該OLED元件的陽極電壓; 使該PMOS電晶體與該儲存電容串聯於一資料電壓與該第二初始電壓之間以使該儲存電容儲存的電壓為該第二初始電壓與(該資料電壓與該PMOS電晶體之閾值電壓之和)之差;以及 使該儲存電容的兩端分別耦接該PMOS電晶體的該閘極和該源極而產生該驅動電流。 To achieve the aforementioned objectives, an AMOLED pixel compensation circuit is provided. The circuit comprises a switching circuit, a PMOS transistor, a storage capacitor, and an OLED element. The switching circuit is configured to perform a switching operation to drive the PMOS transistor to generate a driving current, thereby increasing the brightness of the OLED element. The switching operation comprises: setting the gate voltage of the PMOS transistor with a first initial voltage, setting the source voltage of the PMOS transistor with a positive DC supply voltage, and setting the anode voltage of the OLED element with a second initial voltage; The PMOS transistor and the storage capacitor are connected in series between a data voltage and the second initial voltage, such that the voltage stored in the storage capacitor is the difference between the second initial voltage and the sum of the data voltage and the threshold voltage of the PMOS transistor; and the two ends of the storage capacitor are respectively coupled to the gate and source of the PMOS transistor to generate the drive current.
在一實施例中,該開關電路和該PMOS電晶體係由低温多晶氧化物製程製造而成。In one embodiment, the switch circuit and the PMOS transistor are fabricated using a low temperature polycrystalline oxide process.
在一實施例中,該開關電路中之任一電晶體係由PMOS電晶體、NMOS電晶體和CMOS電晶體所組成群組所選擇的一種電晶體。In one embodiment, any transistor in the switch circuit is a transistor selected from the group consisting of PMOS transistors, NMOS transistors, and CMOS transistors.
為達到前述目的,本發明進一步提出一種OLED顯示裝置,其具有一AMOLED面板,該AMOLED面板具有如前述之AMOLED像素補償電路。To achieve the aforementioned objectives, the present invention further provides an OLED display device having an AMOLED panel having the aforementioned AMOLED pixel compensation circuit.
為達到前述目的,本發明進一步提出一種資訊處理裝置,其具有一中央處理單元及如前述之OLED顯示裝置,該中央處理單元係用以與該OLED顯示裝置通信。To achieve the aforementioned objectives, the present invention further provides an information processing device having a central processing unit and the aforementioned OLED display device, wherein the central processing unit is configured to communicate with the OLED display device.
在可能的實施例中,所述之資訊處理裝置可為一攜帶型電腦、一智慧型手機或一車用電腦。In a possible embodiment, the information processing device may be a portable computer, a smart phone or a car computer.
為使 貴審查委員能進一步瞭解本創作之結構、特徵、目的、與其優點,茲附以圖式及較佳具體實施例之詳細說明如後。In order to enable the Review Committee to further understand the structure, features, purpose, and advantages of this creation, we have attached diagrams and detailed descriptions of preferred specific embodiments as follows.
本發明的原理在於:The principle of the present invention is:
(一)利用一開關電路在顯示一幀畫面的初始化期間均一化各OLED像素的電流源電晶體的源-閘極電壓以極小化各電流源電晶體之源-閘極寄生電容之遲滯電壓的差異,同時逆偏各OLED,從而有效降低顯示畫面的短期殘影現象;(1) Using a switching circuit to uniformly control the source-gate voltage of the current source transistors of each OLED pixel during the initialization period of displaying a frame to minimize the difference in hysteresis voltage of the source-gate parasitic capacitance of each current source transistor, while simultaneously reverse biasing each OLED, thereby effectively reducing the short-term image sticking phenomenon of the displayed image;
(二)利用該開關電路採集包含一初始電壓、一資料電壓及一電流源電晶體之閾值電壓之一線性組合電壓,並將該線性組合電壓預存在一儲存電容上;(2) using the switch circuit to collect a linear combination voltage including an initial voltage, a data voltage, and a threshold voltage of a current source transistor, and pre-storing the linear combination voltage in a storage capacitor;
(三)利用該開關電路驅使該儲存電容的電壓驅動該電流源電晶體以產生與所述閾值電壓無關之一驅動電流;以及(3) using the switching circuit to drive the voltage of the storage capacitor to drive the current source transistor to generate a driving current that is independent of the threshold voltage; and
(四)利用氧化物半導體製程製造之開關電路提供低漏電流以延長該儲存電容的電壓保持時間。(4) A switching circuit manufactured using an oxide semiconductor process provides low leakage current to extend the voltage retention time of the storage capacitor.
依此,本發明即可有效降低顯示畫面的短期殘影現象、極小化閾值電壓對驅動電流的影響以優化OLED面板的顯示效果,且可支持低畫面刷新率。In this way, the present invention can effectively reduce the short-term image sticking phenomenon of the display screen, minimize the impact of the threshold voltage on the driving current to optimize the display effect of the OLED panel, and support low screen refresh rates.
請參照圖1,其繪示本發明之AMOLED像素補償電路之一實施例之電路圖。如圖1所示,一AMOLED像素補償電路100具有一第一開關111、一第二開關112、一第三開關113、一第四開關114、一第五開關115、一PMOS電晶體120、一第一導通時間調變開關121、一第二導通時間調變開關122、一第三導通時間調變開關123、一儲存電容130以及一OLED元件140,其中,PMOS電晶體120和該些開關可由LTPO(low temperature polycrystalline oxide;低温多晶氧化物)製程製造而成。Please refer to Figure 1, which shows a circuit diagram of an embodiment of an AMOLED pixel compensation circuit according to the present invention. As shown in Figure 1, an AMOLED pixel compensation circuit 100 includes a first switch 111, a second switch 112, a third switch 113, a fourth switch 114, a fifth switch 115, a PMOS transistor 120, a first on-time modulation switch 121, a second on-time modulation switch 122, a third on-time modulation switch 123, a storage capacitor 130, and an OLED device 140. The PMOS transistor 120 and these switches can be fabricated using an LTPO (low temperature polycrystalline oxide) process.
第一開關111之通道係耦接於一第一節點A與一第二節點B之間,且第一開關111係由一第一開關信號S1控制其通道之導通與斷開。The channel of the first switch 111 is coupled between a first node A and a second node B, and the first switch 111 is controlled by a first switching signal S1 to turn on and off the channel.
第二開關112之通道係耦接於第二節點B與一第一初始電壓VINT1之間,且第二開關112係由一第二開關信號S2控制其通道之導通與斷開。The channel of the second switch 112 is coupled between the second node B and a first initial voltage VINT1, and the second switch 112 is controlled by a second switching signal S2 to turn on and off the channel.
第三開關113之通道係耦接於一資料電壓VDATA與一第三節點C之間,且第三開關113係由一第三開關信號S3控制其通道之導通與斷開。The channel of the third switch 113 is coupled between a data voltage VDATA and a third node C, and the conduction and disconnection of the channel of the third switch 113 are controlled by a third switch signal S3.
第四開關114之通道係耦接於一第四節點D與一第二初始電壓VINT2之間,且第四開關114係由一第四開關信號S4控制其通道之導通與斷開。The channel of the fourth switch 114 is coupled between a fourth node D and a second initial voltage VINT2, and the fourth switch 114 is controlled by a fourth switching signal S4 to turn on and off the channel.
第五開關115之通道係耦接於一第五節點E與第二初始電壓VINT2之間,且第五開關115係由第四開關信號S4控制其通道之導通與斷開。另外,較佳地,第一開關111可為NMOS電晶體以在其被斷開時提供良好的絕緣效果,從而可延長儲存電容130的電壓保持時間以支持低畫面刷新率,例如1H Z的畫面刷新率。 The channel of the fifth switch 115 is coupled between a fifth node E and the second initial voltage VINT2, and the conduction and disconnection of the channel of the fifth switch 115 are controlled by the fourth switch signal S4. Furthermore, the first switch 111 is preferably an NMOS transistor to provide good insulation when it is turned off, thereby extending the voltage retention time of the storage capacitor 130 to support low refresh rates, such as 1 Hz .
PMOS電晶體120具有一源極、一閘極和一汲極,該源極耦接第三節點C,該閘極耦接第一節點A,且該汲極耦接第二節點B,且PMOS電晶體120係用以藉由該汲極輸出一驅動電流至OLED元件140。The PMOS transistor 120 has a source, a gate, and a drain. The source is coupled to the third node C, the gate is coupled to the first node A, and the drain is coupled to the second node B. The PMOS transistor 120 is configured to output a driving current to the OLED element 140 via the drain.
第一導通時間調變開關121係耦接於一正直流供應電壓ELVDD與第三節點C之間,且第一導通時間調變開關121係依一第一PWM信號EM1控制其導通時間。The first on-time modulation switch 121 is coupled between a positive DC supply voltage ELVDD and the third node C, and the on-time of the first on-time modulation switch 121 is controlled according to a first PWM signal EM1.
第二導通時間調變開關122係耦接於第二節點B與第五節點E之間,且第二導通時間調變開關122係依一第二PWM信號EM2控制其導通時間。The second on-time modulation switch 122 is coupled between the second node B and the fifth node E, and the on-time of the second on-time modulation switch 122 is controlled according to a second PWM signal EM2.
第三導通時間調變開關123係耦接於正直流供應電壓ELVDD與第四節點D之間,且第三導通時間調變開關123係依第二PWM信號EM2控制其導通時間。The third on-time modulation switch 123 is coupled between the positive DC supply voltage ELVDD and the fourth node D, and the on-time of the third on-time modulation switch 123 is controlled according to the second PWM signal EM2.
儲存電容130係耦接於第一節點A與第四節點D之間,用以儲存電壓以提供PMOS電晶體120之該源極和該閘極間之電壓差以產生該驅動電流。The storage capacitor 130 is coupled between the first node A and the fourth node D to store a voltage to provide a voltage difference between the source and the gate of the PMOS transistor 120 to generate the driving current.
OLED元件140係耦接於第五節點E與一負直流電壓ELVSS之間,且係依該驅動電流產生對應的亮度。The OLED element 140 is coupled between the fifth node E and a negative DC voltage ELVSS, and generates a corresponding brightness according to the driving current.
於操作時,AMOLED像素補償電路100依序執行以下步驟:During operation, the AMOLED pixel compensation circuit 100 performs the following steps in sequence:
(一)第一階段:使(第一開關111、第二開關112、第三開關113、第四開關114、第五開關115、第一導通時間調變開關121、第二導通時間調變開關122、第三導通時間調變開關123)對應呈現(導通、導通、斷開、導通、導通、導通、斷開、斷開),以使第一節點A、第二節點B、第三節點C、第四節點D及第五節點E之電壓分別為第一初始電壓VINT1、第一初始電壓VINT1、正直流供應電壓ELVDD、第二初始電壓VINT2、第二初始電壓VINT2,從而初始化儲存電容130之電壓及OLED元件140的陽極電壓,其情形請參照圖2a。依此,即可使一顯示面板之各OLED元件140處於逆偏狀態,且該顯示面板之各像素補償電路中之PMOS電晶體120之源-閘極電壓會均一化為(ELVDD- VINT1),從而可極小化PMOS電晶體120之源-閘極寄生電容之遲滯電壓的差異而有效降低顯示畫面的短期殘影現象。(1) First stage: (first switch 111, second switch 112, third switch 113, fourth switch 114, fifth switch 115, first on-time modulation switch 121, second on-time modulation switch 122, third on-time modulation switch 123) are made to present (on, on, off, on, on, on, on, off, off) correspondingly, so that the first node A, The voltages of the second node B, the third node C, the fourth node D, and the fifth node E are respectively the first initial voltage VINT1, the first initial voltage VINT1, the positive DC supply voltage ELVDD, the second initial voltage VINT2, and the second initial voltage VINT2, thereby initializing the voltage of the storage capacitor 130 and the anode voltage of the OLED element 140. Please refer to Figure 2a for the situation. In this way, each OLED element 140 of a display panel can be reverse-biased, and the source-gate voltage of the PMOS transistor 120 in each pixel compensation circuit of the display panel can be uniformed to (ELVDD-VINT1), thereby minimizing the difference in hysteresis voltage of the source-gate parasitic capacitance of the PMOS transistor 120 and effectively reducing the short-term image sticking phenomenon of the display screen.
(二)第二階段:使(第一開關111、第二開關112、第三開關113、第四開關114、第五開關115、第一導通時間調變開關121、第二導通時間調變開關122、第三導通時間調變開關123)對應呈現(導通、導通、斷開、導通、導通、斷開、斷開、斷開),以使第一節點A、第二節點B、第三節點C、第四節點D及第五節點E之電壓分別為第一初始電壓VINT1、第一初始電壓VINT1、浮接、第二初始電壓VINT2、第二初始電壓VINT2,從而使儲存電容130之電壓維持在(VINT2- VINT1)及使OLED元件140的陽極電壓維持在VINT2,其情形請參照圖2b。(2) Second stage: (the first switch 111, the second switch 112, the third switch 113, the fourth switch 114, the fifth switch 115, the first on-time modulation switch 121, the second on-time modulation switch 122, the third on-time modulation switch 123) are made to present (on, on, off, on, on, off, off, off), so that the voltages of the first node A, the second node B, the third node C, the fourth node D, and the fifth node E are respectively the first initial voltage VINT1, the first initial voltage VINT1, floating, the second initial voltage VINT2, and the second initial voltage VINT2, thereby maintaining the voltage of the storage capacitor 130 at (VINT2- VINT1) and maintain the anode voltage of the OLED element 140 at VINT2. Please refer to FIG. 2b for the situation.
(三)第三階段:使(第一開關111、第二開關112、第三開關113、第四開關114、第五開關115、第一導通時間調變開關121、第二導通時間調變開關122、第三導通時間調變開關123)對應呈現(導通、斷開、導通、導通、導通、斷開、斷開、斷開),以使第一節點A、第二節點B、第三節點C、第四節點D及第五節點E之電壓分別為(VDATA+VTH)、(VDATA+VTH)、VDATA、第二初始電壓VINT2、第二初始電壓VINT2,其中,VTH為PMOS電晶體120之閾值電壓,其情形請參照圖2c。此時儲存電容130所儲存的電壓為VINT2與(VDATA+VTH)之差,亦即,儲存電容130儲存的電壓中包含了PMOS電晶體120之閾值電壓,其將可用以在驅使PMOS電晶體120產生該驅動電流時補償PMOS電晶體120之閾值電壓。(3) Phase III: The first switch 111, the second switch 112, the third switch 113, the fourth switch 114, the fifth switch 115, the first on-time modulation switch 121, the second on-time modulation switch 122, and the third on-time modulation switch 123 are caused to respectively present the states (on, off, on, on, on, on, off, off, off), so that the voltages of the first node A, the second node B, the third node C, the fourth node D, and the fifth node E are (VDATA+VTH), (VDATA+VTH), VDATA, the second initial voltage VINT2, and the second initial voltage VINT2, respectively. VTH is the threshold voltage of the PMOS transistor 120. Please refer to FIG. 2c for the situation. At this time, the voltage stored in the storage capacitor 130 is the difference between VINT2 and (VDATA+VTH). That is, the voltage stored in the storage capacitor 130 includes the threshold voltage of the PMOS transistor 120, which can be used to compensate the threshold voltage of the PMOS transistor 120 when driving the PMOS transistor 120 to generate the driving current.
(四)第四階段:使(第一開關111、第二開關112、第三開關113、第四開關114、第五開關115、第一導通時間調變開關121、第二導通時間調變開關122、第三導通時間調變開關123)對應呈現(斷開、斷開、斷開、斷開、斷開、導通、導通、導通),以使第三節點C、第四節點D及第一節點A之電壓分別為ELVDD、ELVDD、(ELVDD +VDATA+VTH-VINT2),其情形請參照圖2d。依此,儲存電容130儲存的電壓即可用以偏壓PMOS電晶體120的該閘極和該源極而產生該驅動電流,並使該驅動電流流過OLED元件140而使OLED元件140發光,且該驅動電流與PMOS電晶體120之閾值電壓無關。該驅動電流可用以下的公式表示:(IV) Fourth stage: The first switch 111, the second switch 112, the third switch 113, the fourth switch 114, the fifth switch 115, the first on-time modulation switch 121, the second on-time modulation switch 122, and the third on-time modulation switch 123 are caused to respectively present the states (off, off, off, off, off, off, on, on, on), so that the voltages at the third node C, the fourth node D, and the first node A are ELVDD, ELVDD, and (ELVDD + VDATA + VTH - VINT2), respectively. Please refer to FIG2d for the situation. In this way, the voltage stored in the storage capacitor 130 can be used to bias the gate and source of the PMOS transistor 120 to generate the driving current. The driving current then flows through the OLED element 140, causing the OLED element 140 to emit light. The driving current is independent of the threshold voltage of the PMOS transistor 120. The driving current can be expressed by the following formula:
,其中,I OLED代表該驅動電流,W代表通道寬度,C OX代表以氧化層介質電容, 代表載子移動率,L代表通道長度。 , where I OLED represents the driving current, W represents the channel width, and C OX represents the oxide dielectric capacitance. represents the carrier mobility, and L represents the channel length.
請參照圖2e,其繪示圖1之AMOLED像素補償電路100之一工作時序圖。如圖2d所示,T1代表第一階段,T2代表第二階段,T3代表第三階段,以及T4代表第四階段。Please refer to Figure 2e, which shows an operating timing diagram of the AMOLED pixel compensation circuit 100 in Figure 1. As shown in Figure 2d, T1 represents the first phase, T2 represents the second phase, T3 represents the third phase, and T4 represents the fourth phase.
在T1中,(EM1、EM2、S1、S2、S3、S4)對應呈現(低電位、高電位、高電位、低電位、高電位、低電位),致使(第一開關111、第二開關112、第三開關113、第四開關114、第五開關115、第一導通時間調變開關121、第二導通時間調變開關122、第三導通時間調變開關123)對應呈現(導通、導通、斷開、導通、導通、導通、斷開、斷開)。In T1, (EM1, EM2, S1, S2, S3, S4) present (low potential, high potential, high potential, low potential, high potential, low potential), causing (first switch 111, second switch 112, third switch 113, fourth switch 114, fifth switch 115, first on-time modulation switch 121, second on-time modulation switch 122, third on-time modulation switch 123) to present (on, on, off, on, on, on, off, off).
在T2中,(EM1、EM2、S1、S2、S3、S4)對應呈現(高電位、高電位、高電位、低電位、高電位、低電位),致使(第一開關111、第二開關112、第三開關113、第四開關114、第五開關115、第一導通時間調變開關121、第二導通時間調變開關122、第三導通時間調變開關123)對應呈現(導通、導通、斷開、導通、導通、斷開、斷開、斷開)。In T2, (EM1, EM2, S1, S2, S3, S4) present (high voltage, high voltage, high voltage, low voltage, high voltage, low voltage) correspondingly, causing (first switch 111, second switch 112, third switch 113, fourth switch 114, fifth switch 115, first on-time modulation switch 121, second on-time modulation switch 122, third on-time modulation switch 123) to present (on, on, off, on, on, off, off, off) correspondingly.
在T3中,(EM1、EM2、S1、S2、S3、S4)對應呈現(高電位、高電位、高電位、高電位、低電位、低電位),致使(第一開關111、第二開關112、第三開關113、第四開關114、第五開關115、第一導通時間調變開關121、第二導通時間調變開關122、第三導通時間調變開關123)對應呈現(導通、斷開、導通、導通、導通、斷開、斷開、斷開)。In T3, (EM1, EM2, S1, S2, S3, S4) present (high voltage, high voltage, high voltage, high voltage, low voltage, low voltage) correspondingly, causing (first switch 111, second switch 112, third switch 113, fourth switch 114, fifth switch 115, first on-time modulation switch 121, second on-time modulation switch 122, third on-time modulation switch 123) to present (on, off, on, on, on, off, off, off).
在T4中,(EM1、EM2、S1、S2、S3、S4)對應呈現(低電位、低電位、低電位、高電位、高電位、高電位),致使(第一開關111、第二開關112、第三開關113、第四開關114、第五開關115、第一導通時間調變開關121、第二導通時間調變開關122、第三導通時間調變開關123)對應呈現(斷開、斷開、斷開、斷開、斷開、導通、導通、導通)。In T4, (EM1, EM2, S1, S2, S3, S4) present (low potential, low potential, low potential, high potential, high potential, high potential) correspondingly, causing (the first switch 111, the second switch 112, the third switch 113, the fourth switch 114, the fifth switch 115, the first on-time modulation switch 121, the second on-time modulation switch 122, the third on-time modulation switch 123) to present (off, off, off, off, off, on, on, on) correspondingly.
由上述的說明可知,本發明揭露了一種AMOLED像素補償電路,其具有一開關電路、一PMOS電晶體、一儲存電容及一OLED元件,該開關電路係用以執行一開關操作程序以驅使該PMOS電晶體產生一驅動電流以使該OLED元件產生一亮度,且該開關操作程序包括:以一第一初始電壓設定該PMOS電晶體之閘極電壓,以一正直流供應電壓設定該PMOS電晶體之源極電壓,及以一第二初始電壓設定該OLED元件的陽極電壓;使該PMOS電晶體與該儲存電容串聯於一資料電壓與該第二初始電壓之間以使該儲存電容儲存的電壓為該第二初始電壓與(該資料電壓與該PMOS電晶體之閾值電壓之和)之差;以及使該儲存電容的兩端分別耦接該PMOS電晶體的該閘極和該源極而產生該驅動電流。As can be seen from the above description, the present invention discloses an AMOLED pixel compensation circuit, which has a switching circuit, a PMOS transistor, a storage capacitor and an OLED element. The switching circuit is used to perform a switching operation process to drive the PMOS transistor to generate a driving current so that the OLED element generates a brightness, and the switching operation process includes: setting the gate voltage of the PMOS transistor with a first initial voltage, setting the positive DC supply voltage with a positive DC supply voltage, and The source voltage of the PMOS transistor is set, and the anode voltage of the OLED element is set with a second initial voltage; the PMOS transistor and the storage capacitor are connected in series between a data voltage and the second initial voltage so that the voltage stored in the storage capacitor is the difference between the second initial voltage and the sum of the data voltage and the threshold voltage of the PMOS transistor; and the two ends of the storage capacitor are respectively coupled to the gate and the source of the PMOS transistor to generate the driving current.
在可能的實施例中,該開關電路和該PMOS電晶體可由低温多晶氧化物製程製造而成。另外,該開關電路中之任一電晶體可為PMOS電晶體、NMOS電晶體或CMOS電晶體。In a possible embodiment, the switch circuit and the PMOS transistor can be manufactured by a low temperature polycrystalline oxide process. In addition, any transistor in the switch circuit can be a PMOS transistor, an NMOS transistor or a CMOS transistor.
依上述的說明,本發明進一步提出一種OLED顯示裝置。請參照圖3,其繪示本發明之OLED顯示裝置之一實施例之方塊圖。如圖3所示,一OLED顯示裝置200具有一驅動電路210及一AMOLED面板220,AMOLED面板220具有多個AMOLED像素補償電路221,其中,AMOLED像素補償電路221係由AMOLED像素補償電路100實現,驅動電路210係用以使各AMOLED像素補償電路221依前述的工作時序點亮OLED元件。Based on the above description, the present invention further provides an OLED display device. Please refer to Figure 3, which shows a block diagram of one embodiment of the OLED display device of the present invention. As shown in Figure 3, an OLED display device 200 comprises a driver circuit 210 and an AMOLED panel 220. AMOLED panel 220 includes multiple AMOLED pixel compensation circuits 221. AMOLED pixel compensation circuits 221 are implemented using AMOLED pixel compensation circuit 100. Driver circuit 210 is configured to cause each AMOLED pixel compensation circuit 221 to illuminate the OLED element according to the aforementioned operating sequence.
依上述的說明,本發明進一步提出一種資訊處理裝置。請參照圖4,其繪示本發明之資訊處理裝置之一實施例之方塊圖。如圖4所示,一資訊處理裝置300具有一中央處理單元310及一OLED顯示裝置320,其中,中央處理單元310係用以與OLED顯示裝置320通信,OLED顯示裝置320係由OLED顯示裝置200實現。Based on the above description, the present invention further provides an information processing device. Please refer to FIG. 4 , which shows a block diagram of an embodiment of the information processing device of the present invention. As shown in FIG. 4 , an information processing device 300 includes a central processing unit 310 and an OLED display device 320 . The central processing unit 310 is configured to communicate with the OLED display device 320 , which is implemented by the OLED display device 200 .
另外,資訊處理裝置300可為一攜帶型電腦、一智慧型手機或一車用電腦。In addition, the information processing device 300 can be a portable computer, a smart phone, or a car computer.
藉由前述所揭露的設計,本發明乃具有以下的優點:Through the design disclosed above, the present invention has the following advantages:
(一)本發明之AMOLED像素補償電路可在顯示一幀畫面的過程中先快速均一化各OLED像素的電流源電晶體的源-閘極電壓,從而極小化電流源電晶體之源-閘極寄生電容之遲滯電壓對顯示畫面所造成的短期殘影;(1) The AMOLED pixel compensation circuit of the present invention can quickly equalize the source-gate voltage of the current source transistor of each OLED pixel during the display of a frame, thereby minimizing the short-term residual effect on the display caused by the hysteresis voltage of the source-gate parasitic capacitance of the current source transistor;
(二)本發明之AMOLED像素補償電路可補償電流源電晶體之閾值電壓以極小化因製程偏差及供應電壓的電壓降所帶來的顯示不均及Mura現象;(2) The AMOLED pixel compensation circuit of the present invention can compensate for the threshold voltage of the current source transistor to minimize display unevenness and mura caused by process deviation and supply voltage drop;
(三)本發明之AMOLED像素補償電路可延長儲存電容的電壓保持時間以支持低畫面刷新率;(3) The AMOLED pixel compensation circuit of the present invention can extend the voltage retention time of the storage capacitor to support low screen refresh rates;
(四)本發明之OLED顯示裝置可藉由前述的AMOLED像素補償電路極小化顯示畫面的短期殘影;(4) The OLED display device of the present invention can minimize short-term image sticking on the display screen through the aforementioned AMOLED pixel compensation circuit;
(五)本發明之OLED顯示裝置可藉由前述的AMOLED像素補償電路極小化因製程偏差及供應電壓的電壓降所帶來的顯示不均及Mura現象,以及延長儲存電容的電壓保持時間以支持低畫面刷新率;以及(5) The OLED display device of the present invention can minimize display unevenness and mura caused by process deviation and supply voltage drop through the aforementioned AMOLED pixel compensation circuit, and extend the voltage retention time of the storage capacitor to support low screen refresh rates; and
(六)本發明之資訊處理裝置可藉由前述的AMOLED像素補償電路優化顯示效果及支持低畫面刷新率。(6) The information processing device of the present invention can optimize the display effect and support low screen refresh rate through the aforementioned AMOLED pixel compensation circuit.
本發明所揭示者,乃較佳實施例之一種,舉凡局部之變更或修飾而源於本發明之技術思想而為熟習該項技藝知人所易於推知者,俱不脫本發明之專利權範疇。The present invention discloses only one preferred embodiment. Any partial changes or modifications based on the technical concept of the present invention and easily inferred by a person skilled in the art do not deviate from the scope of the patent rights of the present invention.
綜上所陳,本案無論目的、手段與功效,皆顯示其迥異於習知技術,且其首先發明合於實用,確實符合發明之專利要件,懇請 貴審查委員明察,並早日賜予專利俾嘉惠社會,是為至禱。In summary, this case demonstrates significant differences from known technologies in terms of purpose, means, and effectiveness. Furthermore, its first invention is practical and truly meets the patent requirements for invention. We earnestly request the Review Commission to examine this matter and grant a patent to this application as soon as possible to benefit society. This is our utmost prayer.
100:AMOLED像素補償電路 111:第一開關 112:第二開關 113: 第三開關 114:第四開關 115:第五開關 120:PMOS電晶體 121:第一導通時間調變開關 122:第二導通時間調變開關 123:第三導通時間調變開關 130:儲存電容 140:OLED元件 200:OLED顯示裝置 210:驅動電路 220:AMOLED面板 221:AMOLED像素補償電路 300:資訊處理裝置 310:中央處理單元 320:OLED顯示裝置 100: AMOLED pixel compensation circuit 111: First switch 112: Second switch 113: Third switch 114: Fourth switch 115: Fifth switch 120: PMOS transistor 121: First on-time modulation switch 122: Second on-time modulation switch 123: Third on-time modulation switch 130: Storage capacitor 140: OLED element 200: OLED display device 210: Driver circuit 220: AMOLED panel 221: AMOLED pixel compensation circuit 300: Information processing device 310: Central processing unit 320: OLED display device
圖1繪示本發明之AMOLED像素補償電路之一實施例之電路圖。 圖2a繪示圖1之AMOLED像素補償電路操作於一第一階段之等效電路圖。 圖2b繪示圖1之AMOLED像素補償電路操作於一第二階段之等效電路圖。 圖2c繪示圖1之AMOLED像素補償電路操作於一第三階段之等效電路圖。 圖2d繪示圖1之AMOLED像素補償電路操作於一第四階段之等效電路圖。 圖2e繪示圖1之AMOLED像素補償電路一工作時序圖。 圖3繪示本發明之OLED顯示裝置之一實施例之方塊圖。 圖4繪示本發明之資訊處理裝置之一實施例之方塊圖。 Figure 1 shows a circuit diagram of an embodiment of an AMOLED pixel compensation circuit of the present invention. Figure 2a shows an equivalent circuit diagram of the AMOLED pixel compensation circuit of Figure 1 operating in a first phase. Figure 2b shows an equivalent circuit diagram of the AMOLED pixel compensation circuit of Figure 1 operating in a second phase. Figure 2c shows an equivalent circuit diagram of the AMOLED pixel compensation circuit of Figure 1 operating in a third phase. Figure 2d shows an equivalent circuit diagram of the AMOLED pixel compensation circuit of Figure 1 operating in a fourth phase. Figure 2e shows an operating timing diagram of the AMOLED pixel compensation circuit of Figure 1. Figure 3 shows a block diagram of an embodiment of an OLED display device of the present invention. Figure 4 shows a block diagram of an embodiment of the information processing device of the present invention.
100:AMOLED像素補償電路 100: AMOLED pixel compensation circuit
111:第一開關 111: First switch
112:第二開關 112: Second switch
113:第三開關 113: Third switch
114:第四開關 114: The fourth switch
115:第五開關 115: Fifth Switch
120:PMOS電晶體 120: PMOS transistor
121:第一導通時間調變開關 121: First on-time modulation switch
122:第二導通時間調變開關 122: Second on-time modulation switch
123:第三導通時間調變開關 123: Third on-time modulation switch
130:儲存電容 130: Storage capacitor
140:OLED元件 140:OLED components
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