TWI891111B - Storage device management method and storage device - Google Patents

Abstract

A storage device management method and a storage device are disclosed. The method includes: establishing a connection between a host system and the storage device; after the connection is established, detecting an abnormal power-off event of the storage device; in response to the abnormal power-off event, determining whether the abnormal power-off event is caused by an abnormal power-off of the host system itself; and in response to that the abnormal power-off event is caused by the abnormal power-off of the host system itself, updating a host power-off information in the storage device.

Description

Storage device management method and storage device

The present invention relates to a storage device management method and a storage device.

Generally speaking, most storage devices can record abnormal power outage information and/or abnormal power outage information between the storage device and the host system. However, in practice, it is difficult for storage devices to determine whether an abnormal power outage occurring on the storage device is caused by an abnormal power outage in the host system itself (such as the host system automatically restarting after a crash) or by other factors not related to the host system itself (such as a user pressing the host system's power button). Therefore, it is difficult for storage devices to proactively implement relevant management policies for host systems with poor device health (such as those prone to crashes).

The present invention provides a storage device management method and a storage device, which can improve the management and maintenance efficiency of the storage device.

An embodiment of the present invention provides a storage device management method, comprising: establishing a connection between a host system and a storage device; after establishing the connection, detecting an abnormal power outage event in the storage device; in response to the abnormal power outage event, determining based on a target signal whether the abnormal power outage event was caused by an abnormal power outage in the host system itself; and in response to determining that the abnormal power outage was caused by the abnormal power outage in the host system itself, updating host power outage information in the storage device.

An embodiment of the present invention further provides a storage device comprising a connection interface and a memory module. The connection interface is used to couple to a host system. The memory controller is coupled to the connection interface and the memory module. The memory controller is used to: establish a connection between the host system and the storage device; after establishing the connection, detect an abnormal power failure event of the storage device; in response to the abnormal power failure event, determine whether the abnormal power failure event is caused by an abnormal power failure of the host system itself based on a target signal; and in response to the abnormal power failure being caused by the abnormal power failure of the host system itself, update host power failure information in the storage device.

Based on the above, once a connection is established between the host system and the storage device, the target signal can be used to determine whether an abnormal power outage in the storage device was caused by an abnormal power outage in the host system itself. If so, the host power outage information can be updated in the storage device and used for subsequent management and maintenance of the storage device. This effectively improves the management and maintenance efficiency of the storage device.

FIG1 is a schematic diagram of a data storage system according to an embodiment of the present invention. Referring to FIG1 , the data storage system 10 includes a host system 11 and a storage device 12. The host system 11 can store data in the storage device 12 or read data from the storage device 12. For example, the host system 11 is any system that can actually cooperate with the storage device 12 to store data, such as a smartphone, tablet computer, laptop computer, desktop computer, industrial computer, server, smart TV, or car computer, and the storage device 12 can be a non-volatile storage device such as a flash drive, memory card, solid state drive (SSD), secure digital (SD) card, compact flash (CF) card, or embedded storage device.

The host system 11 may include a processor 111, a connection interface 112, and a power button 113. The processor 111 may be used to control the operation of the host system 11 in whole or in part. For example, the processor 111 may include a central processing unit (CPU), a graphics processing unit (GPU), or other programmable general-purpose or special-purpose microprocessors, digital signal processors (DSPs), programmable controllers, application-specific integrated circuits (ASICs), programmable logic devices (PLDs), or other similar devices or combinations of these devices.

The connection interface 112 is coupled to the processor 111 and is used to couple the host system 11 to the storage device 12. For example, the connection interface 112 can be used to transmit signals (including data and commands) to the storage device 12 or receive signals from the storage device 12. In one embodiment, the connection interface 112 complies with the NVM Express (NVMe) interface specification. In another embodiment, the connection interface 112 can also comply with various connection interface standards such as Serial Advanced Technology Attachment (SATA), Parallel Advanced Technology Attachment (PATA), Peripheral Component Interconnect Express (PCI Express), or Universal Serial Bus (USB).

The power button 113 can be used to control the power of the host system 11. For example, the power button 113 can be a physical button. For example, after triggering (e.g., pressing) the power button 113, the power state of the host system 11 can be switched, for example, from the power-on state to the power-off state, from the power-off state to the power-on state, from the power-on state to the power-off state, or from the power-off state to the power-on state.

In one embodiment, the host system 11 may also include any practically required hardware devices, such as a battery unit, a network interface card, a keyboard (or touch pad), a screen and/or a speaker, etc., and the present invention is not limited thereto.

The storage device 12 may include a connection interface 121, a memory controller 122, and a memory module 123. The connection interface 121 is used to connect to the host system 11. For example, the connection interface 121 may be used to transmit signals (including data) to the host system 11 or receive signals from the host system 11. In one embodiment, the connection interface 121 complies with the NVMe interface specification. In another embodiment, the connection interface 121 may also comply with various connection interface standards such as SATA, PATA, PCI Express, or USB.

The memory controller 122 is coupled to the connection interface 121 and the memory module 123. The memory controller 122 is configured to execute multiple logic gates or control instructions implemented in hardware or firmware, and to perform operations such as writing, reading, and erasing data in the memory module 123 based on instructions from the host system 11. In one embodiment, the memory controller 122 may also control all or part of the operation of the storage device 12. In one embodiment, the memory controller 122 may include a flash memory controller.

The memory module 123 is used to store data written by the host system 11. For example, the memory module 123 may include a plurality of memory cells. For example, these memory cells store data by changing critical voltage. For example, the memory module 123 may include a single level cell (SLC) NAND type flash memory module (i.e., a flash memory module in which one memory cell can store one bit), a multi level cell (MLC) NAND type flash memory module (i.e., a flash memory module in which one memory cell can store two bits), a triple level cell (TLC) NAND type flash memory module (i.e., a flash memory module in which one memory cell can store three bits), a quad level cell (MLC) NAND type flash memory module (i.e., a flash memory module in which one memory cell can store three bits), or a quad level cell (MLC) NAND type flash memory module. A QLC (Quadrature Lattice Crystal Display) NAND-type flash memory module (i.e., a flash memory module in which one memory cell can store 4 bits) or other types of memory modules.

In one embodiment, the memory controller 122 may be used to establish a connection between the host system 11 and the storage device 12. For example, the memory controller 122 may perform a handshake operation with the host system 11 (e.g., the connection interface 112) via the connection interface 121. This handshake operation is used to establish a connection between the host system 11 and the storage device 12. For example, during this handshake operation, the memory controller 122 (or the storage device 12) may exchange data (or signals) required to establish the connection with the host system 11 and establish the connection between the host system 11 and the storage device 12 based on this data (or signal).

In one embodiment, after establishing a connection between the host system 11 and the storage device 12, while both the host system 11 and the storage device 12 are operating normally, the memory controller 122 may detect an abnormal power outage event in the storage device 12. For example, this abnormal power outage event may reflect a real-time abnormal power outage in the storage device 12. For example, this abnormal power outage may include an unexpected and significant drop in the power supply (e.g., voltage or current) to the storage device 12, or even a complete power outage to the storage device 12.

In one embodiment, in response to the abnormal power failure event, the memory controller 122 can determine whether the abnormal power failure event is caused by an abnormal power failure of the host system 11 itself based on a specific signal (also referred to as a target signal). In one embodiment, the target signal is transmitted through the connection between the host system 11 and the storage device 12.

In one embodiment, if the power off of the host system 11 is controlled by the power button 113 (e.g., the host system 11 is powered off by triggering the power button 113), the memory controller 122 may determine that the power off is not an abnormal power off of the host system 11 itself (i.e., the power off is controlled by the user of the host system 11). However, in one embodiment, if the power off of the host system 11 is not controlled by the power button 113 (e.g., the host system 11 is powered off due to an unexpected crash or an unexpected restart of the host system 11), the memory controller 122 may determine that the power off is an abnormal power off of the host system 11 itself (i.e., the power off is not controlled by the user of the host system 11). It should be noted that regardless of whether the power outage of the host system 11 is an abnormal power outage of the host system 11 itself, the sudden power outage of the host system 11 may simultaneously cause an abnormal power outage event of the storage device 12.

FIG2 is a schematic diagram illustrating triggering a power button to change the signal state of a target signal according to an embodiment of the present invention. Referring to FIG1 and FIG2 , in one embodiment, the storage device 12 further includes a signal detector 124. The signal detector 124 is coupled to the connection interface 121 and the memory controller 122. The signal detector 124 can be used to analyze the signal state (e.g., the waveform of the signal TS) of the target signal.

In one embodiment, the signal state of signal TS (i.e., the target signal) may reflect whether the power button 113 is triggered. For example, in one embodiment, in response to the power button 113 not being triggered (e.g., not being touched or pressed by the user), signal TS may be in a default signal state (also referred to as the target signal state). However, in one embodiment, if the power button 113 is triggered (e.g., being touched or pressed by the user), the signal state of signal TS may be changed and not in the target signal state. Signal TS may be transmitted to storage device 12 via a connection between host system 11 and storage device 12.

FIG3 is a schematic diagram illustrating a target signal not being in a target signal state according to an embodiment of the present invention. Referring to FIG3 , in one embodiment, it is assumed that the abnormal power-off event of the storage device 12 reflects an abnormal power-off of the storage device 12 between time points T(0) and T(1). In one embodiment, in response to the signal TS being at a logical high level (as shown in FIG3 ) between time points T(0) and T(1), the memory controller 122 may determine that the signal TS is not in a target signal state (e.g., a logical low level).

FIG4 is a schematic diagram illustrating a target signal in a target signal state according to an embodiment of the present invention. Referring to FIG4 , in one embodiment, it is assumed that the abnormal power-off event of the storage device 12 reflects an abnormal power-off of the storage device 12 between time points T(0) and T(1). In one embodiment, in response to the signal TS being at a logical low (as shown in FIG4 ) between time points T(0) and T(1), the memory controller 122 may determine that the signal TS is in a target signal state (e.g., logical low). It should be noted that FIG3 and FIG4 are merely examples of how the signal state of the target signal changes under different circumstances and are not intended to limit the present invention.

Returning to FIG. 2 , in one embodiment, when an abnormal power failure event is detected in the storage device 12, the memory controller 122 can determine, via the signal detector 124, whether the signal TS was in the target signal state during the abnormal power failure of the storage device 12. If the determination is yes (i.e., the signal TS was in the target signal state during the abnormal power failure of the storage device 12), the abnormal power failure event was not caused by the power button 113 of the host system 11 being triggered. Therefore, in response to the abnormal power failure of the storage device 12, the signal TS is in the target signal state, and the memory controller 122 can determine that the abnormal power failure event is caused by the abnormal power failure of the host system 11 itself.

On the other hand, if the determination result is negative (i.e., signal TS is not in the target signal state during the abnormal power outage of storage device 12), this indicates that the abnormal power outage event was caused by the user triggering the power button 113 of host system 11. Therefore, in response to signal TS not being in the target signal state during the abnormal power outage of storage device 12, memory controller 122 can determine that the abnormal power outage event was not caused by the abnormal power outage of host system 11 itself.

In one embodiment, in response to the abnormal power outage event being caused by an abnormal power outage in the host system 11 itself, the memory controller 122 may update specific information (also referred to as host power outage information) in the storage device 12. For example, in response to the abnormal power outage event being caused by an abnormal power outage in the host system 11 itself, the memory controller 122 may update the parameter value of a parameter (also referred to as a target parameter) in the host power outage information in the storage device 12 from a first parameter value to a second parameter value. The first parameter value is different from the second parameter value. However, if the abnormal power failure event is not caused by an abnormal power failure of the host system 11 itself, the memory controller 122 may not update the target parameter (i.e., the host power failure information). For example, if the abnormal power failure event is not caused by an abnormal power failure of the host system 11 itself, the memory controller 122 may maintain the parameter value of the target parameter at the first parameter value.

In one embodiment, after the storage device 12 experiences an abnormal power outage and then powers back on, the memory controller 122 can determine, based on the host power outage information, whether the abnormal power outage that occurred previously in the storage device 12 was caused by an abnormal power outage in the host system 11 itself. For example, in one embodiment, after the storage device 12 experiences an abnormal power outage and then powers back on, in response to the parameter value of the target parameter in the host power outage information being the first parameter value, the memory controller 122 can determine that the abnormal power outage that occurred previously in the storage device 12 was not caused by an abnormal power outage in the host system 11 itself. Alternatively, in one embodiment, after the storage device 12 is powered off abnormally and then powered on again, in response to the parameter value of the target parameter being the second parameter value, the memory controller 122 may determine that the abnormal power outage previously occurring in the storage device 12 was caused by an abnormal power outage of the host system 11 itself.

In one embodiment, after the storage device 12 experiences an abnormal power outage and then powers back on, the memory controller 122 may update the count information based on the updated host power outage information. This count information may reflect the number of abnormal power outage events caused by the host system 11 itself. For example, after the storage device 12 experiences an abnormal power outage and then powers back on, the memory controller 122 may update a count value in the count information based on the parameter value of the target parameter (i.e., the second parameter value) in the host power outage information, for example, by adding "1" to the count value. In this way, the updated count information (i.e., this count value) may reflect the number of abnormal power outage events caused by the host system 11 itself.

In one embodiment, after updating the count information, the memory controller 122 may reset the host power-off information. For example, after updating the count information, the memory controller 122 may restore the parameter value of the target parameter in the host power-off information from the second parameter value to the first parameter value to reset the host power-off information.

In one embodiment, after the storage device 12 experiences an abnormal power outage and then powers on again, the memory controller 122 may determine whether the count information (e.g., updated count information) meets a preset numerical condition. In response to the count information meeting the numerical condition, the memory controller 122 may perform a data maintenance operation on at least a portion of the data stored in the storage device 12 (e.g., the memory module 123). For example, this data maintenance operation includes a data refresh operation, a data migration operation (e.g., performing garbage collection on data that has not been accessed for a long time), or a wear leveling operation. Those skilled in the relevant art should be aware of the operational details of these data maintenance operations, and a detailed description thereof will not be given here. Thus, when the host system 11 experiences low operational stability (e.g., multiple crashes or automatic reboots), the data maintenance operation can be proactively triggered to effectively improve the accuracy or reliability of at least a portion of the data stored in the storage device 12 (e.g., the memory module 123). Furthermore, the data maintenance operation may also include other types of data maintenance actions, as long as they can improve the accuracy or reliability of at least a portion of the data stored in the storage device 12 (e.g., the memory module 123), and the present invention is not limited thereto. However, if the count information does not meet the numerical condition, the memory controller 122 may not perform the data maintenance operation to reduce additional operation loss or resource waste caused to the storage device 12 (eg, the memory module 123).

In one embodiment, after the storage device 12 experiences an abnormal power outage and then powers back on, the memory controller 122 may compare the count value in the count information (e.g., updated count information) with a threshold value. In response to the count value being greater than the threshold value, the memory controller 122 may determine that the count information meets the numerical condition. However, if the count value is not greater than the threshold value, the memory controller 122 may determine that the count information does not meet the numerical condition. For example, the threshold value may be any positive integer and is not limited by the present invention.

FIG5 is a flow chart of a storage device management method according to an embodiment of the present invention. Referring to FIG5 , in step S501, a connection is established between the host system and the storage device. After the connection is established, in step S502, an abnormal power failure event in the storage device is detected. In response to this abnormal power failure event, in step S503, a determination is made based on the target signal whether the abnormal power failure event was caused by an abnormal power failure in the host system itself. If so (i.e., the abnormal power failure was caused by an abnormal power failure in the host system itself), in step S504, the host power failure information is updated in the storage device. Then, in step S505, the storage device is waited for to be powered on again (e.g., restarted). However, if not (i.e., the abnormal power outage is not caused by an abnormal power outage of the host system itself), step S505 can be entered after step S503 (i.e., step S504 can be skipped).

FIG6 is a flow chart illustrating a storage device management method according to an embodiment of the present invention. Referring to FIG6 , in step S601, a connection is established between the host system and the storage device. After the connection is established, in step S602, a determination is made as to whether the host power failure information indicates an abnormality (e.g., determining whether the parameter value of the target parameter in the host power failure information is the second parameter value). If the host power failure information indicates an abnormality (e.g., the parameter value of the target parameter is the second parameter value), in step S603, the count information is updated (e.g., the count value in the count information is incremented by "1"). Then, in step S604, the host power-off information is reset (e.g., the target parameter value is restored to the first parameter value), and the process proceeds to step S605. On the other hand, if the host power-off information is not displayed as abnormal (i.e., the target parameter value is the first parameter value), the process proceeds directly to step S605.

In step S605, while the host system and the storage device are operating normally, a determination is made as to whether an abnormal power outage has occurred in the storage device. For example, if an abnormal power outage event is detected in the storage device, it indicates that an abnormal power outage has occurred in the storage device. Conversely, if no abnormal power outage event is detected in the storage device, it indicates that no abnormal power outage has occurred in the storage device.

After determining that an abnormal power outage has occurred in the storage device, in step S606, it is determined whether the target signal was in the target signal state during the abnormal power outage. If so (i.e., the target signal was in the target signal state during the abnormal power outage), in step S607, the host power outage information is updated in the storage device (e.g., the parameter value of the target parameter is updated to the second parameter value).

After updating the host power-off information, in step S608, it is determined whether the storage device has been powered on again. If so (i.e., the storage device has been powered on again), step S601 is repeated after step S608. On the other hand, if the determination result of step S606 is negative (i.e., the target signal was not in the target signal state during the abnormal power-off period of the storage device), the process proceeds directly to step S608 after step S606 (i.e., step S607 can be skipped).

FIG7 is a flow chart illustrating a storage device management method according to an embodiment of the present invention. Referring to FIG7 , in step S701, a determination is made as to whether the count information satisfies a numerical condition (e.g., whether the count value in the count information is greater than a threshold value). If the count information satisfies the numerical condition (e.g., the count value is greater than the threshold value), in step S702, a data maintenance operation is performed on at least a portion of the data stored in the storage device. However, if the count information does not satisfy the numerical condition (e.g., the count value in the count information is not greater than the threshold value), step S702 may not be performed.

However, the steps in Figures 5 through 7 have been described in detail above and will not be repeated here. It is worth noting that the steps in Figures 5 through 7 can be implemented as multiple code blocks or circuits, and the present invention is not limited thereto. Furthermore, the methods in Figures 5 through 7 can be used in conjunction with the above exemplary embodiments or independently, and the present invention is not limited thereto.

In summary, the storage device management method and storage device proposed in the embodiments of the present invention can, after establishing a connection between a host system and the storage device, determine, based on a target signal, whether an abnormal power outage event in the storage device was caused by an abnormal power outage in the host system itself. If so, host power outage information can be updated in the storage device to reflect that the previous abnormal power outage in the storage device was caused by an abnormal power outage in the host system itself. In particular, the updated host power outage information (or the count information updated based on this host power outage information) can be used for subsequent management and maintenance of the storage device. This effectively improves the management and maintenance efficiency of the storage device.

Although the present invention has been disclosed above by way of embodiments, they are not intended to limit the present invention. Any person having ordinary skill in the art may make slight modifications and improvements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope of the attached patent application.

10: Data storage system 11: Host system 111: Processor 112: Connection interface 113: Power button 12: Storage device 121: Connection interface 122: Memory controller 123: Memory module 124: Signal detector TS: Signal (target signal) T(0), T(1): Time point S501~S505, S601~S608, S701, S702: Steps

Figure 1 is a schematic diagram of a data storage system according to an embodiment of the present invention. Figure 2 is a schematic diagram of triggering a power button to change the signal state of a target signal according to an embodiment of the present invention. Figure 3 is a schematic diagram of a target signal not in the target signal state according to an embodiment of the present invention. Figure 4 is a schematic diagram of a target signal in the target signal state according to an embodiment of the present invention. Figure 5 is a flow chart of a storage device management method according to an embodiment of the present invention. Figure 6 is a flow chart of a storage device management method according to an embodiment of the present invention. Figure 7 is a flow chart of a storage device management method according to an embodiment of the present invention.

S501~S505: Steps

Claims (12)

A storage device management method comprises: establishing a connection between a host system and a storage device; after establishing the connection, detecting an abnormal power failure event in the storage device; in response to the abnormal power failure event, determining based on a target signal whether the abnormal power failure event was caused by an abnormal power failure in the host system itself; in response to determining that the abnormal power failure event was caused by the abnormal power failure in the host system itself, updating host power failure information in the storage device; and After the storage device is powered on again, the count information is updated based on the updated host power outage information, wherein the count information reflects the number of occurrences of the abnormal power outage event caused by the abnormal power outage of the host system itself. The storage device management method of claim 1, wherein the target signal is transmitted through the connection between the host system and the storage device. The storage device management method of claim 1, wherein the signal state of the target signal reflects whether a power button of the host system is triggered. The storage device management method of claim 1, wherein the step of determining whether the abnormal power outage event was caused by the abnormal power outage of the host system itself based on the target signal comprises: Determining whether the target signal is in a target signal state during the abnormal power outage of the storage device; and In response to the target signal being in the target signal state during the abnormal power outage of the storage device, determining that the abnormal power outage event was caused by the abnormal power outage of the host system itself. The storage device management method of claim 1 further comprises: After updating the count information, resetting the host power-off information. The storage device management method of claim 1 further comprises: Determining whether the count information satisfies a numerical condition; and In response to the count information satisfying the numerical condition, performing a data maintenance operation on at least a portion of the data stored in the storage device. A storage device comprises: a connection interface for coupling to a host system; a memory module; and a memory controller coupled to the connection interface and the memory module, wherein the memory controller is configured to: establish a connection between the host system and the storage device; after establishing the connection, detect an abnormal power failure event in the storage device; in response to the abnormal power failure event, determine, based on a target signal, whether the abnormal power failure event was caused by an abnormal power failure in the host system itself; In response to the abnormal power outage event being caused by the abnormal power outage of the host system itself, updating host power outage information in the storage device; and After the storage device is powered on again, updating count information based on the updated host power outage information, wherein the count information reflects the number of occurrences of the abnormal power outage event caused by the abnormal power outage of the host system itself. The storage device of claim 7, wherein the target signal is transmitted through the connection between the host system and the storage device. The storage device of claim 7, wherein the signal state of the target signal reflects whether a power button of the host system is triggered. The storage device of claim 7, wherein the memory controller determines whether the abnormal power failure event was caused by the abnormal power failure of the host system based on the target signal, including: Determining whether the target signal was in a target signal state during the abnormal power failure of the storage device; and In response to the target signal being in the target signal state during the abnormal power failure of the storage device, determining that the abnormal power failure event was caused by the abnormal power failure of the host system. The storage device of claim 7, wherein the memory controller is further configured to: After updating the count information, reset the host power-off information. The storage device of claim 7, wherein the memory controller is further configured to: Determine whether the count information satisfies a numerical condition; and In response to the count information satisfying the numerical condition, perform a data maintenance operation on at least a portion of the data in the memory module.