TWI890070B - Light-emitting element and method of manufacturing the same - Google Patents
Light-emitting element and method of manufacturing the sameInfo
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- TWI890070B TWI890070B TW112120438A TW112120438A TWI890070B TW I890070 B TWI890070 B TW I890070B TW 112120438 A TW112120438 A TW 112120438A TW 112120438 A TW112120438 A TW 112120438A TW I890070 B TWI890070 B TW I890070B
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Abstract
Description
本申請案是關於發光元件及其製造方法,尤其關於顯示器之畫素與其製造方法。 This application relates to light-emitting devices and their manufacturing methods, and more particularly to display pixels and their manufacturing methods.
發光二極體(Light-Emitting Diode;LED)顯示器的驅動方法係將發光二極體設置在具有薄膜電晶體(Thin-Film Transistor;TFT)的玻璃電路板上,藉由驅動晶片(Driver IC)根據所需的亮度來控制薄膜電晶體的開關狀態,當薄膜電晶體打開時,驅動晶片控制流經發光二極體的電流大小。 The driving method for light-emitting diode (LED) displays involves placing the LED on a glass circuit board with thin-film transistors (TFTs). A driver IC controls the on/off state of the TFTs according to the desired brightness. When the TFTs are on, the driver IC controls the current flowing through the LEDs.
但一般的薄膜電晶體係由矽材料製造,實際上能負載的電流較小,無法驅動一顆發光二極體發光。此外,玻璃電路板係以沉積製程在一整片的玻璃上沉積矽層以製造所有的薄膜電晶體,因為玻璃電路板上矽層的厚度無法均勻一致,導致薄膜電晶體之間電性差異較大。 However, typical thin-film transistors are made of silicon, which can actually carry very low current and is insufficient to drive a single LED. Furthermore, glass circuit boards utilize a deposition process to deposit a silicon layer onto a single sheet of glass to create all the thin-film transistors. Because the thickness of the silicon layer on a glass circuit board is not uniform, the electrical properties of each thin-film transistor can vary significantly.
本申請案提供一種具有控制單元的發光元件、發光元件的製造方法、包含發光元件之封裝體、以及採用封裝體之發光二極體顯示器。 This application provides a light-emitting element having a control unit, a method for manufacturing the light-emitting element, a package including the light-emitting element, and a light-emitting diode display using the package.
根據實施例的發光元件包括一承載層、複數個發光單元、一控制單元、一光學層、和複數個電極接墊。發光單元設置於承載層上。控制單元設置於承載層上並用於控制發光單元。光學層設置於承載層上,並覆蓋發光單元和控制單元。電極接墊設置於承載層下。電極接墊電連接發光單元和控制單元。控制單元包括一III-V材料。控制單元包括複數個電晶體,該些電晶體分別具有一第一電極和一第二電極,該些電晶體共用一個半導體層和一個第三電極。 According to an embodiment, a light-emitting element includes a carrier layer, a plurality of light-emitting units, a control unit, an optical layer, and a plurality of electrode pads. The light-emitting units are disposed on the carrier layer. The control unit is disposed on the carrier layer and is used to control the light-emitting units. The optical layer is disposed on the carrier layer and covers the light-emitting units and the control unit. The electrode pads are disposed below the carrier layer. The electrode pads electrically connect the light-emitting units and the control unit. The control unit includes a III-V material. The control unit includes a plurality of transistors, each having a first electrode and a second electrode. The transistors share a semiconductor layer and a third electrode.
根據實施例的發光元件的製造方法包括下列步驟。首先,提供一暫時基板。將複數個發光單元和一控制單元設置於暫時基板上。形成一光學層於暫時基板上,該光學層覆蓋發光單元和控制單元。形成一承載層於光學層上。形成複數個電極接墊於承載層上。然後,移除暫時基板。 The manufacturing method of a light-emitting device according to an embodiment includes the following steps. First, a temporary substrate is provided. A plurality of light-emitting units and a control unit are disposed on the temporary substrate. An optical layer is formed on the temporary substrate, the optical layer covering the light-emitting units and the control unit. A carrier layer is formed on the optical layer. A plurality of electrode pads are formed on the carrier layer. Then, the temporary substrate is removed.
根據實施例的發光封裝體包括一封裝基板和複數個前述的發光元件。封裝基板具有複數個畫素區。複數個發光元件設置於封裝基板上,並分別位於複數個畫素區中。 According to an embodiment, a light-emitting package includes a packaging substrate and a plurality of the aforementioned light-emitting elements. The packaging substrate has a plurality of pixel regions. The plurality of light-emitting elements are disposed on the packaging substrate and are respectively located in the plurality of pixel regions.
9A;9B:顯示裝置 9A; 9B: Display device
10:發光元件封裝體 10: Light-emitting element package
10C;10C’:電路 10C; 10C’: Circuit
100:發光元件 100: Light-emitting element
100T:暫時封裝結構 100T: Temporary packaging structure
100C;100C’:電路 100C; 100C’: Circuit
100a:暫時基板 100a: Temporary substrate
104;104A:發光元件封裝體 104; 104A: Light-emitting element package
110:承載層 110: Carrier layer
110a:第二介電層 110a: Second dielectric layer
112:導電連接件 112: Conductive connector
114:走線 114: Routing
116:通孔 116: Through hole
116a:第一通孔 116a: First through hole
116b:第二通孔 116b: Second through hole
120;120-B;120-G;120-R:發光單元 120; 120-B; 120-G; 120-R: Light-emitting unit
122:第一電極 122: First electrode
124:第二電極 124: Second electrode
130:控制單元 130: Control unit
131:電晶體 131: Transistor
132:第一電極 132: First electrode
133:第二電極 133: Second electrode
134:半導體層 134: Semiconductor layer
135:第三電極 135: Third electrode
140:光學層 140: Optical layer
142:第一介電層 142: First dielectric layer
144:第三介電層 144: Third dielectric layer
150;150-1~150-5:電極接墊 150; 150-1~150-5: Electrode pad
200;200’:封裝基板 200; 200’: Package substrate
202:畫素區 202: Pixel area
204-1~204-20:上接墊 204-1~204-20: Upper pad
206-1~206-6;206-8~206-11;206-13~206-16;206-18~206-20;206’-1~206’-5;206’-8~206’-11;206’-13~20’6-15;206-18~206-20:下接墊 206-1 to 206-6; 206-8 to 206-11; 206-13 to 206-16; 206-18 to 206-20; 206’-1 to 206’-5; 206’-8 to 206’-11; 206’-13 to 20’6-15; 206-18 to 206-20: Bottom pad
500A;500B:電路板 500A; 500B: Circuit board
2001:上表面 2001: Upper surface
2002;2002’:下表面 2002; 2002’: Lower surface
D:高度差 D: Height difference
DD:資料驅動裝置 DD: Data Drive
DL:資料線 DL: Data Line
g1;g2:間距 g1; g2: spacing
O1:第一開孔 O1: First opening
O2:第二開孔 O2: Second opening
S1;S2;S3;S4;S5;S6:步驟 S1; S2; S3; S4; S5; S6: Steps
SL:掃描線 SL: Scan Line
Vcc:供電電壓 Vcc: supply voltage
10-1~10-29:電極節點 10-1~10-29: Electrode Nodes
104A:發光元件封裝體 104A: Light-emitting element package
10A-1~10A-29:節點 10A-1~10A-29: Node
104C:電路 104C: Circuits
1004:封裝基板 1004:Packaging substrate
1024:畫素區 1024: Pixel area
1044:導電元件 1044: Conductive Components
2004:發光元件 2004: Light-emitting device
2024:承載層 2024: Carrier Layer
2044:發光單元 2044: Light-emitting unit
2044-B:發光單元 2044-B: Light-emitting unit
2044-G:發光單元 2044-G: Light-emitting unit
2044-R:發光單元 2044-R: Light-emitting unit
2064:導電元件 2064: Conductive Components
2084:光學層 2084: Optical layer
2104:第一電極 2104: First electrode
2124:第二電極 2124: Second electrode
2144:電極接墊 2144:Electrode pad
2144-1~2144-4:電極接墊 2144-1~2144-4: Electrode pads
300:控制單元 300: Control unit
300A:控制單元 300A: Control unit
300-2~300-29:電極節點 300-2~300-29: Electrode Nodes
300A-2~300A-29:電極節點 300A-2~300A-29: Electrode Node
302:電晶體組 302: Transistor assembly
304:電晶體 304: Transistor
306:第一電極 306: First electrode
308:第二電極 308: Second electrode
310:半導體層 310: Semiconductor layer
312:第三電極 312: Third electrode
314:封裝體 314: Package
C-1~C-29:電極節點 C-1~C-29: Electrode nodes
DL:資料線 DL: Data Line
L1:虛線 L1: Dashed Line
L2:虛線 L2: Dashed Line
第1A圖顯示根據一實施例之發光元件的側視圖。 Figure 1A shows a side view of a light-emitting device according to one embodiment.
第1B圖顯示根據一實施例之發光元件的俯視圖。 Figure 1B shows a top view of a light-emitting device according to one embodiment.
第1C圖顯示根據一實施例之發光元件的仰視圖。 Figure 1C shows a bottom view of a light-emitting device according to one embodiment.
第1D圖顯示根據一實施例之發光元件的等效電路。 Figure 1D shows an equivalent circuit of a light-emitting device according to one embodiment.
第1E圖顯示根據另一實施例之發光元件的等效電路。 Figure 1E shows an equivalent circuit of a light-emitting element according to another embodiment.
第2圖顯示根據一實施例之發光元件的製造流程圖。 Figure 2 shows a manufacturing process flow chart of a light-emitting device according to one embodiment.
第3A~3G圖顯示根據一實施例之發光元件的製造流程。 Figures 3A to 3G illustrate the manufacturing process of a light-emitting device according to one embodiment.
第4A圖顯示根據一實施例之發光元件封裝體的俯視圖。 Figure 4A shows a top view of a light-emitting device package according to one embodiment.
第4B圖顯示根據一實施例之封裝基板的俯視圖。 Figure 4B shows a top view of a package substrate according to one embodiment.
第4C圖顯示根據一實施例之封裝基板的仰視圖。 Figure 4C shows a bottom view of a package substrate according to one embodiment.
第4D圖顯示根據一實施例之發光元件封裝體的等效電路。 Figure 4D shows the equivalent circuit of a light-emitting device package according to one embodiment.
第4E圖顯示根據一實施例的封裝基板的仰視圖。 Figure 4E shows a bottom view of a package substrate according to one embodiment.
第4F圖顯示根據一實施例的發光元件封裝體的等效電路。 Figure 4F shows an equivalent circuit of a light-emitting device package according to one embodiment.
第5A圖顯示根據一實施例之顯示裝置的俯視圖。 Figure 5A shows a top view of a display device according to one embodiment.
第5B圖顯示根據一實施例之顯示裝置的俯視圖。 Figure 5B shows a top view of a display device according to one embodiment.
第6A圖顯示根據一實施例之發光元件封裝體的結構。 Figure 6A shows the structure of a light-emitting device package according to one embodiment.
第6B圖顯示根據一實施例之發光元件封裝體的等效電路。 Figure 6B shows the equivalent circuit of a light-emitting device package according to one embodiment.
第7A圖顯示根據一實施例之發光元件的俯視圖。 Figure 7A shows a top view of a light-emitting device according to one embodiment.
第7B圖顯示根據一實施例之發光元件的側視圖。 Figure 7B shows a side view of a light-emitting device according to one embodiment.
第8圖顯示根據一實施例之控制單元的示意圖。 Figure 8 shows a schematic diagram of a control unit according to one embodiment.
第9A圖顯示根據一實施例之發光元件封裝體的示意圖。 Figure 9A shows a schematic diagram of a light-emitting device package according to one embodiment.
第9B圖顯示根據一實施例之控制單元的示意圖。 Figure 9B shows a schematic diagram of a control unit according to one embodiment.
以下將配合所附圖式對於各種不同的實施例進行更詳細的敘述。為了清楚起見,圖式中的元件可能並未依照實際比例進行繪示。並且,在一些圖式中可能省略部分元件和/或符號。 在說明書和圖式中,類似的符號用於指示類似的元件。可以理解的是,以下內容和所附圖式只是用於說明,並不意欲造成限制。可以預期的是,一實施例中的元件和特徵,能夠被有利地納入於另一實施例中,無須進一步的闡述。 Various embodiments are described in more detail below with reference to the accompanying drawings. For clarity, elements in the drawings may not be drawn to scale. Furthermore, some elements and/or symbols may be omitted in some drawings. Similar symbols are used throughout the description and drawings to indicate similar elements. It should be understood that the following description and the accompanying drawings are for illustrative purposes only and are not intended to be limiting. It is contemplated that elements and features of one embodiment may be beneficially incorporated into another embodiment without further elaboration.
第1A~1C圖例示發光元件100的結構,其中,第1A圖是發光元件100的側視圖,第1B圖是發光元件100的俯視圖,第1C圖是發光元件100的仰視圖。如第1A~1C圖所示,發光元件100包括一承載層110、複數個發光單元120、一控制單元130、一光學層140、和複數個電極接墊150。發光單元120設置於承載層110上。控制單元130設置於承載層110上。控制單元130用於控制複數個發光單元120。光學層140設置於承載層110上,並覆蓋複數個發光單元120和控制單元130。電極接墊150設置於承載層110下。電極接墊150電連接發光單元120和控制單元130。控制單元130包括一由III-V材料所構成的磊晶結構。控制單元130包括複數個電晶體131,該些電晶體131分別具有一第一電極132和一第二電極133,該些電晶體131共用一個半導體層134和一個第三電極135。 Figures 1A-1C illustrate the structure of a light-emitting device 100. Figure 1A is a side view of the light-emitting device 100, Figure 1B is a top view of the light-emitting device 100, and Figure 1C is a bottom view of the light-emitting device 100. As shown in Figures 1A-1C, the light-emitting device 100 includes a carrier layer 110, a plurality of light-emitting units 120, a control unit 130, an optical layer 140, and a plurality of electrode pads 150. The light-emitting units 120 are disposed on the carrier layer 110. The control unit 130 is also disposed on the carrier layer 110. The control unit 130 is used to control the plurality of light-emitting units 120. The optical layer 140 is disposed on the carrier layer 110 and covers the plurality of light-emitting cells 120 and the control cell 130. The electrode pad 150 is disposed beneath the carrier layer 110. The electrode pad 150 electrically connects the light-emitting cells 120 and the control cell 130. The control cell 130 comprises an epitaxial structure made of III-V materials. The control cell 130 includes a plurality of transistors 131, each having a first electrode 132 and a second electrode 133. The transistors 131 share a semiconductor layer 134 and a third electrode 135.
具體地說,承載層110可以是由介電材料,如感光型介電材料(Photo-Imageable Dielectric;PID)形成,但不限於此。根據一些實施例,承載層110可以包括複數個導電連接件112,將複數個發光單元120和控制單元130電連接至電極接墊150。導電連接件112包括走線114和通孔116,但不限於此。 Specifically, the carrier layer 110 may be formed of a dielectric material, such as, but not limited to, a photo-imageable dielectric (PID). According to some embodiments, the carrier layer 110 may include a plurality of conductive connectors 112 that electrically connect the plurality of light-emitting units 120 and the control unit 130 to the electrode pads 150. The conductive connectors 112 include, but are not limited to, traces 114 and vias 116.
複數個發光單元120設置於承載層110上。發光單元120可以是發光二極體(LED)發光單元,發光單元120的厚度可以為5μm~15μm。如第1B圖所示,每一個發光單元120可以分別具有一第一電極122和一第二電極124。在單一個發光元件100中,發光單元120-R、120-G、120-B的第一電極122可以電連接至一個電極接墊150-4,如第1C圖所示。發光單元120-R、120-G、120-B的第二電極124分別電連接至電極接墊150-1~150-3。第一電極122和第二電極124的二者之一是陽極,另一者是陰極。根據一些實施例,複數個發光單元120至少發出二種不同顏色的光。舉例來說,發光單元120-R、1204-G、120-B分別發出紅光、綠光、藍光。然而可以理解,複數個發光單元120也可以採用其他適合的光色組合。 A plurality of light-emitting cells 120 are disposed on the carrier layer 110. The light-emitting cells 120 may be light-emitting diode (LED) light-emitting cells, and the thickness of the light-emitting cells 120 may be 5 μm to 15 μm. As shown in FIG1B , each light-emitting cell 120 may have a first electrode 122 and a second electrode 124 . In a single light-emitting element 100 , the first electrode 122 of the light-emitting cells 120-R, 120-G, and 120-B may be electrically connected to an electrode pad 150-4 , as shown in FIG1C . The second electrodes 124 of the light-emitting cells 120-R, 120-G, and 120-B are electrically connected to electrode pads 150-1 to 150-3 , respectively. One of the first electrode 122 and the second electrode 124 is an anode, and the other is a cathode. According to some embodiments, the plurality of light-emitting elements 120 emit at least two different colors of light. For example, light-emitting elements 120-R, 1204-G, and 120-B emit red, green, and blue light, respectively. However, it will be appreciated that the plurality of light-emitting elements 120 may also employ other suitable combinations of light colors.
在一實施例中,控制單元130和複數個發光單元120封裝在一起,能夠大幅簡化系統設計。此外,將控制單元130和複數個發光單元120配置在承載層110的同一側,有利於降低成本以及減少封裝體的厚度。此外,控制單元130的高度以不遮擋發光單元120所發出的光線尤佳,例如,控制單元130的一上表面與發光單元120的一上表面的高度差D小於或等於5μm~10μm。在另一實施例中,控制單元130可以與發光單元120等高。 In one embodiment, the control unit 130 and the plurality of light-emitting units 120 are packaged together, significantly simplifying the system design. Furthermore, placing the control unit 130 and the plurality of light-emitting units 120 on the same side of the carrier layer 110 helps reduce costs and the thickness of the package. Furthermore, the height of the control unit 130 is preferably such that it does not block the light emitted by the light-emitting units 120. For example, the height difference D between the top surface of the control unit 130 and the top surface of the light-emitting units 120 is less than or equal to 5μm to 10μm. In another embodiment, the control unit 130 can be the same height as the light-emitting units 120.
如第1B圖所示,控制單元130包括複數個電晶體131以控制複數個發光單元120。於一實施例中,控制單元130包括三個電晶體131,各個電晶體131具有一第一電極132和一第二電極 133,三個電晶體131並共用一個第三電極135和一個半導體層134。三個電晶體131的三個第一電極132共同連接至單一個電極接墊,例如第1C圖中的電極接墊150-4。三個電晶體131的三個第二電極133分別連接至發光單元120-R、120-G、120-B的第二電極124,發光單元120-R、120-G、120-B的三個第一電極122分別連接至三個電極接墊,例如,第1C圖中的電極接墊150-1~150-3。三個電晶體131共用的第三電極135可以連接至單一個電極接墊,例如第1C圖中的電極接墊150-5。電晶體131的第一電極132和第二電極133的其中一者是源極,另一者是汲極,第三電極135是電晶體131的閘極。在一實施例中,控制單元130的厚度可以為5μm~15μm。根據一實施例,電晶體131係由III-V材料製成,其中III-V材料包含氮化鋁鎵(AlGaN)及/或氮化鎵(GaN)。相較於多晶矽及非晶矽,III-V材料具有較高電子遷移率。在相同體積下,氮化鎵電晶體相較於矽電晶體可以導通較大的電流、承受較大的電壓。換言之,較小體積的III-V材料電晶體即可達到與更大體積之矽電晶體相同的效能。 As shown in FIG1B , control unit 130 includes a plurality of transistors 131 for controlling a plurality of light-emitting units 120. In one embodiment, control unit 130 includes three transistors 131. Each transistor 131 has a first electrode 132 and a second electrode 133. The three transistors 131 share a third electrode 135 and a semiconductor layer 134. The three first electrodes 132 of the three transistors 131 are connected to a single electrode pad, such as electrode pad 150-4 in FIG1C . The three second electrodes 133 of the three transistors 131 are connected to the second electrodes 124 of the light-emitting cells 120-R, 120-G, and 120-B, respectively. The three first electrodes 122 of the light-emitting cells 120-R, 120-G, and 120-B are connected to three electrode pads, for example, electrode pads 150-1 through 150-3 in FIG. 1C . The third electrode 135 shared by the three transistors 131 can be connected to a single electrode pad, for example, electrode pad 150-5 in FIG. 1C . One of the first electrode 132 and the second electrode 133 of the transistor 131 is a source, and the other is a drain. The third electrode 135 is a gate of the transistor 131. In one embodiment, the thickness of the control unit 130 can be 5μm to 15μm. According to one embodiment, the transistor 131 is made of III-V material, wherein the III-V material includes aluminum gallium nitride (AlGaN) and/or gallium nitride (GaN). Compared to polycrystalline silicon and amorphous silicon, III-V materials have higher electron mobility. At the same volume, gallium nitride transistors can conduct larger currents and withstand larger voltages than silicon transistors. In other words, a smaller III-V material transistor can achieve the same performance as a larger silicon transistor.
在一實施例中,光學層140可以被發光單元120所發出的光線穿過。在另一實施例中,光學層140直接接觸或靠近發光單元120側表面的部分可以遮擋發光單元120所發出的光線,而未直接接觸或遠離發光單元120側表面的部分可以被發光單元120所發出的光線穿過,例如,光學層140直接接觸發光單元120側表面的部分是深色材料(例如,黑色或灰色材料),而未直接接觸發 光單元120側表面及發光單元120上方的部分是透光材料(例如,透明或半透明材料)。 In one embodiment, the optical layer 140 can be passed through by light emitted by the light-emitting unit 120. In another embodiment, the portion of the optical layer 140 that directly contacts or is close to the side surface of the light-emitting unit 120 can block the light emitted by the light-emitting unit 120, while the portion that does not directly contact or is far from the side surface of the light-emitting unit 120 can be passed through by the light emitted by the light-emitting unit 120. For example, the portion of the optical layer 140 that directly contacts the side surface of the light-emitting unit 120 is made of a dark material (e.g., black or gray), while the portion that does not directly contact the side surface of the light-emitting unit 120 or above the light-emitting unit 120 is made of a light-transmitting material (e.g., transparent or translucent).
如第1A圖所示,複數個電極接墊150設置於承載層110下。發光元件100藉由電極接墊150以連接手法,例如表面黏著技術(Surface Mount Technology;SMT),與電路板或者電子元件電連接。電極接墊150的數目少於發光單元120和控制單元130的電極總數目。舉例來說,發光元件100包括五個電極接墊150-1~150-5,發光單元120和控制單元130包括十三個電極。假設發光元件100的投影面積固定,電極接墊150的數目越少,每一個電極接墊150的面積越大。越大的電極接墊,可以在連接製程中容忍更大的位移公差,並能夠與電路板形成更強的連接。 As shown in FIG1A , a plurality of electrode pads 150 are disposed under the carrier layer 110 . The light-emitting element 100 is electrically connected to a circuit board or electronic component via the electrode pads 150 using a connection method, such as surface mount technology (SMT). The number of electrode pads 150 is less than the total number of electrodes of the light-emitting unit 120 and the control unit 130 . For example, the light-emitting element 100 includes five electrode pads 150-1 to 150-5, and the light-emitting unit 120 and the control unit 130 include thirteen electrodes. Assuming that the projected area of the light-emitting element 100 is fixed, the fewer the number of electrode pads 150, the larger the area of each electrode pad 150. Larger electrode pads can tolerate greater displacement tolerances during the connection process and form a stronger connection to the circuit board.
請參照第1D圖,電路100C顯示發光元件100的等效電路。參照第1B圖,在一實施例中,發光單元120-R、120-G、120-B的第一電極122是陽極,第二電極124是陰極,三個電晶體131的第二電極133皆是汲極(Drain)並分別連接發光單元120-R、120-G、120-B的第二電極124(陰極),發光單元120-R、120-G、120-B的第一電極122(陽極)共同連接到第1C圖的電極接墊150-4(汲極接墊)。三個電晶體131的第一電極132皆是源極,分別連接到第1C圖的電極接墊150-1~150-3(源極接墊)。三個電晶體131的第三電極135皆是閘極,並共接到第1C圖的電極接墊150-5(閘極接墊)。具體而言,發光元件100裡的發光單元120-R、120-G、120-B的陽極122彼此共接,供電電壓Vcc自電極接墊150-4施加 至發光單元120-R、120-G、120-B的第一電極122(陽極)。發光單元120-R、120-G、120-B的第二電極124(陰極)分別連接三個電晶體131的第二電極133(汲極)。電晶體131的第一電極132(源極)則藉由電極接墊150-1~150-3分別連接至對應的資料線DL。在一實施例中,輸入發光單元120-R、120-G、120-B的電壓可以通過相應的資料線DL被調整,進而改變流經發光單元120-R、120-G、120-B的電流以調整其發光亮度。此外,發光元件100中三個電晶體131共用同一個第三電極135(閘極),並透過電極接墊150-5連接至掃描線SL。當電晶體131在開啟的狀態下,發光單元120-R、120-G、120-B會發出光線;當電晶體131在關閉的狀態下,發光單元120-R、120-G、120-B不會發光。 Referring to FIG. 1D , circuit 100C illustrates an equivalent circuit of light-emitting element 100 . Referring to FIG. 1B , in one embodiment, first electrodes 122 of light-emitting cells 120-R, 120-G, and 120-B are anodes, second electrodes 124 are cathodes, and second electrodes 133 of three transistors 131 are drains connected to the second electrodes 124 (cathodes) of light-emitting cells 120-R, 120-G, and 120-B, respectively. First electrodes 122 (anodes) of light-emitting cells 120-R, 120-G, and 120-B are collectively connected to electrode pad 150-4 (drain pad) in FIG. 1C . The first electrodes 132 of the three transistors 131 serve as sources and are connected to electrode pads 150-1 through 150-3 (source pads) in Figure 1C , respectively. The third electrodes 135 of the three transistors 131 serve as gates and are commonly connected to electrode pad 150-5 (gate pad) in Figure 1C . Specifically, the anodes 122 of the light-emitting cells 120-R, 120-G, and 120-B in the light-emitting device 100 are commonly connected. The supply voltage Vcc is applied from electrode pad 150-4 to the first electrodes 122 (anodes) of the light-emitting cells 120-R, 120-G, and 120-B. The second electrodes 124 (cathodes) of light-emitting cells 120-R, 120-G, and 120-B are connected to the second electrodes 133 (drains) of three transistors 131, respectively. The first electrodes 132 (sources) of transistors 131 are connected to corresponding data lines DL via electrode pads 150-1 through 150-3. In one embodiment, the voltages input to light-emitting cells 120-R, 120-G, and 120-B can be adjusted via the corresponding data lines DL, thereby varying the current flowing through the light-emitting cells 120-R, 120-G, and 120-B to adjust their brightness. Furthermore, the three transistors 131 in the light-emitting element 100 share a common third electrode 135 (gate) and are connected to the scan line SL via an electrode pad 150-5. When the transistors 131 are turned on, the light-emitting cells 120-R, 120-G, and 120-B emit light. When the transistors 131 are turned off, the light-emitting cells 120-R, 120-G, and 120-B do not emit light.
第1E圖繪示發光元件100的另一種等效電路100C’。參照第1B圖,在一實施例中,發光單元120-R、120-G、120-B的第一電極122是陰極,第二電極124是陽極。在一實施例中,三個電晶體131的第二電極133皆是源極,分別連接至發光單元120-R、120-G、120-B的第二電極124(陽極),發光單元120-R、120-G、120-B的第一電極122(陰極)共接到第1C圖的電極接墊150-4(源極接墊)。三個電晶體131的第一電極132皆是汲極,分別連接到第1C圖的電極接墊150-1~150-3(汲極接墊)。三個電晶體131共用一個第三電極135(閘極),第三電極135並連接到電極接墊150-5(閘極接墊)。具體而言,三個電晶體131的三個第一電極132(汲極)分別連接至三個資料驅動裝置DD,驅動裝置DD調節流經發光 單元120-R、120-G、120-B的電流,藉以控制發光單元120-R、120-G、120-B發出光的亮度。第三電極135透過電極接墊150-5連接至掃描線SL。當電晶體131在開啟的狀態下,發光單元120-R、120-G、120-B會發出光線;當電晶體131在關閉的狀態下,發光單元120-R、120-G、120-B不會發光。 FIG1E illustrates another equivalent circuit 100C' of the light-emitting element 100. Referring to FIG1B , in one embodiment, the first electrodes 122 of the light-emitting cells 120-R, 120-G, and 120-B are cathodes, and the second electrodes 124 are anodes. In one embodiment, the second electrodes 133 of the three transistors 131 are all sources, connected to the second electrodes 124 (anodes) of the light-emitting cells 120-R, 120-G, and 120-B, respectively. The first electrodes 122 (cathodes) of the light-emitting cells 120-R, 120-G, and 120-B are connected in common to the electrode pad 150-4 (source pad) shown in FIG1C . The first electrodes 132 of the three transistors 131 are drains, connected to electrode pads 150-1 through 150-3 (drain pads) in Figure 1C . The three transistors 131 share a third electrode 135 (gate), which is also connected to electrode pad 150-5 (gate pad). Specifically, the first electrodes 132 (drains) of the three transistors 131 are connected to three data drivers DD, which regulate the current flowing through the light-emitting cells 120-R, 120-G, and 120-B, thereby controlling the brightness of the light emitted by the light-emitting cells 120-R, 120-G, and 120-B. The third electrode 135 is connected to the scanning line SL via the electrode pad 150-5. When the transistor 131 is turned on, the light-emitting elements 120-R, 120-G, and 120-B emit light. When the transistor 131 is turned off, the light-emitting elements 120-R, 120-G, and 120-B do not emit light.
第2圖顯示發光元件100的製造的流程圖。第3A~3G圖顯示發光元件100在不同製造階段的例示結構。 Figure 2 shows a flowchart of the manufacturing process of the light-emitting device 100. Figures 3A to 3G show exemplary structures of the light-emitting device 100 at different manufacturing stages.
參照第2圖以及第3A圖,首先,在步驟S1中,提供一暫時基板100a。暫時基板100a的材料無須特別限制,只要能提供暫時性的支撐以及之後被移除即可,例如玻璃、藍寶石及金屬。 Referring to Figures 2 and 3A , first, in step S1, a temporary substrate 100a is provided. The material of temporary substrate 100a is not particularly limited, as long as it can provide temporary support and be removed later, such as glass, sapphire, and metal.
在步驟S2中,如第3A圖所示,將複數個發光單元120-R、120-G、120-B和一控制單元130設置於暫時基板100a上。發光單元120的第一電極122和第二電極124、控制單元130的第一電極132、第二電極133和第三電極135朝向相對於暫時基板100a之一側。根據一實施例,發光單元120-R、120-G、120-B與暫時基板100a之間預先設置墊高材料(未示出),使得發光單元120-R、120-G、120-B的第一電極122和第二電極124和控制單元130的第一電極132、第二電極133和第三電極135的表面齊平(圖未示)。墊高材料可以參考前述光學層140的材料。此外,墊高材料也可以在步驟S2中用以將發光單元120固定於暫時基板100a上。 In step S2, as shown in FIG3A , a plurality of light-emitting cells 120-R, 120-G, and 120-B and a control cell 130 are placed on a temporary substrate 100a. The first and second electrodes 122 and 124 of the light-emitting cells 120, and the first, second, and third electrodes 132, 133, and 135 of the control cell 130 are oriented toward a side of the temporary substrate 100a. According to one embodiment, a padding material (not shown) is pre-placed between the light-emitting units 120-R, 120-G, and 120-B and the temporary substrate 100a to ensure that the surfaces of the first and second electrodes 122 and 124 of the light-emitting units 120-R, 120-G, and 120-B and the first, second, and third electrodes 132, 133, and 135 of the control unit 130 are aligned (not shown). The padding material can refer to the material of the optical layer 140 described above. Furthermore, the padding material can also be used to secure the light-emitting units 120 to the temporary substrate 100a in step S2.
在步驟S3中,如第3B圖所示,一第一介電層142形成在暫時基板100a上,並覆蓋發光單元120-R、120-G、120-B和控制單元130。由於發光單元120-R、120-G、120-B和控制單元130被第一介電層142覆蓋,因此發光單元120-R、120-G、120-B和控制單元130以虛線表示。其中,第一介電層142可以單獨作為光學層140或與後續提及的第三介電層144共同作為光學層140。第一介電層142可以遮擋或被來自發光單元120-R、120-G、120-B的光線穿透。接著,如第3B圖所示,複數個第一開孔O1被形成在第一介電層142中,以露出發光單元120-R、120-G、120-B的第一電極122和第二電極124、控制單元130的第一電極132、第二電極133和第三電極135。 In step S3, as shown in FIG. 3B , a first dielectric layer 142 is formed on the temporary substrate 100a, covering the light-emitting elements 120-R, 120-G, 120-B, and the control element 130. Because the light-emitting elements 120-R, 120-G, 120-B, and the control element 130 are covered by the first dielectric layer 142, the light-emitting elements 120-R, 120-G, 120-B, and the control element 130 are represented by dashed lines. The first dielectric layer 142 can serve as the optical layer 140 alone or together with the third dielectric layer 144 described later. The first dielectric layer 142 can block or allow light from the light-emitting elements 120-R, 120-G, and 120-B to pass through. Next, as shown in FIG3B , a plurality of first openings O1 are formed in the first dielectric layer 142 to expose the first and second electrodes 122 and 124 of the light-emitting elements 120-R, 120-G, and 120-B, and the first, second, and third electrodes 132, 133, and 135 of the control element 130.
在步驟S4中,參照第3C~3D圖,一承載層110(第3D圖)形成於第一介電層142上。 In step S4, referring to Figures 3C-3D, a carrier layer 110 (Figure 3D) is formed on the first dielectric layer 142.
如第3C圖所示,在複數個第一開孔O1中填入金屬以連接發光單元120-R、120-G、120-B的第一電極122和第二電極124、控制單元130的第一電極132、第二電極133和第三電極135,並形成複數個第一通孔116a。接著,根據前述電路100C、100C’,形成複數條走線114於第一介電層142上以電連發光單元120和控制單元130。在一實施例中,走線114可以使用半導體製程,例如黃光顯影,來形成,但不限於此。 As shown in Figure 3C , metal is filled into a plurality of first openings O1 to connect the first electrodes 122 and second electrodes 124 of the light-emitting cells 120-R, 120-G, and 120-B, and the first electrodes 132, second electrodes 133, and third electrodes 135 of the control cell 130. A plurality of first vias 116a are also formed. Next, based on the aforementioned circuits 100C and 100C', a plurality of traces 114 are formed on the first dielectric layer 142 to electrically connect the light-emitting cells 120 and the control cell 130. In one embodiment, the traces 114 can be formed using a semiconductor process, such as, but not limited to, yellow light development.
接著,如第3D圖所示,形成一第二介電層110a於第一介電層142上,覆蓋複數條走線114以及複數個第一通孔116a。 在一實施例中,第二介電層110a的材料可以相同或相異於第一介電層142的材料,第二介電層110a的材料可以是ABF(Ajinomoto Build-up Film)、環氧樹脂、BT(Bismaleimide Triazine)樹脂或聚醯亞胺(polyimide)樹脂。接著,形成複數個第二開孔O2於第二介電層110a中,以露出複數條走線114的端點。然後,在複數個第二開孔O2中填入金屬與複數條走線114的端點接觸形成複數個第二通孔116b。詳而言之,第1A圖中的導電連接件112包括走線114、第一通孔116a、和第二通孔116b,其中,第一通孔116a與第二通孔116b合稱為通孔116。複數條走線114、通孔116與第二介電層110a共同構成承載層110。在其他實施例中,承載層110可以包括其他元件,例如電阻及電容等被動元件。 Next, as shown in FIG3D , a second dielectric layer 110a is formed on the first dielectric layer 142, covering the plurality of traces 114 and the plurality of first vias 116a. In one embodiment, the material of the second dielectric layer 110a can be the same as or different from that of the first dielectric layer 142. The material of the second dielectric layer 110a can be ABF (Ajinomoto Build-up Film), epoxy resin, BT (Bismaleimide Triazine) resin, or polyimide resin. Next, a plurality of second openings O2 are formed in the second dielectric layer 110a to expose the endpoints of the plurality of traces 114. Then, metal is filled into the plurality of second openings O2 to contact the endpoints of the plurality of traces 114, forming a plurality of second vias 116b. Specifically, the conductive connector 112 in Figure 1A includes traces 114, first vias 116a, and second vias 116b. The first vias 116a and the second vias 116b are collectively referred to as vias 116. The plurality of traces 114, vias 116, and second dielectric layer 110a together constitute the carrier layer 110. In other embodiments, the carrier layer 110 may include other components, such as passive components such as resistors and capacitors.
在步驟S5,如第3E圖所示,複數個電極接墊150被形成於承載層110上。根據一實施例,電極接墊150可以使用半導體製程或電鍍製程來形成,但不限於此。 In step S5, as shown in FIG. 3E , a plurality of electrode pads 150 are formed on the carrier layer 110. According to one embodiment, the electrode pads 150 can be formed using a semiconductor process or a plating process, but are not limited thereto.
在步驟S6中,移除暫時基板100a,移除暫時基板100a的手法包含雷射照射、加熱或蝕刻。第3F圖顯示移除暫時基板100a之後尚待進一步加工的中間封裝結構100T之剖面圖,其中中間封裝結構100T露出第一介電層142的表面142S與控制單元130。 In step S6, the temporary substrate 100a is removed. Methods for removing the temporary substrate 100a include laser irradiation, heating, or etching. Figure 3F shows a cross-sectional view of the intermediate package structure 100T after the temporary substrate 100a is removed and awaiting further processing. The intermediate package structure 100T exposes the surface 142S of the first dielectric layer 142 and the control unit 130.
第3G圖顯示發光元件100的剖面圖。移除暫時基板100a之後,一第三介電層144被形成於第一介電層142的表面142S與控制單元130上,以覆蓋發光單元120及控制單元130,第 三介電層144的材料與前述光學層140的材料相同。光學層140包括第一介電層142與第三介電層144。在一實施例中,第一介電層142及/或第三介電層144對於發光單元120-R、120-G、120-B發出的光線穿透率大於70%。 Figure 3G shows a cross-sectional view of the light-emitting device 100. After removing the temporary substrate 100a, a third dielectric layer 144 is formed on the surface 142S of the first dielectric layer 142 and the control unit 130 to cover the light-emitting units 120 and 130. The material of the third dielectric layer 144 is the same as that of the optical layer 140 described above. The optical layer 140 includes the first dielectric layer 142 and the third dielectric layer 144. In one embodiment, the first dielectric layer 142 and/or the third dielectric layer 144 have a transmittance greater than 70% for light emitted by the light-emitting units 120-R, 120-G, and 120-B.
第4A圖顯示根據一實施例之發光元件封裝體10的俯視圖。發光元件封裝體10包括一封裝基板200和複數個前述實施例所揭露的發光元件100位於封裝基板200上。封裝基板200具有複數個畫素區202。發光元件100設置於封裝基板200上,並分別位於畫素區202中以做為畫素,其中,發光元件100的細節請參考前面相關的段落。如第4A圖所示,發光元件100的數目為4個,亦即,發光元件封裝體10具有4個畫素。透過封裝基板200內部的連接元件(未示出),發光元件100可以被外部控制器(圖未示)控制。在他實施例中,發光元件封裝體10包含超過4個發光元件100(圖未示),即超過4個畫素,例如,發光元件封裝體10包含n*m個發光元件100(畫素),n為等於或大於3的正整數,m為等於或大於3的正整數,且n等於或不等於m。 FIG4A shows a top view of a light-emitting device package 10 according to one embodiment. The light-emitting device package 10 includes a package substrate 200 and a plurality of light-emitting devices 100 disclosed in the aforementioned embodiments located on the package substrate 200. The package substrate 200 has a plurality of pixel regions 202. The light-emitting devices 100 are disposed on the package substrate 200 and are respectively located in the pixel regions 202 to serve as pixels. For details of the light-emitting devices 100, please refer to the relevant paragraphs above. As shown in FIG4A , the number of light-emitting devices 100 is four, that is, the light-emitting device package 10 has four pixels. The light-emitting devices 100 can be controlled by an external controller (not shown) through connection elements (not shown) within the package substrate 200. In this embodiment, the light-emitting device package 10 includes more than four light-emitting devices 100 (not shown), that is, more than four pixels. For example, the light-emitting device package 10 includes n*m light-emitting devices 100 (pixels), where n is a positive integer equal to or greater than 3, m is a positive integer equal to or greater than 3, and n is equal to or not equal to m.
第4B~4C圖根據一實施例顯示封裝基板200,其中第4B圖顯示封裝基板200的俯視圖,第4C圖顯示封裝基板200的仰視圖。如第4B圖所示,封裝基板200包括複數個上接墊204-1~204-20位於封裝基板200的上表面2001。如第4C圖所示,封裝基板200包含複數個下接墊206-1~206-6、206-8~206-11、206-13~206-16、206-18~206-20位於封裝基板200的下表面2002,其 中複數個上接墊204-1~204-20用於電連接4個發光元件100,複數個下接墊206-1~206-6、206-8~206-11、206-13~206-16、206-18~206-20用於和第5B圖中顯示裝置9B的電路板500B電連接。根據一實施例,上接墊204-1~204-20中的至少二者可以電連接於一個下接墊,舉例來說,上接墊204-2、204-7、204-12、204-17共同電連接於下接墊206-2,其餘上接墊204-1、204-3~204-6、204-8~204-11、204-13~204-16、204-18~204-20則分別電連接於下接墊206-1、206-3~206-6、206-8~206-11、206-13~206-16、206-18~206-20。 Figures 4B-4C illustrate a package substrate 200 according to one embodiment, wherein Figure 4B shows a top view of the package substrate 200, and Figure 4C shows a bottom view of the package substrate 200. As shown in Figure 4B, the package substrate 200 includes a plurality of upper pads 204-1-20 located on a top surface 2001 of the package substrate 200. As shown in FIG4C , package substrate 200 includes a plurality of lower pads 206-1 through 206-6, 206-8 through 206-11, 206-13 through 206-16, and 206-18 through 206-20 located on a lower surface 2002 of package substrate 200. Upper pads 204-1 through 204-20 are used to electrically connect to the four light-emitting elements 100, while lower pads 206-1 through 206-6, 206-8 through 206-11, 206-13 through 206-16, and 206-18 through 206-20 are used to electrically connect to circuit board 500B of display device 9B shown in FIG5B . According to one embodiment, at least two of the upper pads 204-1 to 204-20 can be electrically connected to a lower pad. For example, upper pads 204-2, 204-7, 204-12, and 204-17 are electrically connected to lower pad 206-2. The remaining upper pads 204-1, 204-3 to 204-6, 204-8 to 204-11, 204-13 to 204-16, and 204-18 to 204-20 are electrically connected to lower pads 206-1, 206-3 to 206-6, 206-8 to 206-11, 206-13 to 206-16, and 206-18 to 206-20, respectively.
第4D圖顯示發光元件封裝體10的等效電路10C。如第4D圖所示,發光元件封裝體10的電路10C為四個電路100C(第1D圖)的組合。配合第4B~4C圖顯示封裝基板200的上接墊204-1~204-20與下接墊206-1~206-6、206-8~206-11、206-13~206-16、206-18~206-20,上接墊204-2、204-7、204-12、204-17和下接墊206-2可以作為汲極接墊。上接墊204-3~204-5、204-8~204-10、204-13~204-15、204-18~204-20和下接墊206-3~206-5、206-8~206-10、206-13~206-15、206-18~206-20可以作為源極接墊。上接墊204-1、204-6、204-11、204-16和下接墊206-1、206-6、206-11、206-16可以作為閘極接墊。下接墊206-2用於連接供電電壓Vcc。 FIG4D shows an equivalent circuit 10C of the light-emitting device package 10. As shown in FIG4D, circuit 10C of the light-emitting device package 10 is a combination of four circuits 100C (FIG1D). In conjunction with FIG4B-4C, FIG4B-4C illustrate the upper pads 204-1 through 204-20 and the lower pads 206-1 through 206-6, 206-8 through 206-11, 206-13 through 206-16, and 206-18 through 206-20 of the package substrate 200. Upper pads 204-2, 204-7, 204-12, and 204-17, along with lower pad 206-2, can serve as drain pads. Upper pads 204-3 to 204-5, 204-8 to 204-10, 204-13 to 204-15, 204-18 to 204-20 and lower pads 206-3 to 206-5, 206-8 to 206-10, 206-13 to 206-15, 206-18 to 206-20 can serve as source pads. Upper pads 204-1, 204-6, 204-11, 204-16 and lower pads 206-1, 206-6, 206-11, 206-16 can serve as gate pads. Lower pad 206-2 is used to connect to the supply voltage Vcc.
第4E圖顯示根據另一實施例的封裝基板200’的仰視圖。封裝基板200’同樣具有如第4B圖所示複數個上接墊204- 1~204-20,以及複數個下接墊206’-1~206’-5、206’-8~206’-11、206’-13~206’-15、206’-18~206’-20。封裝基板200’與封裝基板200差異在於,上接墊204-1、204-6電連接於下接墊206’-1,上接墊204-11、204-16電連接於下接墊206’-11,因此相較於封裝基板200,封裝基板200’的下表面2002’上少兩個下接墊,其他封裝基板200’的上、下接墊設計皆與於封裝基板200相同。 FIG4E shows a bottom view of a package substrate 200′ according to another embodiment. Package substrate 200′ similarly has a plurality of upper pads 204-1 through 204-20, as well as a plurality of lower pads 206′-1 through 206′-5, 206′-8 through 206′-11, 206′-13 through 206′-15, and 206′-18 through 206′-20, as shown in FIG4B . The difference between package substrate 200' and package substrate 200 is that upper pads 204-1 and 204-6 are electrically connected to lower pad 206'-1, and upper pads 204-11 and 204-16 are electrically connected to lower pad 206'-11. Therefore, compared to package substrate 200, package substrate 200' has two fewer lower pads on its lower surface 2002'. The upper and lower pad designs of the rest of package substrate 200' are the same as those of package substrate 200.
第4F圖顯示根據另一實施例顯示發光元件封裝體10的等效電路10C’。電路10C’與電路10C差異在於,電路10C’進一步地將二個發光元件100的閘極135彼此連接,以減少下接墊的數目,其餘部分電路10C’皆與電路10C相同。電路10C’中,上接墊204-2、204-7、204-12、204-17和下接墊206’-2可以作為汲極接墊。上接墊204-3~204-5、204-8~204-10、204-13~204-15、204-18~204-20和下接墊206’-3~206’-5、206’-8~206’-10、206’-13~206’-15、206’-18~206’-20可以作為源極接墊。上接墊204-1、204-6、204-11、204-16和下接墊206’-1、206’-11可以作為閘極接墊。下接墊206’-2用於導入供電電壓Vcc至電路中。 FIG4F shows an equivalent circuit 10C' of the light-emitting device package 10 according to another embodiment. Circuit 10C' differs from circuit 10C in that it further connects the gates 135 of the two light-emitting devices 100 to reduce the number of lower pads. The remainder of circuit 10C' is identical to circuit 10C. In circuit 10C', upper pads 204-2, 204-7, 204-12, 204-17, and lower pad 206'-2 can serve as drain pads. Upper pads 204-3 to 204-5, 204-8 to 204-10, 204-13 to 204-15, 204-18 to 204-20 and lower pads 206'-3 to 206'-5, 206'-8 to 206'-10, 206'-13 to 206'-15, 206'-18 to 206'-20 can serve as source pads. Upper pads 204-1, 204-6, 204-11, 204-16 and lower pads 206'-1 and 206'-11 can serve as gate pads. Lower pad 206'-2 is used to introduce the supply voltage Vcc into the circuit.
第5A圖顯示一顯示裝置9A的俯視圖,顯示裝置9A具有一電路板500A,複數個發光元件100以一固定的間距g1陣列設置在電路板500A上,其中,複數個發光元件100與電路板500A電連接,藉由外部控制器(圖未示)獨立控制每一顆發光元件100發出的光色。在一實施例中,先將複數個發光元件100施以混合 (Mixing)製程,再將混合後的複數個發光元件100設置於電路板500A上,以確保顯示裝置9A可以呈現較均勻的色彩。 Figure 5A shows a top view of a display device 9A. Display device 9A comprises a circuit board 500A, on which a plurality of light-emitting elements 100 are arranged in an array at a fixed pitch g1. The plurality of light-emitting elements 100 are electrically connected to circuit board 500A, and the color of light emitted by each light-emitting element 100 is independently controlled by an external controller (not shown). In one embodiment, the plurality of light-emitting elements 100 are first subjected to a mixing process before being placed on circuit board 500A to ensure that the display device 9A can display relatively uniform colors.
第5B圖顯示一顯示裝置9B的俯視圖。顯示裝置9B具有一電路板500B,複數個發光元件封裝體10以一固定的間距g2陣列設置在電路板500B上,其中,複數個發光元件封裝體10與電路板500B電連接,藉由外部控制器(圖未示)獨立控制每一個發光元件封裝體10中每一顆發光元件100。在一實施例中,先將複數個發光元件封裝體10施以混合(Mixing)的製程後,再將混合後的複數個發光元件封裝體10設置於電路板500B上,以確保顯示裝置9B可以呈現較均勻的色彩。由於發光元件封裝體10包含4個或更多的發光元件100,因此能夠簡化顯示裝置9B的製程。 Figure 5B shows a top view of a display device 9B. Display device 9B includes a circuit board 500B, on which a plurality of light-emitting device packages 10 are arranged in an array at a fixed pitch g2. The plurality of light-emitting device packages 10 are electrically connected to circuit board 500B, and each light-emitting device 100 within each light-emitting device package 10 is independently controlled by an external controller (not shown). In one embodiment, the plurality of light-emitting device packages 10 are first subjected to a mixing process before being placed on circuit board 500B to ensure that the display device 9B can display relatively uniform colors. Since the light-emitting device package 10 includes four or more light-emitting devices 100, the manufacturing process of the display device 9B can be simplified.
第6A~6B圖顯示一實施例的發光元件封裝體104的示意圖。第6A圖例示發光元件封裝體104的結構,第6B圖顯示發光元件封裝體104的等效電路104C。如第6A圖所示,發光元件封裝體104包括一封裝基板1004、複數個發光元件2004、及一控制單元300,其中,一個發光元件2004為一畫素,因此,發光元件封裝體104具有四個發光元件2004,即四個畫素。 Figures 6A-6B schematically illustrate a light-emitting device package 104 according to one embodiment. Figure 6A illustrates the structure of the light-emitting device package 104, while Figure 6B shows an equivalent circuit 104C of the light-emitting device package 104. As shown in Figure 6A, the light-emitting device package 104 includes a package substrate 1004, a plurality of light-emitting devices 2004, and a control unit 300. Each light-emitting device 2004 represents a pixel, so the light-emitting device package 104 has four light-emitting devices 2004, or four pixels.
如第6A圖所示,封裝基板1004具有四個畫素區1024,由虛線L1、L2劃分,四個發光元件2004的分別位於四個畫素區1024中。控制單元300設置於封裝基板1004上,大體上位於虛線L1、L2交會處,複數個導電元件1044(以虛線顯示),用於連接發光元件2004和控制單元300。在其他實施例中,控制單元 300也可以配置在其他適合的位置,例如,內嵌於封裝基板1004中或放置封裝基板1004的非中心位置(即非虛線L1、L2交會處)或放置封裝基板1004的背面(即發光元件2004與控制單元300位於封裝基板1004的相異側)。第6A圖中標示了複數個電極節點10-1~10-29,分別對應第6B圖所示電路104C的電極節點C-1~C-29。此外,第6A圖中電極節點10-2~10-29也分別對應第8圖顯示的控制單元300的電極300-2~300-29。如第6A、6B圖所示,在一畫素區域1024中,一個發光元件2004具有至少三個發光單元,例如發光單元2044-R、2044-G、2044-B。發光單元2044-R、2044-G、2044-B的陽極連接至電極節點C-1,供電電壓Vcc與電極節點C-1連接,供電電壓Vcc可以連接發光單元2044-R、2044-G、2044-B的陽極。發光單元2044-R、2044-G、2044-B的陰極分別連接控制單元300的三個電晶體304的電極節點C-2~C-4(或圖8顯示之電極節點300-2~300-4),例如,汲極。三個電晶體304的電極節點C-14~C-16(或圖8顯示之電極節點300-14~300-16),例如,源極,連接至資料線DL。同一個畫素區域1024中的三個電晶體304共用一個電極節點C-26(或圖8顯示之電極節點300-26),例如,閘極,電極節點C-26連接至掃描線SL。同理,發光元件封裝體104中,另外三個畫素以相同的方式佈局在電路104C中。於其他實施例中,畫素採用其他適合的電路設計,例如,發光單元2044-R、2044-G、2044-B的陰極連接至電極節點C-1。 As shown in FIG. 6A , the package substrate 1004 has four pixel regions 1024, demarcated by dashed lines L1 and L2. The four light-emitting elements 2004 are located in each of the four pixel regions 1024. The control unit 300 is disposed on the package substrate 1004, generally at the intersection of the dashed lines L1 and L2. A plurality of conductive elements 1044 (shown in dashed lines) are used to connect the light-emitting elements 2004 and the control unit 300. In other embodiments, the control unit 300 may be configured in other suitable locations, for example, embedded within the package substrate 1004, placed at a non-center location of the package substrate 1004 (i.e., not at the intersection of the dashed lines L1 and L2), or placed on the backside of the package substrate 1004 (i.e., with the light-emitting element 2004 and the control unit 300 located on opposite sides of the package substrate 1004). FIG. 6A shows a plurality of electrode nodes 10-1 through 10-29, which correspond to electrode nodes C-1 through C-29 of the circuit 104C shown in FIG. 6B . Furthermore, electrode nodes 10-2 through 10-29 in FIG. 6A also correspond to electrodes 300-2 through 300-29 of the control unit 300 shown in FIG. 8 . As shown in Figures 6A and 6B, within a pixel region 1024, a light-emitting element 2004 includes at least three light-emitting units, such as light-emitting units 2044-R, 2044-G, and 2044-B. The anodes of light-emitting units 2044-R, 2044-G, and 2044-B are connected to electrode node C-1. A supply voltage Vcc is connected to electrode node C-1, and the supply voltage Vcc can be connected to the anodes of light-emitting units 2044-R, 2044-G, and 2044-B. The cathodes of light-emitting cells 2044-R, 2044-G, and 2044-B are respectively connected to electrode nodes C-2 through C-4 (or electrode nodes 300-2 through 300-4 shown in FIG8 ), e.g., drains, of the three transistors 304 of control unit 300. Electrode nodes C-14 through C-16 (or electrode nodes 300-14 through 300-16 shown in FIG8 ), e.g., sources, of the three transistors 304 are connected to data line DL. The three transistors 304 in the same pixel region 1024 share a common electrode node C-26 (or electrode node 300-26 shown in FIG8 ), e.g., a gate. Electrode node C-26 is connected to scan line SL. Similarly, within the light-emitting device package 104, the other three pixels are arranged in the same manner within the circuit 104C. In other embodiments, the pixels employ other suitable circuit designs, for example, where the cathodes of the light-emitting units 2044-R, 2044-G, and 2044-B are connected to the electrode node C-1.
第7A圖顯示發光元件2004俯視圖,第7B圖顯示發光元件2004側視圖。如第7B圖所示,發光元件2004分別包括一承載層2024、複數個發光單元2044、及複數個電極接墊2144。發光單元2044設置於承載層2024上。電極接墊2144設置於承載層2024之下,並電連接於發光單元2044。在一實施例中,發光元件2004更包括複數個導電元件2064(至少包含導孔或導電走線),用於電連接發光單元2044和電極接墊2144。根據一實施例,發光元件2004更包括一光學層2084。光學層2084設置於承載層2024上,並覆蓋發光單元2044。 Figure 7A shows a top view of light-emitting element 2004, and Figure 7B shows a side view of light-emitting element 2004. As shown in Figure 7B, light-emitting element 2004 includes a carrier layer 2024, a plurality of light-emitting units 2044, and a plurality of electrode pads 2144. The light-emitting units 2044 are disposed on the carrier layer 2024. The electrode pads 2144 are disposed beneath the carrier layer 2024 and are electrically connected to the light-emitting units 2044. In one embodiment, light-emitting element 2004 further includes a plurality of conductive elements 2064 (including at least vias or conductive traces) for electrically connecting the light-emitting units 2044 and the electrode pads 2144. According to one embodiment, the light-emitting element 2004 further includes an optical layer 2084. The optical layer 2084 is disposed on the carrier layer 2024 and covers the light-emitting unit 2044.
如第7A圖所示,複數個發光單元2044可以分別具有一第一電極2104和一第二電極2124。單一個發光元件2004中,複數個發光單元2044的第一電極2104可以電連接於同一個電極接墊2144,例如第7A圖中的電極接墊2144-1。複數個發光單元2044的第二電極2124則分別電連接至相應的電極接墊2144-2~2144-4。根據一實施例,複數個發光單元2044各自的第一電極2104和第二電極2124的其中一者是陽極,另一者是陰極。參考第6B圖顯示的電路104C,第一電極2104是陽極,第二電極2124是陰極。發光單元2044可以是發光二極體。根據一實施例,複數個發光單元2044至少發出三種不同顏色的光。舉例來說,第6B圖的電路104C中包含三種發光單元2044-R、2044-G、2044-B,分別發出紅光、綠光、藍光。在其他實施例中,複數個發光單元2044也可以採用其他適合的光色組合。 As shown in FIG7A , each of the plurality of light-emitting cells 2044 may include a first electrode 2104 and a second electrode 2124. Within a single light-emitting element 2004, the first electrodes 2104 of the plurality of light-emitting cells 2044 may be electrically connected to the same electrode pad 2144, such as electrode pad 2144-1 in FIG7A . The second electrodes 2124 of the plurality of light-emitting cells 2044 are electrically connected to corresponding electrode pads 2144-2 through 2144-4. According to one embodiment, one of the first electrode 2104 and the second electrode 2124 of each of the plurality of light-emitting cells 2044 is an anode, and the other is a cathode. Referring to circuit 104C shown in FIG. 6B , first electrode 2104 is an anode, and second electrode 2124 is a cathode. Light-emitting element 2044 may be a light-emitting diode. According to one embodiment, the plurality of light-emitting elements 2044 emit at least three different colors of light. For example, circuit 104C in FIG. 6B includes three light-emitting elements 2044-R, 2044-G, and 2044-B, which emit red, green, and blue light, respectively. In other embodiments, the plurality of light-emitting elements 2044 may also employ other suitable combinations of light colors.
第8圖顯示控制單元300的示意圖。控制單元300包括複數個電晶體組302分別控制複數個發光元件2004(圖未示)。每一個電晶體組302包括複數個電晶體304,在一實施例中,一個電晶體組302具有三個電晶體304。每一個電晶體304具有一第一電極306和一第二電極308。單一個電晶體組302中的複數個電晶體304共用一個半導體疊層310和一個第三電極312。根據一實施例,複數個電晶體304各自的第一電極306和第二電極308的其中一者是源極,另一者是汲極。參考第6B圖顯示的電路104C,第二電極308是源極,第一電極306是汲極。單一個電晶體組302中的複數個電晶體304共用的第三電極312是閘極。在另一實施例中,控制單元300具有四個電晶體組302分別用以控制四個發光元件2004,其中四個電晶體組302共具有12個第一電極306分別連接至電極節點300-2~300-13,12個第二電極308分別連接至電極節點300-14~300-25,4個第三電極312分別連接至電極節點300-26~300-29。根據一實施例,控制單元300的半導體疊層310包括一III-V材料。III-V材料包含氮化鋁鎵(AlGaN)及/或氮化鎵(GaN)。根據一實施例,控制單元300可以更包括一封裝體314,用於封裝電晶體組302。 FIG8 shows a schematic diagram of a control unit 300. The control unit 300 includes a plurality of transistor groups 302, each of which controls a plurality of light-emitting elements 2004 (not shown). Each transistor group 302 includes a plurality of transistors 304. In one embodiment, a transistor group 302 includes three transistors 304. Each transistor 304 has a first electrode 306 and a second electrode 308. The plurality of transistors 304 in a single transistor group 302 share a semiconductor stack 310 and a third electrode 312. According to one embodiment, one of the first electrode 306 and the second electrode 308 of each of the plurality of transistors 304 is a source, and the other is a drain. Referring to circuit 104C shown in FIG. 6B , second electrode 308 is a source, and first electrode 306 is a drain. Third electrode 312, shared by multiple transistors 304 in a single transistor group 302, is a gate. In another embodiment, control unit 300 includes four transistor groups 302, each used to control four light-emitting elements 2004. Each of the four transistor groups 302 has a total of twelve first electrodes 306 connected to electrode nodes 300-2 through 300-13, twelve second electrodes 308 connected to electrode nodes 300-14 through 300-25, and four third electrodes 312 connected to electrode nodes 300-26 through 300-29. According to one embodiment, the semiconductor stack 310 of the control unit 300 includes a III-V material. The III-V material includes aluminum gallium nitride (AlGaN) and/or gallium nitride (GaN). According to one embodiment, the control unit 300 may further include a package 314 for encapsulating the transistor assembly 302.
第9A~9B圖顯示根據一實施例的發光元件封裝體10A及其控制單元300A的示意圖。如第9B圖所示,發光元件封裝體104A與發光元件封裝體104的差異在於,控制單元300A中,相鄰的二個電晶體組302中的電晶體304共用一個半導體層310。換 言之,相鄰的二個電晶體組302被進一步地整合在一起。控制單元300A的結構和電路配置、以及發光元件封裝體104A的電路配置因此對應地調整。第9A圖中的電極節點10A-1~10A-29同樣可以分別對應第6B圖顯示的電路104C中的電極節點C-1~C-29。此外,第9A圖中的電極節點10A-2~10A-29也可以分別對應第9B圖顯示的控制單元300A的電極節點300A-2~300A-29。 Figures 9A-9B schematically illustrate a light-emitting device package 10A and its control unit 300A according to one embodiment. As shown in Figure 9B , the difference between light-emitting device package 104A and light-emitting device package 104 lies in that, in control unit 300A, transistors 304 in two adjacent transistor groups 302 share a common semiconductor layer 310. In other words, the two adjacent transistor groups 302 are further integrated. The structure and circuit configuration of control unit 300A, as well as the circuit configuration of light-emitting device package 104A, are adjusted accordingly. Electrode nodes 10A-1 through 10A-29 in Figure 9A can also correspond, respectively, to electrode nodes C-1 through C-29 in circuit 104C shown in Figure 6B . Furthermore, electrode nodes 10A-2 to 10A-29 in FIG. 9A may also correspond to electrode nodes 300A-2 to 300A-29 of control unit 300A shown in FIG. 9B , respectively.
綜上所述,本申請案提供內含控制單元的發光元件、發光元件的製造方法、及發光元件封裝體,可以應用於微型發光二極體顯示器,有著簡化系統設計等優點。然而可以理解,本申請案的發光元件、發光元件的製造方法、及發光元件封裝體也可能應用於其他類型的發光二極體顯示器,甚至是並非使用發光二極體的顯示器,無須特別限制。 In summary, this application provides a light-emitting device including a control unit, a method for manufacturing the light-emitting device, and a light-emitting device package. These devices can be applied to micro-LED displays, offering advantages such as simplified system design. However, it is understood that the light-emitting device, method for manufacturing the light-emitting device, and light-emitting device package of this application may also be applied to other types of LED displays, even displays that do not use LEDs, without specific limitations.
雖然本案之實施例揭露如上,然其並非用以限定本案之範圍。本案所屬技術領域中具有通常知識者,在不脫離本案之精神和範圍內,當可作各種之更動與潤飾。因此,本案之保護範圍當視後附之申請專利範圍所界定者為準。 While the embodiments of this invention are disclosed above, they are not intended to limit the scope of this invention. Those skilled in the art will readily appreciate that various modifications and improvements are possible without departing from the spirit and scope of this invention. Therefore, the scope of protection for this invention shall be determined by the scope of the patent application attached hereto.
100:發光元件 100: Light-emitting element
110:承載層 110: Carrier layer
112:導電連接件 112: Conductive connector
114:走線 114: Routing
116:通孔 116: Through hole
120:發光單元 120: Light-emitting unit
130:控制單元 130: Control unit
140:光學層 140: Optical layer
150:電極接墊 150: Electrode pad
D:高度差 D: Height difference
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| CN101197406A (en) * | 2007-11-30 | 2008-06-11 | 华南师范大学 | Group III-V light emitting metal semiconductor field effect transistor and preparation method thereof |
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