TWI888550B - Substrate processing method and substrate processing device - Google Patents
Substrate processing method and substrate processing device Download PDFInfo
- Publication number
- TWI888550B TWI888550B TW110116653A TW110116653A TWI888550B TW I888550 B TWI888550 B TW I888550B TW 110116653 A TW110116653 A TW 110116653A TW 110116653 A TW110116653 A TW 110116653A TW I888550 B TWI888550 B TW I888550B
- Authority
- TW
- Taiwan
- Prior art keywords
- gas
- substrate
- substrate processing
- processing method
- film
- Prior art date
Links
Landscapes
- Drying Of Semiconductors (AREA)
Abstract
於一個例示性實施方式中,提供一種基板處理方法。基板處理方法包含如下工序:於腔室內之基板支持器上準備具有介電體膜之基板;及自包含HF氣體與選自由C4H2F6氣體、C4H2F8氣體、C3H2F4氣體及C3H2F6氣體所組成之群中之至少1種CxHyFz氣體之反應氣體生成電漿,對介電體膜進行蝕刻;且於蝕刻工序中,基板支持器之溫度設定為0℃以下,HF氣體之流量多於上述CxHyFz氣體之流量。 In an exemplary embodiment, a substrate processing method is provided. The substrate processing method includes the following steps : preparing a substrate having a dielectric film on a substrate holder in a chamber; and etching the dielectric film by generating plasma from a reaction gas including HF gas and at least one CxHyFz gas selected from the group consisting of C4H2F6 gas , C4H2F8 gas , C3H2F4 gas , and C3H2F6 gas ; and in the etching step, the temperature of the substrate holder is set to be below 0° C , and the flow rate of the HF gas is greater than the flow rate of the CxHyFz gas .
Description
本發明之例示性實施方式係關於一種基板處理方法及基板處理裝置。 The exemplary implementation of the present invention relates to a substrate processing method and a substrate processing device.
例如,於專利文獻1中記載有對氧化矽膜進行蝕刻之技術。 For example, Patent Document 1 describes a technique for etching a silicon oxide film.
專利文獻1:日本專利特開2016-122774號公報 Patent document 1: Japanese Patent Publication No. 2016-122774
本發明提供一種使對於遮罩蝕刻之介電膜之蝕刻選擇比提高之技術。 The present invention provides a technology for improving the etching selectivity of dielectric films for mask etching.
於本發明之一個例示性實施方式中,提供一種基板處理方法,其包含如下工序:於腔室內之基板支持器上準備具有介電膜之基板;及自包含HF氣體與選自由C4H2F6氣體、C4H2F8氣體、C3H2F4氣體及C3H2F6氣體所組成之群中之至少1種CxHyFz氣體之反應氣體生成電漿,對上述介電膜進行蝕刻;且於上述蝕刻工序中,上述基板支持器之溫度設定為0℃以下,上述HF氣體之流量多於上述CxHyFz氣體之流量。 In an exemplary embodiment of the present invention, a substrate processing method is provided, which includes the following steps: preparing a substrate having a dielectric film on a substrate holder in a chamber; and etching the dielectric film by generating plasma from a reaction gas including HF gas and at least one CxHyFz gas selected from the group consisting of C4H2F6 gas , C4H2F8 gas , C3H2F4 gas and C3H2F6 gas ; and in the etching step, the temperature of the substrate holder is set to be below 0°C, and the flow rate of the HF gas is greater than the flow rate of the CxHyFz gas .
根據本發明之一個例示性實施方式,可提供一種使對於遮罩蝕刻之介電膜之蝕刻選擇比提高之技術。 According to an exemplary embodiment of the present invention, a technology for improving the etching selectivity of a dielectric film for mask etching can be provided.
1:基板處理裝置 1: Substrate processing equipment
10:腔室 10: Chamber
10s:內部空間 10s: Inner space
12:腔室本體 12: Chamber body
12e:排氣口 12e: Exhaust port
12g:閘閥 12g: Gate valve
12p:通路 12p: Passage
13:支持部 13: Support Department
14:基板支持器 14: Substrate support
16:電極板 16: Electrode plate
18:下部電極 18:Lower electrode
18f:流路 18f:Flow path
20:靜電吸盤 20: Electrostatic suction cup
20p:直流電源 20p: DC power supply
20s:開關 20s: switch
22a:配管 22a:Piping
22b:配管 22b:Piping
24:氣體供給管線 24: Gas supply pipeline
25:邊緣環 25: Edge Ring
30:上部電極 30: Upper electrode
32:構件 32: Components
34:頂板 34: Top plate
34a:氣體噴出孔 34a: Gas ejection hole
36:支持體 36: Support body
36a:氣體擴散室 36a: Gas diffusion chamber
36b:複數個氣孔 36b: Multiple pores
36c:氣體導入口 36c: Gas inlet
38:氣體供給管 38: Gas supply pipe
40:氣體源群 40: Gas source group
41:流量控制器群 41: Traffic controller group
42:閥群 42: Valve group
46:護罩 46: Shield
48:擋板 48: Baffle
50:排氣裝置 50: Exhaust device
52:排氣管 52: Exhaust pipe
62:高頻電源 62: High frequency power supply
64:偏壓電源 64: Bias power supply
66:匹配器 66:Matcher
68:匹配器 68:Matcher
70:電源 70: Power supply
80:控制部 80: Control Department
BT:底部 BT:Bottom
CT:控制部 CT: Control Department
DF:介電膜 DF: Dielectric film
LLM1:裝載閉鎖模組 LLM1: Loading Lock Module
LLM2:裝載閉鎖模組 LLM2: Loading Lock Module
LM:承載器模組 LM: Carrier module
LP1:裝載埠 LP1: Loading port
LP2:裝載埠 LP2: Loading port
LP3:裝載埠 LP3: Loading port
MK:遮罩膜 MK:Mask film
OP:開口 OP: Open your mouth
PF:保護膜 PF: Protective film
PM1~PM6:基板處理室 PM1~PM6: Substrate processing room
PS:基板處理系統 PS: Substrate processing system
RC:凹部 RC: concave part
S1:側壁 S1: Side wall
S2:側壁 S2: Side wall
T1:上表面 T1: Upper surface
TM:搬送模組 TM: Transport module
UF:基底膜 UF: Basement membrane
W:基板 W: substrate
圖1係概略性地表示基板處理裝置1之圖。 FIG1 is a diagram schematically showing a substrate processing device 1.
圖2係表示高頻電力HF及電氣偏壓之一例之時序圖。 Figure 2 is a timing diagram showing an example of high frequency power HF and electrical bias.
圖3係概略性地表示基板處理系統PS之圖。 FIG3 is a diagram schematically showing the substrate processing system PS.
圖4係表示基板W之剖面構造之一例之圖。 FIG4 is a diagram showing an example of the cross-sectional structure of the substrate W.
圖5係表示本處理方法之流程圖。 Figure 5 is a flow chart showing the processing method.
圖6係表示蝕刻後之遮罩膜MK之形狀之一例之圖。 FIG6 is a diagram showing an example of the shape of the mask film MK after etching.
圖7係表示蝕刻之溫度依存性之一例之圖。 Figure 7 is a diagram showing an example of the temperature dependence of etching.
圖8係表示步驟ST22中之基板W之剖面構造之一例之圖。 FIG8 is a diagram showing an example of the cross-sectional structure of the substrate W in step ST22.
圖9係表示實驗1之測定結果之圖。 Figure 9 is a graph showing the measurement results of Experiment 1.
圖10係表示實驗2之測定結果之圖。 Figure 10 is a graph showing the measurement results of Experiment 2.
圖11係表示實驗2之測定結果之圖。 Figure 11 is a diagram showing the measurement results of Experiment 2.
圖12係表示實驗3之測定結果之圖。 Figure 12 is a graph showing the measurement results of Experiment 3.
圖13係表示實驗3之測定結果之圖。 Figure 13 is a diagram showing the measurement results of Experiment 3.
圖14係表示實驗4之測定結果之圖。 Figure 14 is a diagram showing the measurement results of Experiment 4.
以下,對本發明之各實施方式進行說明。 The following describes various implementation methods of the present invention.
於一個例示性實施方式中,提供一種基板處理方法。基板處理方法包含如下工序:於腔室內之基板支持器上準備具有介電膜之基 板;及自包含HF氣體與選自由C4H2F6氣體、C4H2F8氣體、C3H2F4氣體及C3H2F6氣體所組成之群中之至少1種CxHyFz氣體之反應氣體生成電漿,對介電膜進行蝕刻;於蝕刻工序中,基板支持器之溫度設定為0℃以下,且HF氣體之流量多於上述CxHyFz氣體之流量。 In an exemplary embodiment, a substrate processing method is provided. The substrate processing method includes the following steps : preparing a substrate having a dielectric film on a substrate holder in a chamber; and generating plasma from a reaction gas including HF gas and at least one CxHyFz gas selected from the group consisting of C4H2F6 gas , C4H2F8 gas , C3H2F4 gas , and C3H2F6 gas to etch the dielectric film; in the etching step, the temperature of the substrate holder is set to be below 0°C, and the flow rate of the HF gas is greater than the flow rate of the CxHyFz gas .
於一個例示性實施方式中,CxHyFz氣體之流量相對於反應氣體之總流量為20體積%以下。 In an exemplary embodiment, the flow rate of the CxHyFz gas is less than 20 volume % relative to the total flow rate of the reaction gas.
於一個例示性實施方式中,HF氣體之流量相對於反應氣體之總流量為70體積%以上。 In an exemplary embodiment, the flow rate of HF gas relative to the total flow rate of the reaction gas is greater than 70 volume %.
於一個例示性實施方式中,反應氣體進而包含含有鹵素之氣體。 In one exemplary embodiment, the reaction gas further comprises a halogen-containing gas.
於一個例示性實施方式中,含有鹵素之氣體係選自由含氯氣體、含溴氣體及含碘氣體所組成之群中之至少1種。 In an exemplary embodiment, the halogen-containing gas is at least one selected from the group consisting of chlorine-containing gas, bromine-containing gas, and iodine-containing gas.
於一個例示性實施方式中,含有鹵素之氣體係選自由Cl2、SiCl2、SiCl4、CCl4、SiH2Cl2、Si2Cl6、CHCl3、SO2Cl2、BCl3、PCl3、PCl5、POCl3、Br2、HBr、CBr2F2、C2F5Br、PBr3、PBr5、POBr3、BBr3、HI、CF3I、C2F5I、C3F7I、IF5、IF7、I2及PI3所組成之群中之至少1種氣體。 In an exemplary embodiment, the halogen-containing gas is at least one gas selected from the group consisting of Cl2 , SiCl2, SiCl4 , CCl4 , SiH2Cl2 , Si2Cl6 , CHCl3 , SO2Cl2 , BCl3 , PCl3 , PCl5 , POCl3 , Br2 , HBr , CBr2F2 , C2F5Br , PBr3 , PBr5 , POBr3 , BBr3 , HI, CF3I , C2F5I , C3F7I , IF5 , IF7 , I2 , and PI3 .
於一個例示性實施方式中,反應氣體包含含磷氣體。 In one exemplary embodiment, the reaction gas includes a phosphorus-containing gas.
於一個例示性實施方式中,反應氣體包含含氧氣體。 In one exemplary embodiment, the reaction gas comprises an oxygen-containing gas.
於一個例示性實施方式中,反應氣體進而包含選自由含硼氣體及含硫氣體所組成之群中之至少1種。 In an exemplary embodiment, the reaction gas further includes at least one selected from the group consisting of boron-containing gas and sulfur-containing gas.
於一個例示性實施方式中,電漿係自包含反應氣體與惰性氣體之處理氣體生成。 In one exemplary embodiment, the plasma is generated from a process gas comprising a reactive gas and an inert gas.
於一個例示性實施方式中,介電膜係含矽膜。 In one exemplary embodiment, the dielectric film is a silicon-containing film.
於一個例示性實施方式中,含矽膜包含選自由氧化矽膜、氮化矽膜及多晶矽膜所組成之群中之至少1種。 In an exemplary embodiment, the silicon-containing film includes at least one selected from the group consisting of a silicon oxide film, a silicon nitride film, and a polycrystalline silicon film.
於一個例示性實施方式中,基板具有遮罩,該遮罩於介電膜上規定至少一個開口且包含有機膜或含金屬膜。 In one exemplary embodiment, the substrate has a mask that defines at least one opening on the dielectric film and includes an organic film or a metal-containing film.
於一個例示性實施方式中,蝕刻工序包含對基板支持器賦予電氣偏壓之步驟,對基板支持器賦予電氣偏壓之期間包含第1期間、及與上述第1期間交替之第2期間,第1期間內之電氣偏壓為0或第1位準,且第2期間內之電氣偏壓為大於第1位準之第2位準。 In an exemplary embodiment, the etching process includes the step of applying an electrical bias to the substrate support, and the period of applying the electrical bias to the substrate support includes a first period and a second period alternating with the first period, the electrical bias in the first period is 0 or a first level, and the electrical bias in the second period is a second level greater than the first level.
於一個例示性實施方式中,蝕刻工序包含對基板支持器或與基板支持器對向之上部電極供給用以生成電漿之高頻電力,供給高頻電力之期間包含第3期間、及與第3期間交替之第4期間,第3期間之高頻電力之位準為0或第3位準,第4期間之高頻電力之位準為大於第3位準之第4位準,且第2期間與第4期間係至少一部分重疊。 In an exemplary embodiment, the etching process includes supplying high-frequency power for generating plasma to a substrate support or an upper electrode opposite to the substrate support, the period of supplying high-frequency power includes a third period and a fourth period alternating with the third period, the level of the high-frequency power in the third period is 0 or the third level, the level of the high-frequency power in the fourth period is a fourth level greater than the third level, and the second period and the fourth period overlap at least partially.
於一個例示性實施方式中,電氣偏壓係脈衝電壓。 In one exemplary embodiment, the electrical bias is a pulse voltage.
於一個例示性實施方式中,蝕刻工序包含對與基板支持器對向之上部電極供給直流電壓或低頻電力之步驟。 In an exemplary embodiment, the etching process includes the step of supplying a DC voltage or a low-frequency power to an upper electrode opposite to the substrate holder.
於一個例示性實施方式中,蝕刻工序包含:第1工序,其係將腔室內設為第1壓力,對基板支持器供給第1電氣偏壓而對介電膜進行蝕刻;及第2工序,其係將腔室內設為第2壓力,對基板支持器供給第2電氣偏壓而對介電膜進行蝕刻;且第1壓力與第2壓力不同及/或第1電氣偏壓與第2電氣偏壓不同。 In an exemplary embodiment, the etching process includes: a first process, which is to set the chamber to a first pressure, supply a first electrical bias to the substrate holder to etch the dielectric film; and a second process, which is to set the chamber to a second pressure, supply a second electrical bias to the substrate holder to etch the dielectric film; and the first pressure is different from the second pressure and/or the first electrical bias is different from the second electrical bias.
於一個例示性實施方式中,第1壓力大於第2壓力。 In one exemplary embodiment, the first pressure is greater than the second pressure.
於一個例示性實施方式中,第1電氣偏壓之大小之絕對值大於第2電氣偏壓之大小之絕對值。 In an exemplary embodiment, the absolute value of the magnitude of the first electrical bias is greater than the absolute value of the magnitude of the second electrical bias.
於一個例示性實施方式中,交替地重複第1工序與第2工序。 In an exemplary embodiment, the first step and the second step are repeated alternately.
於一個例示性實施方式中,提供一種基板處理方法。基板處理方法包含如下工序:於腔室內之基板支持器上準備具有包含氧化矽膜之含矽膜之基板;及自包含含氟氣體及CxHyFz(係與上述含氟氣體不同之氣體,x為2以上之整數,y及z為1以上之整數)之反應氣體生成電漿,對含矽膜進行蝕刻;且於蝕刻工序中,基板支持器之溫度設定為0℃以下,CxHyFz氣體之流量相對於反應氣體之總流量為20體積%以下。 In an exemplary embodiment, a substrate processing method is provided. The substrate processing method includes the following steps: preparing a substrate having a silicon-containing film including a silicon oxide film on a substrate holder in a chamber; and generating plasma from a reactive gas including a fluorine- containing gas and CxHyFz ( a gas different from the fluorine-containing gas, x is an integer greater than 2, and y and z are integers greater than 1) to etch the silicon-containing film; and in the etching step, the temperature of the substrate holder is set to be below 0°C, and the flow rate of the CxHyFz gas is below 20 volume % relative to the total flow rate of the reactive gas.
於一個例示性實施方式中,含氟氣體係可於上述腔室內生成HF物種之氣體。 In an exemplary embodiment, the fluorine-containing gas is a gas that can generate HF species in the above-mentioned chamber.
於一個例示性實施方式中,CxHyFz氣體具有1個以上之CF3基。 In an exemplary embodiment, the CxHyFz gas has more than one CF3 group .
於一個例示性實施方式中,CxHyFz氣體包含選自由C3H2F4氣體、C3H2F6氣體、C4H2F6氣體、C4H2F8氣體及C5H2F6氣體所組成之群中之至少1種。 In an exemplary embodiment, the CxHyFz gas includes at least one selected from the group consisting of C3H2F4 gas , C3H2F6 gas , C4H2F6 gas , C4H2F8 gas , and C5H2F6 gas .
於一個例示性實施方式中,於反應氣體中,含氟氣體之流量最多。 In an exemplary embodiment, the flow rate of fluorine-containing gas is the highest among the reaction gases.
於一個例示性實施方式中,提供一種基板處理方法。基板處理方法包含如下工序:於腔室內之基板支持器上準備具有包含氧化矽膜之含矽膜之基板;於腔室內生成電漿;及使用電漿中包含之HF物種與CxHyFz(x為2以上之整數,y及z為1以上之整數)物種對含矽膜進行蝕刻; 且電漿中HF物種之量最多。 In an exemplary embodiment, a substrate processing method is provided. The substrate processing method includes the following steps: preparing a substrate having a silicon-containing film including a silicon oxide film on a substrate holder in a chamber; generating plasma in the chamber; and etching the silicon-containing film using HF species and CxHyFz (x is an integer greater than 2, y and z are integers greater than 1) species contained in the plasma; and the amount of HF species in the plasma is the largest.
於一個例示性實施方式中,提供一種基板處理裝置。基板處理裝置具備腔室、設置於腔室內且構成為能夠調整溫度之基板支持器、供給用以於腔室內生成電漿之電力之電漿生成部、及控制部,控制部為了對基板支持器上所支持之基板之介電膜進行蝕刻而執行如下控制,即,藉由自電漿生成部供給之電力,將包含HF氣體與選自由C4H2F6氣體、C4H2F8氣體、C3H2F4氣體及C3H2F6氣體所組成之群中之至少1種CxHyFz氣體之反應氣體導入至腔室內而生成電漿,且於控制中,基板支持器之溫度設定為0℃以下,且HF氣體之流量多於CxHyFz氣體之流量。 In one exemplary embodiment, a substrate processing apparatus is provided. A substrate processing apparatus includes a chamber, a substrate holder disposed in the chamber and configured to adjust the temperature thereof, a plasma generating unit for supplying power for generating plasma in the chamber, and a control unit. The control unit performs control to etch a dielectric film of a substrate supported on the substrate holder, that is, by introducing a reaction gas including HF gas and at least one CxHyFz gas selected from the group consisting of C4H2F6 gas , C4H2F8 gas, C3H2F4 gas , and C3H2F6 gas into the chamber by the power supplied from the plasma generating unit to generate plasma, and in the control, the temperature of the substrate holder is set to be 0° C or less , and the flow rate of the HF gas is greater than the flow rate of the CxHyFz gas .
以下,參照圖式對本發明之各實施方式詳細地進行說明。再者,於各圖式中對相同或同樣之要素標註相同符號,並省略重複之說明。只要事先未特別說明,則基於圖式所示之位置關係說明上下左右等之位置關係。圖式之尺寸比率並不表示實際之比率,又,實際之比率並不限於圖示之比率。 Hereinafter, each embodiment of the present invention will be described in detail with reference to the drawings. Furthermore, the same symbols are used for the same or identical elements in each drawing, and repeated descriptions are omitted. Unless otherwise specified in advance, the positional relationships such as up, down, left, and right are described based on the positional relationships shown in the drawings. The dimensional ratios in the drawings do not represent the actual ratios, and the actual ratios are not limited to the ratios shown in the drawings.
<基板處理裝置1之構成> <Structure of substrate processing device 1>
圖1係概略性地表示一個例示性實施方式之基板處理裝置1之圖。一個例示性實施方式之基板處理方法(以下稱為「本處理方法」)可使用基板處理裝置1而執行。 FIG1 is a diagram schematically showing a substrate processing apparatus 1 of an exemplary embodiment. A substrate processing method of an exemplary embodiment (hereinafter referred to as "the present processing method") can be performed using the substrate processing apparatus 1.
圖1所示之基板處理裝置1具備腔室10。腔室10於其內部提供內部空間10s。腔室10包含腔室本體12。腔室本體12具有大致圓筒形狀。腔室本體12例如由鋁形成。於腔室本體12之內壁面上設置有具有耐腐蝕性之膜。具有耐腐蝕性之膜可由氧化鋁、氧化釔等陶瓷形成。 The substrate processing device 1 shown in FIG. 1 has a chamber 10. The chamber 10 provides an internal space 10s therein. The chamber 10 includes a chamber body 12. The chamber body 12 has a substantially cylindrical shape. The chamber body 12 is formed of, for example, aluminum. A corrosion-resistant film is provided on the inner wall surface of the chamber body 12. The corrosion-resistant film can be formed of ceramics such as aluminum oxide and yttrium oxide.
於腔室本體12之側壁形成有通路12p。基板W通過通路12p 在內部空間10s與腔室10之外部之間被搬送。通路12p由閘閥12g開閉。閘閥12g沿著腔室本體12之側壁設置。 A passage 12p is formed on the side wall of the chamber body 12. The substrate W is transported between the internal space 10s and the outside of the chamber 10 through the passage 12p. The passage 12p is opened and closed by a gate 12g. The gate 12g is provided along the side wall of the chamber body 12.
於腔室本體12之底部上設置有支持部13。支持部13由絕緣材料形成。支持部13具有大致圓筒形狀。支持部13於內部空間10s中自腔室本體12之底部向上方延伸。支持部13支持基板支持器14。基板支持器14構成為於內部空間10s中支持基板W。 A support portion 13 is provided on the bottom of the chamber body 12. The support portion 13 is formed of an insulating material. The support portion 13 has a substantially cylindrical shape. The support portion 13 extends upward from the bottom of the chamber body 12 in the internal space 10s. The support portion 13 supports a substrate holder 14. The substrate holder 14 is configured to support a substrate W in the internal space 10s.
基板支持器14具有下部電極18及靜電吸盤20。基板支持器14可進而具有電極板16。電極板16由鋁等之導體形成,且具有大致圓盤形狀。下部電極18設置於電極板16上。下部電極18由鋁等之導體形成,且具有大致圓盤形狀。下部電極18電性連接於電極板16。 The substrate holder 14 has a lower electrode 18 and an electrostatic suction cup 20. The substrate holder 14 may further have an electrode plate 16. The electrode plate 16 is formed of a conductor such as aluminum and has a substantially disc shape. The lower electrode 18 is disposed on the electrode plate 16. The lower electrode 18 is formed of a conductor such as aluminum and has a substantially disc shape. The lower electrode 18 is electrically connected to the electrode plate 16.
靜電吸盤20設置於下部電極18上。基板W載置於靜電吸盤20之上表面上。靜電吸盤20具有本體及電極。靜電吸盤20之本體具有大致圓盤形狀,由介電體形成。靜電吸盤20之電極係膜狀電極,設置於靜電吸盤20之本體內。靜電吸盤20之電極經由開關20s而連接於直流電源20p。若對靜電吸盤20之電極施加來自直流電源20p之電壓,則於靜電吸盤20與基板W之間產生靜電引力。基板W藉由其靜電引力而被吸引至靜電吸盤20,並由靜電吸盤20保持。 The electrostatic suction cup 20 is disposed on the lower electrode 18. The substrate W is placed on the upper surface of the electrostatic suction cup 20. The electrostatic suction cup 20 has a body and an electrode. The body of the electrostatic suction cup 20 has a substantially disc shape and is formed of a dielectric. The electrode of the electrostatic suction cup 20 is a film electrode and is disposed in the body of the electrostatic suction cup 20. The electrode of the electrostatic suction cup 20 is connected to a DC power source 20p via a switch 20s. If a voltage from the DC power source 20p is applied to the electrode of the electrostatic suction cup 20, an electrostatic attraction is generated between the electrostatic suction cup 20 and the substrate W. The substrate W is attracted to the electrostatic chuck 20 by its electrostatic attraction and is held by the electrostatic chuck 20.
於基板支持器14上配置邊緣環25。邊緣環25係環狀構件。邊緣環25可由矽、碳化矽或石英等形成。基板W配置於靜電吸盤20上且由邊緣環25包圍之區域內。 An edge ring 25 is arranged on the substrate holder 14. The edge ring 25 is a ring-shaped component. The edge ring 25 can be formed of silicon, silicon carbide or quartz. The substrate W is arranged on the electrostatic chuck 20 and in the area surrounded by the edge ring 25.
於下部電極18之內部設置有流路18f。對於流路18f,自設置於腔室10之外部之冷卻器單元經由配管22a供給熱交換介質(例如冷媒)。供給至流路18f之熱交換介質經由配管22b返回至冷卻器單元。於基 板處理裝置1中,載置於靜電吸盤20上之基板W之溫度藉由熱交換介質與下部電極18之熱交換而進行調整。 A flow path 18f is provided inside the lower electrode 18. A heat exchange medium (e.g., refrigerant) is supplied to the flow path 18f from a cooling unit provided outside the chamber 10 via a pipe 22a. The heat exchange medium supplied to the flow path 18f is returned to the cooling unit via a pipe 22b. In the substrate processing apparatus 1, the temperature of the substrate W placed on the electrostatic chuck 20 is adjusted by heat exchange between the heat exchange medium and the lower electrode 18.
於基板處理裝置1設置有氣體供給管線24。氣體供給管線24將來自傳熱氣體供給機構之傳熱氣體(例如He氣體)供給至靜電吸盤20之上表面與基板W之背面之間之間隙。 A gas supply line 24 is provided in the substrate processing device 1. The gas supply line 24 supplies heat transfer gas (such as He gas) from the heat transfer gas supply mechanism to the gap between the upper surface of the electrostatic chuck 20 and the back surface of the substrate W.
基板處理裝置1進而具備上部電極30。上部電極30設置於基板支持器14之上方。上部電極30介隔構件32而支持於腔室本體12之上部。構件32由具有絕緣性之材料形成。上部電極30與構件32將腔室本體12之上部開口封閉。 The substrate processing device 1 further includes an upper electrode 30. The upper electrode 30 is disposed above the substrate support 14. The upper electrode 30 is supported on the upper part of the chamber body 12 via a component 32. The component 32 is formed of an insulating material. The upper electrode 30 and the component 32 seal the upper opening of the chamber body 12.
上部電極30可包含頂板34及支持體36。頂板34之下表面係內部空間10s側之下表面,劃分形成內部空間10s。頂板34可由產生之焦耳熱較少之低電阻之導電體或半導體形成。頂板34具有沿其板厚方向貫通頂板34之複數個氣體噴出孔34a。 The upper electrode 30 may include a top plate 34 and a support 36. The lower surface of the top plate 34 is the lower surface of the inner space 10s side, dividing and forming the inner space 10s. The top plate 34 may be formed of a low-resistance conductor or semiconductor that generates less Joule heat. The top plate 34 has a plurality of gas ejection holes 34a that penetrate the top plate 34 along the plate thickness direction.
支持體36將頂板34裝卸自如地支持。支持體36由鋁等導電性材料形成。於支持體36之內部設置有氣體擴散室36a。支持體36具有自氣體擴散室36a向下方延伸之複數個氣孔36b。複數個氣孔36b分別與複數個氣體噴出孔34a連通。於支持體36形成有氣體導入口36c。氣體導入口36c連接於氣體擴散室36a。於氣體導入口36c連接有氣體供給管38。 The support body 36 supports the top plate 34 in a detachable manner. The support body 36 is formed of a conductive material such as aluminum. A gas diffusion chamber 36a is provided inside the support body 36. The support body 36 has a plurality of air holes 36b extending downward from the gas diffusion chamber 36a. The plurality of air holes 36b are respectively connected to the plurality of gas ejection holes 34a. A gas inlet 36c is formed in the support body 36. The gas inlet 36c is connected to the gas diffusion chamber 36a. A gas supply pipe 38 is connected to the gas inlet 36c.
於氣體供給管38經由流量控制器群41及閥群42而連接有氣體源群40。流量控制器群41及閥群42構成氣體供給部。氣體供給部亦可進而包含氣體源群40。氣體源群40包含複數個氣體源。複數個氣體源包含本處理方法中使用之處理氣體之源。流量控制器群41包含複數個流量控制器。流量控制器群41之複數個流量控制器分別係質量流量控制器或壓力 控制式之流量控制器。閥群42包含複數個開閉閥。氣體源群40之複數個氣體源分別經由流量控制器群41之對應之流量控制器及閥群42之對應之開閉閥而連接於氣體供給管38。 The gas supply pipe 38 is connected to a gas source group 40 via a flow controller group 41 and a valve group 42. The flow controller group 41 and the valve group 42 constitute a gas supply section. The gas supply section may further include a gas source group 40. The gas source group 40 includes a plurality of gas sources. The plurality of gas sources include the source of the treatment gas used in the present treatment method. The flow controller group 41 includes a plurality of flow controllers. The plurality of flow controllers of the flow controller group 41 are respectively mass flow controllers or pressure-controlled flow controllers. The valve group 42 includes a plurality of on-off valves. The plurality of gas sources of the gas source group 40 are connected to the gas supply pipe 38 via the corresponding flow controllers of the flow controller group 41 and the corresponding on-off valves of the valve group 42.
於基板處理裝置1中,沿著腔室本體12之內壁面及支持部13之外周,裝卸自如地設置有護罩46。護罩46防止反應副產物附著於腔室本體12。護罩46例如藉由在由鋁形成之母材之表面形成具有耐腐蝕性之膜而構成。具有耐腐蝕性之膜可由氧化釔等陶瓷形成。 In the substrate processing device 1, a shield 46 is detachably provided along the inner wall surface of the chamber body 12 and the outer periphery of the support portion 13. The shield 46 prevents the reaction byproducts from adhering to the chamber body 12. The shield 46 is formed, for example, by forming a corrosion-resistant film on the surface of a base material formed of aluminum. The corrosion-resistant film can be formed of ceramics such as yttrium oxide.
於支持部13與腔室本體12之側壁之間設置有擋板48。擋板48例如藉由在由鋁形成之構件之表面形成具有耐腐蝕性之膜(氧化釔等之膜)而構成。於擋板48形成有複數個貫通孔。於擋板48之下方且腔室本體12之底部設置有排氣口12e。於排氣口12e經由排氣管52連接有排氣裝置50。排氣裝置50包含壓力調整閥及渦輪分子泵等真空泵。 A baffle 48 is provided between the support portion 13 and the side wall of the chamber body 12. The baffle 48 is formed, for example, by forming a corrosion-resistant film (a film of yttrium oxide, etc.) on the surface of a component formed of aluminum. A plurality of through holes are formed in the baffle 48. An exhaust port 12e is provided below the baffle 48 and at the bottom of the chamber body 12. An exhaust device 50 is connected to the exhaust port 12e via an exhaust pipe 52. The exhaust device 50 includes a vacuum pump such as a pressure regulating valve and a turbomolecular pump.
基板處理裝置1具備高頻電源62及偏壓電源64。高頻電源62係產生高頻電力HF之電源。高頻電力HF具有適於生成電漿之第1頻率。第1頻率係例如27MHz~100MHz之範圍內之頻率。高頻電源62經由匹配器66及電極板16而連接於下部電極18。匹配器66具有用以使高頻電源62之負載側(下部電極18側)之阻抗與高頻電源62之輸出阻抗匹配之電路。再者,高頻電源62亦可經由匹配器66而連接於上部電極30。高頻電源62構成一例之電漿生成部。 The substrate processing device 1 has a high-frequency power supply 62 and a bias power supply 64. The high-frequency power supply 62 is a power supply that generates high-frequency power HF. The high-frequency power HF has a first frequency suitable for generating plasma. The first frequency is, for example, a frequency in the range of 27 MHz to 100 MHz. The high-frequency power supply 62 is connected to the lower electrode 18 via a matcher 66 and an electrode plate 16. The matcher 66 has a circuit for matching the impedance of the load side (lower electrode 18 side) of the high-frequency power supply 62 with the output impedance of the high-frequency power supply 62. Furthermore, the high-frequency power supply 62 can also be connected to the upper electrode 30 via the matcher 66. The high-frequency power source 62 constitutes an example of a plasma generating unit.
偏壓電源64係產生電氣偏壓之電源。偏壓電源64電性連接於下部電極18。電氣偏壓具有第2頻率。第2頻率低於第1頻率。第2頻率係例如400kHz~13.56MHz之範圍內之頻率。電氣偏壓與高頻電力HF一起使用之情形時,被賦予至基板支持器14,以將離子饋入至基板W。於一 例中,電氣偏壓被賦予至下部電極18。若電氣偏壓被賦予至下部電極18,則載置於基板支持器14上之基板W之電位於由第2頻率規定之週期內變動。再者,電氣偏壓亦可被賦予至設置於靜電吸盤20內之偏壓電極。 The bias power source 64 is a power source for generating an electrical bias. The bias power source 64 is electrically connected to the lower electrode 18. The electrical bias has a second frequency. The second frequency is lower than the first frequency. The second frequency is, for example, a frequency in the range of 400kHz to 13.56MHz. When the electrical bias is used together with the high frequency power HF, it is applied to the substrate holder 14 to feed ions to the substrate W. In one example, the electrical bias is applied to the lower electrode 18. If the electrical bias is applied to the lower electrode 18, the potential of the substrate W placed on the substrate holder 14 changes within a period specified by the second frequency. Furthermore, an electrical bias can also be imparted to the bias electrode disposed within the electrostatic chuck 20.
於一實施方式中,電氣偏壓亦可為具有第2頻率之高頻電力LF。高頻電力LF與高頻電力HF一起使用之情形時,用作用以將離子饋入至基板W之高頻偏壓電力。構成為產生高頻電力LF之偏壓電源64經由匹配器68及電極板16而連接於下部電極18。匹配器68具有用以使偏壓電源64之負載側(下部電極18側)之阻抗與偏壓電源64之輸出阻抗匹配之電路。 In one embodiment, the electrical bias may also be a high-frequency power LF having a second frequency. When the high-frequency power LF is used together with the high-frequency power HF, it is used as a high-frequency bias power for feeding ions to the substrate W. The bias power source 64 configured to generate the high-frequency power LF is connected to the lower electrode 18 via the matcher 68 and the electrode plate 16. The matcher 68 has a circuit for matching the impedance of the load side (lower electrode 18 side) of the bias power source 64 with the output impedance of the bias power source 64.
再者,亦可不使用高頻電力HF,而使用高頻電力LF,即,僅使用單一之高頻電力生成電漿。於該情形時,高頻電力LF之頻率亦可為大於13.56MHz之頻率、例如40MHz。又,於該情形時,基板處理裝置1亦可不具備高頻電源62及匹配器66。於該情形時,偏壓電源64構成一例之電漿生成部。 Furthermore, instead of using high-frequency power HF, high-frequency power LF may be used, that is, only a single high-frequency power may be used to generate plasma. In this case, the frequency of high-frequency power LF may be greater than 13.56 MHz, for example, 40 MHz. Furthermore, in this case, the substrate processing device 1 may not have the high-frequency power supply 62 and the matching device 66. In this case, the bias power supply 64 constitutes an example of a plasma generating unit.
於另一實施方式中,電氣偏壓亦可為脈衝狀之電壓(脈衝電壓)。於該情形時,偏壓電源可為直流電源。偏壓電源可構成為電源本身供給脈衝電壓,亦可構成為於偏壓電源之下游側具備使電壓脈衝化之器件。於一例中,脈衝電壓以於基板W產生負電位之方式被賦予至下部電極18。脈衝電壓可為矩形波,亦可為三角波,亦可為沖波,或者亦可具有其他波形。 In another embodiment, the electrical bias may also be a pulse voltage (pulse voltage). In this case, the bias power source may be a DC power source. The bias power source may be configured as a power source itself supplying a pulse voltage, or may be configured as a device for pulsing the voltage on the downstream side of the bias power source. In one example, the pulse voltage is applied to the lower electrode 18 in a manner that generates a negative potential on the substrate W. The pulse voltage may be a rectangular wave, a triangular wave, a surge wave, or may have other waveforms.
脈衝電壓之週期由第2頻率規定。脈衝電壓之週期包含兩個期間。兩個期間中之一期間之脈衝電壓係負極性之電壓。兩個期間中之一期間之電壓之位準(即絕對值)高於兩個期間中之另一期間之電壓之位準 (即絕對值)。另一期間之電壓可為負極性、正極性之任一種。另一期間之負極性之電壓之位準可大於零,亦可為零。於本實施方式中,偏壓電源64經由低通濾波器及電極板16而連接於下部電極18。再者,偏壓電源64亦可連接於設置於靜電吸盤20內之偏壓電極而代替下部電極18。 The period of the pulse voltage is determined by the second frequency. The period of the pulse voltage includes two periods. The pulse voltage in one of the two periods is a negative voltage. The voltage level (i.e., absolute value) in one of the two periods is higher than the voltage level (i.e., absolute value) in the other period. The voltage in the other period can be either negative or positive. The negative voltage level in the other period can be greater than zero or zero. In this embodiment, the bias power supply 64 is connected to the lower electrode 18 via a low-pass filter and an electrode plate 16. Furthermore, the bias power source 64 can also be connected to the bias electrode disposed in the electrostatic chuck 20 instead of the lower electrode 18.
於一實施方式中,偏壓電源64亦可對下部電極18賦予電氣偏壓之連續波。即,偏壓電源64亦可將電氣偏壓連續地賦予至下部電極18。 In one embodiment, the bias power source 64 can also provide a continuous wave of electrical bias to the lower electrode 18. That is, the bias power source 64 can also continuously provide the electrical bias to the lower electrode 18.
於另一實施方式中,偏壓電源64亦可將電氣偏壓之脈衝波賦予至下部電極18。電氣偏壓之脈衝波可週期性地賦予至下部電極18。電氣偏壓之脈衝波之週期由第3頻率規定。第3頻率低於第2頻率。第3頻率為例如1Hz以上且200kHz以下。於另一例中,第3頻率亦可為5Hz以上且100kHz以下。 In another embodiment, the bias power supply 64 may also impart an electrical bias pulse to the lower electrode 18. The electrical bias pulse may be periodically imparted to the lower electrode 18. The period of the electrical bias pulse is determined by the third frequency. The third frequency is lower than the second frequency. The third frequency is, for example, greater than 1 Hz and less than 200 kHz. In another example, the third frequency may also be greater than 5 Hz and less than 100 kHz.
電氣偏壓之脈衝波之週期包含兩個期間、即H期間及L期間。H期間內之電氣偏壓之位準(即,電氣偏壓之脈衝之位準)高於L期間內之電氣偏壓之位準。即,亦可藉由使電氣偏壓之位準增減而將電氣偏壓之脈衝波賦予至下部電極18。L期間內之電氣偏壓之位準亦可大於零。或者,L期間內之電氣偏壓之位準亦可為零。即,電氣偏壓之脈衝波亦可藉由交替地切換電氣偏壓對下部電極18之供給與供給停止而賦予至下部電極18。此處,於電氣偏壓為高頻電力LF之情形時,電氣偏壓之位準係高頻電力LF之電力位準。於電氣偏壓為高頻電力LF之情形時,電氣偏壓之脈衝中之高頻電力LF之位準亦可為2kW以上。於電氣偏壓為負極性之直流電壓之脈衝波之情形時,電氣偏壓之位準係負極性之直流電壓之絕對值之有效值。電氣偏壓之脈衝波之工作比、即H期間於電氣偏壓之脈衝波之週 期中所占之比率例如為1%以上且80%以下。於另一例中,電氣偏壓之脈衝波之工作比可為5%以上且50%以下。或者,電氣偏壓之脈衝波之工作比亦可為50%以上且99%以下。再者,供給電氣偏壓之期間中,L期間相當於上述之第1期間,H期間相當於上述之第2期間。又,L期間內之電氣偏壓之位準相當於上述之0或第1位準,H期間內之電氣偏壓之位準相當於上述之第2位準。 The cycle of the electrical bias pulse includes two periods, namely, the H period and the L period. The level of the electrical bias in the H period (i.e., the level of the electrical bias pulse) is higher than the level of the electrical bias in the L period. That is, the electrical bias pulse can be applied to the lower electrode 18 by increasing or decreasing the level of the electrical bias. The level of the electrical bias in the L period can also be greater than zero. Alternatively, the level of the electrical bias in the L period can also be zero. That is, the electrical bias pulse can also be applied to the lower electrode 18 by alternately switching the supply of the electrical bias to the lower electrode 18 and stopping the supply. Here, when the electrical bias is high-frequency power LF, the level of the electrical bias is the power level of the high-frequency power LF. When the electrical bias is high-frequency power LF, the level of the high-frequency power LF in the pulse of the electrical bias may be 2kW or more. When the electrical bias is a pulse of a negative-polarity DC voltage, the level of the electrical bias is the effective value of the absolute value of the negative-polarity DC voltage. The duty ratio of the pulse of the electrical bias, i.e., the ratio of the H period to the cycle of the pulse of the electrical bias, is, for example, 1% or more and 80% or less. In another example, the duty ratio of the pulse wave of the electrical bias can be greater than 5% and less than 50%. Alternatively, the duty ratio of the pulse wave of the electrical bias can also be greater than 50% and less than 99%. Furthermore, during the period of supplying the electrical bias, the L period is equivalent to the first period mentioned above, and the H period is equivalent to the second period mentioned above. Furthermore, the level of the electrical bias during the L period is equivalent to the 0 or first level mentioned above, and the level of the electrical bias during the H period is equivalent to the second level mentioned above.
於一實施方式中,高頻電源62亦可供給高頻電力HF之連續波。即,高頻電源62亦可連續地供給高頻電力HF。 In one embodiment, the high-frequency power source 62 can also supply a continuous wave of high-frequency power HF. That is, the high-frequency power source 62 can also supply high-frequency power HF continuously.
於另一實施方式中,高頻電源62亦可供給高頻電力HF之脈衝波。高頻電力HF之脈衝波可週期性地供給。高頻電力HF之脈衝波之週期由第4頻率規定。第4頻率低於第2頻率。於一實施方式中,第4頻率與第3頻率相同。高頻電力HF之脈衝波之週期包含兩個期間、即H期間及L期間。H期間之高頻電力HF之電力位準高於兩個期間中之L期間之高頻電力HF之電力位準。L期間之高頻電力HF之電力位準可大於零,亦可為零。再者,供給高頻電力HF之期間中,L期間相當於上述之第3期間,H期間相當於上述之第4期間。又,L期間之高頻電力HF之位準相當於上述之0或第3位準,H期間內之電氣偏壓之位準相當於上述之第4位準。 In another embodiment, the high-frequency power source 62 can also supply a pulse wave of high-frequency power HF. The pulse wave of high-frequency power HF can be supplied periodically. The period of the pulse wave of high-frequency power HF is determined by the fourth frequency. The fourth frequency is lower than the second frequency. In one embodiment, the fourth frequency is the same as the third frequency. The period of the pulse wave of high-frequency power HF includes two periods, namely the H period and the L period. The power level of the high-frequency power HF in the H period is higher than the power level of the high-frequency power HF in the L period of the two periods. The power level of the high-frequency power HF in the L period can be greater than zero or zero. Furthermore, during the period of supplying high-frequency power HF, the L period is equivalent to the third period mentioned above, and the H period is equivalent to the fourth period mentioned above. Furthermore, the level of high-frequency power HF during the L period is equivalent to the 0 or third level mentioned above, and the level of the electrical bias during the H period is equivalent to the fourth level mentioned above.
再者,高頻電力HF之脈衝波之週期亦可與電氣偏壓之脈衝波之週期同步。高頻電力HF之脈衝波之週期中之H期間亦可與電氣偏壓之脈衝波之週期中之H期間同步。或者,高頻電力HF之脈衝波之週期中之H期間亦可與電氣偏壓之脈衝波之週期中之H期間不同步。高頻電力HF之脈衝波之週期中之H期間之時間長既可與電氣偏壓之脈衝波之週期中之H期間之時間長相同,亦可不同。高頻電力HF之脈衝波之週期中之H期間之一 部分或全部亦可與電氣偏壓之脈衝波之週期中之H期間重疊。 Furthermore, the cycle of the pulse of the high-frequency power HF may be synchronized with the cycle of the pulse of the electrical bias. The H period in the cycle of the pulse of the high-frequency power HF may be synchronized with the H period in the cycle of the pulse of the electrical bias. Alternatively, the H period in the cycle of the pulse of the high-frequency power HF may be asynchronous with the H period in the cycle of the pulse of the electrical bias. The length of the H period in the cycle of the pulse of the high-frequency power HF may be the same as or different from the length of the H period in the cycle of the pulse of the electrical bias. One of the H periods in the cycle of the high-frequency power HF pulse wave Part or all of it may also overlap with the H period in the cycle of the electrical bias pulse wave.
圖2係表示高頻電力HF及電氣偏壓之一例之時序圖。圖2係高頻電力HF及電氣偏壓均使用脈衝波之例。於圖2中,橫軸表示時間。於圖2中,縱軸表示高頻電力HF及電氣偏壓之電力位準。高頻電力HF之「L1」表示未供給高頻電力HF或者低於以「H1」表示之電力位準。電氣偏壓之「L2」表示未供給電氣偏壓或者低於以「H2」表示之電力位準。於電氣偏壓為負極性之直流電壓之脈衝波之情形時,電氣偏壓之位準係負極性之直流電壓之絕對值之有效值。再者,圖2之高頻電力HF及電氣偏壓之電力位準之大小並不表示兩者之相對關係,可任意地設定。圖2係高頻電力HF之脈衝波之週期與電氣偏壓之脈衝波之週期同步且高頻電力HF之脈衝波之H期間及L期間之時間長與電氣偏壓之脈衝波之H期間及L期間之時間長相同之例。 FIG2 is a timing diagram showing an example of high-frequency power HF and an electrical bias. FIG2 is an example in which both high-frequency power HF and an electrical bias use pulse waves. In FIG2, the horizontal axis represents time. In FIG2, the vertical axis represents the power levels of the high-frequency power HF and the electrical bias. "L1" of the high-frequency power HF indicates that the high-frequency power HF is not supplied or is lower than the power level indicated by "H1". "L2" of the electrical bias indicates that the electrical bias is not supplied or is lower than the power level indicated by "H2". When the electrical bias is a pulse of a negative DC voltage, the level of the electrical bias is the effective value of the absolute value of the negative DC voltage. Furthermore, the magnitude of the power level of the high-frequency power HF and the electrical bias in Figure 2 does not represent the relative relationship between the two and can be set arbitrarily. Figure 2 is an example in which the cycle of the pulse of the high-frequency power HF is synchronized with the cycle of the pulse of the electrical bias and the duration of the H period and L period of the pulse of the high-frequency power HF is the same as the duration of the H period and L period of the pulse of the electrical bias.
返回至圖1繼續說明。基板處理裝置1進而具備電源70。電源70連接於上部電極30。於一例中,電源70可構成為於電漿處理中對上部電極30供給直流電壓或低頻電力。例如,電源70可對上部電極30供給負極性之直流電壓,亦可週期性地供給低頻電力。直流電壓或低頻電力可以脈衝波之形式供給,亦可以連續波之形式供給。於本實施方式中,存在於電漿處理空間10s內之正離子被饋入至上部電極30並與之發生碰撞。藉此,自上部電極30釋放二次電子。所釋放之二次電子將遮罩膜MK改質,使遮罩膜MK之耐蝕刻性提高。又,二次電子有助於提高電漿密度。又,藉由二次電子之照射而基板W之帶電狀態得以中和,因此,可提高離子朝藉由蝕刻所形成之凹部內之直進性。進而,於上部電極30包含含矽材料之情形時,藉由正離子之碰撞而矽與二次電子一起被釋放。所釋放之矽係與 電漿中之氧鍵結而形成為氧化矽化合物,並沈積於遮罩上而作為保護膜發揮功能。根據以上,藉由對上部電極30供給直流電壓或低頻電力,不僅改善選擇比,還可獲得抑制藉由蝕刻所形成之凹部處之形狀異常、改善蝕刻速率等效果。 Return to Figure 1 to continue the explanation. The substrate processing device 1 is further equipped with a power supply 70. The power supply 70 is connected to the upper electrode 30. In one example, the power supply 70 can be configured to supply a DC voltage or a low-frequency power to the upper electrode 30 during plasma processing. For example, the power supply 70 can supply a negative DC voltage to the upper electrode 30, or can periodically supply low-frequency power. The DC voltage or the low-frequency power can be supplied in the form of a pulse wave, or in the form of a continuous wave. In this embodiment, the positive ions existing in the plasma processing space within 10s are fed into the upper electrode 30 and collide with it. Thus, secondary electrons are released from the upper electrode 30. The released secondary electrons modify the mask film MK, thereby improving the etching resistance of the mask film MK. In addition, the secondary electrons help to increase the plasma density. In addition, the charged state of the substrate W is neutralized by the irradiation of the secondary electrons, thereby improving the straightness of the ions into the recess formed by etching. Furthermore, when the upper electrode 30 contains a silicon-containing material, silicon is released together with the secondary electrons by the collision of the positive ions. The released silicon bonds with the oxygen in the plasma to form a silicon oxide compound, and is deposited on the mask to function as a protective film. Based on the above, by supplying DC voltage or low-frequency power to the upper electrode 30, not only the selectivity is improved, but also the shape abnormality of the concave portion formed by etching and the etching rate can be suppressed and improved.
於基板處理裝置1中進行電漿處理之情形時,自氣體供給部向內部空間10s供給氣體。又,藉由供給高頻電力HF及/或電氣偏壓,於上部電極30與下部電極18之間生成高頻電場。所生成之高頻電場自內部空間10s中之氣體生成電漿。 When plasma processing is performed in the substrate processing device 1, gas is supplied from the gas supply unit to the internal space 10s. In addition, a high-frequency electric field is generated between the upper electrode 30 and the lower electrode 18 by supplying high-frequency power HF and/or electrical bias. The generated high-frequency electric field generates plasma from the gas in the internal space 10s.
基板處理裝置1可進而具備控制部80。控制部80可為具備處理器、記憶體等記憶部、輸入裝置、顯示裝置、信號之輸入輸出介面等之電腦。控制部80控制基板處理裝置1之各部。於控制部80,操作員可使用輸入裝置進行指令之輸入操作等,以對基板處理裝置1進行管理。又,於控制部80,可藉由顯示裝置使基板處理裝置1之運轉狀況可視化並加以顯示。進而,於記憶部儲存有控制程式及製程配方資料。控制程式由處理器執行,以於基板處理裝置1中執行各種處理。處理器執行控制程式,根據製程配方資料控制基板處理裝置1之各部。於一個例示性實施方式中,控制部80之一部分或全部可設置成基板處理裝置1之外部之裝置之構成之一部分。 The substrate processing apparatus 1 may further include a control unit 80. The control unit 80 may be a computer including a processor, a memory, an input device, a display device, a signal input/output interface, and the like. The control unit 80 controls each unit of the substrate processing apparatus 1. In the control unit 80, an operator may use an input device to input instructions, etc., to manage the substrate processing apparatus 1. Moreover, in the control unit 80, the operating status of the substrate processing apparatus 1 may be visualized and displayed by a display device. Furthermore, a control program and process recipe data are stored in the memory unit. The control program is executed by a processor to perform various processes in the substrate processing apparatus 1. The processor executes the control program to control each unit of the substrate processing apparatus 1 according to the process recipe data. In an exemplary embodiment, part or all of the control unit 80 may be configured as a part of a device external to the substrate processing device 1.
<基板處理系統PS之構成> <Composition of substrate processing system PS>
圖3係概略性地表示1個例示性實施方式之基板處理系統PS之圖。本處理方法亦可使用基板處理系統PS而執行。 FIG3 is a diagram schematically showing a substrate processing system PS of an exemplary implementation method. The present processing method can also be performed using the substrate processing system PS.
基板處理系統PS具有基板處理室PM1~PM6(以下,亦統稱為「基板處理模組PM」)、搬送模組TM、裝載閉鎖模組LLM1及 LLM2(以下,亦統稱為「裝載閉鎖模組LLM」)、承載器模組LM、及裝載埠LP1至LP3(以下,亦統稱為「裝載埠LP」)。控制部CT控制基板處理系統PS之各構成,對基板W執行特定處理。 The substrate processing system PS has substrate processing chambers PM1 to PM6 (hereinafter, collectively referred to as "substrate processing modules PM"), a transfer module TM, loading lock modules LLM1 and LLM2 (hereinafter, collectively referred to as "loading lock modules LLM"), a carrier module LM, and loading ports LP1 to LP3 (hereinafter, collectively referred to as "loading ports LP"). The control unit CT controls the components of the substrate processing system PS and performs specific processing on the substrate W.
基板處理模組PM係於其內部對基板W執行蝕刻處理、修整處理、成膜處理、退火處理、摻雜處理、微影處理、清洗處理、灰化處理等處理。基板處理模組PM之一部分可為測定模組,亦可測定形成於基板W上之膜之膜厚或形成於基板W上之圖案之尺寸等。圖1所示之基板處理裝置1係基板處理模組PM之一例。 The substrate processing module PM performs etching processing, trimming processing, film forming processing, annealing processing, doping processing, lithography processing, cleaning processing, ashing processing, etc. on the substrate W. A part of the substrate processing module PM can be a measurement module, and can also measure the film thickness of the film formed on the substrate W or the size of the pattern formed on the substrate W. The substrate processing device 1 shown in FIG. 1 is an example of the substrate processing module PM.
搬送模組TM具有搬送基板W之搬送裝置,於基板處理模組PM間或基板處理模組PM與裝載閉鎖模組LLM之間搬送基板W。基板處理模組PM及裝載閉鎖模組LLM係與搬送模組TM鄰接地配置。搬送模組TM與基板處理模組PM及裝載閉鎖模組LLM藉由可開閉之閘閥而於空間上隔離或連結。 The transport module TM has a transport device for transporting substrates W, and transports substrates W between substrate processing modules PM or between substrate processing module PM and loading lock module LLM. The substrate processing module PM and loading lock module LLM are arranged adjacent to the transport module TM. The transport module TM, substrate processing module PM and loading lock module LLM are spatially isolated or connected by an openable and closable gate.
裝載閉鎖模組LLM1及LLM2設置於搬送模組TM與承載器模組LM之間。裝載閉鎖模組LLM可將其內部之壓力切換成大氣壓或真空。裝載閉鎖模組LLM將基板W自為大氣壓之承載器模組LM搬送至為真空之搬送模組TM,又,自為真空之搬送模組TM搬送至為大氣壓之承載器模組LM。 The load lock module LLM1 and LLM2 are arranged between the transport module TM and the carrier module LM. The load lock module LLM can switch the pressure inside it to atmospheric pressure or vacuum. The load lock module LLM transports the substrate W from the carrier module LM with atmospheric pressure to the transport module TM with vacuum, and also transports it from the transport module TM with vacuum to the carrier module LM with atmospheric pressure.
承載器模組LM具有搬送基板W之搬送裝置,於裝載閉鎖模組LLM與裝載埠LP之間搬送基板W。裝載埠LP內之內部可供載置例如能夠收納25片基板W之FOUP(Front Opening Unified Pod,前開式晶圓傳送盒)或空的FOUP。承載器模組LM自裝載埠LP內之FOUP取出基板W,並搬送至裝載閉鎖模組LLM。又,承載器模組LM自裝載閉鎖模組LLM取 出基板W,並搬送至裝載埠LP內之FOUP。 The carrier module LM has a transfer device for transferring substrates W, and transfers substrates W between the loading lock module LLM and the loading port LP. The interior of the loading port LP can be used to load, for example, a FOUP (Front Opening Unified Pod) that can accommodate 25 substrates W or an empty FOUP. The carrier module LM takes out the substrate W from the FOUP in the loading port LP and transfers it to the loading lock module LLM. In addition, the carrier module LM takes out the substrate W from the loading lock module LLM and transfers it to the FOUP in the loading port LP.
控制部CT控制基板處理系統PS之各構成,對基板W執行特定處理。控制部CT儲存有設定有製程之步序、製程之條件、搬送條件等之製程配方,根據該製程配方控制基板處理系統PS之各構成,以對基板W執行特定處理。控制部CT亦可兼具圖1所示之基板處理裝置1之控制部80之一部分或全部之功能。 The control unit CT controls the components of the substrate processing system PS to perform specific processing on the substrate W. The control unit CT stores a process recipe that sets the process steps, process conditions, and transport conditions, and controls the components of the substrate processing system PS according to the process recipe to perform specific processing on the substrate W. The control unit CT can also have part or all of the functions of the control unit 80 of the substrate processing device 1 shown in Figure 1.
<基板W之一例> <An example of substrate W>
圖4係表示基板W之剖面構造之一例之圖。基板W係可應用本處理方法之基板之一例。基板W具有介電膜DF。基板W可具有基底膜UF及遮罩膜MK。如圖4所示,基板W可將基底膜UF、介電膜DF及遮罩膜MK依序積層而形成。 FIG. 4 is a diagram showing an example of a cross-sectional structure of a substrate W. Substrate W is an example of a substrate to which the present processing method can be applied. Substrate W has a dielectric film DF. Substrate W can have a base film UF and a mask film MK. As shown in FIG. 4 , substrate W can be formed by sequentially laminating a base film UF, a dielectric film DF, and a mask film MK.
基底膜UF例如可為矽晶圓或形成於矽晶圓上之有機膜、介電膜、金屬膜、半導體膜等。基底膜UF可由複數個膜積層而構成。 The base film UF may be, for example, a silicon wafer or an organic film, a dielectric film, a metal film, a semiconductor film, etc. formed on a silicon wafer. The base film UF may be composed of a plurality of film layers.
介電膜DF可為含矽膜。含矽膜例如為氧化矽膜、氮化矽膜、氮氧化矽膜(SiON膜)、Si-ARC膜。介電膜DF可包含多晶矽膜。介電膜DF可由複數個膜積層而構成。例如,介電膜DF可由氧化矽膜與多晶矽膜交替地積層而構成。於一例中,介電膜DF係由氧化矽膜與氮化矽膜交替地積層所得之積層膜。 The dielectric film DF may be a silicon-containing film. The silicon-containing film may be, for example, a silicon oxide film, a silicon nitride film, a silicon oxynitride film (SiON film), or a Si-ARC film. The dielectric film DF may include a polysilicon film. The dielectric film DF may be formed by a plurality of film stacks. For example, the dielectric film DF may be formed by alternately stacking a silicon oxide film and a polysilicon film. In one example, the dielectric film DF is a stacked film obtained by alternately stacking a silicon oxide film and a silicon nitride film.
基底膜UF及/或介電膜DF可利用CVD(Chemical Vapor Deposition,化學氣相沈積)法、旋轉塗佈法等形成。基底膜UF及/或介電膜DF可為平坦之膜,又,亦可為具有凹凸之膜。 The base film UF and/or the dielectric film DF can be formed by CVD (Chemical Vapor Deposition) method, spin coating method, etc. The base film UF and/or the dielectric film DF can be a flat film or a film with concave and convex surfaces.
遮罩膜MK形成於介電膜DF上。遮罩膜MK於介電膜DF上規定至少1個開口OP。開口OP係介電膜DF上之空間,且由遮罩膜MK之 側壁S1包圍。即,於圖4中,介電膜DF具有由遮罩膜MK覆蓋之區域、及於開口OP之底部露出之區域。 The mask film MK is formed on the dielectric film DF. The mask film MK defines at least one opening OP on the dielectric film DF. The opening OP is a space on the dielectric film DF and is surrounded by the side wall S1 of the mask film MK. That is, in FIG. 4 , the dielectric film DF has an area covered by the mask film MK and an area exposed at the bottom of the opening OP.
開口OP於俯視基板W時(於圖4之自上往下之方向上觀察基板W時),可具有任意之形狀。該形狀例如可為孔形狀或線形狀、孔形狀與線形狀之組合。遮罩膜MK亦可具有複數個側壁S1,且由複數個側壁S1規定複數個開口OP。複數個開口OP亦可分別具有線形狀,且以固定間隔排列而構成線與間隙圖案。又,複數個開口OP亦可分別具有孔形狀,且構成陣列圖案。 The opening OP may have any shape when the substrate W is viewed from above (when the substrate W is viewed from top to bottom in FIG. 4 ). The shape may be, for example, a hole shape, a line shape, or a combination of a hole shape and a line shape. The mask film MK may also have a plurality of side walls S1, and a plurality of openings OP are defined by the plurality of side walls S1. The plurality of openings OP may also have a line shape, and be arranged at fixed intervals to form a line and space pattern. Furthermore, the plurality of openings OP may also have a hole shape, and form an array pattern.
遮罩膜MK例如為有機膜或含金屬膜。有機膜例如可為旋塗式碳膜(SOC)、非晶形碳膜、光阻膜。含金屬膜例如可包含鎢、碳化鎢、氮化鈦。遮罩膜MK可利用CVD法、旋轉塗佈法等形成。開口OP可藉由對遮罩膜MK進行蝕刻而形成。遮罩膜MK亦可藉由微影術而形成。 The mask film MK is, for example, an organic film or a metal-containing film. The organic film may be, for example, a spin-on carbon film (SOC), an amorphous carbon film, or a photoresist film. The metal-containing film may include, for example, tungsten, tungsten carbide, or titanium nitride. The mask film MK may be formed by CVD, spin coating, or the like. The opening OP may be formed by etching the mask film MK. The mask film MK may also be formed by lithography.
於一例中,基板W可於基底膜UF上具有由氧化矽膜與氮化矽膜積層所得之積層膜作為介電膜DF。又,於一例中,基板W可於該氮化矽膜上具有多晶矽膜、硼化矽或碳化鎢作為遮罩膜MK。又,遮罩膜MK可為包含多晶矽膜、硼化矽或碳化鎢之多層抗蝕劑。於一例中,該多層抗蝕劑於多晶矽膜上具有包含硬質遮罩之遮罩。於一例中,硬質遮罩具有氧化矽膜(TEOS(tetraethoxysilane,四乙氧基矽烷)膜)。該積層膜中包含之氮化矽膜可將硬質遮罩作為遮罩而進行蝕刻,又,該積層膜中包含之氧化矽膜可將多晶矽膜作為遮罩而進行蝕刻。 In one example, the substrate W may have a laminated film obtained by laminating a silicon oxide film and a silicon nitride film on the base film UF as a dielectric film DF. In another example, the substrate W may have a polycrystalline silicon film, silicon boride or tungsten carbide as a mask film MK on the silicon nitride film. In another example, the mask film MK may be a multilayer anti-etching agent including a polycrystalline silicon film, silicon boride or tungsten carbide. In one example, the multilayer anti-etching agent has a mask including a hard mask on the polycrystalline silicon film. In one example, the hard mask has a silicon oxide film (TEOS (tetraethoxysilane) film). The silicon nitride film included in the laminated film can be etched using the hard mask as a mask, and the silicon oxide film included in the laminated film can be etched using the polysilicon film as a mask.
<本處理方法之一例> <An example of this treatment method>
圖5係表示本處理方法之流程圖。本處理方法包含準備基板之工序(步驟ST1)、及蝕刻工序(步驟ST2)。以下,以圖1所示之控制部80控制基 板處理裝置1之各部而對圖4所示之基板W執行本處理方法之情形為例進行說明。 FIG5 is a flow chart showing the processing method. The processing method includes a process of preparing a substrate (step ST1) and an etching process (step ST2). Hereinafter, the processing method is described by taking the control unit 80 shown in FIG1 to control each part of the substrate processing device 1 and executing the processing method on the substrate W shown in FIG4 as an example.
(步驟ST1:基板之準備) (Step ST1: Preparation of substrate)
於步驟ST1中,於腔室10之內部空間10s內準備基板W。於內部空間10s內,基板W配置於基板支持器14之上表面,並由靜電吸盤20保持。形成基板W之各構成之製程之至少一部分可於內部空間10s內進行。又,亦可在基板W之各構成之全部或一部分於基板處理裝置1之外部之裝置或腔室內形成之後,將基板W搬入至內部空間10s內,並配置於基板支持器14之上表面。 In step ST1, a substrate W is prepared in the inner space 10s of the chamber 10. In the inner space 10s, the substrate W is arranged on the upper surface of the substrate holder 14 and is held by the electrostatic chuck 20. At least a part of the process of forming each component of the substrate W can be performed in the inner space 10s. In addition, after all or part of each component of the substrate W is formed in a device or chamber outside the substrate processing device 1, the substrate W can be moved into the inner space 10s and arranged on the upper surface of the substrate holder 14.
(步驟ST2:蝕刻工序) (Step ST2: Etching process)
於步驟ST2中,執行基板W之介電膜DF之蝕刻。步驟ST2包含供給處理氣體之工序(步驟ST21)、及生成電漿之工序(步驟ST22)。藉由自處理氣體生成之電漿之活性種(離子、自由基),對介電膜DF進行蝕刻。 In step ST2, etching of the dielectric film DF of the substrate W is performed. Step ST2 includes a process of supplying a processing gas (step ST21) and a process of generating plasma (step ST22). The dielectric film DF is etched by active species (ions, free radicals) of the plasma generated from the processing gas.
於步驟ST21中,自氣體供給部向內部空間10s內供給處理氣體。處理氣體包含含有含氟氣體及CxHyFz(係與上述之含氟氣體不同之氣體,x為2以上之整數,y及z為1以上之整數)氣體(以下,亦將該氣體稱為「CxHyFz氣體」)之反應氣體。於本實施方式中,除非另有記載,否則反應氣體中不包含Ar等高貴氣體。 In step ST21, a processing gas is supplied from the gas supply unit into the inner space for 10 seconds. The processing gas includes a reaction gas containing a fluorine- containing gas and a CxHyFz ( a gas different from the above-mentioned fluorine-containing gas, x is an integer greater than 2, and y and z are integers greater than 1) gas (hereinafter, the gas is also referred to as " CxHyFz gas "). In this embodiment, unless otherwise stated, the reaction gas does not contain noble gases such as Ar.
含氟氣體可為能夠於電漿處理中在腔室10內生成氟化氫(HF)物種之氣體。HF物種包含氟化氫之氣體、自由基及離子之至少任一種。於一例中,含氟氣體可為HF氣體或氫氟碳氣體。又,含氟氣體亦可為包含氫源及氟源之混合氣體。氫源例如可為H2、NH3、H2O、H2O2或烴(CH4、C3H6等)。氟源可為NF3、SF6、WF6、XeF2、氟碳或氫氟碳。以 下,亦將該等含氟氣體稱為「HF系氣體」。自包含HF系氣體之處理氣體生成之電漿包含大量HF物種(蝕刻劑)。HF系氣體之流量可多於CxHyFz氣體之流量。HF系氣體亦可為主蝕刻劑氣體。HF系氣體於反應氣體之總流量中所占之流量比率可為最大,例如,相對於反應氣體之總流量可為70體積%以上。又,HF系氣體相對於反應氣體之總流量可為96體積%以下。 The fluorine-containing gas may be a gas capable of generating hydrogen fluoride (HF) species in the chamber 10 during plasma processing. The HF species includes at least one of hydrogen fluoride gas, free radicals, and ions. In one example, the fluorine-containing gas may be HF gas or hydrofluorocarbon gas. In addition, the fluorine-containing gas may also be a mixed gas including a hydrogen source and a fluorine source. The hydrogen source may be, for example, H 2 , NH 3 , H 2 O, H 2 O 2 or hydrocarbons (CH 4 , C 3 H 6 , etc.). The fluorine source may be NF 3 , SF 6 , WF 6 , XeF 2 , fluorocarbon or hydrofluorocarbon. Hereinafter, these fluorine-containing gases are also referred to as "HF-based gases". The plasma generated from the process gas containing HF system gas contains a large amount of HF species (etchant). The flow rate of HF system gas can be greater than the flow rate of C x H y F z gas. HF system gas can also be the main etchant gas. The flow rate ratio of HF system gas in the total flow rate of reaction gas can be the largest, for example, it can be more than 70 volume % relative to the total flow rate of reaction gas. In addition, the flow rate of HF system gas relative to the total flow rate of reaction gas can be less than 96 volume %.
CxHyFz氣體例如可使用CxHyFz(x為2以上之整數,y及z為1以上之整數)氣體。作為CxHyFz(x為2以上之整數,y及z為1以上之整數)氣體,具體而言,可使用選自由C2HF5氣體、C2H2F4氣體、C2H3F3氣體、C2H4F2氣體、C3HF7氣體、C3H2F2氣體、C3H2F4氣體、C3H2F6氣體、C3H3F5氣體、C4H2F6氣體、C4H5F5氣體、C4H2F8氣體、C5H2F6氣體、C5H2F10氣體及C5H3F7氣體所組成之群中之至少1種。於一例中,作為CxHyFz氣體,使用選自由C3H2F4氣體、C3H2F6氣體、C4H2F6氣體及C4H2F8氣體所組成之群中之至少1種。於另一例中,作為CxHyFz氣體,使用選自由C3H2F4氣體、C3H2F6氣體、C4H2F6氣體、C4H2F8氣體及C5H2F6氣體所組成之群中之至少1種。作為CxHyFz氣體,例如使用C4H2F6氣體時,C4H2F6可為直鏈狀,亦可為環狀。 As the CxHyFz gas , for example , CxHyFz (x is an integer greater than or equal to 2, and y and z are integers greater than or equal to 1) gas can be used. As the CxHyFz (x is an integer greater than or equal to 2, and y and z are integers greater than or equal to 1) gas, specifically, at least one gas selected from the group consisting of C2HF5 gas, C2H2F4 gas , C2H3F3 gas , C2H4F2 gas , C3HF7 gas , C3H2F2 gas , C3H2F4 gas , C3H2F6 gas , C3H3F5 gas , C4H2F6 gas , C4H5F5 gas, C4H2F8 gas , C5H2F6 gas , C5H2F10 gas and C5H3F7 gas can be used . In one example, as the CxHyFz gas , at least one selected from the group consisting of C3H2F4 gas, C3H2F6 gas , C4H2F6 gas , and C4H2F8 gas is used . In another example, as the CxHyFz gas, at least one selected from the group consisting of C3H2F4 gas, C3H2F6 gas , C4H2F6 gas , C4H2F8 gas , and C5H2F6 gas is used . When C4H2F6 gas is used as the CxHyFz gas , for example, C4H2F6 may be in a linear chain or a ring shape .
自包含CxHyFz氣體之處理氣體生成之電漿中包含自CxHyFz氣體解離之CxHyFz物種。於該CxHyFz物種中包含大量的含有2個以上之碳原子之CxHyFz自由基(例如,C2H2F自由基、C2H2F2自由基、C3HF3自由基,以下稱為「CxHyFz系自由基」)。CxHyFz自由基係於遮罩膜MK之表面形成保護該表面之保護膜。該保護膜可抑制介電膜DF之蝕刻時的遮罩膜MK之蝕刻。因此,CxHyFz系自由基可於介電膜DF之蝕刻中提高介電膜DF相對於遮罩膜MK之選擇比(係將介電膜DF之蝕刻速率除以遮罩膜MK之 蝕刻速率所得之值)。 The plasma generated from the processing gas containing CxHyFz gas contains CxHyFz species dissociated from the CxHyFz gas . The CxHyFz species contain a large number of CxHyFz radicals containing two or more carbon atoms (for example, C2H2F radicals , C2H2F2 radicals, C3HF3 radicals , hereinafter referred to as " CxHyFz - based radicals ") . The CxHyFz radicals form a protective film on the surface of the mask film MK to protect the surface. The protective film can suppress the etching of the mask film MK when the dielectric film DF is etched. Therefore, the CxHyFz radicals can improve the selectivity of the dielectric film DF with respect to the mask film MK in etching the dielectric film DF (the value obtained by dividing the etching rate of the dielectric film DF by the etching rate of the mask film MK).
又,自包含CxHyFz氣體之處理氣體生成之電漿中包含大量的自CxHyFz氣體解離及/或自CxHyFz系自由基進一步解離之HF物種。HF物種包含氟化氫之氣體、自由基及離子之至少任一種。HF物種作為介電膜DF之蝕刻劑發揮功能。藉由在電漿中包含大量HF物種,而可提高介電膜DF之蝕刻速率。 In addition, the plasma generated from the treatment gas containing CxHyFz gas contains a large amount of HF species that are dissociated from the CxHyFz gas and/or further dissociated from CxHyFz -based radicals. The HF species contains at least any one of hydrogen fluoride gas , radicals, and ions. The HF species functions as an etchant for the dielectric film DF. By including a large amount of HF species in the plasma, the etching rate of the dielectric film DF can be increased.
CxHyFz氣體可具有1個以上之CF3基。於CxHyFz氣體具有CF3基之情形時,例如於CH基與CF3基形成單鍵之情形時,藉由其分子構造而容易解離成HF,從而可於電漿中使HF物種增加。 The CxHyFz gas may have one or more CF3 groups . When the CxHyFz gas has a CF3 group, for example, when a CH group and a CF3 group form a single bond, it is easily dissociated into HF due to its molecular structure, thereby increasing HF species in the plasma.
再者,處理氣體可包含CxFz(x為2以上之整數,z為1以上之整數)氣體而代替上述CxHyFz氣體之一部分或全部。具體而言,亦可使用選自由C2F2、C2F4、C3F8、C4F6、C4F8及C5F8所組成之群中之至少1種。藉此,可抑制電漿中之氫之量,例如,可抑制因過多之氫所引起之形態變差或腔室10內之水分增加等。此處,所謂形態係指遮罩膜MK之表面狀態、開口OP之真圓度等與遮罩之形狀相關之特性。 Furthermore, the processing gas may include CxFz (x is an integer greater than or equal to 2, and z is an integer greater than or equal to 1 ) gas instead of part or all of the CxHyFz gas. Specifically, at least one selected from the group consisting of C2F2 , C2F4 , C3F8 , C4F6 , C4F8 , and C5F8 may be used. In this way, the amount of hydrogen in the plasma can be suppressed, for example, the morphological deterioration caused by excessive hydrogen or the increase of moisture in the chamber 10 can be suppressed. Here, the so-called morphology refers to the surface state of the mask film MK, the roundness of the opening OP, and other characteristics related to the shape of the mask.
CxHyFz氣體之流量相對於反應氣體之總流量為20體積%以下。CxHyFz氣體之流量相對於反應氣體之總流量,例如亦可為15體積%以下、10體積%以下、5體積%以下。 The flow rate of the C x H y F z gas is 20 volume % or less relative to the total flow rate of the reaction gas. The flow rate of the C x H y F z gas may be, for example, 15 volume % or less, 10 volume % or less, or 5 volume % or less relative to the total flow rate of the reaction gas.
反應氣體可包含含有鹵素之氣體。含有鹵素之氣體可調整蝕刻時之遮罩膜MK或介電膜DF之形狀。含有鹵素之氣體可為含氯氣體、含溴氣體及/或含碘氣體。作為含氯氣體,可使用Cl2、SiCl2、SiCl4、CCl4、SiH2Cl2、Si2Cl6、CHCl3、SO2Cl2、BCl3、PCl3、PCl5、POCl3等氣體。作為含溴氣體,可使用Br2、HBr、CBr2F2、C2F5Br、PBr3、 PBr5、POBr3、BBr3等氣體。作為含碘氣體,可使用HI、CF3I、C2F5I、C3F7I、IF5、IF7、I2、PI3等氣體。於一例中,作為含有鹵素之氣體,使用選自由Cl2氣體、Br2氣體、HBr氣體、CF3I氣體、IF7氣體及C2F5Br所組成之群中之至少1種。於另一例中,作為含有鹵素之氣體,使用Cl2氣體及HBr氣體。 The reaction gas may include a halogen-containing gas. The halogen-containing gas can adjust the shape of the mask film MK or the dielectric film DF during etching. The halogen-containing gas may be a chlorine-containing gas, a bromine-containing gas and/or an iodine-containing gas. As the chlorine-containing gas, gases such as Cl 2 , SiCl 2 , SiCl 4 , CCl 4 , SiH 2 Cl 2 , Si 2 Cl 6 , CHCl 3 , SO 2 Cl 2 , BCl 3 , PCl 3 , PCl 5 , POCl 3 and the like may be used. As the bromine-containing gas, gases such as Br 2 , HBr, CBr 2 F 2 , C 2 F 5 Br, PBr 3 , PBr 5 , POBr 3 , BBr 3 and the like may be used. As the iodine-containing gas, HI, CF3I , C2F5I , C3F7I , IF5 , IF7 , I2 , PI3 and the like can be used. In one example, as the halogen-containing gas, at least one selected from the group consisting of Cl2 gas, Br2 gas, HBr gas, CF3I gas, IF7 gas and C2F5Br gas is used . In another example, as the halogen-containing gas, Cl2 gas and HBr gas are used.
反應氣體亦可包含含氮氣體。含氮氣體可抑制蝕刻時之遮罩膜MK之開口OP之堵塞。含氮氣體例如可為選自由NF3氣體、N2氣體及NH3氣體所組成之群中之至少1種氣體。 The reaction gas may also include a nitrogen-containing gas. The nitrogen-containing gas can suppress the clogging of the opening OP of the mask film MK during etching. The nitrogen-containing gas may be, for example, at least one gas selected from the group consisting of NF 3 gas, N 2 gas, and NH 3 gas.
反應氣體可包含含氧氣體。與含氮氣體同樣地,含氧氣體可抑制蝕刻時之遮罩膜MK之堵塞。作為含氧氣體,例如可使用選自由O2、CO、CO2、H2O及H2O2所組成之群中之至少1種氣體。於一例中,反應氣體包含H2O以外之含氧氣體、即選自由O2、CO、CO2及H2O2所組成之群中之至少1種氣體。含氧氣體對遮罩膜MK之損傷較少,可抑制形態變差。 The reaction gas may include an oxygen-containing gas. As with the nitrogen-containing gas, the oxygen-containing gas can suppress clogging of the mask film MK during etching. As the oxygen-containing gas, for example, at least one gas selected from the group consisting of O2 , CO, CO2 , H2O , and H2O2 can be used. In one example, the reaction gas includes an oxygen-containing gas other than H2O , that is, at least one gas selected from the group consisting of O2 , CO , CO2 , and H2O2 . The oxygen-containing gas causes less damage to the mask film MK, and can suppress morphological degradation.
圖6係表示蝕刻後之遮罩膜MK之形狀之一例之圖。圖6係於基板處理裝置1中對具有與基板W相同之構造之樣品基板進行蝕刻時之遮罩膜MK之形狀(俯視)之一例。於圖6中,「No.」表示蝕刻後之樣品基板之試樣編號。「處理氣體」表示蝕刻時所使用之處理氣體,「A」表示包含HF氣體、C4H2F6氣體、O2氣體、NF3氣體、HBr氣體及Cl2氣體之處理氣體(以下稱為「處理氣體A」)。處理氣體A包含相對於反應氣體之總流量為80體積%以上的HF氣體,且包含相對於反應氣體之總流量為4~5體積%的O2氣體。「處理氣體」之「B」表示不含NF3氣體且相應地使O2氣體之流量增加,除此以外與處理氣體A相同之處理氣體(以下稱為「處理氣體 B」)。處理氣體B包含相對於反應氣體之總流量為6~7體積%的O2氣體。「上部電極施加」之「有」表示於蝕刻中對基板處理裝置1之上部電極30供給負極性之直流電壓,「無」表示不對上部電極30供給負極性之直流電壓。根據圖6之「遮罩形狀」可知,於「上部電極施加」之「有」之情形及「無」之情形時,使用包含NF3之處理氣體A時(試樣1及試樣3),開口OP之真圓度均會變差以及均會於遮罩膜MK之表面產生階差。另一方面,可知使用不含NF3氣體且O2氣體之流量增加之處理氣體B時(試樣2及試樣4),開口OP之真圓度較高,又,不會於遮罩膜MK之表面產生階差,與使用處理氣體A時(試樣1及試樣3)相比,遮罩膜MK之形態得以改善。 FIG. 6 is a diagram showing an example of the shape of the mask film MK after etching. FIG. 6 is an example of the shape of the mask film MK (top view) when etching a sample substrate having the same structure as the substrate W in the substrate processing device 1. In FIG. 6, "No." indicates the sample number of the sample substrate after etching. "Processing gas" indicates the processing gas used during etching, and "A" indicates a processing gas including HF gas, C4H2F6 gas , O2 gas, NF3 gas, HBr gas and Cl2 gas (hereinafter referred to as "processing gas A"). Processing gas A includes HF gas of 80 volume % or more relative to the total flow rate of the reaction gas, and includes O2 gas of 4 to 5 volume % relative to the total flow rate of the reaction gas. "B" of "processing gas" indicates a processing gas that is the same as processing gas A except that NF 3 gas is not contained and the flow rate of O 2 gas is increased accordingly (hereinafter referred to as "processing gas B"). Processing gas B contains 6-7 volume % of O 2 gas relative to the total flow rate of the reaction gas. "Yes" of "upper electrode application" indicates that a negative polarity DC voltage is supplied to the upper electrode 30 of the substrate processing device 1 during etching, and "No" indicates that a negative polarity DC voltage is not supplied to the upper electrode 30. According to the "mask shape" in Figure 6, in the "yes" and "no" cases of "upper electrode application", when the treatment gas A containing NF 3 is used (samples 1 and 3), the true roundness of the opening OP will deteriorate and a step difference will be generated on the surface of the mask film MK. On the other hand, when the treatment gas B containing no NF 3 gas and with an increased flow rate of O 2 gas is used (samples 2 and 4), the true roundness of the opening OP is higher, and no step difference will be generated on the surface of the mask film MK. Compared with the case of using the treatment gas A (samples 1 and 3), the morphology of the mask film MK is improved.
反應氣體可包含含磷氣體。作為含磷氣體,例如,可使用選自由PF3、PF5、POF3、HPF6、PCl3、PCl5、POCl3、PBr3、PBr5、POBr3、PI3、P4O10、P4O8、P4O6、PH3、Ca3P2、H3PO4及Na3PO4所組成之群中之至少1種氣體。該等之中,可使用PF3、PF5、PCl3等含鹵化磷之氣體,例如亦可使用PF3、PF5等含氟化磷之氣體。 The reaction gas may include a phosphorus-containing gas. As the phosphorus-containing gas, for example, at least one gas selected from the group consisting of PF3 , PF5 , POF3 , HPF6, PCl3 , PCl5 , POCl3 , PBr3 , PBr5 , POBr3 , PI3 , P4O10 , P4O8 , P4O6 , PH3 , Ca3P2 , H3PO4 , and Na3PO4 may be used. Among them, gases containing phosphorus halides such as PF3 , PF5 , and PCl3 may be used , and gases containing phosphorus fluorides such as PF3 and PF5 may also be used.
除此以外,處理氣體亦可包含BF3、BCl3、BBr3、B2H6等含硼氣體。又,處理氣體亦可包含SF6及COS等含硫氣體。 In addition, the processing gas may also include boron-containing gases such as BF 3 , BCl 3 , BBr 3 , B 2 H 6 , etc. Furthermore, the processing gas may also include sulfur-containing gases such as SF 6 and COS.
處理氣體可除了上述反應氣體以外,還包含惰性氣體(Ar等高貴氣體)。 In addition to the above-mentioned reaction gases, the processing gas may also include inert gas (noble gas such as Ar).
供給至內部空間10s內之處理氣體之壓力藉由控制連接於腔室本體12之排氣裝置50之壓力調整閥而調整。處理氣體之壓力例如可為5mTorr(0.7Pa)以上100mTorr(13.3Pa)以下、10mTorr(1.3Pa)以上60mTorr(8.0Pa)以下或20mTorr(2.7Pa)以上40mTorr(5.3Pa)以下。 The pressure of the process gas supplied to the internal space within 10s is adjusted by controlling the pressure regulating valve of the exhaust device 50 connected to the chamber body 12. The pressure of the process gas can be, for example, 5mTorr (0.7Pa) to 100mTorr (13.3Pa), 10mTorr (1.3Pa) to 60mTorr (8.0Pa), or 20mTorr (2.7Pa) to 40mTorr (5.3Pa).
繼而,於步驟ST22中,自電漿生成部(高頻電源62及/或偏 壓電源64)供給高頻電力及/或電氣偏壓。藉此,於上部電極30與基板支持器14之間生成高頻電場,自內部空間10s內之處理氣體生成電漿。所生成之電漿中之離子、自由基等活性種被基板W吸引而對基板W進行蝕刻。 Then, in step ST22, high-frequency power and/or electrical bias are supplied from the plasma generating unit (high-frequency power source 62 and/or bias power source 64). Thus, a high-frequency electric field is generated between the upper electrode 30 and the substrate support 14, and plasma is generated from the processing gas in the internal space 10s. Active species such as ions and free radicals in the generated plasma are attracted to the substrate W and the substrate W is etched.
於步驟ST22中,基板支持器14之溫度設定為0℃以下。設定之基板支持器14之溫度例如可為0℃以下,亦可為-10℃以下、-20℃以下、-30℃以下或-40℃以下、-60℃以下、-70℃以下。基板支持器14之溫度可藉由自冷卻器單元供給之熱交換介質而調整。 In step ST22, the temperature of the substrate support 14 is set to be below 0°C. The set temperature of the substrate support 14 may be, for example, below 0°C, below -10°C, below -20°C, below -30°C, below -40°C, below -60°C, or below -70°C. The temperature of the substrate support 14 may be adjusted by the heat exchange medium supplied from the cooling unit.
圖7係表示蝕刻之溫度依存性之一例之圖。圖7表示使用電漿處理裝置1自為氟化氫氣體及氬氣之混合氣體之處理氣體生成電漿而對氧化矽膜進行蝕刻所得的實驗結果。於該實驗中,一面變更基板支持器14之溫度,一面對氧化矽膜進行蝕刻,使用四極質譜儀(quadrupole mass analyzer),測定氧化矽膜之蝕刻時之氣相中之氟化氫(HF)之量與SiF3之量。圖7之橫軸表示基板支持器14之溫度T(℃),縱軸表示氟化氫(HF)及SiF3之量(以氦為基準標準化所得之強度)。 FIG7 is a diagram showing an example of the temperature dependence of etching. FIG7 shows the experimental results obtained by etching a silicon oxide film using a plasma processing device 1 to generate plasma from a processing gas that is a mixed gas of hydrogen fluoride gas and argon gas. In this experiment, the silicon oxide film is etched while changing the temperature of the substrate holder 14, and a quadrupole mass analyzer is used to measure the amount of hydrogen fluoride (HF) and the amount of SiF 3 in the gas phase during the etching of the silicon oxide film. The horizontal axis of FIG7 represents the temperature T (°C) of the substrate holder 14, and the vertical axis represents the amount of hydrogen fluoride (HF) and SiF 3 (intensity standardized with helium as the reference).
如圖7所示,於基板支持器14之溫度為約-60℃以下之溫度時,作為蝕刻劑之氟化氫(HF)之量減少,藉由氧化矽膜之蝕刻所生成之反應產物即SiF3之量增加。即,於該實驗中,於基板支持器14之溫度為約-60℃以下之溫度時,於氧化矽膜之蝕刻中利用之蝕刻劑之量增加。 As shown in Fig. 7, when the temperature of the substrate holder 14 is about -60°C or lower, the amount of hydrogen fluoride (HF) as an etchant decreases, and the amount of SiF3 , a reaction product generated by etching the silicon oxide film, increases. That is, in this experiment, when the temperature of the substrate holder 14 is about -60°C or lower, the amount of the etchant used in etching the silicon oxide film increases.
因此,根據該實驗可知,基板支持器14之溫度越低,則越促進氧化矽膜之蝕刻,因此,可改善介電膜DF相對於遮罩膜MK之選擇比。再者,蝕刻劑之量增加之溫度根據與反應氣體中之氟化氫氣體之流量比或添加氣體等處理條件之關係而變動。因此,亦可於特定條件下調查基板支持器14之溫度與氟化氫之量及SiF3之量之關係,基於其結果而設定基 板支持器14之溫度。 Therefore, according to the experiment, the lower the temperature of the substrate holder 14 is, the more the etching of the silicon oxide film is promoted, and therefore, the selectivity of the dielectric film DF to the mask film MK can be improved. Furthermore, the temperature at which the amount of the etchant is increased varies according to the relationship with the flow ratio of the hydrogen fluoride gas in the reaction gas or the processing conditions such as the added gas. Therefore, the relationship between the temperature of the substrate holder 14 and the amount of hydrogen fluoride and the amount of SiF3 can also be investigated under specific conditions, and the temperature of the substrate holder 14 can be set based on the results.
圖8係表示步驟ST22中之基板W之剖面構造之一例之圖。執行步驟ST22時,遮罩膜MK作為遮罩發揮功能,介電膜DF中與遮罩膜MK之開口OP對應之部分於深度方向(圖8中自上往下之方向)上被蝕刻,而形成凹部RC。凹部RC係由遮罩膜MK之側壁S1與介電膜DF之側壁S2所包圍之空間。步驟ST22中形成之凹部RC之縱橫比可為20以上,亦可為30以上、40以上、50以上或100以上。 FIG8 is a diagram showing an example of the cross-sectional structure of the substrate W in step ST22. When executing step ST22, the mask film MK functions as a mask, and the portion of the dielectric film DF corresponding to the opening OP of the mask film MK is etched in the depth direction (the direction from top to bottom in FIG8) to form a recess RC. The recess RC is a space surrounded by the side wall S1 of the mask film MK and the side wall S2 of the dielectric film DF. The aspect ratio of the recess RC formed in step ST22 can be greater than 20, or greater than 30, greater than 40, greater than 50, or greater than 100.
於本處理方法中,反應氣體包含CxHyFz氣體。CxHyFz氣體於電漿中以高密度生成CxHyFz系自由基。CxHyFz系自由基吸附於遮罩膜MK之表面(上表面T1及側壁S1)或介電膜DF之側壁S2而形成保護膜PF。再者,保護膜PF可朝向深度方向(圖8中自上往下之方向)變薄。保護膜PF抑制於執行步驟ST22時遮罩膜MK之表面被蝕刻去除(即,遮罩膜MK之蝕刻速率增加)。藉此,介電膜DF相對於遮罩膜MK之選擇比提高。 In the present treatment method, the reaction gas includes CxHyFz gas . CxHyFz gas generates CxHyFz -based free radicals at high density in plasma. CxHyFz -based free radicals are adsorbed on the surface (upper surface T1 and side wall S1 ) of the mask film MK or the side wall S2 of the dielectric film DF to form a protective film PF. Furthermore, the protective film PF can be thinned toward the depth direction (the direction from top to bottom in FIG. 8). The protective film PF inhibits the surface of the mask film MK from being etched away when performing step ST22 (i.e., the etching rate of the mask film MK is increased). Thereby, the selectivity of the dielectric film DF relative to the mask film MK is improved.
保護膜PF可抑制介電膜DF之橫向(圖8之左右方向)之蝕刻。於CxHyFz氣體之流量相對於反應氣體之總流量為20體積%以下之情形時,可進一步抑制碳過度沈積於遮罩膜MK之側壁S1及/或介電膜DF而導致遮罩膜MK之開口OP堵塞。於反應氣體包含含氧氣體之情形時,可進一步抑制碳過度沈積於遮罩膜MK之側壁S1及/或介電膜DF而導致遮罩膜MK之開口OP堵塞。藉由以上之至少一個因素,可適當地保持形成於介電膜DF之凹部RC之形狀及/或尺寸。 The protective film PF can suppress the lateral etching (left and right direction of FIG. 8 ) of the dielectric film DF. When the flow rate of the CxHyFz gas is less than 20 volume % relative to the total flow rate of the reaction gas , excessive deposition of carbon on the side wall S1 of the mask film MK and/or the dielectric film DF, which causes clogging of the opening OP of the mask film MK, can be further suppressed. When the reaction gas contains an oxygen-containing gas, excessive deposition of carbon on the side wall S1 of the mask film MK and/or the dielectric film DF, which causes clogging of the opening OP of the mask film MK, can be further suppressed. By at least one of the above factors, the shape and/or size of the recess RC formed in the dielectric film DF can be properly maintained.
CxHyFz氣體於電漿中生成大量HF物種。因此,於執行步驟ST22時,可甚至對形成於介電膜DF之凹部RC之底部BT充分供給HF系物種(蝕刻劑)。又,於執行步驟ST22時,基板支持器14之溫度被控制為0℃ 以下之低溫。藉由基板W之溫度之上升得以抑制,可促進HF物種(蝕刻劑)於凹部RC之底部BT處之吸附(HF物種於低溫下吸附係數進一步增加)。藉由以上之至少一個因素,可提高介電膜DF之蝕刻速率。 The CxHyFz gas generates a large amount of HF species in the plasma. Therefore, when executing step ST22, the HF species (etchant) can be sufficiently supplied even to the bottom BT of the recess RC formed in the dielectric film DF . In addition, when executing step ST22, the temperature of the substrate holder 14 is controlled to be a low temperature below 0°C. By suppressing the increase in the temperature of the substrate W, the adsorption of the HF species (etchant) at the bottom BT of the recess RC can be promoted (the adsorption coefficient of the HF species is further increased at a low temperature). By at least one of the above factors, the etching rate of the dielectric film DF can be increased.
再者,於步驟ST22中,於內部空間10s內生成電漿時,可自偏壓電源64對基板支持器14週期性地賦予電氣偏壓之脈衝波。藉由週期性地賦予電氣偏壓之脈衝波,可交替地進行蝕刻與保護膜PF之形成。 Furthermore, in step ST22, when plasma is generated in the internal space 10s, the bias power source 64 can periodically apply an electrical bias pulse to the substrate support 14. By periodically applying an electrical bias pulse, etching and formation of the protective film PF can be performed alternately.
又,於執行步驟ST2時,可使供給至內部空間10s之CxHyFz氣體之流量變化。例如,可於利用包含第1分壓之CxHyFz氣體之反應氣體進行第1蝕刻之後,利用包含第2分壓之CxHyFz氣體之反應氣體進行第2蝕刻。藉此,例如於介電膜DF為不同材料之積層膜之情形時,藉由結合要蝕刻之膜之材料控制CxHyFz氣體之流量,可對該積層膜適當地進行蝕刻。 Furthermore, when executing step ST2, the flow rate of the CxHyFz gas supplied to the internal space 10s may be changed. For example, after the first etching is performed using the reaction gas including the CxHyFz gas with the first partial pressure, the second etching may be performed using the reaction gas including the CxHyFz gas with the second partial pressure. Thus, for example, when the dielectric film DF is a laminated film of different materials, the laminated film may be appropriately etched by controlling the flow rate of the CxHyFz gas in combination with the material of the film to be etched.
又,於執行步驟ST2時,供給至內部空間10s之CxHyFz氣體之流量可於俯視基板W時在基板W之中心部與周邊部不同。藉此,即便於遮罩膜MK之側壁S1所包圍之開口OP之尺寸在基板W之中心部與周邊部不同之情形時,亦可藉由控制CxHyFz氣體之流量之分佈而修正該尺寸之偏差。 Furthermore, when executing step ST2, the flow rate of the CxHyFz gas supplied to the inner space 10s may be different at the center and the periphery of the substrate W when looking down at the substrate W. Thus, even when the size of the opening OP surrounded by the side wall S1 of the mask film MK is different at the center and the periphery of the substrate W, the deviation of the size can be corrected by controlling the distribution of the flow rate of the CxHyFz gas .
又,於執行步驟ST2時,可變更腔室10(內部空間10s)內之壓力或自偏壓電源64供給至基板支持器14之電氣偏壓。例如,步驟ST2可包含:第1工序,其係將腔室10內設為第1壓力,對基板支持器14供給第1電氣偏壓而對介電膜DF進行蝕刻;及第2工序,其係將腔室10內設為第2壓力,對基板支持器14供給第2電氣偏壓而對介電膜DF進行蝕刻。步驟ST2亦可交替地重複第1工序與第2工序。第1壓力可與第2壓力不同,例如可大於第2壓力。第1電氣偏壓可與第2電氣偏壓不同,例如,第1電氣偏 壓之絕對值可大於第2電氣偏壓之絕對值。藉由適當調整第1壓力、第2壓力、第1電氣偏壓及第2電氣偏壓,例如,可於第1工序中在凹部RC到達基底膜UF之前或即將到達之前對介電膜DF進行各向異性蝕刻,於第2工序中以使凹部RC之底部於橫向上擴大之方式進行各向同性蝕刻。 Furthermore, when executing step ST2, the pressure in the chamber 10 (internal space 10s) or the electrical bias supplied to the substrate holder 14 from the bias power supply 64 may be changed. For example, step ST2 may include: a first process, which is to set the chamber 10 to a first pressure, supply the first electrical bias to the substrate holder 14 to etch the dielectric film DF; and a second process, which is to set the chamber 10 to a second pressure, supply the second electrical bias to the substrate holder 14 to etch the dielectric film DF. Step ST2 may also alternately repeat the first process and the second process. The first pressure may be different from the second pressure, for example, it may be greater than the second pressure. The first electrical bias may be different from the second electrical bias, for example, the absolute value of the first electrical bias may be greater than the absolute value of the second electrical bias. By appropriately adjusting the first pressure, the second pressure, the first electrical bias, and the second electrical bias, for example, the dielectric film DF may be anisotropically etched before or just before the recess RC reaches the base film UF in the first process, and the dielectric film DF may be isotropically etched in the second process in such a manner that the bottom of the recess RC is expanded in the horizontal direction.
以下,對為了評價本處理方法而進行之各種實驗進行說明。本發明不受以下之實驗任何限定。 The following describes various experiments conducted to evaluate this treatment method. The present invention is not limited to the following experiments.
(實驗1) (Experiment 1)
圖9係表示實驗1之測定結果之圖。於實驗1中,測定各種反應氣體中之HF物種之生成量。於實驗1中,向基板處理裝置1之內部空間10s供給C4H2F6氣體、C4F8氣體、C4F6氣體及CH2F2氣體中之任一種與Ar氣體作為反應氣體而生成電漿10分鐘,利用四極質譜儀(quadrupole mass analyzer)測定電漿生成前與電漿生成後之HF強度。基板支持器14之溫度設定為-40℃。圖9之縱軸表示電漿生成前之HF強度與電漿生成後之HF強度之差。縱軸之值越大,則意味著電漿中之HF物種之生成量越多。 FIG. 9 is a graph showing the measurement results of Experiment 1. In Experiment 1, the generation amount of HF species in various reaction gases was measured. In Experiment 1, any one of C 4 H 2 F 6 gas, C 4 F 8 gas, C 4 F 6 gas and CH 2 F 2 gas and Ar gas were supplied as reaction gases to the inner space of the substrate processing apparatus 1 for 10 seconds to generate plasma for 10 minutes, and the HF intensity before and after the plasma generation was measured using a quadrupole mass analyzer. The temperature of the substrate holder 14 was set to -40°C. The vertical axis of FIG. 9 represents the difference between the HF intensity before the plasma generation and the HF intensity after the plasma generation. The larger the value on the vertical axis, the more HF species are generated in the plasma.
如圖9所示,本處理方法之反應氣體之一實施例之C4H2F6氣體與不含氫元素之C4F8氣體及C4F6氣體相比不言而喻,即便與包含氫元素之CH2F2氣體相比,電漿中之HF物種之生成量亦更多。 As shown in FIG. 9 , the C 4 H 2 F 6 gas of one embodiment of the reaction gas of the present treatment method generates more HF species in the plasma, obviously compared with the C 4 F 8 gas and the C 4 F 6 gas not containing hydrogen, and even compared with the CH 2 F 2 gas containing hydrogen.
(實驗2) (Experiment 2)
圖10及圖11係表示實驗2之測定結果之圖。於實驗2中,測定各種處理氣體下之蝕刻速率及選擇比。於實驗2中,於基板支持器14上準備具有與基板W相同之構造之樣品基板。樣品基板於矽膜上具有氧化矽作為介電膜DF,且具有有機膜作為遮罩膜MK。向基板處理裝置1之內部空間10s供給處理氣體而生成電漿,對該樣品基板之介電膜DF進行蝕刻。基板支持 器14之溫度設定為-40℃。如圖10及圖11所示,處理氣體中之反應氣體為包含C4F8氣體、CH2F2氣體或C4H2F6氣體中之任一種之各情形時,測定介電膜DF之蝕刻速率(E/R[nm/min]、圖10)與介電膜DF相對於遮罩膜MK之選擇比(Sel.、圖11)。C4F8氣體之流量係反應氣體之總流量之5體積%。CH2F2氣體之流量係反應氣體之總流量之15體積%。C4H2F6氣體之流量係反應氣體之總流量之5體積%。反應氣體包含相對於反應氣體之總流量為70~90體積%的HF氣體。 Fig. 10 and Fig. 11 are diagrams showing the measurement results of Experiment 2. In Experiment 2, the etching rate and the selectivity under various processing gases were measured. In Experiment 2, a sample substrate having the same structure as the substrate W was prepared on the substrate holder 14. The sample substrate had silicon oxide as a dielectric film DF on a silicon film, and had an organic film as a mask film MK. Processing gas was supplied to the internal space 10s of the substrate processing device 1 to generate plasma, and the dielectric film DF of the sample substrate was etched. The temperature of the substrate holder 14 was set to -40°C. As shown in FIG. 10 and FIG. 11, when the reaction gas in the process gas includes any one of C 4 F 8 gas, CH 2 F 2 gas or C 4 H 2 F 6 gas, the etching rate (E/R [nm/min], FIG. 10) of the dielectric film DF and the selectivity (Sel., FIG. 11) of the dielectric film DF to the mask film MK are measured. The flow rate of C 4 F 8 gas is 5 volume % of the total flow rate of the reaction gas. The flow rate of CH 2 F 2 gas is 15 volume % of the total flow rate of the reaction gas. The flow rate of C 4 H 2 F 6 gas is 5 volume % of the total flow rate of the reaction gas. The reaction gas includes HF gas at 70-90 volume % relative to the total flow rate of the reaction gas.
如圖10及圖11所示,本處理方法之反應氣體之一實施例之包含C4H2F6氣體之處理氣體與包含C4F8氣體或CH2F2氣體作為反應氣體之處理氣體相比,蝕刻速率及選擇比均更高。 As shown in FIG. 10 and FIG. 11 , the processing gas including C 4 H 2 F 6 gas as one embodiment of the reaction gas of the present processing method has a higher etching rate and a higher selectivity than the processing gas including C 4 F 8 gas or CH 2 F 2 gas as the reaction gas.
(實驗3) (Experiment 3)
圖12及圖13係表示實驗3之測定結果之圖。於實驗3中,測定變更凹部RC之縱橫比時之各種處理氣體下之蝕刻速率及弓曲CD(Critical Dimension,臨界尺寸)。於實驗3中,於基板支持器14上準備具有與實驗2相同之構造之樣品基板。向基板處理裝置1之內部空間10s供給處理氣體而生成電漿,對該樣品基板之介電膜DF進行蝕刻。基板支持器14之溫度設定為-40℃。圖12及圖13係對處理氣體中之反應氣體包含C4F8氣體或C4H2F6氣體之各情況表示變更凹部RC之縱橫比(AR)時之介電膜DF相對於遮罩膜MK之選擇比(Sel.、圖12)與介電膜DF之凹部RC之最大寬度(弓曲CD:CDm[nm]、圖13)之關係。再者,選擇比可藉由將介電膜DF之蝕刻速率除以遮罩膜MK之蝕刻速率而求出。C4F8氣體或C4H2F6氣體係反應氣體之總流量之5體積%。反應氣體包含相對於反應氣體之總流量為90體積%以上的HF氣體。 FIG. 12 and FIG. 13 are diagrams showing the measurement results of Experiment 3. In Experiment 3, the etching rate and the bow CD (Critical Dimension) under various processing gases when the aspect ratio of the concave portion RC is changed are measured. In Experiment 3, a sample substrate having the same structure as that of Experiment 2 is prepared on a substrate holder 14. Processing gas is supplied to the internal space of the substrate processing device 1 for 10 seconds to generate plasma, and the dielectric film DF of the sample substrate is etched. The temperature of the substrate holder 14 is set to -40°C. FIG. 12 and FIG. 13 show the relationship between the selectivity (Sel., FIG. 12 ) of the dielectric film DF relative to the mask film MK and the maximum width (bow CD: CD m [nm], FIG. 13 ) of the recess RC of the dielectric film DF when the aspect ratio (AR) of the recess RC is changed for each case where the reactive gas in the process gas includes C 4 F 8 gas or C 4 H 2 F 6 gas. The selectivity can be obtained by dividing the etching rate of the dielectric film DF by the etching rate of the mask film MK. The C 4 F 8 gas or C 4 H 2 F 6 gas is 5 volume % of the total flow rate of the reactive gas. The reactive gas includes HF gas at a volume % or more relative to the total flow rate of the reactive gas.
如圖12及圖13所示,使用本處理方法之處理氣體之一實施例之包含C4H2F6氣體之反應氣體時,即便形成於介電膜DF之凹部RC之縱橫比變高,與使用包含C4F8氣體之反應氣體時相比,亦維持較高之選擇比,並且弓曲CD之增加得以抑制。 As shown in FIG. 12 and FIG. 13, when the reaction gas including C 4 H 2 F 6 gas is used as one embodiment of the process gas of the present process method, even if the aspect ratio of the recessed portion RC formed in the dielectric film DF becomes higher, a higher selectivity is maintained compared to when the reaction gas including C 4 F 8 gas is used, and an increase in the bow CD is suppressed.
(實驗4) (Experiment 4)
圖14係表示實驗4之測定結果之圖。於實驗4中,測定利用氧氣清洗基板處理裝置1之腔室10時產生之CO之發射光譜強度(CO強度)之經時變化。於圖14中,CH1係使用包含相對於反應氣體之總流量為4體積%之C4H2F6氣體的處理氣體對具有與實驗2相同之構造之樣品基板進行蝕刻後之腔室。CH2係使用包含相對於反應氣體之總流量為16體積%之CH2F2氣體的處理氣體對具有與實驗2相同之構造之樣品基板進行蝕刻後之腔室。CO強度係藉由清洗氣體(氧氣)與腔室10內之含碳沈積物發生反應而測量,可作為腔室內之清洗進展之指南。 FIG. 14 is a diagram showing the measurement results of Experiment 4. In Experiment 4, the time-dependent change of the emission spectrum intensity (CO intensity) of CO generated when the chamber 10 of the substrate processing apparatus 1 was purged with oxygen was measured. In FIG. 14, CH1 is a chamber after etching a sample substrate having the same structure as Experiment 2 using a process gas containing C 4 H 2 F 6 gas at 4 volume % relative to the total flow rate of the reaction gas. CH2 is a chamber after etching a sample substrate having the same structure as Experiment 2 using a process gas containing CH 2 F 2 gas at 16 volume % relative to the total flow rate of the reaction gas. CO intensity is measured by the reaction of the cleaning gas (oxygen) with carbonaceous deposits in the chamber 10 and can be used as a guide to the progress of cleaning in the chamber.
如圖14所示,CH1中之CO強度於清洗剛開始後達到峰值,然後急遽減少,於清洗開始20~30秒鐘後變成0。CH2中之CO強度具有低於CH1之峰值,減少量亦緩和,即便於清洗開始200秒鐘後亦不變成0。即,使用本處理方法之反應氣體之一實施例之包含C4H2F6氣體之處理氣體時,與使用包含CH2F2氣體之處理氣體時相比,可縮短蝕刻後之腔室之清洗時間。 As shown in FIG. 14 , the CO intensity in CH1 reaches a peak value immediately after the cleaning starts, then decreases rapidly and becomes 0 20 to 30 seconds after the cleaning starts. The CO intensity in CH2 has a lower peak value than that in CH1, and the decrease is also gentle, and does not become 0 even 200 seconds after the cleaning starts. That is, when a treatment gas including C 4 H 2 F 6 gas, which is one embodiment of the reaction gas of the present treatment method, is used, the cleaning time of the chamber after etching can be shortened compared to when a treatment gas including CH 2 F 2 gas is used.
又,揭示之實施方式進而包含以下態樣。 Furthermore, the disclosed implementation method further includes the following aspects.
(附記1) (Note 1)
一種蝕刻氣體組合物,其係包含HF氣體與選自由C4H2F6氣體、C4H2F8氣體、C3H2F4氣體及C3H2F6氣體所組成之群中之至少1種CxHyFz氣 體的反應氣體,且上述HF氣體之流量多於上述CxHyFz氣體之流量。 An etching gas composition comprises HF gas and a reaction gas of at least one CxHyFz gas selected from the group consisting of C4H2F6 gas, C4H2F8 gas, C3H2F4 gas and C3H2F6 gas , wherein the flow rate of the HF gas is greater than that of the CxHyFz gas .
(附記2) (Note 2)
如附記1之蝕刻氣體組合物,其中上述CxHyFz氣體之流量相對於上述反應氣體之總流量為20體積%以下。 In the etching gas composition of Note 1, the flow rate of the CxHyFz gas is less than 20 volume % relative to the total flow rate of the reaction gas.
(附記3) (Note 3)
如附記1或2之蝕刻氣體組合物,其中上述HF氣體之流量相對於上述反應氣體之總流量為70體積%以上。 For example, in the etching gas composition of Note 1 or 2, the flow rate of the above-mentioned HF gas is more than 70 volume % relative to the total flow rate of the above-mentioned reaction gas.
(附記4) (Note 4)
如附記1至3中任一項之蝕刻氣體組合物,其中上述反應氣體進而包含含有鹵素之氣體。 The etching gas composition as in any one of Notes 1 to 3, wherein the reaction gas further comprises a gas containing a halogen.
(附記5) (Note 5)
如附記4之蝕刻氣體組合物,其中上述含有鹵素之氣體係選自由含氯氣體、含溴氣體及含碘氣體所組成之群中之至少1種。 As in the etching gas composition of Note 4, the halogen-containing gas is at least one selected from the group consisting of chlorine-containing gas, bromine-containing gas and iodine-containing gas.
(附記6) (Note 6)
如附記4之蝕刻氣體組合物,其中上述含有鹵素之氣體係選自由Cl2、SiCl2、SiCl4、CCl4、SiH2Cl2、Si2Cl6、CHCl3、SO2Cl2、BCl3、PCl3、PCl5、POCl3、Br2、HBr、CBr2F2、C2F5Br、PBr3、PBr5、POBr3、BBr3、HI、CF3I、C2F5I、C3F7I、IF5、IF7、I2及PI3所組成之群中之至少1種。 The etching gas composition of Appendix 4, wherein the halogen-containing gas is at least one selected from the group consisting of Cl2 , SiCl2, SiCl4 , CCl4 , SiH2Cl2 , Si2Cl6 , CHCl3 , SO2Cl2 , BCl3 , PCl3 , PCl5 , POCl3 , Br2 , HBr , CBr2F2 , C2F5Br , PBr3 , PBr5 , POBr3 , BBr3 , HI , CF3I , C2F5I , C3F7I , IF5 , IF7 , I2 and PI3 .
(附記7) (Note 7)
如附記1至5中任一項之蝕刻氣體組合物,其中上述反應氣體包含含磷氣體。 An etching gas composition as described in any one of Notes 1 to 5, wherein the reaction gas comprises a phosphorus-containing gas.
(附記8) (Note 8)
如附記1至7中任一項之蝕刻氣體組合物,其中上述反應氣體進而包含含氧氣體。 An etching gas composition as described in any one of Notes 1 to 7, wherein the reaction gas further comprises an oxygen-containing gas.
(附記9) (Note 9)
如附記1至8中任一項之蝕刻氣體組合物,其中上述反應氣體進而包含選自由含硼氣體及含硫氣體所組成之群中之至少1種。 An etching gas composition as described in any one of Notes 1 to 8, wherein the reaction gas further comprises at least one selected from the group consisting of boron-containing gas and sulfur-containing gas.
本處理方法可於不脫離本發明之範圍及主旨之情況下進行各種變化。例如,本處理方法除了可使用電容耦合型之基板處理裝置1執行以外,亦可使用利用感應耦合型電漿或微波電漿等任意之電漿源之基板處理裝置而執行。 This processing method can be modified in various ways without departing from the scope and purpose of the present invention. For example, in addition to being executed using a capacitively coupled substrate processing device 1, this processing method can also be executed using a substrate processing device that uses any plasma source such as an inductively coupled plasma or microwave plasma.
Claims (28)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW110116653A TWI888550B (en) | 2021-05-07 | 2021-05-07 | Substrate processing method and substrate processing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW110116653A TWI888550B (en) | 2021-05-07 | 2021-05-07 | Substrate processing method and substrate processing device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW202245056A TW202245056A (en) | 2022-11-16 |
| TWI888550B true TWI888550B (en) | 2025-07-01 |
Family
ID=85793083
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW110116653A TWI888550B (en) | 2021-05-07 | 2021-05-07 | Substrate processing method and substrate processing device |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI888550B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07147273A (en) * | 1993-11-24 | 1995-06-06 | Tokyo Electron Ltd | Etching treatment |
| TW201614105A (en) * | 2014-10-10 | 2016-04-16 | Kanto Denka Kogyo Kk | Etching gas composition for silicon compound, and etching method |
| US20160189975A1 (en) * | 2014-12-25 | 2016-06-30 | Tokyo Electron Limited | Etching method and etching apparatus |
| US20200234968A1 (en) * | 2019-01-18 | 2020-07-23 | Tokyo Electron Limited | Selective plasma etching of silicon oxide relative to silicon nitride by gas pulsing |
-
2021
- 2021-05-07 TW TW110116653A patent/TWI888550B/en active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07147273A (en) * | 1993-11-24 | 1995-06-06 | Tokyo Electron Ltd | Etching treatment |
| TW201614105A (en) * | 2014-10-10 | 2016-04-16 | Kanto Denka Kogyo Kk | Etching gas composition for silicon compound, and etching method |
| US20160189975A1 (en) * | 2014-12-25 | 2016-06-30 | Tokyo Electron Limited | Etching method and etching apparatus |
| US20200234968A1 (en) * | 2019-01-18 | 2020-07-23 | Tokyo Electron Limited | Selective plasma etching of silicon oxide relative to silicon nitride by gas pulsing |
Also Published As
| Publication number | Publication date |
|---|---|
| TW202245056A (en) | 2022-11-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI878384B (en) | Substrate processing method and plasma processing apparatus | |
| US10861693B2 (en) | Cleaning method | |
| JP7672943B2 (en) | Plasma processing apparatus and substrate processing method | |
| JP7679463B2 (en) | SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS | |
| TWI895499B (en) | Etching method and plasma processing apparatus | |
| TWI890783B (en) | Etching method | |
| US20230223249A1 (en) | Substrate processing method and substrate processing apparatus | |
| TWI893237B (en) | Etching method | |
| TWI888550B (en) | Substrate processing method and substrate processing device | |
| TW202437390A (en) | Etching method, plasma processing apparatus, and substrate processing system | |
| TWI893112B (en) | Substrate processing method and substrate processing device | |
| TWI899193B (en) | Substrate processing method and substrate processing apparatus | |
| JP7641170B2 (en) | SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD | |
| TW202333230A (en) | Plasma processing method and plasma processing apparatus | |
| KR102915159B1 (en) | Substrate processing method and substrate processing device | |
| US10283370B1 (en) | Silicon addition for silicon nitride etching selectivity | |
| CN118645429A (en) | Etching method, plasma processing device and substrate processing system | |
| CN117242551A (en) | Etching method |