TWI886007B - Circuit board and manufacturing method thereof - Google Patents
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- TWI886007B TWI886007B TW113128403A TW113128403A TWI886007B TW I886007 B TWI886007 B TW I886007B TW 113128403 A TW113128403 A TW 113128403A TW 113128403 A TW113128403 A TW 113128403A TW I886007 B TWI886007 B TW I886007B
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Abstract
Description
本發明是有關於一種電路板及其製造方法。The present invention relates to a circuit board and a manufacturing method thereof.
當設置於電路板的電子部件承受的電壓電流及工作時間增加時,所產生的熱也會隨之增加,而散熱途徑主要是由電子部件的表面向周圍環境散熱。然而,隨著電子產品已進入到高密度及輕薄化的組裝時代,若只靠表面積相當小的電子部件來散熱是不夠的。此外,電子部件產生的熱也可能會大量地傳至電路板,造成電路板失效或位於熱聚集位置的電子部件失效,進而導致可靠度下降及產品壽命縮短。When the voltage, current and working time of the electronic components installed on the circuit board increase, the heat generated will also increase, and the heat dissipation path is mainly from the surface of the electronic components to the surrounding environment. However, as electronic products have entered the era of high-density and thinner assembly, it is not enough to rely solely on electronic components with a very small surface area to dissipate heat. In addition, the heat generated by electronic components may also be transferred to the circuit board in large quantities, causing the failure of the circuit board or the failure of the electronic components located at the heat accumulation position, thereby reducing reliability and shortening the product life.
本發明至少一實施例提供一種電路板,可藉由溫控元件實現過熱保護功能,減少高溫對產品的損害,進而有助於提升可靠度及增加產品壽命。At least one embodiment of the present invention provides a circuit board that can implement an overheat protection function through a temperature control element, thereby reducing the damage to the product caused by high temperature, thereby helping to improve reliability and increase product life.
本發明至少另一實施例提供上述電路板的製造方法,以幫助上述電路板藉由溫控元件實現過熱保護功能,減少高溫對產品的損害,進而有助於提升可靠度及延長產品壽命。At least another embodiment of the present invention provides a method for manufacturing the above-mentioned circuit board to help the above-mentioned circuit board realize an overheat protection function through a temperature control element, thereby reducing damage to the product caused by high temperature, thereby helping to improve reliability and extend product life.
本發明至少一實施例所提出的一種電路板,包含線路基板、溫控元件、多個伸縮件、電子部件及多個導電柱。線路基板包含多個接墊。溫控元件設置於線路基板上並與線路基板之間形成間隙,且包含第一記憶金屬層、第二記憶金屬層、多個第一磁吸部及多個第二磁吸部。第二記憶金屬層固定於第一記憶金屬層上,且第一記憶金屬層位於第二記憶金屬層與線路基板之間。多個第一磁吸部設置於第一記憶金屬層中,多個第二磁吸部設置於第二記憶金屬層中並分別對應多個第一磁吸部。多個伸縮件設置於間隙中並分別對應多個第一磁吸部,且分別電連接多個接墊。電子部件設置於溫控元件上。多個導電柱設置於電子部件與溫控元件之間並分別貫穿多個第二磁吸部,且電連接電子部件。A circuit board proposed in at least one embodiment of the present invention includes a circuit substrate, a temperature control element, a plurality of retractable parts, an electronic component and a plurality of conductive posts. The circuit substrate includes a plurality of pads. The temperature control element is arranged on the circuit substrate and forms a gap with the circuit substrate, and includes a first memory metal layer, a second memory metal layer, a plurality of first magnetic attraction parts and a plurality of second magnetic attraction parts. The second memory metal layer is fixed on the first memory metal layer, and the first memory metal layer is located between the second memory metal layer and the circuit substrate. A plurality of first magnetic attraction parts are arranged in the first memory metal layer, and a plurality of second magnetic attraction parts are arranged in the second memory metal layer and correspond to the plurality of first magnetic attraction parts respectively. A plurality of retractable members are arranged in the gap and correspond to the plurality of first magnetic attraction parts respectively, and are electrically connected to the plurality of pads respectively. An electronic component is arranged on the temperature control element. A plurality of conductive posts are arranged between the electronic component and the temperature control element and penetrate the plurality of second magnetic attraction parts respectively, and are electrically connected to the electronic component.
在本發明至少一實施例中,所述第一記憶金屬層的變形溫度與所述第二記憶金屬層的變形溫度相同,且所述第一記憶金屬層的彎折方向與所述第二記憶金屬層的彎折方向相反。In at least one embodiment of the present invention, the deformation temperature of the first memory metal layer is the same as the deformation temperature of the second memory metal layer, and the bending direction of the first memory metal layer is opposite to the bending direction of the second memory metal layer.
在本發明至少一實施例中,所述溫控元件更包含第三磁吸部及第四磁吸部。第三磁吸部設置於第一記憶金屬層中並位於兩相鄰所述第一磁吸部之間,第三磁吸部的寬度大於各所述第一磁吸部的寬度。第四磁吸部設置於所述第二記憶金屬層中並位於兩相鄰所述第二磁吸部之間,第四磁吸部的寬度大於各所述第二磁吸部的寬度,且第三磁吸部與第四磁吸部彼此吸引並接觸,以使所述第二記憶金屬層固定於所述第一記憶金屬層上。In at least one embodiment of the present invention, the temperature control element further includes a third magnetic attraction portion and a fourth magnetic attraction portion. The third magnetic attraction portion is disposed in the first memory metal layer and is located between two adjacent first magnetic attraction portions, and the width of the third magnetic attraction portion is greater than the width of each of the first magnetic attraction portions. The fourth magnetic attraction portion is disposed in the second memory metal layer and is located between two adjacent second magnetic attraction portions, and the width of the fourth magnetic attraction portion is greater than the width of each of the second magnetic attraction portions, and the third magnetic attraction portion and the fourth magnetic attraction portion attract and contact each other, so that the second memory metal layer is fixed on the first memory metal layer.
在本發明至少一實施例中,當所述第二記憶金屬層沒有相對於所述第一記憶金屬層彎折時,所述第一記憶金屬層與所述第二記憶金屬層彼此貼合,以使所述多個第一磁吸部與所述多個第二磁吸部彼此吸引並接觸,從而使所述多個導電柱分別接觸所述多個伸縮件。In at least one embodiment of the present invention, when the second memory metal layer is not bent relative to the first memory metal layer, the first memory metal layer and the second memory metal layer are adhered to each other so that the multiple first magnetic attraction parts and the multiple second magnetic attraction parts attract and contact each other, thereby making the multiple conductive posts contact the multiple retractable parts respectively.
在本發明至少一實施例中,當所述第二記憶金屬層相對於所述第一記憶金屬層彎折時,所述第一記憶金屬層與所述第二記憶金屬層部分分離,以使所述多個第一磁吸部與所述多個第二磁吸部分離,從而使所述多個導電柱與所述多個伸縮件分離。In at least one embodiment of the present invention, when the second memory metal layer is bent relative to the first memory metal layer, the first memory metal layer is partially separated from the second memory metal layer, so that the multiple first magnetic attraction portions are separated from the multiple second magnetic attraction portions, thereby separating the multiple conductive pillars from the multiple retractable members.
在本發明至少一實施例中,所述線路基板更包含絕緣層,所述多個接墊內嵌於絕緣層中,所述多個接墊的上表面與絕緣層的上表面齊平。In at least one embodiment of the present invention, the circuit substrate further includes an insulating layer, the plurality of pads are embedded in the insulating layer, and the upper surfaces of the plurality of pads are flush with the upper surface of the insulating layer.
在本發明至少一實施例中,各所述伸縮件包含導電部及圍繞導電部的外圍部,多個導電部分別貫穿所述多個第一磁吸部並分別電連接所述多個接墊。In at least one embodiment of the present invention, each of the retractable members includes a conductive portion and an outer portion surrounding the conductive portion, and the plurality of conductive portions respectively penetrate the plurality of first magnetic portions and are respectively electrically connected to the plurality of pads.
在本發明至少一實施例中,所述電路板更包含連接層,設置於所述溫控元件與所述電子部件之間,所述多個導電柱貫穿所述連接層。In at least one embodiment of the present invention, the circuit board further includes a connection layer disposed between the temperature control element and the electronic component, and the plurality of conductive posts penetrate the connection layer.
在本發明至少一實施例中,所述第一記憶金屬層及所述第二記憶金屬層的材料包含鎳鈦合金,所述多個伸縮件的材料包含導電纖維,所述多個導電柱的材料包含銅。In at least one embodiment of the present invention, the material of the first memory metal layer and the second memory metal layer includes nickel-titanium alloy, the material of the plurality of retractable members includes conductive fibers, and the material of the plurality of conductive pillars includes copper.
本發明至少一實施例所提出的一種電路板的製造方法包含以下步驟。提供第一犧牲層及導電層,第一犧牲層位於導電層上。圖案化第一犧牲層以形成多個第一溝槽。形成多個導電部於多個第一溝槽中。在形成多個導電部之後,圖案化導電層以形成多個接墊。在形成多個接墊之後,於多個接墊上貼合增層結構,並圖案化增層結構以形成多個第二溝槽。形成多個線路結構於多個第二溝槽中。在形成多個線路結構之後,移除第一犧牲層以暴露多個導電部的側壁。在移除第一犧牲層之後,形成多個外圍部分別圍繞多個導電部的側壁以形成多個伸縮件。形成第二犧牲層以圍繞多個伸縮件。形成分別對應多個伸縮件的多個第一磁吸部及位於第二犧牲層上的第三磁吸部。於第二犧牲層上形成第一記憶金屬層以圍繞多個第一磁吸部及第三磁吸部。在形成第一記憶金屬層之後,移除第二犧牲層以形成間隙。提供初始連接層及第二初始記憶金屬層,初始連接層位於第二初始記憶金屬層上。圖案化初始連接層及第二初始記憶金屬層以形成連接層及第二記憶金屬層,連接層具有多個開槽,第二記憶金屬層具有多個開口。於多個開口中形成多個第二磁吸部及第四磁吸部。在形成多個第二磁吸部及第四磁吸部之後,將電子部件貼合於連接層上,電子部件包含多個接腳,多個接腳分別設置於多個開槽中,且分別貫穿多個第二磁吸部。在電子部件貼合於連接層上之後,將第二記憶金屬層設置於第一記憶金屬層上,以使多個第一磁吸部與多個第二磁吸部彼此吸引並接觸,且使第三磁吸部與第四磁吸部彼此吸引並接觸。A method for manufacturing a circuit board proposed in at least one embodiment of the present invention includes the following steps. A first sacrificial layer and a conductive layer are provided, wherein the first sacrificial layer is located on the conductive layer. The first sacrificial layer is patterned to form a plurality of first trenches. A plurality of conductive portions are formed in the plurality of first trenches. After the plurality of conductive portions are formed, the conductive layer is patterned to form a plurality of pads. After the plurality of pads are formed, a build-up layer structure is attached to the plurality of pads, and the build-up layer structure is patterned to form a plurality of second trenches. A plurality of circuit structures are formed in the plurality of second trenches. After the plurality of circuit structures are formed, the first sacrificial layer is removed to expose the side walls of the plurality of conductive portions. After removing the first sacrificial layer, a plurality of peripheral portions are formed to surround the side walls of the plurality of conductive portions to form a plurality of retractable members. A second sacrificial layer is formed to surround the plurality of retractable members. A plurality of first magnetic attraction portions corresponding to the plurality of retractable members and a third magnetic attraction portion located on the second sacrificial layer are formed. A first memory metal layer is formed on the second sacrificial layer to surround the plurality of first magnetic attraction portions and the third magnetic attraction portion. After forming the first memory metal layer, the second sacrificial layer is removed to form a gap. An initial connection layer and a second initial memory metal layer are provided, and the initial connection layer is located on the second initial memory metal layer. The initial connection layer and the second initial memory metal layer are patterned to form a connection layer and a second memory metal layer, wherein the connection layer has a plurality of slots, and the second memory metal layer has a plurality of openings. A plurality of second magnetic attraction portions and a fourth magnetic attraction portion are formed in the plurality of openings. After the plurality of second magnetic attraction portions and the fourth magnetic attraction portions are formed, an electronic component is attached to the connection layer, wherein the electronic component includes a plurality of pins, and the plurality of pins are respectively disposed in the plurality of slots and respectively penetrate the plurality of second magnetic attraction portions. After the electronic component is attached to the connection layer, a second memory metal layer is disposed on the first memory metal layer, so that the plurality of first magnetic attraction portions and the plurality of second magnetic attraction portions attract and contact each other, and the third magnetic attraction portion and the fourth magnetic attraction portion attract and contact each other.
在以下的內文中,為了清楚呈現本發明的技術特徵,圖式中的元件(例如層、膜、基板以及區域等)的尺寸(例如長度、寬度、厚度與深度)會以不等比例的方式放大,而且有的元件數量會減少。因此,下文實施例的說明與解釋不受限於圖式中的元件數量以及元件所呈現的尺寸與形狀,而應涵蓋如實際製程及/或公差所導致的尺寸、形狀以及兩者的偏差。例如,圖式所示的平坦表面可以具有粗糙及/或非線性的特徵,而圖式所示的銳角可以是圓的。所以,本發明圖式所呈示的元件主要是用於示意,並非旨在精準地描繪出元件的實際形狀,也非用於限制本發明的申請專利範圍。In the following text, in order to clearly present the technical features of the present invention, the dimensions (e.g., length, width, thickness, and depth) of the elements (e.g., layers, films, substrates, and regions, etc.) in the drawings will be enlarged in unequal proportions, and the number of some elements will be reduced. Therefore, the description and explanation of the embodiments below are not limited to the number of elements in the drawings and the dimensions and shapes presented by the elements, but should cover the dimensions, shapes, and deviations therefrom caused by actual processes and/or tolerances. For example, the flat surface shown in the drawings may have rough and/or nonlinear features, and the sharp corners shown in the drawings may be rounded. Therefore, the elements presented in the drawings of the present invention are mainly used for illustration, and are not intended to accurately depict the actual shape of the elements, nor are they used to limit the scope of the patent application of the present invention.
其次,本發明所出現的「約」、「近似」或「實質上」等這類用字不僅涵蓋明確記載的數值與數值範圍,而且也涵蓋發明所屬技術領域中具有通常知識者所能理解的可允許偏差範圍,其中此偏差範圍可由測量時所產生的誤差來決定,而此誤差例如是起因於測量系統或製程條件兩者的限制。舉例而言,兩物件(例如基板的平面或走線)「實質上平行」或「實質上垂直」,其中「實質上平行」與「實質上垂直」分別代表這兩物件之間的平行與垂直可包含允許偏差範圍所導致的不平行與不垂直。Secondly, the words "approximately", "approximately" or "substantially" used in the present invention not only cover the numerical values and numerical ranges clearly stated, but also cover the permissible deviation range that can be understood by a person of ordinary skill in the art to which the invention belongs, wherein the deviation range can be determined by the error generated during measurement, and the error is caused by the limitations of the measurement system or process conditions, for example. For example, two objects (such as the planes or traces of a substrate) are "substantially parallel" or "substantially perpendicular", wherein "substantially parallel" and "substantially perpendicular" respectively represent that the parallelism and perpendicularity between the two objects may include non-parallelism and non-perpendicularity caused by the permissible deviation range.
本發明所使用的空間相對用語,例如「下方」、「之下」、「上方」、「之上」等,這是為了便於敘述一元件或特徵與另一元件或特徵之間的相對關係,如圖中所繪示。這些空間上的相對用語的真實意義包含其他的方位。例如,當圖示上下翻轉180度時,一元件與另一元件之間的關係,可能從「下方」、「之下」變成「上方」、「之上」。此外,本發明所使用的空間上的相對敘述也應作同樣的解釋。The spatially relative terms used in the present invention, such as "below", "under", "above", "on", etc., are for the purpose of facilitating the description of the relative relationship between one element or feature and another element or feature, as shown in the figure. The true meaning of these spatially relative terms includes other orientations. For example, when the figure is flipped 180 degrees up and down, the relationship between one element and another element may change from "below" or "under" to "above" or "on". In addition, the spatially relative descriptions used in the present invention should also be interpreted in the same way.
應當可以理解的是,雖然本發明可能會使用到「第一」、「第二」、「第三」等術語來描述各種元件或者特徵,但這些元件或者特徵不應受這些術語的限制。這些術語主要是用以區分一元件與另一元件,或者一特徵與另一特徵。另外,本發明所使用的術語「或」,應視實際情況可能包含相關聯的列出項目中的任一個或者多個的組合。It should be understood that, although the present invention may use terms such as "first", "second", and "third" to describe various components or features, these components or features should not be limited by these terms. These terms are mainly used to distinguish one component from another component, or one feature from another feature. In addition, the term "or" used in the present invention may include any one or more combinations of the related listed items depending on the actual situation.
雖然本發明中利用一系列的操作或步驟來說明製造方法,但是這些操作或步驟所示的順序不應被解釋為本發明的限制。例如,某些操作或步驟可以按不同順序進行及/或與其它步驟同時進行。此外,在此所述的每一個操作或步驟可以包含數個子步驟或動作。Although a series of operations or steps are used in the present invention to illustrate the manufacturing method, the order in which these operations or steps are shown should not be interpreted as a limitation of the present invention. For example, certain operations or steps can be performed in different orders and/or simultaneously with other steps. In addition, each operation or step described herein can include a plurality of sub-steps or actions.
此外,本發明可通過其他不同的具體實施例加以施行或應用,本發明的各項細節也可基於不同觀點與應用,在不悖離本發明的構思下進行各種實施例的組合、修改與變更。In addition, the present invention may be implemented or applied through other different specific embodiments, and the details of the present invention may also be combined, modified and changed in various embodiments based on different viewpoints and applications without departing from the concept of the present invention.
圖1A及圖1B是本發明至少一實施例的電路板10分別於貼合狀態及分離狀態的局部剖面示意圖。請參閱圖1A及圖1B,電路板10包含線路基板100、溫控元件200、多個伸縮件300、電子部件400及多個導電柱500。1A and 1B are partial cross-sectional schematic diagrams of a
線路基板100包含多個接墊102。溫控元件200設置於線路基板100上並與線路基板100之間形成間隙G,且包含第一記憶金屬層202、第二記憶金屬層204、多個第一磁吸部206及多個第二磁吸部208。第二記憶金屬層204固定於第一記憶金屬層202上,且第一記憶金屬層202位於第二記憶金屬層204與線路基板100之間。The
多個第一磁吸部206設置於第一記憶金屬層202中,多個第二磁吸部208設置於第二記憶金屬層204中並分別對應多個第一磁吸部206。多個伸縮件300設置於間隙G中並分別對應多個第一磁吸部206,且分別電連接多個接墊102。電子部件400設置於溫控元件200上。多個導電柱500設置於電子部件400與溫控元件200之間並分別貫穿多個第二磁吸部208,且電連接電子部件400。A plurality of first
由於溫控元件200能使溫度過高的電子部件400與線路基板100的接墊102之間形成斷路,以實現過熱保護功能,減少高溫對產品的損害,進而有助於提升可靠度及增加產品壽命。Since the
請繼續參閱圖1A及圖1B,溫控元件200更包含第三磁吸部210及第四磁吸部212。第三磁吸部210設置於第一記憶金屬層202中並位於兩個相鄰的第一磁吸部206之間,且第三磁吸部210的寬度大於各第一磁吸部206的寬度。第四磁吸部212設置於第二記憶金屬層204中並位於兩個相鄰的第二磁吸部208之間,且第四磁吸部212的寬度大於各第二磁吸部208的寬度,且第三磁吸部210與第四磁吸部212彼此吸引並接觸,以使第二記憶金屬層204固定於第一記憶金屬層202上。Continuing to refer to FIG. 1A and FIG. 1B , the
在一些實施例中,第三磁吸部210對應第四磁吸部212。詳細而言,於線路基板100的法線上,第三磁吸部210與第四磁吸部212重疊,多個第一磁吸部206分別與多個第二磁吸部208重疊,且第三磁吸部210正投影於線路基板100的面積大於各第一磁吸部206正投影於線路基板100的面積,第四磁吸部212正投影於線路基板100的面積大於各第二磁吸部208正投影於線路基板100的面積。此外,第一記憶金屬層202的變形溫度與第二記憶金屬層204的變形溫度實質上相同,且第一記憶金屬層202的彎折方向與第二記憶金屬層204的彎折方向實質上相反。In some embodiments, the third
如圖1A所示,當電路板10的溫度實質上尚未達到第一記憶金屬層202的變形溫度與第二記憶金屬層204的變形溫度時,第二記憶金屬層204沒有相對於第一記憶金屬層202彎折,第一記憶金屬層202與第二記憶金屬層204彼此貼合,以使多個第一磁吸部206與多個第二磁吸部208彼此吸引並接觸,從而使多個導電柱500分別接觸多個伸縮件300。As shown in FIG. 1A , when the temperature of the
詳細而言,第一記憶金屬層202及第二記憶金屬層204分別具有面對面的第一表面S1及第二表面S2,第一磁吸部206及第三磁吸部210裸露於第一表面S1,且第二磁吸部208及第四磁吸部212裸露於第二表面S2,當第二記憶金屬層204沒有相對於第一記憶金屬層202彎折時,第一表面S1與第二表面S2彼此貼合,以使第一磁吸部206與第二磁吸部208及第三磁吸部210與第四磁吸部212彼此吸引並接觸,且導電柱500與伸縮件300彼此接觸,進而使電子部件400電連接線路基板100的接墊102,故電子部件400為正常工作狀態。Specifically, the first
如圖1B所示,當電路板10的溫度實質上達到或超過第一記憶金屬層202的變形溫度與第二記憶金屬層204的變形溫度時,第二記憶金屬層204相對於第一記憶金屬層202彎折,第一記憶金屬層202與第二記憶金屬層204部分分離,以使多個第一磁吸部206與多個第二磁吸部208分離,從而使多個導電柱500與多個伸縮件300分離。As shown in FIG. 1B , when the temperature of the
詳細而言,當第二記憶金屬層204相對於第一記憶金屬層202彎折時,第一表面S1與第二表面S2之間形成縫隙S,以使第一磁吸部206與第二磁吸部208分離,且導電柱500與伸縮件300分離,進而使電子部件400斷開線路基板100的接墊102的電連接,故電子部件400為斷電狀態。Specifically, when the second
由於第一記憶金屬層202與第二記憶金屬層204彎折的分離力大於第一磁吸部206與第二磁吸部208之間的磁吸力,故可使第一磁吸部206與第二磁吸部208分離。然而,由於第三磁吸部210及第四磁吸部212的寬度分別大於第一磁吸部206及第二磁吸部208的寬度,且第三磁吸部210及第四磁吸部212正投影於線路基板100的面積分別大於第一磁吸部206及第二磁吸部208正投影於線路基板100的面積,故第三磁吸部210與第四磁吸部212之間的磁吸力大於第一記憶金屬層202與第二記憶金屬層204彎折的分離力,第二記憶金屬層204可藉由第三磁吸部210與第四磁吸部212彼此吸引並接觸而固定於第一記憶金屬層202上。Since the separation force of the first
因此,當電路板10過熱時,如圖1B所示,藉由第一記憶金屬層202與第二記憶金屬層204彎折並部分分離,以使第一磁吸部206與第二磁吸部208分離及導電柱500與伸縮件300分離,進而使電子部件400斷開線路基板100的接墊102的電連接處於斷電狀態,可實現過熱保護功能,而當電路板10回到正常溫度時,如圖1A所示,第一記憶金屬層202與第二記憶金屬層204沒有彎折並彼此貼合,以使第一磁吸部206與第二磁吸部208彼此吸引並接觸及導電柱500與伸縮件300彼此接觸,進而使電子部件400電連接線路基板100的接墊102處於正常工作狀態,故可減少高溫對產品的損害,進而有助於提升可靠度及增加產品壽命。Therefore, when the
請繼續參閱圖1A及圖1B,電路板10更包含連接層600,設置於溫控元件200與電子部件400之間,多個導電柱500貫穿連接層600。線路基板100更包含絕緣層104及多個線路結構106,多個接墊102及多個線路結構106內嵌於絕緣層104中,且多個接墊102的上表面與絕緣層104的上表面齊平。此外,各伸縮件300包含導電部302及圍繞導電部302的外圍部304,多個導電部302分別貫穿多個第一磁吸部206並分別電連接多個接墊102。Please continue to refer to FIG. 1A and FIG. 1B , the
在一些實施例中,絕緣層104及連接層600的材料可包含樹脂,例如膠片(prepreg),第一記憶金屬層202及所述第二記憶金屬層204的材料可包含鎳鈦合金,伸縮件300的材料可包含導電纖維,接墊102及導電柱500的材料可包含金屬,例如銅,電子部件400可為晶片。In some embodiments, the material of the insulating
此外,第一磁吸部206、第二磁吸部208、第三磁吸部210及第四磁吸部212的材料可包含鐵磁性材料或亞鐵磁性材料。在一些實施例中,第一磁吸部206及第二磁吸部208其中之一為磁鐵(例如永久磁鐵),第一磁吸部206及第二磁吸部208其中之另一不為磁鐵,第三磁吸部210及第四磁吸部212其中之一為磁鐵(例如永久磁鐵),第三磁吸部210及第四磁吸部212其中之另一不為磁鐵。在其他實施例中,第一磁吸部206及第二磁吸部208的材料皆為磁鐵,第三磁吸部210及第四磁吸部212的材料皆為磁鐵。In addition, the materials of the first
圖2A至圖2R是圖1A及圖1B的電路板10在不同製程階段的局部剖面圖。首先,請參閱圖2A,提供第一犧牲層SL1及導電層ML,第一犧牲層SL1位於導電層ML上。接著,請參閱圖2B,圖案化第一犧牲層SL1以形成多個第一溝槽T1。在一些實施例中,圖案化第一犧牲層SL1可由雷射製程實施。FIG. 2A to FIG. 2R are partial cross-sectional views of the
請參閱圖2C,形成多個導電部302於多個第一溝槽T1中。請參閱圖2D,在形成多個導電部302之後,圖案化導電層ML以形成多個接墊102。接著,請參閱圖2E及圖2F,在形成多個接墊102之後,於多個接墊102上貼合增層結構BS,並圖案化增層結構BS以形成多個第二溝槽T2。在一些實施例中,增層結構BS包括絕緣層104,形成多個導電部302可由印刷製程實施,圖案化導電層ML可由蝕刻製程實施,而圖案化增層結構BS可由雷射製程實施。Referring to FIG. 2C , a plurality of
請參閱圖2G,形成多個線路結構106於多個第二溝槽T2中。請參閱圖2H,在形成多個線路結構106之後,移除第一犧牲層SL1以暴露多個導電部302的側壁。在一些實施例中,如圖2H所示,在移除第一犧牲層SL1之前,可於線路結構106上形成保護結構PS。此外,形成多個線路結構106可由電鍍製程及蝕刻製程實施。Referring to FIG. 2G , a plurality of
請參閱圖2I,在移除第一犧牲層SL1之後,形成多個外圍部304分別圍繞多個導電部302的側壁以形成多個伸縮件300。接著,請參閱圖2J,形成第二犧牲層SL2以圍繞多個伸縮件300。在一些實施例中,形成多個外圍部304及形成第二犧牲層SL2可由印刷製程實施。2I , after removing the first sacrificial layer SL1, a plurality of
請參閱圖2K,形成分別對應多個伸縮件300的多個第一磁吸部206及位於第二犧牲層SL2上的第三磁吸部210。接著,請參閱圖2L,於第二犧牲層SL2上形成第一記憶金屬層202以圍繞多個第一磁吸部206及第三磁吸部210。在一些實施例中,形成第一磁吸部206、第三磁吸部210及形成第一記憶金屬層202可由印刷製程實施。Referring to FIG. 2K , a plurality of first
請參閱圖2M,在形成第一記憶金屬層202之後,移除第二犧牲層SL2以形成間隙G。接著,請參閱圖2N及圖2O,提供初始連接層600I及第二初始記憶金屬層204I,初始連接層600I位於第二初始記憶金屬層204I上。在一些實施例中,初始連接層600I形成於第二初始記憶金屬層204I上可由壓合製程實施。2M, after forming the first
請參閱圖2P,圖案化初始連接層600I及第二初始記憶金屬層204I以形成連接層600及第二記憶金屬層204,且連接層600具有多個開槽O1,第二記憶金屬層204具有多個開口O2。接著,請參閱圖2Q,於多個開口O2中形成多個第二磁吸部208及第四磁吸部212。在一些實施例中,圖案化初始連接層600I及第二初始記憶金屬層204I可由雷射製程實施,形成第二磁吸部208及第四磁吸部212可由印刷製程實施。Referring to FIG. 2P , the initial connection layer 600I and the second initial
請參閱圖2R,在形成多個第二磁吸部208及第四磁吸部212之後,將電子部件400貼合於連接層600上,且電子部件400包含多個接腳PN,多個接腳PN分別插設於多個開槽O1中,且分別貫穿多個第二磁吸部208。在一些實施例中,電子部件400可不包含接腳PN,而是在第二磁吸部208及第四磁吸部212形成之後,於多個開槽O1中形成如圖1A及圖1B所示的多個導電柱500,且多個導電柱500分別貫穿多個第二磁吸部208,再將電子部件400貼合於連接層600上,以使電子部件400電連接導電柱500。Please refer to FIG. 2R . After forming a plurality of second
在電子部件400貼合於連接層600上之後,將第二記憶金屬層204設置於第一記憶金屬層202上,以使多個第一磁吸部206與多個第二磁吸部208彼此吸引並接觸,且使第三磁吸部210與第四磁吸部212彼此吸引並接觸,從而形成如圖1A及圖1B所示的電路板10。After the
綜上所述,在以上本發明至少一實施例的電路板及其製造方法中,上述溫控元件能使溫度過高的電子部件與線路基板的接墊之間形成斷路,以實現過熱保護功能,減少高溫對產品的損害,進而有助於提升可靠度及增加產品壽命。In summary, in the circuit board and its manufacturing method of at least one embodiment of the present invention, the temperature control element can form a circuit between the electronic component with too high temperature and the pad of the circuit substrate to achieve the overheating protection function, reduce the damage of high temperature to the product, and thus help to improve reliability and increase product life.
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,所屬技術領域中具有通常知識者,在不脫離本發明精神和範圍內,當可作些許更動與潤飾,因此本發明保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed as above by way of embodiments, they are not intended to limit the present invention. A person having ordinary knowledge in the relevant technical field may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the attached patent application.
10:電路板
100:線路基板
102:接墊
104:絕緣層
106:線路結構
200:溫控元件
202:第一記憶金屬層
204:第二記憶金屬層
204I:第二初始記憶金屬層
206:第一磁吸部
208:第二磁吸部
210:第三磁吸部
212:第四磁吸部
300:伸縮件
302:導電部
304:外圍部
400:電子部件
500:導電柱
600:連接層
600I:初始連接層
BS:增層結構
G:間隙
ML:導電層
O1:開槽
O2:開口
PN:接腳
PS:保護結構
S:縫隙
S1:第一表面
S2:第二表面
SL1:第一犧牲層
SL2:第二犧牲層
T1:第一溝槽
T2:第二溝槽10: Circuit board
100: Circuit substrate
102: Pad
104: Insulation layer
106: Circuit structure
200: Temperature control element
202: First memory metal layer
204: Second
圖1A及圖1B是本發明至少一實施例的電路板分別於貼合狀態及分離狀態的局部剖面示意圖。 圖2A至圖2R是圖1A及圖1B的電路板在不同製程階段的局部剖面圖。Figures 1A and 1B are partial cross-sectional schematic diagrams of a circuit board in at least one embodiment of the present invention in a bonded state and a separated state, respectively. Figures 2A to 2R are partial cross-sectional diagrams of the circuit board of Figures 1A and 1B at different stages of the manufacturing process.
國內寄存資訊(請依寄存機構、日期、號碼順序註記) 無 國外寄存資訊(請依寄存國家、機構、日期、號碼順序註記) 無Domestic storage information (please note the order of storage institution, date, and number) None Overseas storage information (please note the order of storage country, institution, date, and number) None
10:電路板 10: Circuit board
100:線路基板 100:Circuit substrate
102:接墊 102:Pad
104:絕緣層 104: Insulation layer
106:線路結構 106: Line structure
200:溫控元件 200: Temperature control element
202:第一記憶金屬層 202: First memory metal layer
204:第二記憶金屬層 204: Second memory metal layer
206:第一磁吸部 206: First magnetic attraction part
208:第二磁吸部 208: Second magnetic attraction part
210:第三磁吸部 210: The third magnetic attraction part
212:第四磁吸部 212: Fourth magnetic attraction part
300:伸縮件 300: Telescopic parts
302:導電部 302: Conductive Department
304:外圍部 304: Outer periphery
400:電子部件 400: Electronic components
500:導電柱 500:Conductive pillar
600:連接層 600: Connection layer
G:間隙 G: Gap
S1:第一表面 S1: First surface
S2:第二表面 S2: Second surface
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW113128403A TWI886007B (en) | 2024-07-30 | 2024-07-30 | Circuit board and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW113128403A TWI886007B (en) | 2024-07-30 | 2024-07-30 | Circuit board and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TWI886007B true TWI886007B (en) | 2025-06-01 |
| TW202606388A TW202606388A (en) | 2026-02-01 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW113128403A TWI886007B (en) | 2024-07-30 | 2024-07-30 | Circuit board and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI886007B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1289945A (en) * | 1999-09-16 | 2001-04-04 | 信越高分子材料株式会社 | Method for electrically connecting two sets of electrode terminals of arrays on electronic board unit |
| US20180269371A1 (en) * | 2015-09-21 | 2018-09-20 | Siemens Aktiengesellschaft | Cooling Arrangement For An Electronic Component |
| TW201918817A (en) * | 2017-11-02 | 2019-05-16 | 宏碁股份有限公司 | Electronic device |
-
2024
- 2024-07-30 TW TW113128403A patent/TWI886007B/en active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1289945A (en) * | 1999-09-16 | 2001-04-04 | 信越高分子材料株式会社 | Method for electrically connecting two sets of electrode terminals of arrays on electronic board unit |
| US20180269371A1 (en) * | 2015-09-21 | 2018-09-20 | Siemens Aktiengesellschaft | Cooling Arrangement For An Electronic Component |
| TW201918817A (en) * | 2017-11-02 | 2019-05-16 | 宏碁股份有限公司 | Electronic device |
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