TWI883401B - Circuit board and layout method thereof - Google Patents

Abstract

A circuit board and a layout method thereof are provided. The circuit board includes a first metal layer, a second metal layer and a third metal layer. The first metal layer forms a plurality of first reference conductive wires. The second metal layer forms at least one signal transmission wire. The third metal layer forms a plurality of third reference conductive wires. The first metal layer, the second metal layer and a third metal layer are overlapped by each other, and each of the first reference conductive wires is not completely overlapped with each of the second reference conductive wires.

Description

Circuit board and layout method thereof

The present invention relates to a circuit board and a layout method thereof, and in particular to a circuit board and a layout method thereof that can improve signal transmission efficiency.

In circuit boards, the quality of high-speed signal transmission lines is often affected by the direction, size, and parasitic effects of the signal transmission lines.

In the known technical field, designers set corresponding reference wires for high-speed signal transmission wires in the circuit board. And through the shielding effect of the reference wires, the signal transmission wires are reduced from being disturbed by external electromagnetic waves, which causes the increase in transmission impedance. However, due to the limitation of the layout area, the reference wires can only produce a shielding effect on the signal transmission wires in a limited area. As a result, the signal transmission wires of the known technology often have poor uniformity of signal transmission impedance, which reduces the quality of signal transmission.

The present invention provides a circuit board and a layout method thereof, which can improve the uniformity of the transmission impedance of the signal transmission wire.

The circuit board of the present invention includes a first metal layer, a second metal layer and a third metal layer. The first metal layer forms a plurality of first reference wires. The second metal layer forms at least one signal transmission wire. The third metal layer forms a plurality of second reference wires. The first metal layer, the second metal layer and the third metal layer are overlapped with each other, and each first reference wire does not completely overlap with each second reference wire.

The layout method of the present invention includes: forming a plurality of first reference wires in a first metal layer; forming at least one signal transmission wire in a second metal layer; forming a plurality of second reference wires in a third metal layer, wherein the first metal layer, the second metal layer and the third metal layer are overlapped with each other; and making each first reference wire not completely overlap with each second reference wire.

Based on the above, the present invention makes each first reference wire and each second reference wire in different metal layers in the circuit board not completely overlap. In this way, the signal transmission wire and the first reference wire and the second reference wire can have multiple overlapping parts, which can improve the uniformity of the transmission impedance of the signal transmission wire and improve its signal transmission efficiency.

100, 200, 300, 400: Circuit board

111~113, 131~133, 211~215, 231~235, 411~414, 431~434: Reference wires

121, 221, 421, 422: signal transmission wires

310, 320, 330: Levels

311: First metal layer

321: Second metal layer

331: The third metal layer

D1, DT, D2, D3, D4: Direction

S510~S540: Steps

FIG1 is a schematic top view of a circuit board of an embodiment of the present invention.

FIG2 is a schematic top view of a circuit board of another embodiment of the present invention.

FIG3 is a schematic diagram showing the structure of a circuit board of an embodiment of the present invention.

FIG4 is a schematic top view of a circuit board of another embodiment of the present invention.

FIG5 is a flow chart showing a circuit layout method of a circuit board according to an embodiment of the present invention.

Please refer to FIG. 1, which shows a schematic top view of a circuit board according to an embodiment of the present invention. The circuit board 100 may be a multi-layer circuit board, in which the circuit board 100 may have a first metal layer, a second metal layer and a third metal layer respectively in the multiple layers. The first metal layer, the second metal layer and the third metal layer are stacked on each other. Among them, a plurality of reference wires 111-113 may be formed in the first metal layer. The reference wires 111-113 may extend along a direction D1, and any two of the reference wires 111-113 may be parallel to each other. At least one signal transmission wire 121 may be formed in the second metal layer. In this embodiment, the signal transmission wire 121 may extend along the direction DT, wherein the direction DT and the direction D1 are not parallel to each other and may have a non-zero angle. In addition, a plurality of reference wires 131-133 may be formed in the third metal layer. The reference wires 131-133 may extend along the direction D2, and any two of the reference wires 131-133 may be parallel to each other. In addition, in this embodiment, the direction D2 may be parallel to the direction D1. That is, the direction DT and the direction D2 are also not parallel to each other and may have a non-zero angle.

In this embodiment, the signal transmission wire 121 may have partially overlapping regions with the reference wires 111, 132, 112, and 133, respectively. The reference wires 111, 132, 112, and 133 may receive a reference ground voltage and provide multiple reference planes for the signal transmission wire 121 through multiple partially overlapping regions. In this way, based on the multiple partially overlapping regions, the continuity of the signal transmission impedance of the signal transmission wire 121 can be improved, effectively improving the efficiency of signal transmission.

Incidentally, in this embodiment, the first metal layer forming the reference wires 111-113 can be disposed at the topmost layer of the circuit board 100; the third metal layer forming the reference wires 131-133 can be disposed at the bottommost layer of the circuit board 100; and the second metal layer of the signal transmission wire 121 can be disposed at the middle layer of the circuit board 100, that is, between the first metal layer and the third metal layer.

In this embodiment, the length and width of the reference wires 111-113 and 131-133 are not limited and can be adjusted according to the size of the circuit board 100 and the actual layout. The width of each of the reference wires 111-113 and 131-133 can be the same, partially the same, or different, without any special restrictions.

In addition, in this embodiment, the signal transmission wire 121 in the second gold layer can be a high-speed signal transmission wire. The number of signal transmission wires 121 can be one or more. In other embodiments of the present invention, the signal transmission wire 121 can not only extend along a single direction DT, but can also be segmented to have multiple extension directions.

The key point is that the circuit board 100 of the embodiment of the present invention can be staggered by setting the reference wires 111-113, 131-133 of different metal layers, which can effectively increase the overlapping area of the signal transmission wire 121 and the reference wires 111-113, 131-133, and thereby improve the uniformity of the signal transmission impedance of the signal transmission wire 121.

Incidentally, there is no specific restriction on the materials of the reference wires 111-113, 131-133 and the signal transmission wire 121. Any material of metal wires that are well known to those skilled in the art and can be used on printed circuit boards can be used to implement the reference wires 111-113, 131-133 and the signal transmission wire 121 without any specific restriction.

Please refer to FIG. 2 below, which is a schematic top view of a circuit board of another embodiment of the present invention. The circuit board 200 can also be a multi-layer circuit board, in which the circuit board 200 can have a first metal layer, a second metal layer and a third metal layer respectively in the multiple layers. The first metal layer, the second metal layer and the third metal layer are stacked on each other. Among them, a plurality of reference wires 211~215 can be formed in the first metal layer. The reference wires 211~213 can extend along the direction D1, and any two of the reference wires 211~213 can be parallel to each other. The reference wires 214~215 can extend along the direction D3, and any two of the reference wires 214~215 can be parallel to each other. A plurality of reference wires 231~235 can be formed in the third metal layer. The reference wires 231-233 can extend along the direction D2, and any two of the reference wires 231-233 can be parallel to each other. The reference wires 234-235 can extend along the direction D4, and any two of the reference wires 234-235 can be parallel to each other.

In this embodiment, directions D1 and D3 may be parallel to each other; directions D2 and D4 may be parallel to each other; directions D1 and D2 are not parallel to each other.

In this embodiment, the slopes of direction D1 and direction D2 can be additive inverse elements of each other. In other embodiments of the present invention, the slopes of direction D1 and direction D2 can also be set arbitrarily without any restrictions.

On the other hand, the second metal layer is used to form a signal transmission wire 221. The signal transmission wire 221 can be extended in a single section or multiple sections along any direction, and has multiple partially overlapping areas with the reference wires 211, 212, 214, 215 and the reference wires 232~235.

Similar to the aforementioned embodiment, the circuit board 200 of the embodiment of the present invention can stagger the reference wires 211-215, 231-235 of different metal layers, so as to effectively increase the overlapped area of the signal transmission wire 221 and the reference wires 211-215, 231-235, and thereby improve the uniformity of the signal transmission impedance of the signal transmission wire 221. The present embodiment also extends the reference wires 211-213, 214-215 in different directions D1 and D3, and extends the reference wires 231-233, 234-235 in different directions D2 and D4, so as to further increase the overlapped area of the signal transmission wire 221 and the reference wires 211-215, 231-235.

Please refer to FIG. 3, which shows a schematic diagram of the circuit board structure of an embodiment of the present invention. The circuit board 300 has multiple layers 310, 320 and 330. The layers 310, 320 and 330 respectively have a first metal layer 311, a second metal layer 321 and a third metal layer 331. Among them, multiple reference wires can be formed in each of the first metal layer 311 and the third metal layer 331. One or more signal transmission wires are formed in the second metal layer 321. The reference wire receives a reference ground voltage and can provide a reference plane for the signal transmission wire.

The arrangement of the signal transmission wires and the reference wires has been described in detail in the embodiments of Figures 1 and 2 above, so I will not elaborate on them here.

Please refer to FIG. 4, which is a schematic top view of a circuit board of another embodiment of the present invention. The circuit board 400 may be a multi-layer circuit board, in which the circuit board 400 may have a first metal layer, a second metal layer and a third metal layer respectively in the multiple layers. The first metal layer, the second metal layer and the third metal layer are stacked on each other. Among them, a plurality of reference wires 411-414 may be formed in the first metal layer. The reference wire 411 and the reference wire 412 are parallel to each other and have an offset distance. The reference wire 411 and the reference wire 413 are cross-arranged to form an "X" shape. The reference wire 413 and the reference wire 414 are parallel to each other and have an offset distance. Reference wire 412 and reference wire 414 are arranged to cross each other to form an "X" shape.

In addition, a plurality of reference wires 431-434 may be formed in the third metal layer. Reference wire 431 and reference wire 432 are parallel to each other and have an offset distance. Reference wire 431 and reference wire 433 are arranged to cross each other to form an "X" shape. Reference wire 433 and reference wire 434 are parallel to each other and have an offset distance. Reference wire 432 and reference wire 434 are arranged to cross each other to form an "X" shape. Furthermore, reference wires 431, 433, 434 have another offset distance from reference wires 411, 413, 414, respectively, so that reference wires 431, 433, 434 do not overlap with reference wires 411, 413, 414, respectively. In this embodiment, reference wire 413 partially overlaps with reference wires 431 and 432; reference wire 411 partially overlaps with reference wires 433 and 434; reference wire 414 partially overlaps with reference wire 431; and reference wire 412 partially overlaps with reference wire 434.

Signal transmission wires 421 and 422 are formed in the second metal layer. In this embodiment, the signal transmission wire 421 may have multiple partially overlapping regions with the reference wires 432, 411, 433, 413, 431, 434, 412, and 414. Similarly, the signal transmission wire 422 may have multiple partially overlapping regions with the reference wires 433, 432, 413, 411, 434, 414, 421, and 412. Through the above-mentioned multiple partially overlapping regions, the uniformity of the transmission impedance of the signal transmission wires 421 and 422 of the embodiment of the present invention can be effectively improved, thereby improving the efficiency of signal transmission.

Please refer to FIG. 5, which shows a flow chart of a circuit layout method of a circuit board of an embodiment of the present invention. In step S510, a plurality of first reference wires are formed in the first metal layer. In step S520, at least one signal transmission wire is formed in the second metal layer. In step S530, a plurality of second reference wires are formed in the third metal layer, wherein the first metal layer, the second metal layer and the third metal layer are overlapped with each other. In step S540, each first reference wire is not completely overlapped with each second reference wire.

The implementation details of the above steps have been described in detail in the aforementioned embodiments, so I will not elaborate on them here.

In summary, the circuit board of the present invention is configured by staggering the reference wires in different metal layers, thereby effectively increasing the area of the partially overlapping region of the signal transmission wire and the reference wire, effectively improving the uniformity of the transmission impedance of the signal transmission wire, and effectively improving the signal transmission efficiency.

100: Circuit board

111~113, 131~133: Reference wires

121: Signal transmission wire

D1, DT, D2: Direction

Claims (18)

A circuit board includes: a first metal layer, forming a plurality of first reference wires; a second metal layer, forming at least one signal transmission wire; and a third metal layer, forming a plurality of second reference wires, wherein the first reference wires partially overlap with the at least one signal transmission wire, the second reference wires partially overlap with the at least one signal transmission wire, and each first reference wire does not overlap with each second reference wire at all. A circuit board as described in claim 1, wherein the second metal layer is disposed between the first metal layer and the third metal layer. A circuit board as described in claim 1, wherein the first reference wires extend along a first direction and are arranged parallel to each other. A circuit board as described in claim 3, wherein the second reference wires extend along the first direction, the second reference wires are arranged parallel to each other, and are parallel to the first reference wires. A circuit board as described in claim 4, wherein the first metal layer further forms a plurality of third reference wires, wherein the third reference wires extend along a second direction, the third reference wires are arranged parallel to each other, and the first direction is different from the second direction. A circuit board as described in claim 5, wherein the third metal layer further forms a plurality of fourth reference wires, wherein the fourth reference wires extend along the second direction, and the fourth reference wires are arranged parallel to each other and parallel to the third reference wires. A circuit board as described in claim 5, wherein the slope in the first direction and the slope in the second direction are additive inverse elements of each other. A circuit board as described in claim 1, wherein the first reference wires and the second reference wires receive a reference ground voltage. A circuit board as described in claim 1, wherein the at least one signal transmission conductor partially overlaps with a plurality of the first reference conductors and a plurality of the second reference conductors. A circuit layout method includes: forming a plurality of first reference wires in a first metal layer; forming at least one signal transmission wire in a second metal layer, wherein the first reference wires partially overlap with the at least one signal transmission wire; forming a plurality of second reference wires in a third metal layer, wherein the second reference wires partially overlap with the at least one signal transmission wire; and making each of the first reference wires completely non-overlap with each of the second reference wires. A circuit layout method as described in claim 10, wherein the second metal layer is disposed between the first metal layer and the third metal layer. The circuit layout method as described in claim 10 further includes: extending the first reference wires along a first direction, and the first reference wires are arranged parallel to each other. The circuit layout method as described in claim 12 further includes: Extending the second reference wires along the first direction so that the second reference wires are arranged parallel to each other and parallel to the first reference wires. The circuit layout method as described in claim 13 further includes: forming a plurality of third reference wires on the first metal layer, wherein the third reference wires extend along a second direction, the third reference wires are arranged parallel to each other, and the first direction is different from the second direction. The circuit layout method as described in claim 14 further includes: forming a plurality of fourth reference wires on the third metal layer, wherein the fourth reference wires extend along the second direction, and the fourth reference wires are arranged parallel to each other and parallel to the third reference wires. A circuit layout method as described in claim 14, wherein the slope in the first direction and the slope in the second direction are additive inverse elements of each other. The circuit layout method as described in claim 10 further includes: allowing the first reference wires and the second reference wires to receive a reference ground voltage. The circuit layout method as described in claim 10 further includes: causing the at least one signal transmission wire to overlap with a plurality of the first reference wires and a plurality of the second reference wires.

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