TWI882715B - Semiconductor process - Google Patents

Abstract

A semiconductor process includes at least the following steps. A semiconductor substrate including a plurality of pads and a passivation layer is provided. The passivation layer has a plurality of openings to expose the pads. Form a UBM material layer on the pads and the passivation layer. Form a bump on the UBM material layer by electroplating, and overlaps with the pads and part of the passivation layer in a orthographic direction. Form a patterned photoresist layer on the bump. The patterned photoresist layer completely covers the bump and extends toward its outer periphery to cover the UBM material layer. An area covered by the patterned photoresist layer forms a first part of the UBM material layer, and an area not covered by the patterned photoresist layer forms a second part of the UBM material layer. The second portion of the UBM material layer that is not covered by the patterned photoresist layer and the bump is removed. The patterned photoresist layer is removed to expose the first portion originally covered by the patterned photoresist layer. A dry etching process is used to remove the first portion on the passivation layer to form a UBM layer. A side wall of the UBM layer are flush with a side wall of the bump.

Description

Semiconductor Process

The present invention relates to a semiconductor manufacturing process.

The etching liquid currently used in the formation of under ball metal layer (UBM) and bumps often has adverse effects on the bumps. For example, the bottom of the bump is prone to undercutting due to side etching, making the bottom size smaller than the top size. As a result, the electrical performance and reliability of the product will be reduced.

The present invention provides a semiconductor process that can improve the electrical performance and reliability of products.

A semiconductor manufacturing process of the present invention comprises at least the following steps. A semiconductor substrate comprising a plurality of pads and a passivation layer is provided. The passivation layer has a plurality of openings to expose the pads. A ball bottom metal material layer is formed on the pads and the passivation layer. A bump is formed on the ball bottom metal material layer by electroplating, and overlaps with the pad and a portion of the passivation layer in the orthographic projection direction. A patterned photoresist layer is formed on the bump. The patterned photoresist layer completely covers the bump and extends to its outer periphery to cover the ball bottom metal material layer. The area covered by the patterned photoresist layer forms the first part of the ball bottom metal material layer, and the area not covered by the patterned photoresist layer forms the second part of the ball bottom metal material layer. The second part of the ball bottom metal material layer not covered by the patterned photoresist layer and the bump is removed. The patterned photoresist layer is removed to expose the first part originally covered by the patterned photoresist layer. The first part located on the passivation layer is removed by a dry etching process to form the ball bottom metal layer. The sidewall of the ball bottom metal layer is aligned with the sidewall of the bump.

In one embodiment of the present invention, the step of forming the above-mentioned patterned photoresist layer includes forming a photoresist material on the bump and ball bottom metal material layer in an all-round manner; and removing the photoresist material on the second portion by means of a photomask.

In one embodiment of the present invention, the above-mentioned photoresist material is a negative photoresist, and the opening of the mask exposes the photoresist material on the bump and the first portion.

In one embodiment of the present invention, the above-mentioned photoresist material is a positive photoresist, and the opening of the mask exposes the photoresist material on the second portion.

In one embodiment of the present invention, the above-mentioned dry etching process includes reactive ion etching.

In one embodiment of the present invention, in the step of removing the above-mentioned first part, reactive ion etching is used to directly hit the first part of the bottom metal material layer of the ball to remove the first part.

In one embodiment of the present invention, the above-mentioned ball bottom metal material layer is a single layer material or a multi-layer material, and its material includes titanium, copper, tungsten, gold, silver, palladium, platinum or a combination thereof.

In one embodiment of the present invention, the above-mentioned bump is a single-layer material or a multi-layer material, and the material includes copper, nickel, gold, silver, tin, palladium, platinum, iron or a combination thereof.

In one embodiment of the present invention, the side wall of the ball bottom metal layer adjacent to the bump has a rough surface formed by reactive ion etching.

In one embodiment of the present invention, the distance that the patterned photoresist layer extends to either side of the bump is no more than two microns.

Based on the above, the present invention adopts two stages to remove the ball bottom metal material layer respectively, and introduces a protective patterned photoresist layer. In this way, when the portion of the ball bottom metal material layer not covered by the patterned photoresist layer is removed, the bottom of the bump can be effectively protected from adverse effects by being blocked by the patterned photoresist layer. In this way, the side etching and undercutting phenomenon of the bump can be effectively improved. After removing the patterned photoresist layer, a dry etching process (not using wet etching, that is, no etching liquid) is used to remove the portion of the ball bottom metal material layer originally covered by the patterned photoresist layer, so that the formed ball bottom metal layer will not be over-etched. Under the design of the aforementioned semiconductor process, the electrical performance and reliability of the product can be improved.

In order to make the above features and advantages of the present invention more clearly understood, the following is a detailed description of the embodiments with the accompanying drawings.

10, 140: Patterned photoresist layer

20, 30: Photomask

10a, 20a, 30a, 112a: Opening

11: Semiconductor substrate

100, 200: semiconductor structure

110: Base

111:Pad

112: Passivation layer

120, 220: metal layer at the bottom of the ball

120s, 130s, 220s, 230s: side wall

121, 121a, 121b, 221: Ball bottom metal material layer

130, 230: Bump

130e, 230e: outer periphery

131, 132, 133: Metal layer

141, 142: Photoresist material

141a, 142b: Unexposed parts

141b, 142a: Exposure part

d: distance

P1, P12, P22, P2: Partial

Figures 1A to 1G are cross-sectional schematic diagrams of a semiconductor structure formed by a semiconductor manufacturing process according to an embodiment of the present invention.

Figure 2 is a cross-sectional schematic diagram of an intermediate step of a semiconductor manufacturing process according to another embodiment of the present invention.

Figures 3A to 3G are cross-sectional schematic diagrams of another semiconductor structure formed by a semiconductor process according to another embodiment of the present invention.

The present invention is more fully described with reference to the drawings of the present embodiment. However, the present invention may be embodied in various forms and should not be limited to the embodiments described herein. The thickness, size or dimensions of the layers or regions in the drawings are exaggerated for clarity. The same or similar reference numbers represent the same or similar elements, and the following paragraphs will not be repeated one by one.

Unless expressly stated otherwise, in no way should any method described herein be construed as requiring that its steps be performed in a specific order.

FIG. 1A to FIG. 1G are cross-sectional schematic diagrams of a semiconductor structure formed by a semiconductor process of an embodiment of the present invention. Referring to FIG. 1A , a semiconductor substrate 11 including a base 110, a plurality of pads 111 (only one is schematically shown) and a passivation layer 112 is provided. In some embodiments, the semiconductor substrate 11 can be a silicon chip, so the base 110 is, for example, a silicon wafer, and appropriate semiconductor elements (not shown) can be arranged in the base 110 according to the requirements of the chip type.

Furthermore, the pads 111 and the passivation layer 112 are disposed on the substrate 110, and the passivation layer 112 has a plurality of openings 112a to expose the pads 111, so that the pads 111 can be used as input/output (I/O) terminals of the semiconductor substrate 11, wherein the material of the pads 111 can be aluminum, copper or other appropriate conductive materials, and the material of the passivation layer 112 is, for example, silicon oxide, silicon nitride or other appropriate insulating materials.

Next, a ball bottom metal material layer 121 is formed on the semiconductor substrate 11. For example, the ball bottom metal material layer 121 can be formed on the pad 111 and the passivation layer 112. In this embodiment, as shown in FIG. 1A, the ball bottom metal material layer 121 can be a double-layer structure including a first ball bottom metal material layer 121a and a second ball bottom metal material layer 121b, that is, the ball bottom metal material layer 121 is a multi-layer material, but the present invention is not limited thereto. In other embodiments, other different implementations will be described.

In some embodiments, the material of the ball bottom metal material layer 121 includes titanium, copper, tungsten, gold, silver, palladium, platinum or a combination thereof. For example, the first ball bottom metal material layer 121a may be a titanium layer, and the second ball bottom metal material layer 121b may be a copper layer, but the present invention is not limited thereto. The first ball bottom metal material layer 121a and the second ball bottom metal material layer 121b may also be other material combinations. Here, the ball bottom metal material layer 121 is formed, for example, by a sputtering process.

Please refer to FIG. 1B and FIG. 1C , a first patterned photoresist layer 10 having an opening 10a is formed on the ball bottom metal material layer 121, and a bump 130 is formed in the opening 10a, wherein the bump 130 can be formed on the ball bottom metal material layer 121 by plating, and overlaps with the pad 111 and part of the passivation layer 112 in the orthographic projection direction. It should be noted that the material of the first patterned photoresist layer 10 can be selected as a positive photoresist (as shown in FIG. 2 ) or a negative photoresist (as shown in FIG. 1D ), and the bump 130 can also be formed by other appropriate methods, and is not limited to the plating process.

In this embodiment, the bump 130 may be a three-layer structure including a first metal layer 131, a second metal layer 132, and a third metal layer 133, that is, the bump 130 is a multi-layer material, but the present invention is not limited thereto, and in other embodiments, other different implementations will be described.

In some embodiments, the material of the bump 130 includes copper, nickel, gold, silver, tin, palladium, platinum, iron or a combination thereof. For example, the first metal layer 131 may be a copper layer, the second metal layer 132 may be a nickel layer, and the third metal layer 133 may be a gold layer, but the present invention is not limited thereto. The first metal layer 131, the second metal layer 132 and the third metal layer 133 may also be other material combinations.

In the current semiconductor manufacturing process, when the two layers directly contacting the ball bottom metal material layer 121 and the bump 130 are the same material, preferably the second ball bottom metal material layer 121b and the first metal layer 131 can both use copper layers, and the side etching undercut phenomenon will be particularly significant. Therefore, the present invention can be applied to the two layers directly contacting the ball bottom metal material layer 121 and the bump 130. It can have more advantages, but the present invention is not limited to this.

Please refer to FIG. 1C , after the bump 130 is formed, the first patterned photoresist layer 10 is removed to expose the underlying ball bottom metal material layer 121. Then, a photoresist material 141 is formed on the bump 130 and the ball bottom metal material layer 121.

Referring to FIG. 1D and FIG. 1E , a patterned photoresist layer 140 (from a photoresist material 141) is formed on the bump 130, wherein the patterned photoresist layer 140 completely covers the bump 130 and extends to its outer periphery 130e to cover the ball bottom metal material layer 121, wherein the portion covered by the patterned photoresist layer 140 forms a first portion P1 of the ball bottom metal material layer 121, and the portion not covered by the patterned photoresist layer 140 forms a second portion P2 of the ball bottom metal material layer 121. An exemplary formation process of the patterned photoresist layer 140 will be further described below.

In this embodiment, as shown in FIG. 1D , the photoresist material 141 may be a negative photoresist formed by a suitable deposition process, and the photoresist material 141 on the second portion P2 may be removed by the photomask 20. For example, the opening 20a of the photomask 20 used in the exposure process may expose the position where the patterned photoresist layer 140 is to be formed, such as exposing the photoresist material 141 on the bump 130 and the first portion P1. In this way, the unexposed portion 141a will dissolve in the developer in the subsequent development process, while the exposed portion 141b will not dissolve in the developer in the subsequent development process due to cross-linking and curing, thereby forming a patterned photoresist layer 140 that protects the bump 130 and the first portion P1 of the ball bottom metal material layer 121.

Next, as shown in FIG. 1E , the second portion P2 of the ball bottom metal material layer 121 that is not covered by the patterned photoresist layer 140 and the bump 130 is removed by, for example, a wet etching process. In this step, the bump 130 can be truly covered by the patterned photoresist layer 140, so that the etching liquid used in the wet etching process can be prevented from having adverse effects on the bump 130 (such as over-etching). Here, the etching liquid of the wet etching process can be selected according to the material of the ball bottom metal material layer 121, and the present invention is not limited thereto.

In some embodiments, the distance d that the patterned photoresist layer 140 extends to either side of the bump 130 is preferably no more than two micrometers, so as to reduce the probability that the size (such as thickness) of the bump 130 is affected by the subsequent removal of the first portion P1 for too long, but the present invention is not limited thereto. In other embodiments, the distance d that the patterned photoresist layer 140 extends to either side of the bump 130 may also exceed two micrometers. The actual distance depends on the required size, and the present invention is not limited thereto.

In some embodiments, the distance d that the patterned photoresist layer 140 extends to the two sides of the bump 130 can be the same to further simplify the process difficulty, but the present invention is not limited to this.

In some embodiments, the sidewalls of the patterned photoresist layer 140 are aligned with the sidewalls of the first portion P1, and the outer periphery 130e of the bump 130 is retracted to the sidewalls of the patterned photoresist layer 140 and the sidewalls of the first portion P1, but the present invention is not limited thereto.

Please refer to FIG. 1F , the patterned photoresist layer 140 is removed to expose the first portion P1 originally covered by the patterned photoresist layer 140 , wherein the first portion P1 may protrude from the outer periphery 130e of the bump 130 .

1G , a dry etching process is used to remove the first portion P1 on the passivation layer 112 to form an under-ball metal layer 120 , wherein a sidewall 120s of the under-ball metal layer 120 is aligned with a sidewall 130s of the bump 130 . The semiconductor structure 100 is substantially completed through the above-mentioned manufacturing process. Accordingly, in this embodiment, the ball bottom metal material layer 121 is removed in two steps, and a protective patterned photoresist layer 140 is introduced. Thus, when the portion of the ball bottom metal material layer 121 not covered by the patterned photoresist layer 140 is removed, the bottom of the bump 130 can be effectively protected from adverse effects by being blocked by the patterned photoresist layer 140. In order to effectively improve the undercut phenomenon of the bump 130, after removing the patterned photoresist layer 140, a dry etching process (not using an etching liquid) is used to remove the portion of the ball bottom metal material layer 121 originally covered by the patterned photoresist layer 140, so that the formed ball bottom metal layer 120 is only located below the bump 130. Under the design of the aforementioned semiconductor process, the electrical performance and reliability of the product can be improved.

In some embodiments, since the removal rate of the wet etching process is higher and the removal accuracy of the dry etching process is higher, the design of the semiconductor process of this embodiment can benefit from the combination of these two different etching processes in terms of process time and process cost.

In some embodiments, when the line width of the semiconductor structure is less than or equal to 5 microns (fine pitch), the undercut phenomenon will occur more easily, making the bonding area between the bump 130 and the pad 111 too small, thereby causing peeling. Therefore, in the above situation, the semiconductor process design of this embodiment can have a more significant improvement effect to maintain a better bonding area between the bump 130 and the pad 111.

In some embodiments, the dry etching process includes reactive ion etching (RIE), and the reactive ion etching can directly attack the first portion P1 of the ball bottom metal material layer 121 to remove the first portion P1, so that the sidewall 120s of the ball bottom metal layer 120 and the sidewall 130s adjacent to the bump 130 have a surface formed by the reactive ion etching. Rough surface (for example, under microscopic conditions, the sidewall 120s of the ball bottom metal layer 120 and the sidewall 130s adjacent to the bump 130 have an uneven roughened surface). In other words, the sidewall 120s of the ball bottom metal layer 120 and the sidewall 130s adjacent to the bump 130 have substantially the same or similar roughness, but the present invention is not limited thereto.

In some embodiments, since reactive ion etching has the advantage of adjustable etching directionality, in this embodiment, etching can be performed on a local area in a direction from top to bottom, so the passivation layer 112 below the first portion P1 will also have a rough surface formed by reactive ion etching after the first portion P1 is removed, and the roughness here will also be greater than the roughness of the surrounding surface that has not been subjected to reactive ion etching (such as the passivation layer 112 below the second portion P2), but the present invention is not limited to this.

It must be noted here that the following embodiments use the component numbers and some contents of the above embodiments, wherein the same or similar numbers are used to represent the same or similar components, and the description of the same technical contents is omitted. For the description of the omitted parts, please refer to the above embodiments, and the following embodiments will not be repeated.

FIG. 2 is a cross-sectional schematic diagram of an intermediate step of a semiconductor manufacturing process according to another embodiment of the present invention. Please refer to FIG. 2. Compared with FIG. 1D, the photoresist material 142 of this embodiment can be a positive photoresist formed by a suitable deposition process, and the photoresist material 142 on the second portion P2 can be removed by the photomask 30. For example, the opening 30a of the photomask 30 used for performing the exposure process can expose a position other than the patterned photoresist layer 140 to be formed, such as exposing the photoresist material 142 on the second portion P2. In this way, the exposed portion 142a will be dissolved in the developer due to a photochemical reaction in the subsequent development process, while the unexposed portion 142b will not be dissolved in the developer in the subsequent development process, thereby forming a patterned photoresist layer 140 of the first portion P1 of the protective bump 130 and the ball bottom metal material layer 121 (as shown in FIG. 1E).

FIG. 3A to FIG. 3G are cross-sectional schematic diagrams of another semiconductor structure formed by a semiconductor process according to another embodiment of the present invention. Referring to FIG. 3A, compared with FIG. 1A, the ball bottom metal material layer 221 depicted in the diagram of this embodiment is a single-layer material for schematic illustration, but it is not intended to limit the present invention. In another embodiment, the ball bottom metal layer of the present invention may also be a combination of multiple layers of materials (such as the ball bottom metal layer 120 of FIG. 1G), and the material of the ball bottom metal material layer 221 includes titanium, copper, tungsten, gold, silver, palladium, platinum or a combination thereof. Other formation details of the ball bottom metal material layer 221 are similar to those of the ball bottom metal material layer 121, and will not be repeated here.

Please refer to FIG. 3B and FIG. 3C. Compared with FIG. 1B and FIG. 1C, the bump 230 of this embodiment is a single-layer material, which includes copper, nickel, gold, silver, tin, palladium, platinum, iron or a combination thereof. And according to the selected material of the bump 230, a suitable material of the ball bottom metal material layer 221 is selected. In this embodiment, if the material of the bump 230 includes gold, the material of the ball bottom metal material layer 221 may include titanium tungsten, gold or a combination thereof. In other feasible embodiments, if the material of the bump of the present invention includes copper or silver, the material of the ball bottom metal material layer 221 may include titanium, copper or a combination thereof, but the present invention is not limited thereto. In principle, the material of the ball bottom metal material layer 221 depends on the material of the bump 230. Any material with good conductivity and good bonding with the bump material can be used as the ball bottom metal layer. Other formation details of the bump 230 are similar to the bump 130 in the previous embodiment and will not be repeated here.

Please refer to FIG. 3D and FIG. 3E. Similar to FIG. 1D and FIG. 1E, a patterned photoresist layer 140 is formed on the bump 230, wherein the patterned photoresist layer 140 completely covers the bump 230 and extends to its outer periphery 230e to cover the ball bottom metal material layer 221, wherein the area covered by the patterned photoresist layer 140 forms the first part P12 of the ball bottom metal material layer 221, and the area not covered by the patterned photoresist layer 140 forms the second part P22 of the ball bottom metal material layer 221.

Please refer to FIG. 3F. Similar to FIG. 1F, the patterned photoresist layer 140 is removed to expose the first portion P12 originally covered by the patterned photoresist layer 140, wherein the first portion P12 may protrude from the outer periphery 230e of the bump 230.

Please refer to FIG. 3G. Similar to FIG. 1G, a dry etching process is used to remove the first portion P12 located on the passivation layer 112 to form a ball bottom metal layer 220, wherein the side wall 220s of the ball bottom metal layer 220 is aligned with the side wall 230s of the bump 230. The semiconductor structure 200 is substantially completed through the above-mentioned manufacturing process.

In summary, the present invention adopts two stages to remove the ball bottom metal material layer respectively, and introduces a protective patterned photoresist layer. In this way, when removing the portion of the ball bottom metal material layer not covered by the patterned photoresist layer, the bottom of the bump can be effectively protected from adverse effects by blocking the patterned photoresist layer. In this way, the side etching and undercutting phenomenon of the bump can be effectively improved. After removing the patterned photoresist layer, a dry etching process (not using an etching liquid) is used to remove the portion of the ball bottom metal material layer originally covered by the patterned photoresist layer, so that the formed ball bottom metal layer will not be over-etched. Under the design of the aforementioned semiconductor process, the electrical performance and reliability of the product can be improved.

Although the present invention has been disclosed as above by the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the relevant technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope of the attached patent application.

140: Patterned photoresist layer

112a: Opening

110: Base

111:Pad

112: Passivation layer

121, 121a, 121b: metal material layer at the bottom of the ball

130: Bump

130e: Periphery

131, 132, 133: Metal layer

d: distance

P1: Part

Claims (10)

A semiconductor manufacturing process, comprising: Providing a semiconductor substrate, comprising a plurality of pads and a passivation layer, wherein the passivation layer has a plurality of openings to expose the pads; Forming a ball bottom metal material layer on the pads and the passivation layer; Electroplating to form a bump on the ball bottom metal material layer, and overlapping with the pad and a portion of the passivation layer in the orthographic projection direction; Forming a patterned photoresist layer on the bump, wherein the patterned photoresist layer completely covers the bump and extends to its outer periphery to cover the ball bottom metal material layer, the portion covered by the patterned photoresist layer forms the first portion of the ball bottom metal material layer, and the portion not covered by the patterned photoresist layer forms the second portion of the ball bottom metal material layer; Removing the second portion of the ball bottom metal material layer not covered by the patterned photoresist layer and the bump; Removing the patterned photoresist layer to expose the first portion originally covered by the patterned photoresist layer; and The first portion located on the passivation layer is removed by a dry etching process to form a bottom ball metal layer, wherein the sidewall of the bottom ball metal layer is aligned with the sidewall of the bump. The semiconductor process as described in claim 1, wherein the step of forming the patterned photoresist layer includes: forming a photoresist material on the bump and ball bottom metal material layer in an all-round manner; and removing the photoresist material on the second portion by using a photomask. A semiconductor process as described in claim 2, wherein the photoresist material is a negative photoresist, and the opening of the mask exposes the photoresist material on the bump and the first portion. A semiconductor process as described in claim 2, wherein the photoresist material is a positive photoresist, and the opening of the mask exposes the photoresist material on the second portion. A semiconductor process as described in claim 1, wherein the dry etching process includes reactive ion etching. A semiconductor process as described in claim 5, wherein in the step of removing the first portion, the reactive ion etching is used to directly bombard the first portion of the ball bottom metal material layer to remove the first portion. A semiconductor process as described in claim 1, wherein the ball bottom metal material layer is a single layer material or a multi-layer material, and its material includes titanium, copper, tungsten, gold, silver, palladium, platinum or a combination thereof. A semiconductor process as described in claim 1, wherein the bump is a single-layer material or a multi-layer material, and the material includes copper, nickel, gold, silver, tin, palladium, platinum, iron or a combination thereof. A semiconductor process as described in claim 1, wherein the side wall of the ball bottom metal layer and the side wall adjacent to the bump have a rough surface formed by reactive ion etching. A semiconductor process as described in claim 1, wherein the distance that the patterned photoresist layer extends to either side of the bump is no more than two microns.

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