1:埠控制器
1: Port controller
6:AC-DC電壓轉換器
6:AC-DC voltage converter
7:DC-DC電壓轉換器
7:DC-DC voltage converter
8,9:電子裝置
8,9: Electronic devices
10:儲存器
10: Storage
11:計數器電路
11: Counter circuit
12:重載控制電路
12: Heavy load control circuit
13:感測電路
13: Sensing circuit
14:監控電路
14: Monitoring circuit
15:取樣電路
15: Sampling circuit
16:判斷電路
16: Judgment circuit
17:保護控制電路
17: Protection control circuit
18:控制電路
18: Control circuit
19:回授控制電路
19: Feedback control circuit
20:偵測電路
20: Detection circuit
30:匹配計數器電路
30: Matching counter circuit
31:輸出電路
31: Output circuit
32:外部溫度感測器
32: External temperature sensor
40~44:或閘
40~44: or gate
45~48:及閘
45~48: and the gate
50,51:誤差放大器
50,51: Error amplifier
52,53:開關
52,53: switch
54:電阻器
54: Resistor
60:橋式整流器
60: Bridge rectifier
61:整流二極體
61: Rectifier diode
62:PWM控制器
62:PWM controller
63:功率電晶體
63: Power transistor
64:光耦合器
64: Optocoupler
65:開關
65: Switch
66:電壓供應裝置
66: Voltage supply device
70:開關
70: Switch
71:電壓供應裝置
71: Voltage supply device
80:內部電路
80: Internal circuit
81:開關
81: Switch
90:電源供應器
90: Power supply
91:開關
91: Switch
130,131:電阻器
130,131: Resistor
132:運算放大器
132: Operational amplifier
133,134:電阻器
133,134: Resistor
135:內部溫度感測器
135: Internal temperature sensor
150:多工器
150:Multiplexer
151:類比數位轉換器(ADC)
151: Analog-to-digital converter (ADC)
152:解多工器
152: Demultiplexer
160~164:緩衝器(BUF)
160~164: Buffer (BUF)
165~169:及閘
165~169: and the gate
490~493:驅動器
490~493:Driver
494:電晶體
494: Transistor
495:電阻器
495: Resistor
496:電晶體
496: Transistor
640:發光二極體
640: LED
641:光接收器
641: Optical receiver
ADC3:輸入端
ADC3: input terminal
C60~C64:電容器
C60~C64: Capacitors
CC1,CC2:I2C配置通道(CC)端
CC1, CC2: I2C configuration channel (CC) terminal
CATH:控制輸出端
CATH: control output terminal
CM30~CM34:比較器
CM30~CM34: Comparator
Disc:放電端
Disc: discharge end
E30~E34:致能信號
E30~E34: Enable signal
F30~F34:旗標信號
F30~F34: Flag signal
GND,GND60,GND61:接地
GND, GND60, GND61: Grounding
Gnd:接地端
Gnd: Ground terminal
I2C_CLK:I2C時脈端
I2C_CLK: I2C clock terminal
I2C_DATA:I2C資料端
I2C_DATA: I2C data port
IFB:電流回授端
IFB: Current feedback terminal
IS+:正電流輸入端
IS+: Positive current input terminal
IS-:負電流輸入端
IS-: Negative current input terminal
L60:一次側線圈
L60: primary coil
L61:二次側線圈
L61: Secondary coil
MC30~MC34:匹配計數器
MC30~MC34: Matching counter
N30,N80:節點
N30, N80: Node
NTC:輸入端
NTC: Input terminal
P60,P70,P80:Type-C輸入輸出埠
P60, P70, P80: Type-C input and output port
R60~R64:電阻器
R60~R64: Resistor
RC60,RC61:RC電路
RC60,RC61:RC circuit
S12:控制信號
S12: Control signal
S13_30~S13_34:感測信號
S13_30~S13_34: Sensing signal
S14A,S14B,S14C:控制信號
S14A, S14B, S14C: control signal
S16A_30~S16A_34:保護啟動信號
S16A_30~S16A_34: Protection start signal
S16B:狀態信號
S16B: Status signal
S16C:連續偵測信號
S16C: Continuous detection signal
S30~S34:比較信號
S30~S34: Comparison signal
S50,S51:切換信號
S50, S51: Switching signal
S150:輸出信號
S150: Output signal
T30~T34:輸入端
T30~T34: Input terminal
T60:變壓器
T60: Transformer
TH30~TH34:臨界值
TH30~TH34: critical value
TOUT:電壓輸出端
TOUT: voltage output terminal
V10_OVP,V10_UVP,V10_OCP,V10_SCP,V10_NTC,V10_IT,V10_EADC:初始值
V10_OVP, V10_UVP, V10_OCP, V10_SCP, V10_NTC, V10_IT, V10_EADC: initial value
V11,V11_20~V11_26:計數值
V11, V11_20~V11_26: count value
V50:可變控制電壓
V50: variable control voltage
VTH50,VTH51:臨界電壓
VTH50, VTH51: critical voltage
V151:取樣值
V151: Sampling value
V152_30~V152_34:感測取樣值
V152_30~V152_34: Sensing sampling value
Vin:電壓輸入端
Vin: voltage input terminal
VBUS:匯流排電壓端
VBUS: bus voltage terminal
VFB:電壓回授端
VFB: voltage feedback terminal
VIN80:輸入電壓
VIN80: Input voltage
VIN_GATE,VBUS_GATE:閘極驅動端
VIN_GATE,VBUS_GATE: gate drive end
VOUT60,VOUT70,VOUT90:輸出電壓
VOUT60, VOUT70, VOUT90: output voltage
第1圖表示根據本發明一實施例的埠控制器。
Figure 1 shows a port controller according to an embodiment of the present invention.
第2圖表示根據本發明一實施例，第1圖的埠控制器中的計數器電路以及重載控制電路。
FIG. 2 shows the counter circuit and overload control circuit in the port controller of FIG. 1 according to an embodiment of the present invention.
第3圖表示根據本發明一實施例，第1圖的埠控制器中的感測電路以及判斷電路。
FIG. 3 shows the sensing circuit and judgment circuit in the port controller of FIG. 1 according to an embodiment of the present invention.
第4圖表示根據本發明一實施例，第1圖的埠控制器中的保護控制電路。
Figure 4 shows the protection control circuit in the port controller of Figure 1 according to an embodiment of the present invention.
第5圖表示根據本發明一實施例，第1圖的埠控制器中的回授控制電路。
FIG. 5 shows the feedback control circuit in the port controller of FIG. 1 according to an embodiment of the present invention.
第6圖表示第1圖的埠控制器連接AC-DC電壓轉換器的示意圖。
Figure 6 shows a schematic diagram of the port controller in Figure 1 connected to an AC-DC voltage converter.
第7圖表示第1圖的埠控制器連接DC-DC電壓轉換器的示意圖。
Figure 7 shows a schematic diagram of the port controller in Figure 1 connected to a DC-DC voltage converter.
第8圖表示第1圖的埠控制器應用於作為電源接受端(Sink)的電子
裝置的示意圖。
Figure 8 is a schematic diagram showing the port controller in Figure 1 being applied to an electronic device that serves as a power sink.
第9圖表示第1圖的埠控制器應用於具有電源上雙角色的電子裝置的示意圖。
FIG. 9 is a schematic diagram showing the application of the port controller in FIG. 1 to an electronic device having a dual role in terms of power supply.
為使本發明之上述目的、特徵和優點能更明顯易懂，下文特舉一較佳實施例，並配合所附圖式，作詳細說明如下。
In order to make the above-mentioned purposes, features and advantages of the present invention more clearly understood, a preferred embodiment is given below, and a detailed description is given in conjunction with the attached drawings.
第1圖係表示根據本發明一實施例的埠控制器。參閱第1圖，埠控制器1包括儲存器10、計數器電路11、重載控制電路12、感測電路13、監控電路14、取樣電路15、判斷電路16、保護控制電路17、控制電路18、以及回授控制電路19。儲存器10、計數器電路11、重載控制電路12、感測電路13、監控電路14、取樣電路15、判斷電路16、以及保護控制電路17組成偵測電路20。在此實施例中，埠控制器1為Type-C埠控制器(Type-C Port Converter，TCPC)。埠控制器1還包括複數個輸入端以及輸出端。在第1圖中僅顯示與本案特徵相關的輸入端以及輸出端。參閱第1圖，埠控制器1包括接地端Gnd(連接接地GND)、電壓輸入端Vin、控制輸出端CATH、電壓回授端VFB、電流回授端IFB、正電流輸入端IS+、負電流輸入端IS-、I2C配置通道(Configuration Channel，CC)端CC1與CC2、輸入端NTC與ADC3、I2C時脈端I2C_CLK、I2C資料端12C_DATA、匯流排電壓端VBUS、放電端Disc、以及閘極驅動端ViN_GATE與VBUS_GATE。當埠控制器1以單一晶片來實現時，
上述各端作為晶片的接腳。埠控制器1可透過I2C時脈端I2C_CLK以及I2C資料端I2C_DATA與Type-C埠管理器(Type-C Port Manager，TCPM)或與另一TCPC進行通信溝通。
FIG. 1 shows a port controller according to an embodiment of the present invention. Referring to FIG. 1 , the port controller 1 includes a memory 10, a counter circuit 11, a reload control circuit 12, a sensing circuit 13, a monitoring circuit 14, a sampling circuit 15, a judgment circuit 16, a protection control circuit 17, a control circuit 18, and a feedback control circuit 19. The memory 10, the counter circuit 11, the reload control circuit 12, the sensing circuit 13, the monitoring circuit 14, the sampling circuit 15, the judgment circuit 16, and the protection control circuit 17 constitute a detection circuit 20. In this embodiment, the port controller 1 is a Type-C port controller (Type-C Port Converter, TCPC). The port controller 1 also includes a plurality of input terminals and output terminals. Only the input and output terminals related to the features of this case are shown in Figure 1. Referring to Figure 1, the port controller 1 includes a ground terminal Gnd (connected to the ground GND), a voltage input terminal Vin, a control output terminal CATH, a voltage feedback terminal VFB, a current feedback terminal IFB, a positive current input terminal IS+, a negative current input terminal IS-, I2C configuration channel (CC) terminals CC1 and CC2, input terminals NTC and ADC3, I2C clock terminal I2C_CLK, I2C data terminal I2C_DATA, bus voltage terminal VBUS, discharge terminal Disc, and gate drive terminals ViN_GATE and VBUS_GATE. When the port controller 1 is implemented with a single chip, the above terminals serve as the pins of the chip. Port controller 1 can communicate with the Type-C Port Manager (TCPM) or another TCPC through the I2C clock terminal I2C_CLK and the I2C data terminal I2C_DATA.
控制電路18可執行至少一通信操作。在埠控制器1連接一USB Type-C輸入輸出埠的情況下，控制電路18可執行透過此USB Type-C輸入輸出埠執行的至少一通信操作。舉例來說，控制電路18所執行的通信操作包括匯流排電壓(VBUS)控制通信、電纜供電電壓(VCONN)控制、CC邏輯控制、USB供電(USB Power Delivery，USB PD)協定通信中至少一者。
The control circuit 18 can perform at least one communication operation. When the port controller 1 is connected to a USB Type-C input/output port, the control circuit 18 can perform at least one communication operation performed through the USB Type-C input/output port. For example, the communication operation performed by the control circuit 18 includes at least one of bus voltage (V BUS ) control communication, cable power supply voltage (VCONN) control, CC logic control, and USB power delivery (USB PD) protocol communication.
以下，將透過第1~4圖來詳細說明偵測電路20的電路架構以及其執行的保護操作。
Below, the circuit structure of the detection circuit 20 and the protection operation it performs will be described in detail through Figures 1 to 4.
參閱第1與2圖，儲存器10儲存至少兩個初始值。計數器電路11包括至少兩個計數器。在此實施例中，以計數器電路11包括七個計數器DC20~DC26為例子。基於七個計數器DC20~DC26，記憶體10儲存七個初始值V10_OVP、V10_UVP、V10_OCP、V10_SCP、V10_NTC、V10_IT、以及V10_EADC。在偵測電路20的操作期間，初始值V10_OVP、V10_UVP、V10_OCP、V10_SCP、V10_NTC、V10_IT、以及V10_EADC分別載入至計數器DC20~DC26。在此實施例中，計數器DC20~DC26以向下計數器來實現。計數器DC20~DC26分別從初始值V10_OVP、V10_UVP、V10_OCP、V10_SCP、V10_NTC、V10_IT、以及V10_EADC開始執行向下計數操作，以分別產生多
個計數值V11，包括計數值V11_20~V11_26。舉例來說，初始值V10_OVP、V10_UVP、V10_OCP、V10_SCP、V10_NTC、V10_IT、以及V10_EADC分別為255、255、255、255、1、0、0，但不以此為限。
Referring to FIGS. 1 and 2 , the memory 10 stores at least two initial values. The counter circuit 11 includes at least two counters. In this embodiment, the counter circuit 11 includes seven counters DC20 to DC26 as an example. Based on the seven counters DC20 to DC26, the memory 10 stores seven initial values V10_OVP, V10_UVP, V10_OCP, V10_SCP, V10_NTC, V10_IT, and V10_EADC. During the operation of the detection circuit 20, the initial values V10_OVP, V10_UVP, V10_OCP, V10_SCP, V10_NTC, V10_IT, and V10_EADC are loaded into the counters DC20 to DC26, respectively. In this embodiment, counters DC20-DC26 are implemented as down counters. Counters DC20-DC26 start to perform down counting operations from initial values V10_OVP, V10_UVP, V10_OCP, V10_SCP, V10_NTC, V10_IT, and V10_EADC, respectively, to generate multiple count values V11, including count values V11_20-V11_26. For example, the initial values V10_OVP, V10_UVP, V10_OCP, V10_SCP, V10_NTC, V10_IT, and V10_EADC are 255, 255, 255, 255, 1, 0, 0, respectively, but are not limited thereto.
重載控制電路12包括緩衝器120~126以及及閘127~129。緩衝器120~126的各自輸入端分別耦接計數器DC20~DC26。及閘127的三個輸入端分別耦接緩衝器120~122的輸出端，即是計數值V11_20~V11_22分別透過緩衝器120~122傳送至及閘127。及閘128的三個輸入端分別耦接緩衝器124~126的輸出端，即是計數值V11_24~V11_26分別透過緩衝器124~126傳送至及閘128。及閘129具有三個輸入端。及閘129的第一個輸入端耦接緩衝器123的輸出端，即是計數值V11_23分別透過緩衝器123傳送至及閘129的第一個輸入端。及閘129的第二個與第三個輸入端分別耦接及閘127與128的輸出端。及閘129的輸出端耦接計數器電路11。
The reload control circuit 12 includes buffers 120-126 and AND gates 127-129. The input terminals of the buffers 120-126 are respectively coupled to the counters DC20-DC26. The three input terminals of the AND gate 127 are respectively coupled to the output terminals of the buffers 120-122, that is, the count values V11_20-V11_22 are respectively transmitted to the AND gate 127 through the buffers 120-122. The three input terminals of the AND gate 128 are respectively coupled to the output terminals of the buffers 124-126, that is, the count values V11_24-V11_26 are respectively transmitted to the AND gate 128 through the buffers 124-126. The AND gate 129 has three input terminals. The first input terminal of the AND gate 129 is coupled to the output terminal of the buffer 123, that is, the count value V11_23 is transmitted to the first input terminal of the AND gate 129 through the buffer 123. The second and third input terminals of the AND gate 129 are coupled to the output terminals of the AND gates 127 and 128 respectively. The output terminal of the AND gate 129 is coupled to the counter circuit 11.
基於重載控制電路12的電路架構，當所有的計數值V11_20~V11_26皆等於零時，及閘129輸出控制信號S12，以控制計數器電路11的所有向下計數器DC20~DC26再次從記憶體10讀取各自的初始值，即是上述七個初始值分別重新載入至向下計數器DC20~DC2。因此，計數器DC20~DC26再次分別從初始值V10_OVP、V10_UVP、V10_OCP、V10_SCP、V10_NTC、V10_IT、以及V10_EADC開始執行向下計數操作。
Based on the circuit structure of the reload control circuit 12, when all count values V11_20~V11_26 are equal to zero, the AND gate 129 outputs the control signal S12 to control all down counters DC20~DC26 of the counter circuit 11 to read their initial values from the memory 10 again, that is, the above seven initial values are reloaded into the down counters DC20~DC2 respectively. Therefore, the counters DC20~DC26 start to perform down counting operations again from the initial values V10_OVP, V10_UVP, V10_OCP, V10_SCP, V10_NTC, V10_IT, and V10_EADC respectively.
在此實施例中，計數器DC20~DC26所產生的計數值V11_20~V11_26也傳送至監控電路14。
In this embodiment, the count values V11_20~V11_26 generated by the counters DC20~DC26 are also transmitted to the monitoring circuit 14.
第3圖係表示根據本發明一實施例的感測電路13以及判斷電路16。為了能清楚說明感測電路13以及判斷電路16的操作，第3圖同時顯示監控電路14以及取樣電路15。此外，第3圖僅顯示埠控制器1中與感測電路13連接的多個輸入端，包括正電流輸入端IS+、負電流輸入端IS-、電壓輸入端Vin、以及輸入端NTC與ADC3。在本發明的實施例中，感測電路13包括用於偵測或感測埠控制器1所在的系統的環境參數以及/或埠控制器1的內部溫度的電路。舉例來說，在此實施例中，感測電路13包括電阻器130與131，以組成一電壓偵測器，用於偵測電壓輸入端Vin的輸入電壓。在此實施例中，電壓輸入端Vin的輸入電壓可以是埠控制器1所在的系統上的電源輸出路徑、電源輸入路徑、或者是系統上一關鍵路徑上的電壓。參閱第3圖，電阻器130與131串接於電壓輸入端Vin與接地端Gnd之間，以組成一分壓電路架構。根據此分壓電路架構的操作，於電阻器130與131之間的節點N30上產生感測信號S13_30，其表示電壓輸入端Vin的輸入電壓的大小。
FIG. 3 shows a sensing circuit 13 and a determination circuit 16 according to an embodiment of the present invention. In order to clearly explain the operation of the sensing circuit 13 and the determination circuit 16, FIG. 3 simultaneously shows the monitoring circuit 14 and the sampling circuit 15. In addition, FIG. 3 only shows a plurality of input terminals in the port controller 1 connected to the sensing circuit 13, including a positive current input terminal IS+, a negative current input terminal IS-, a voltage input terminal Vin, and input terminals NTC and ADC3. In an embodiment of the present invention, the sensing circuit 13 includes a circuit for detecting or sensing an environmental parameter of a system in which the port controller 1 is located and/or an internal temperature of the port controller 1. For example, in this embodiment, the sensing circuit 13 includes resistors 130 and 131 to form a voltage detector for detecting the input voltage of the voltage input terminal Vin. In this embodiment, the input voltage of the voltage input terminal Vin can be a power output path, a power input path, or a voltage on a key path of the system where the port controller 1 is located. Referring to FIG. 3, the resistors 130 and 131 are connected in series between the voltage input terminal Vin and the ground terminal Gnd to form a voltage divider circuit structure. According to the operation of this voltage divider circuit structure, a sensing signal S13_30 is generated at the node N30 between the resistors 130 and 131, which indicates the magnitude of the input voltage of the voltage input terminal Vin.
感測電路13還包括運算放大器132以及電阻器133與134，以組成一電流偵測器136，用於透過正電流輸入端IS+與負電流輸入端IS-偵測流經一特定路徑上特定元件或裝置的電流。舉例來說，當埠控制器1連接一功率轉換器(例如，交流-直流(AC-DC)電壓轉換器)時，電流偵測器136透過負電流輸入端IS-與正電流輸入
端IS+偵測在AC/DC電壓轉換器的二次側的對地路徑上的二次側總電流。參閱第3圖，運算放大器132的正輸入端(+)耦接正電流輸入端IS+，且電阻器133耦接於負電流輸入端IS-與運算放大器132的負輸入端(-)之間。電阻器134耦接於運算放大器132的負輸入端(-)與輸出端之間。透過此電流偵測器的操作，運算放大器132根據正電流輸入端IS+與負電流輸入端IS-之間的電壓差於其輸出端產生感測信號S13_31，其表示所偵測的電流的大小。
The sensing circuit 13 further includes an operational amplifier 132 and resistors 133 and 134 to form a current detector 136 for detecting a current flowing through a specific component or device on a specific path through a positive current input terminal IS+ and a negative current input terminal IS-. For example, when the port controller 1 is connected to a power converter (e.g., an AC-DC voltage converter), the current detector 136 detects the secondary-side total current on the path to ground of the secondary side of the AC/DC voltage converter through the negative current input terminal IS- and the positive current input terminal IS+. Referring to FIG. 3 , the positive input terminal (+) of the operational amplifier 132 is coupled to the positive current input terminal IS+, and the resistor 133 is coupled between the negative current input terminal IS- and the negative input terminal (-) of the operational amplifier 132. The resistor 134 is coupled between the negative input terminal (-) and the output terminal of the operational amplifier 132. Through the operation of this current detector, the operational amplifier 132 generates a sensing signal S13_31 at its output terminal according to the voltage difference between the positive current input terminal IS+ and the negative current input terminal IS-, which indicates the magnitude of the detected current.
感測電路13的輸入端T33耦接埠控制器1的一外部溫度感測器32。外部溫度感測器32感測埠控制器1所處系統的溫度(或是，埠控制器1的外部環境溫度)，且產生的感測信號S13_32，其表示所偵測到的外部溫度。輸入端T33則接收感測信號S13_32。感測電路13來包括一內部溫度感測器135。內部溫度感測器135感測埠控制器1的內部溫度，以產生感測信號S13_33，其表示所偵測到的內部溫度。埠控制器的輸入端ADC3可耦接系統中用於感測環境參數的其他感測器，以產生對應的感測信號S13_34。輸入端ADC3則接收感測信號S13_34。
The input terminal T33 of the sensing circuit 13 is coupled to an external temperature sensor 32 of the port controller 1. The external temperature sensor 32 senses the temperature of the system in which the port controller 1 is located (or, the external environment temperature of the port controller 1), and generates a sensing signal S13_32, which represents the detected external temperature. The input terminal T33 receives the sensing signal S13_32. The sensing circuit 13 includes an internal temperature sensor 135. The internal temperature sensor 135 senses the internal temperature of the port controller 1 to generate a sensing signal S13_33, which represents the detected internal temperature. The input terminal ADC3 of the port controller can be coupled to other sensors in the system for sensing environmental parameters to generate corresponding sensing signals S13_34. The input terminal ADC3 receives the sensing signal S13_34.
根據感測電路13的操作，取樣電路15透過五個感測通道分別接收感測信號S13_30~S13_34。其中，第一個感測通道CH0為電壓感測通道，第二個感測通道CH1為電流感測通道，第三個感測通道CH2為外部溫度感測通道，第四個感測通道CH3為內部溫度感測通道，且第五個感測通道CH4為環境參數感測通道。
According to the operation of the sensing circuit 13, the sampling circuit 15 receives sensing signals S13_30~S13_34 through five sensing channels. Among them, the first sensing channel CH0 is a voltage sensing channel, the second sensing channel CH1 is an electric current sensing channel, the third sensing channel CH2 is an external temperature sensing channel, the fourth sensing channel CH3 is an internal temperature sensing channel, and the fifth sensing channel CH4 is an environmental parameter sensing channel.
監控電路14耦接計數器電路11，且根據計數器電
路11儲存的至少兩個初始值來產生控制信號S14A與S14B。
The monitoring circuit 14 is coupled to the counter circuit 11 and generates control signals S14A and S14B according to at least two initial values stored in the counter circuit 11.
取樣電路15包括多工器150、類比數位轉換器(analog-to-digital converter，ADC)151，以及解多工器152。在此實施例中，多工器150具有五個輸入端，分別透過上述五個感測通道接收感測信號S13_30~S13_34。透過控制信號S14A，多工器150在一取樣期間中以輪詢方式每次選擇一感測信號作為輸出信號S150。在此實施例中，計數器電路11儲存的多個初始值中至少兩者決定了在一取樣期間中，至少兩個感測通道被掃描(被選擇)的預設次數。計數器電路11儲存的多個初始值可根據系統需求而調整。換句話說，對上述至少兩個感測通道的每一者完成各自預設次數的掃描所需的期間決定了取樣期間。詳細來說，監控電路14根據計數值V11_20與V11_21並透過控制信號S14A控制多工器150選擇感測通道CH0的感測信號S13_30；監控電路14根據計數值V11_22與V11_23並透過控制信號S14A控制多工器150選擇感測通道CH1的感測信號S13_31；監控電路14根據計數值V11_24並透過控制信號S14A控制多工器150選擇感測通道CH2的感測信號S13_32；監控電路14根據計數值V11_25並透過控制信號S14A控制多工器150選擇感測通道CH3的感測信號S13_33；監控電路14根據計數值V11_26並透過控制信號S14A控制多工器150選擇感測通道CH4的感測信號S13_34。在輪詢的過程中，多工器150以一特定順序選擇來自五個感測通道CH0~CH4的感測信號S13_30~S13_34，作為輸出信號S150。在一實施例中，上述特定順序為從感測信號S13_30
至感測信號S13_34的順序，也就是從感測通道CH0至感測通道CH4的順序。
The sampling circuit 15 includes a multiplexer 150, an analog-to-digital converter (ADC) 151, and a demultiplexer 152. In this embodiment, the multiplexer 150 has five input terminals, which receive the sensing signals S13_30~S13_34 through the above-mentioned five sensing channels respectively. Through the control signal S14A, the multiplexer 150 selects a sensing signal as the output signal S150 each time in a round-robin manner during a sampling period. In this embodiment, at least two of the multiple initial values stored in the counter circuit 11 determine the preset number of times that at least two sensing channels are scanned (selected) during a sampling period. The multiple initial values stored in the counter circuit 11 can be adjusted according to system requirements. In other words, the sampling period is determined by the time required for each of the at least two sensing channels to complete the preset number of scans. Specifically, the monitoring circuit 14 controls the multiplexer 150 to select the sensing signal S13_30 of the sensing channel CH0 according to the count values V11_20 and V11_21 through the control signal S14A; the monitoring circuit 14 controls the multiplexer 150 to select the sensing signal S13_31 of the sensing channel CH1 according to the count values V11_22 and V11_23 through the control signal S14A; the monitoring circuit 14 controls the multiplexer 150 to select the sensing signal S13_31 of the sensing channel CH1 according to the count values V11_24 and V11_25 through the control signal S14A. The multiplexer 150 is controlled by the control signal S14A to select the sensing signal S13_32 of the sensing channel CH2; the monitoring circuit 14 controls the multiplexer 150 to select the sensing signal S13_33 of the sensing channel CH3 according to the count value V11_25 and through the control signal S14A; the monitoring circuit 14 controls the multiplexer 150 to select the sensing signal S13_34 of the sensing channel CH4 according to the count value V11_26 and through the control signal S14A. In the polling process, the multiplexer 150 selects the sensing signals S13_30~S13_34 from the five sensing channels CH0~CH4 in a specific order as the output signal S150. In one embodiment, the above-mentioned specific sequence is the sequence from sensing signal S13_30
to sensing signal S13_34, that is, the sequence from sensing channel CH0 to sensing channel CH4.
類比數位轉換器151耦接多工器150，且接收輸出信號S150。類比數位轉換器151對輸出信號S150進行數位類比轉換操作，以產生取樣值V151。舉例來說，當多工器150根據控制信號S14A而選擇感測信號S13_30作為輸出信號S150時(也就是，當取樣電路15掃描感測通道CH0時)，取樣值V151是對應感測信號S13_30，以表示電壓輸入端Vin的當前輸入電壓的大小。透過多工器150與類比數位轉換器151的操作，實現了對感測信號S13_30的取樣操作。舉另一例子，當多工器150根據控制信號S14A而選擇感測信號S13_31作為輸出信號S150時(也就是，當取樣電路15掃描感測通道CH1時)，取樣值V151是對應感測信號S13_31，以表示所偵測的當前電流的大小。透過多工器150與類比數位轉換器151的操作，實現了對感測信號S13_31的取樣操作。
The analog-to-digital converter 151 is coupled to the multiplexer 150 and receives the output signal S150. The analog-to-digital converter 151 performs a digital-to-analog conversion operation on the output signal S150 to generate a sample value V151. For example, when the multiplexer 150 selects the sensing signal S13_30 as the output signal S150 according to the control signal S14A (that is, when the sampling circuit 15 scans the sensing channel CH0), the sample value V151 corresponds to the sensing signal S13_30 to indicate the current input voltage of the voltage input terminal Vin. The sampling operation of the sensing signal S13_30 is realized through the operation of the multiplexer 150 and the analog-to-digital converter 151. For another example, when the multiplexer 150 selects the sensing signal S13_31 as the output signal S150 according to the control signal S14A (that is, when the sampling circuit 15 scans the sensing channel CH1), the sample value V151 corresponds to the sensing signal S13_31 to represent the magnitude of the detected current current. The sampling operation of the sensing signal S13_31 is realized through the operation of the multiplexer 150 and the analog-to-digital converter 151.
解多工器152具有五個輸出端，分別對應多工器150的五個輸入端，即分別對應上述五個感測通道CH0~CH4。解多工器152根據控制信號S14B，選擇性地將當前所獲得的取樣值V151傳送到五個輸出端中之一者，以作為感測取樣值V152_30~V152_34中之一者。舉例來說，當多工器150根據控制信號S14A而選擇感測信號S13_30作為輸出信號S150時，解多工器152根據控制信號S14B而輸出取樣值V151以作為感測取樣值V152_30。舉另一例子，當多工器150根據控制信號S14A而選擇感
測信號S13_31作為輸出信號S150時，解多工器152根據控制信號S14B而輸出取樣值V151以作為感測取樣值V152_31。同樣地，基於多工器150的操作，解多工器152還可輸出感測取樣值V152_32~V152_34，分別對應感測信號S13_32~S13_34。
The demultiplexer 152 has five output terminals, which correspond to the five input terminals of the multiplexer 150, that is, the five sensing channels CH0-CH4. The demultiplexer 152 selectively transmits the currently obtained sample value V151 to one of the five output terminals as one of the sensing sample values V152_30-V152_34 according to the control signal S14B. For example, when the multiplexer 150 selects the sensing signal S13_30 as the output signal S150 according to the control signal S14A, the demultiplexer 152 outputs the sample value V151 as the sensing sample value V152_30 according to the control signal S14B. For another example, when the multiplexer 150 selects the sensing signal S13_31 as the output signal S150 according to the control signal S14A, the demultiplexer 152 outputs the sample value V151 as the sensing sample value V152_31 according to the control signal S14B. Similarly, based on the operation of the multiplexer 150, the demultiplexer 152 can also output the sensing sample values V152_32~V152_34, which correspond to the sensing signals S13_32~S13_34 respectively.
參閱第3圖，判斷電路16包括緩衝器(BUF)160~164、比較器CM30~CM34、匹配計數器電路30、以及輸出電路31。緩衝器160~164耦接解多工器152，以分別接收並暫存感測取樣值V152_30~V152_34。比較器CM30耦接緩衝器160以接收感測取樣值V152_30，且接收臨界值TH30。透過比較器CM30對感測取樣值V152_30與臨界值TH30的比較操作，可判斷是否發生過電壓事件，以產生比較信號S30。舉例來說，當感測取樣值V152_30大於(>)或等於(=)臨界值TH30時，比較器CM30致能比較信號S30，以表示系統是否發生過電壓事件；否則比較器CM30禁能比較信號S30。
Referring to FIG. 3 , the judgment circuit 16 includes buffers (BUF) 160-164, comparators CM30-CM34, a matching counter circuit 30, and an output circuit 31. The buffers 160-164 are coupled to the demultiplexer 152 to receive and temporarily store the sensing sample values V152_30-V152_34, respectively. The comparator CM30 is coupled to the buffer 160 to receive the sensing sample value V152_30 and the threshold value TH30. By comparing the sensing sample value V152_30 with the threshold value TH30 by the comparator CM30, it can be determined whether an over-voltage event occurs to generate a comparison signal S30. For example, when the sensed sample value V152_30 is greater than (>) or equal to (=) the critical value TH30, the comparator CM30 enables the comparison signal S30 to indicate whether an overvoltage event occurs in the system; otherwise, the comparator CM30 disables the comparison signal S30.
比較器CM31耦接緩衝器160以接收感測取樣值V152_30，且接收臨界值TH31。透過比較器CM31對感測取樣值V152_30與臨界值TH31的比較操作，可判斷是否發生欠電壓事件，以產生比較信號S31。舉例來說，當感測取樣值V152_30小於(<)或等於(=)臨界值TH31時，比較器CM31致能比較信號S31，以表示系統是否發生欠電壓事件；否則比較器CM31禁能比較信號S31。
The comparator CM31 is coupled to the buffer 160 to receive the sensed sample value V152_30 and the critical value TH31. By comparing the sensed sample value V152_30 with the critical value TH31, the comparator CM31 can determine whether an undervoltage event occurs to generate a comparison signal S31. For example, when the sensed sample value V152_30 is less than (<) or equal to (=) the critical value TH31, the comparator CM31 enables the comparison signal S31 to indicate whether an undervoltage event occurs in the system; otherwise, the comparator CM31 disables the comparison signal S31.
比較器CM32耦接緩衝器161以接收感測取樣值V152_31，且接收臨界值TH32。透過比較器CM32對感測取樣值
V152_31與臨界值TH32的比較操作，可判斷是否發生過電流事件，以產生比較信號S32。舉例來說，當感測取樣值V152_31大於(>)或等於(=)臨界值TH32時，比較器CM32致能比較信號S32，以表示系統是否發生過電流事件；否則比較器CM32禁能比較信號S31。
The comparator CM32 is coupled to the buffer 161 to receive the sensed sample value V152_31 and the critical value TH32. By comparing the sensed sample value V152_31 with the critical value TH32 by the comparator CM32, it can be determined whether an over-current event occurs to generate a comparison signal S32. For example, when the sensed sample value V152_31 is greater than (>) or equal to (=) the critical value TH32, the comparator CM32 enables the comparison signal S32 to indicate whether an over-current event occurs in the system; otherwise, the comparator CM32 disables the comparison signal S31.
比較器CM33耦接緩衝器161以接收感測取樣值V152_31，且接收臨界值TH33。透過比較器CM33對感測取樣值V152_31與臨界值TH33的比較操作，可判斷是否發生短路事件，以產生比較信號S33。舉例來說，當感測取樣值V152_31大於(>)或等於(=)臨界值TH33時，比較器CM33致能比較信號S33，以表示系統是否發生短路事件；否則比較器CM33禁能比較信號S33。
The comparator CM33 is coupled to the buffer 161 to receive the sensed sample value V152_31 and the critical value TH33. By comparing the sensed sample value V152_31 with the critical value TH33, the comparator CM33 can determine whether a short circuit event occurs to generate a comparison signal S33. For example, when the sensed sample value V152_31 is greater than (>) or equal to (=) the critical value TH33, the comparator CM33 enables the comparison signal S33 to indicate whether a short circuit event occurs in the system; otherwise, the comparator CM33 disables the comparison signal S33.
比較器CM34耦接緩衝器162以接收感測取樣值V152_32，且接收臨界值TH34。透過比較器CM34對感測取樣值V152_32與臨界值TH34的比較操作，可判斷是否發生溫度過高或過低事件，以產生比較信號S34。舉例來說，當感測取樣值V152_32大於(>)或等於(=)臨界值TH34時，比較器CM34致能比較信號S34，以表示系統是否發生溫度過高或過低事件；否則比較器CM34禁能比較信號S34。
The comparator CM34 is coupled to the buffer 162 to receive the sensed sample value V152_32 and the critical value TH34. By comparing the sensed sample value V152_32 with the critical value TH34, the comparator CM34 can determine whether an over-temperature or under-temperature event occurs to generate a comparison signal S34. For example, when the sensed sample value V152_32 is greater than (>) or equal to (=) the critical value TH34, the comparator CM34 enables the comparison signal S34 to indicate whether an over-temperature or under-temperature event occurs in the system; otherwise, the comparator CM34 disables the comparison signal S34.
如上所述，緩衝器163與164分別接收並暫存感測取樣值V152_33與V152_34。感測取樣值V152_33與V152_34可供埠控制器1或系統的其他電路或裝置所使用，以進行保護功能或系統控制。
As described above, buffers 163 and 164 receive and temporarily store sensing sample values V152_33 and V152_34, respectively. Sensing sample values V152_33 and V152_34 can be used by port controller 1 or other circuits or devices of the system to perform protection functions or system control.
匹配計數器電路30包括匹配計數器
MC30~MC34。在此實施例中，匹配計數器MC30~MC34係以向下計數器來實現。匹配計數器MC30~MC34具有各自的預設值，且在一取樣期間，由各自的預設值開始向下計數。輸出電路31包括及閘165~169，分別耦接匹配計數器MC30~MC34。
The matching counter circuit 30 includes matching counters MC30~MC34. In this embodiment, the matching counters MC30~MC34 are implemented as down counters. The matching counters MC30~MC34 have respective preset values, and during a sampling period, they start to count down from their respective preset values. The output circuit 31 includes AND gates 165~169, which are respectively coupled to the matching counters MC30~MC34.
參閱第3圖，匹配計數器MC30耦接比較器CM30以接收比較信號S30。在一取樣期間，匹配計數器MC30從對應的預設值開始朝零向下計數。每當比較信號S30被致能，匹配計數器MC30向下計數一次(即，匹配計數器MC30的計數值減”1”)。當匹配計數器MC30的計數值等於零時，表示發生關於過電壓的保護啟動事件，且匹配計數器MC30致能旗標信號F30。及閘165接收旗標信號F30以及用於過電壓保護的致能信號E30，且產生保護啟動信號S16A_30。當旗標信號F30以及致能信號E30皆被致能(處於高電壓位準)時，及閘165致能保護啟動信號S16A_30，以表示偵測電路20欲啟動過電壓保護操作。此實施例中，匹配計數器MC30的預設值例如為3。
Referring to FIG. 3 , the match counter MC30 is coupled to the comparator CM30 to receive the comparison signal S30. During a sampling period, the match counter MC30 counts down from the corresponding preset value toward zero. Whenever the comparison signal S30 is enabled, the match counter MC30 counts down once (i.e., the count value of the match counter MC30 is reduced by "1"). When the count value of the match counter MC30 is equal to zero, it indicates that a protection activation event related to overvoltage occurs, and the match counter MC30 enables the flag signal F30. The AND gate 165 receives the flag signal F30 and the enable signal E30 for overvoltage protection, and generates the protection activation signal S16A_30. When the flag signal F30 and the enable signal E30 are both enabled (at a high voltage level), the gate 165 enables the protection start signal S16A_30 to indicate that the detection circuit 20 wants to start the overvoltage protection operation. In this embodiment, the default value of the matching counter MC30 is, for example, 3.
匹配計數器MC31耦接比較器CM31以接收比較信號S31。在一取樣期間，匹配計數器MC31從對應的預設值開始朝零向下計數。每當比較信號S31被致能，匹配計數器MC31向下計數一次(即，匹配計數器MC31的計數值減”1”)。當匹配計數器MC31的計數值等於零時，表示發生關於欠電壓的保護啟動事件，且匹配計數器MC31致能旗標信號F31。及閘166接收旗標信號F31以及用於欠電壓保護的致能信號1E31，且產生保護啟動信號S16A_31。當旗
標信號F31以及致能信號E31皆被致能時，及閘166致能保護啟動信號S16A_31，以表示偵測電路20欲啟動欠電壓保護操作。在此實施例中，匹配計數器MC31的預設值例如為3。
The match counter MC31 is coupled to the comparator CM31 to receive the comparison signal S31. During a sampling period, the match counter MC31 counts down from the corresponding preset value toward zero. Whenever the comparison signal S31 is enabled, the match counter MC31 counts down once (i.e., the count value of the match counter MC31 is reduced by "1"). When the count value of the match counter MC31 is equal to zero, it indicates that a protection activation event related to undervoltage occurs, and the match counter MC31 enables the flag signal F31. The AND gate 166 receives the flag signal F31 and the enable signal 1E31 for undervoltage protection, and generates a protection activation signal S16A_31. When the flag signal F31 and the enable signal E31 are both enabled, the gate 166 enables the protection start signal S16A_31 to indicate that the detection circuit 20 wants to start the undervoltage protection operation. In this embodiment, the default value of the matching counter MC31 is, for example, 3.
匹配計數器MC32耦接比較器CM32以接收比較信號S32。在一取樣期間，匹配計數器MC32從對應的預設值開始朝零向下計數。每當比較信號S32被致能，匹配計數器MC32向下計數一次(即，匹配計數器MC32的計數值減”1”)。當匹配計數器MC32的計數值等於零時，表示發生關於過電流的保護啟動事件，且匹配計數器MC32致能旗標信號F32。及閘167接收旗標信號F32以及用於過電流保護的致能信號E32，且產生保護啟動信號S16A_32。當旗標信號F32以及致能信號E32皆被致能時，及閘167致能保護啟動信號S16A_32，以表示偵測電路20欲啟動過電流保護操作。
The match counter MC32 is coupled to the comparator CM32 to receive the comparison signal S32. During a sampling period, the match counter MC32 counts down from the corresponding preset value toward zero. Whenever the comparison signal S32 is enabled, the match counter MC32 counts down once (i.e., the count value of the match counter MC32 is reduced by "1"). When the count value of the match counter MC32 is equal to zero, it indicates that a protection activation event related to over-current occurs, and the match counter MC32 enables the flag signal F32. The AND gate 167 receives the flag signal F32 and the enable signal E32 for over-current protection, and generates the protection activation signal S16A_32. When the flag signal F32 and the enable signal E32 are both enabled, the gate 167 enables the protection start signal S16A_32 to indicate that the detection circuit 20 wants to start the over-current protection operation.
匹配計數器MC33耦接比較器CM33以接收比較信號S33。在一取樣期間，匹配計數器MC33從對應的預設值開始朝零向下計數。每當比較信號S33被致能，匹配計數器MC33向下計數一次(即，匹配計數器MC33的計數值減”1”)。當匹配計數器MC33的計數值等於零時，表示發生關於短路的保護啟動事件，且匹配計數器MC33致能旗標信號F33。及閘168接收旗標信號F33以及用於短路保護的致能信號E33，且產生保護啟動信號S16A_33。當旗標信號F33以及致能信號E33皆被致能時，及閘168致能保護啟動信號S16A_33，以表示偵測電路20欲啟動短路保護操作。
The match counter MC33 is coupled to the comparator CM33 to receive the comparison signal S33. During a sampling period, the match counter MC33 counts down from the corresponding preset value toward zero. Whenever the comparison signal S33 is enabled, the match counter MC33 counts down once (i.e., the count value of the match counter MC33 is reduced by "1"). When the count value of the match counter MC33 is equal to zero, it indicates that a protection activation event related to a short circuit occurs, and the match counter MC33 enables the flag signal F33. The AND gate 168 receives the flag signal F33 and the enable signal E33 for short circuit protection, and generates a protection activation signal S16A_33. When the flag signal F33 and the enable signal E33 are both enabled, the gate 168 enables the protection start signal S16A_33 to indicate that the detection circuit 20 wants to start the short circuit protection operation.
匹配計數器MC34耦接比較器CM34以接收比較信
號S34。在一取樣期間，匹配計數器MC34從對應的預設值開始朝零向下計數。每當比較信號S34被致能，匹配計數器MC34向下計數一次(即，匹配計數器MC34的計數值減”1”)。當匹配計數器MC34的計數值等於零時，表示發生關於溫度過高/過低的保護啟動事件，且匹配計數器MC34致能旗標信號F34。及閘169接收旗標信號F34以及用於溫度過高/過低保護的致能信號E34，且產生保護啟動信號S16A_34。當旗標信號F34以及致能信號E34皆被致能時，及閘169致能保護啟動信號S16A_34，以表示偵測電路20欲啟動溫度過高/過低保護操作。
The match counter MC34 is coupled to the comparator CM34 to receive the comparison signal S34. During a sampling period, the match counter MC34 counts down from the corresponding preset value toward zero. Whenever the comparison signal S34 is enabled, the match counter MC34 counts down once (i.e., the count value of the match counter MC34 is reduced by "1"). When the count value of the match counter MC34 is equal to zero, it indicates that a protection activation event related to over-temperature/under-temperature occurs, and the match counter MC34 enables the flag signal F34. The AND gate 169 receives the flag signal F34 and the enable signal E34 for over-temperature/under-temperature protection, and generates the protection activation signal S16A_34. When the flag signal F34 and the enable signal E34 are both enabled, the gate 169 enables the protection start signal S16A_34 to indicate that the detection circuit 20 wants to start the over-temperature/under-temperature protection operation.
根據上述操作，緩衝器160、比較器CM30與CM31、匹配計數器MC30與MC31、以及及閘165與166係依據電壓感測通道CH0的感測信號S13_30操作；緩衝器161、比較器CM32與CM33、匹配計數器MC32與MC33、以及及閘167與168係依據電流感測通道CH1的感測信號S13_31操作；緩衝器162、比較器CM34、匹配計數器MC34、以及及閘169係依據外部溫度感測通道CH2的感測信號S13_32操作；緩衝器163係依據內部溫度感測通道CH3的感測信號S13_33操作；緩衝器164係依據環境參數感測通道CH4的感測信號S13_34操作。
According to the above operation, the buffer 160, the comparators CM30 and CM31, the matching counters MC30 and MC31, and the AND gates 165 and 166 are operated according to the sensing signal S13_30 of the voltage sensing channel CH0; the buffer 161, the comparators CM32 and CM33, the matching counters MC32 and MC33, and the AND gates 167 and 168 are operated according to the sensing signal S13_30 of the current sensing channel CH1. The buffer 162, the comparator CM34, the match counter MC34, and the AND gate 169 operate according to the sensing signal S13_32 of the external temperature sensing channel CH2; the buffer 163 operates according to the sensing signal S13_33 of the internal temperature sensing channel CH3; and the buffer 164 operates according to the sensing signal S13_34 of the environmental parameter sensing channel CH4.
根據本發明一實施例，偵測電路20可接收一連續偵測信號S16C。於一取樣期間，在對應一感測通道的比較器的比較信號首次指示發生一次特定事件(即匹配計數器的計數值首次減”1”)的情況下，偵測電路20可使對應的匹配計數器連續操作，以判斷判
斷是否發生一保護啟動事件。連續偵測信號S16C則指示可連續操作的匹配計數器。
According to an embodiment of the present invention, the detection circuit 20 can receive a continuous detection signal S16C. During a sampling period, when the comparison signal of the comparator corresponding to a sensing channel first indicates the occurrence of a specific event (i.e., the count value of the match counter is reduced by "1" for the first time), the detection circuit 20 can make the corresponding match counter operate continuously to determine whether a protection start event occurs. The continuous detection signal S16C indicates that the match counter can operate continuously.
參閱第2~3圖，舉例來說，在連續偵測信號S16C指示對應電壓感測通道CH0的匹配計數器MC30可連續操作的情況下，當比較器CM30的比較信號S30首次指示發生一次特定事件(即匹配計數器MC30的計數值首次減”1”)時，監控電路14根據連續偵測信號S16C，透過控制信號S14C控制對應電壓感測通道CH0的計數器DC20與DC21繼續進行向下計數操作，並控制對應其他感測通道CH1~CH4的計數器DC22~DC26停止進行向下計數操作。此外，監控電路14根據連續偵測信號S16C，產生控制信號S14A控制多工器150持續選擇感測信號S13_30(即，持續掃描電壓感測通道CH0)，且產生控制信號S14B持續控制解多工器152持續輸出取樣值V151以作為感測取樣值V152_30。此時，匹配計數器電路30根據連續偵測信號S16C，控制匹配計數器MC30連續操作，而控制其他匹配計數器MC31~MC34停止操作。在一情況下，在匹配計數器MC30連續操作期間，當其計數值連續減”1”且最終等於零時，匹配計數器電路30判斷發生關於過電壓的保護啟動事件，且透過狀態信號S16B將匹配計數器MC30的計數狀態通知監控電路14。在另一情況下，在匹配計數器MC30連續操作期間，當其計數值在到達零之前停止減”1”，匹配計數器電路30則控制匹配計數器MC30的計數值重置為其預設值，且透過狀態信號S16B將匹配計數器MC30的計數狀態通知監控電路14。對於上述兩種情況而言，在監控電路14根
據狀態信號S16B得知匹配計數器MC30的計數狀態之後，監控電路14透過控制信號S14C控制計數器DC22~DC26恢復向下計數操作，透過控制信號S14A控制多工器150選擇其他的感測信號(即，掃描其他的感測通道)，且透過控制信號S14B控制解多工器152輸出取樣值V151以作為其他感測取樣值，藉此完成一取樣期間對所有感測通道的輪詢。此外，匹配計數器MC31~MC34也恢復操作。
Referring to Figures 2-3, for example, when the continuous detection signal S16C indicates that the matching counter MC30 of the corresponding voltage sensing channel CH0 can operate continuously, when the comparison signal S30 of the comparator CM30 first indicates the occurrence of a specific event (i.e., the count value of the matching counter MC30 is reduced by "1" for the first time), the monitoring circuit 14 controls the counters DC20 and DC21 of the corresponding voltage sensing channel CH0 to continue the down-counting operation according to the continuous detection signal S16C through the control signal S14C, and controls the counters DC22-DC26 of the other sensing channels CH1-CH4 to stop the down-counting operation. In addition, the monitoring circuit 14 generates a control signal S14A to control the multiplexer 150 to continuously select the sensing signal S13_30 (i.e., continuously scan the voltage sensing channel CH0) according to the continuous detection signal S16C, and generates a control signal S14B to continuously control the demultiplexer 152 to continuously output the sample value V151 as the sensing sample value V152_30. At this time, the match counter circuit 30 controls the match counter MC30 to continuously operate according to the continuous detection signal S16C, and controls the other match counters MC31~MC34 to stop operating. In one case, during the continuous operation of the match counter MC30, when its count value continuously decreases by "1" and finally equals zero, the match counter circuit 30 determines that a protection activation event related to overvoltage occurs, and notifies the monitoring circuit 14 of the counting state of the match counter MC30 through the status signal S16B. In another case, during the continuous operation of the match counter MC30, when its count value stops decreasing by "1" before reaching zero, the match counter circuit 30 controls the count value of the match counter MC30 to be reset to its preset value, and notifies the monitoring circuit 14 of the counting state of the match counter MC30 through the status signal S16B. For the above two situations, after the monitoring circuit 14 learns the counting state of the matching counter MC30 according to the state signal S16B, the monitoring circuit 14 controls the counters DC22~DC26 to resume the down-counting operation through the control signal S14C, controls the multiplexer 150 to select other sensing signals (i.e., scan other sensing channels) through the control signal S14A, and controls the demultiplexer 152 to output the sample value V151 as other sensing sample values through the control signal S14B, thereby completing the polling of all sensing channels during a sampling period. In addition, the matching counters MC31~MC34 also resume operation.
第4圖係表示根據本發明一實施例的保護控制電路17。為了能清楚說明保護控制電路的操作，第4圖僅顯示埠控制器1中與保護控制電路17連接的匯流排電壓端VBUS、放電端Disc、以及閘極驅動端VIN_GATE與VBUS_GATE。保護控制電路17包括或閘40~44、及閘45~48、驅動器490~493、電阻器495、以及電晶體494與496。或閘40與41、及閘45、以及驅動器490組成一保護電路，用以透過閘極驅動端VIN_GATE導通或截斷一電源輸出路徑。一保護功能啟動信號S40輸入至及閘45的一端。或閘40與41以及及閘45根據保護啟動信號S16A_30~S16A_34以及保護功能啟動信號S40操作，以控制驅動器490導通或截斷電源輸出路徑。根據上述，在保護功能啟動信號S40被致能的情況下時，分別對應過電壓保護操作、欠電壓保護操作、過電流保護操作、短路保護操作、以及溫度過高/過低保護操作的保護啟動信號S16A_30~S16A_34中之一者被致能時，驅動器490截斷電源輸出路徑。
FIG. 4 shows a protection control circuit 17 according to an embodiment of the present invention. In order to clearly illustrate the operation of the protection control circuit, FIG. 4 only shows the bus voltage terminal VBUS, the discharge terminal Disc, and the gate drive terminals VIN_GATE and VBUS_GATE connected to the protection control circuit 17 in the port controller 1. The protection control circuit 17 includes OR gates 40-44, gates 45-48, drivers 490-493, resistors 495, and transistors 494 and 496. OR gates 40 and 41, gate 45, and driver 490 form a protection circuit for conducting or cutting off a power output path through the gate drive terminal VIN_GATE. A protection function activation signal S40 is input to one end of the AND gate 45. The OR gates 40 and 41 and the AND gate 45 operate according to the protection activation signals S16A_30~S16A_34 and the protection function activation signal S40 to control the driver 490 to turn on or cut off the power output path. According to the above, when the protection function activation signal S40 is enabled, when one of the protection activation signals S16A_30~S16A_34 corresponding to the overvoltage protection operation, undervoltage protection operation, overcurrent protection operation, short circuit protection operation, and over/under temperature protection operation is enabled, the driver 490 cuts off the power output path.
或閘42、及閘46、以及驅動器491組成另一保護電路，用以透過閘極驅動端VBUS_GATE導通或截斷一電源輸入路
徑。一保護功能啟動信號S41輸入至及閘46的一端。或閘42以及及閘46根據保護啟動信號S16A_30~S16A_32、S16A_34以及保護功能啟動信號S41操作，以控制驅動器491導通或截斷電源輸入路徑。根據上述，在保護功能啟動信號S41被致能的情況下時，分別對應過電壓保護操作、欠電壓保護操作、過電流保護操作、以及溫度過高/過低保護操作的保護啟動信號S16A_30~S16A_32、S16A_34中之一者被致能時，驅動器491截斷電源輸入路徑。
The OR gate 42, the AND gate 46, and the driver 491 form another protection circuit for conducting or cutting off a power input path through the gate driving terminal VBUS_GATE. A protection function activation signal S41 is input to one end of the AND gate 46. The OR gate 42 and the AND gate 46 operate according to the protection activation signals S16A_30~S16A_32, S16A_34 and the protection function activation signal S41 to control the driver 491 to conduct or cut off the power input path. According to the above, when the protection function activation signal S41 is enabled, when one of the protection activation signals S16A_30~S16A_32 and S16A_34 corresponding to the overvoltage protection operation, undervoltage protection operation, overcurrent protection operation, and over/under temperature protection operation is enabled, the driver 491 cuts off the power input path.
或閘43、及閘47、驅動器492、電晶體494、以及電阻器495組成另一保護電路，用以提供或截斷系統中介於匯流排電壓端VBUS與接地GND之間的一放電路徑。一保護功能啟動信號S42輸入至及閘47的一端。或閘43以及及閘47根據保護啟動信號S16A_30~S16A_32以及保護功能啟動信號S42操作，以控制驅動器492導通或關斷電晶體494，藉此提供或截斷介於匯流排電壓端VBUS與接地GND之間的一放電路徑。根據上述，在保護功能啟動信號S42被致能的情況下時，分別對應過電壓保護操作、欠電壓保護操作、以及過電流保護操作的保護啟動信號S16A_30~S16A_32中之一者被致能時，驅動器492透過導通電晶體494，以提供介於匯流排電壓端VBUS與接地GND之間的放電路徑。
The OR gate 43, the AND gate 47, the driver 492, the transistor 494, and the resistor 495 form another protection circuit for providing or cutting off a discharge path between the bus voltage terminal VBUS and the ground GND in the system. A protection function activation signal S42 is input to one end of the AND gate 47. The OR gate 43 and the AND gate 47 operate according to the protection activation signals S16A_30~S16A_32 and the protection function activation signal S42 to control the driver 492 to turn on or off the transistor 494, thereby providing or cutting off a discharge path between the bus voltage terminal VBUS and the ground GND. According to the above, when the protection function activation signal S42 is enabled, when one of the protection activation signals S16A_30~S16A_32 corresponding to the overvoltage protection operation, undervoltage protection operation, and overcurrent protection operation is enabled, the driver 492 provides a discharge path between the bus voltage terminal VBUS and the ground GND by turning on the transistor 494.
或閘44、及閘48、驅動器493、以及電晶體496組成另一保護電路，用以提供或截斷系統中介於放電端Disc與接地GND之間的一放電路徑。一保護功能啟動信號S43輸入至及閘48的一端。或閘44以及及閘48根據保護啟動信號S16A_30~S16A_32以
及保護功能啟動信號S43操作，以控制驅動器493導通或關斷電晶體496，藉此提供或截斷介於放電端Disc與接地GND之間的一放電路徑。根據上述，在保護功能啟動信號S43被致能的情況下時，分別對應過電壓保護操作、欠電壓保護操作、以及過電流保護操作的保護啟動信號S16A_30~S16A_32中之一者被致能時，驅動器493透過導通電晶體496，以提供介於放電端Disc與接地GND之間的放電路徑。
The OR gate 44, the AND gate 48, the driver 493, and the transistor 496 form another protection circuit for providing or cutting off a discharge path between the discharge terminal Disc and the ground GND in the system. A protection function activation signal S43 is input to one end of the AND gate 48. The OR gate 44 and the AND gate 48 operate according to the protection activation signals S16A_30~S16A_32 and the protection function activation signal S43 to control the driver 493 to turn on or off the transistor 496, thereby providing or cutting off a discharge path between the discharge terminal Disc and the ground GND. According to the above, when the protection function activation signal S43 is enabled, when one of the protection activation signals S16A_30~S16A_32 corresponding to the overvoltage protection operation, undervoltage protection operation, and overcurrent protection operation is enabled, the driver 493 provides a discharge path between the discharge terminal Disc and the ground GND by turning on the transistor 496.
根據上述實施例，本案的偵測電路20可透過設定至少兩個初始計數值來決定一個取樣期間，以一個取樣期間為單位來偵測是否發生一保護啟動事件。此外，透過設定臨界值TH30~TH34以及匹配計數器MC30~MC34各自的預設值，可適應系統對不同保護操作的條件與需求，而不需使用大量的比較器，避免增加埠控制器1的尺寸。
According to the above embodiment, the detection circuit 20 of the present case can determine a sampling period by setting at least two initial count values, and detect whether a protection activation event occurs in units of a sampling period. In addition, by setting the threshold values TH30~TH34 and matching the respective default values of the counters MC30~MC34, the system can adapt to the conditions and requirements of different protection operations without using a large number of comparators, thereby avoiding increasing the size of the port controller 1.
第5圖表示根據本發明一實施例，第1圖的埠控制器中的回授控制電路19。回授控制電路19包括誤差放大器50與51、開關52與53、以及電阻器54。參閱第3圖與第5圖，在此實施例中，感測電路13與回授控制電路19共用電阻器130與131、運算放大器132、以及電阻器133與134。換句話說，回授控制電路19還包括電阻器130與131、運算放大器132、以及電阻器133與134。為了清楚顯示回授控制電路19的架構，第5圖僅顯示埠控制器1中與回授控制電路19連接的接地端Gnd、電壓輸入端Vin、控制輸出端CATH、電壓回授端VFB、電流回授端IFB、正電流輸入端IS+、以及負電流輸
入端IS-。
FIG. 5 shows a feedback control circuit 19 in the port controller of FIG. 1 according to an embodiment of the present invention. The feedback control circuit 19 includes error amplifiers 50 and 51, switches 52 and 53, and a resistor 54. Referring to FIG. 3 and FIG. 5, in this embodiment, the sensing circuit 13 and the feedback control circuit 19 share resistors 130 and 131, an operational amplifier 132, and resistors 133 and 134. In other words, the feedback control circuit 19 also includes resistors 130 and 131, an operational amplifier 132, and resistors 133 and 134. In order to clearly show the structure of the feedback control circuit 19, Figure 5 only shows the ground terminal Gnd, the voltage input terminal Vin, the control output terminal CATH, the voltage feedback terminal VFB, the current feedback terminal IFB, the positive current input terminal IS+, and the negative current input terminal IS- in the port controller 1 connected to the feedback control circuit 19.
參閱第5圖，電阻器54的第一端接收可變控制電壓V50，且其第二端耦接節點N30。誤差放大器50的負輸入端(-)耦接節點N30以及電壓回授端VFB，且正輸入端(+)接收臨界電壓VTH50。誤差放大器50的輸出端產生切換信號S50。開關52耦接於控制輸出端CATH與接地GND之間，且授控於切換信號S50。在此實施例中，開關52係以一N型電晶體來實現，例如，以N型金氧半(N-type Metal-Oxide-Semiconductor，NMOS)電晶體來實現。在此情況下，NMOS電晶體(52)的閘極耦接誤差放大器50的輸出端以接收切換信號S50，其汲極耦接控制輸出端CATH，且其源極耦接接地GND。開關(NMOS電晶體)52根據切換信號S50而導通或關斷。
Referring to FIG. 5 , a first end of a resistor 54 receives a variable control voltage V50, and a second end thereof is coupled to a node N30. A negative input terminal (-) of the error amplifier 50 is coupled to the node N30 and a voltage feedback terminal VFB, and a positive input terminal (+) receives a critical voltage VTH50. An output terminal of the error amplifier 50 generates a switching signal S50. A switch 52 is coupled between a control output terminal CATH and a ground GND, and is controlled by the switching signal S50. In this embodiment, the switch 52 is implemented by an N-type transistor, for example, an N-type Metal-Oxide-Semiconductor (NMOS) transistor. In this case, the gate of the NMOS transistor (52) is coupled to the output terminal of the error amplifier 50 to receive the switching signal S50, its drain is coupled to the control output terminal CATH, and its source is coupled to the ground GND. The switch (NMOS transistor) 52 is turned on or off according to the switching signal S50.
誤差放大器51的負輸入端(-)耦接運算放大器132的輸出端以及電壓流授端IFB，且正輸入端(+)接收臨界電壓VTH51。誤差放大器51的輸出端產生切換信號S51。開關53耦接於控制輸出端CATH與接地GND之間，且授控於切換信號S51。在此實施例中，開關53係以一N型電晶體來實現，例如，以NMOS電晶體來實現。在此情況下，NMOS電晶體(54)的閘極耦接誤差放大器51的輸出端以接收切換信號S51，其汲極耦接控制輸出端CATH，且其源極耦接接地GND。開關(NMOS電晶體)54根據切換信號S51而導通或關斷。
The negative input terminal (-) of the error amplifier 51 is coupled to the output terminal of the operational amplifier 132 and the voltage current granting terminal IFB, and the positive input terminal (+) receives the critical voltage VTH51. The output terminal of the error amplifier 51 generates a switching signal S51. The switch 53 is coupled between the control output terminal CATH and the ground GND, and is controlled by the switching signal S51. In this embodiment, the switch 53 is implemented by an N-type transistor, for example, an NMOS transistor. In this case, the gate of the NMOS transistor (54) is coupled to the output terminal of the error amplifier 51 to receive the switching signal S51, its drain is coupled to the control output terminal CATH, and its source is coupled to the ground GND. The switch (NMOS transistor) 54 is turned on or off according to the switching signal S51.
根據回授控制電路19的架構可知，回授控制電路
19根據電壓輸入端Vin的輸入電壓以及正電流輸入端IS+與負電流輸入端IS-之間的一電壓差(表示所偵測的電流的大小)，來決定控制輸出端CATH是否耦接接地GND。
According to the structure of the feedback control circuit 19, the feedback control circuit 19 determines whether the control output terminal CATH is coupled to the ground GND according to the input voltage of the voltage input terminal Vin and a voltage difference between the positive current input terminal IS+ and the negative current input terminal IS- (indicating the magnitude of the detected current).
根據上述，本案的埠控制器1可連接一功率轉換器。第6圖表示埠控制器1連接一AC-DC電壓轉換器6的示意圖。埠控制器1與AC-DC電壓轉換器6組成具有電源供應端角色的電壓供應裝置66，其透過Type-C輸入輸出埠P60與一外部負載連接，以將AC-DC電壓轉換器6於電壓輸出端TOUT所產生的輸出電壓VOUT60提供至外部負載。此外，輸出電壓VOUT60傳送至埠控制器1的電壓輸入端Vin，以作為埠控制器1的輸入電壓。以下將透過第5圖與第6圖來說明回授控制電路19的操作。
According to the above, the port controller 1 of the present case can be connected to a power converter. FIG. 6 is a schematic diagram showing the port controller 1 connected to an AC-DC voltage converter 6. The port controller 1 and the AC-DC voltage converter 6 form a voltage supply device 66 having the role of a power supply end, which is connected to an external load through the Type-C input and output port P60 to provide the output voltage VOUT60 generated by the AC-DC voltage converter 6 at the voltage output end TOUT to the external load. In addition, the output voltage VOUT60 is transmitted to the voltage input end Vin of the port controller 1 as the input voltage of the port controller 1. The operation of the feedback control circuit 19 will be described below through FIG. 5 and FIG. 6.
參閱第6圖，AC-DC電壓轉換器6包括變壓器T60。變壓器T60具有一次側線圈L60與二次側線圈L61。以變壓器T60為分界處，AC-DC電壓轉換器6包括位於一次側的一次側電路以及位於二次側的二次側電路。一次側電路耦接接地GND60(可稱為一次側接地)，且包括橋式整流器60、脈寬調變(Pulse-Width Modulation，PWM)控制器62、功率電晶體63、以及電容器C60。二次側電路耦接接地GND(可稱為二次側接地)，即是與埠控制器1耦接相同的接地GND。二次側電路包括整流二極體61、電容器C61、以及電阻器R60~R62。特別注意，電阻器R62的一端耦接二次側接地GND，且其另一端耦接外部負載的接地GND61。
Referring to FIG. 6 , the AC-DC voltage converter 6 includes a transformer T60. The transformer T60 has a primary coil L60 and a secondary coil L61. With the transformer T60 as the boundary, the AC-DC voltage converter 6 includes a primary circuit located on the primary side and a secondary circuit located on the secondary side. The primary circuit is coupled to the ground GND60 (which may be referred to as the primary ground), and includes a bridge rectifier 60, a pulse width modulation (PWM) controller 62, a power transistor 63, and a capacitor C60. The secondary circuit is coupled to the ground GND (which may be referred to as the secondary ground), which is the same ground GND as the port controller 1. The secondary circuit includes a rectifier diode 61, a capacitor C61, and resistors R60~R62. In particular, one end of the resistor R62 is coupled to the secondary ground GND, and the other end is coupled to the external load ground GND61.
AC-DC電壓轉換器6還包括光耦合器64，其提供了
AC-DC電壓轉換器6的二次側向一次側的回授路徑。光耦合器64將基於輸出電壓VOUT60而產生的回授信號由一次側傳送至二次側的PWM控制器62，使其控制功率電晶體63的切換，藉以調整輸出電壓VOUT60。第6圖顯示AC-DC電壓轉換器6的基本架構，本發明不以此為限。本案所屬技術領域中具有通常知識者，根據AC-DC電壓轉換器6的架構能了解其操作。根據本發明的其他實施例，具有從二次側向一次側的回授路徑的反馳式AC-DC電壓轉換器可做為本案的AC-DC電壓轉換器6。
The AC-DC voltage converter 6 also includes an optical coupler 64, which provides a feedback path from the secondary side to the primary side of the AC-DC voltage converter 6. The optical coupler 64 transmits the feedback signal generated based on the output voltage VOUT60 from the primary side to the PWM controller 62 on the secondary side, so that it controls the switching of the power transistor 63 to adjust the output voltage VOUT60. FIG. 6 shows the basic structure of the AC-DC voltage converter 6, but the present invention is not limited thereto. A person with ordinary knowledge in the technical field to which the present case belongs can understand its operation based on the structure of the AC-DC voltage converter 6. According to other embodiments of the present invention, a flyback AC-DC voltage converter having a feedback path from the secondary side to the primary side can be used as the AC-DC voltage converter 6 of this case.
參閱第6圖，AC-DC電壓轉換器6的二次側電路還包括電阻-電容(Resistor-Capacitor，RC)電路RC60與RC61。RC電路60耦接於電壓輸出端TOUT與電壓回授端VFB之間，且包括電阻器R63以及電容器C62與C63。電容器C62耦接於電壓回授端VFB與光耦合器64中發光二極體640的陰極端之間。電容器C63與電阻器R63串聯以組成一串聯電路，且此串聯電路與電容器C62並聯。RC電路61耦接於電壓輸出端TOUT與電流回授端IFB之間，且包括電阻器R64以及電容器C64與C65。電容器C64耦接於電流回授端IFB與光耦合器64中發光二極體640的陰極端之間。電容器C65與電阻器R64串聯以組成一串聯電路，且此串聯電路與電容器C64並聯。同時參閱第5圖與第6圖，RC電路60透過電壓回授端VFB耦接誤差放大器50的負輸入端，且RC電路61透過電流回授端IFB耦接誤差放大器51的負輸入端。RC電路60與RC61操作，以濾除誤差放大器50與51各自的負輸入端上的電壓的漣波成分。
Referring to FIG. 6 , the secondary circuit of the AC-DC voltage converter 6 further includes resistor-capacitor (RC) circuits RC60 and RC61. The RC circuit 60 is coupled between the voltage output terminal TOUT and the voltage feedback terminal VFB, and includes a resistor R63 and capacitors C62 and C63. The capacitor C62 is coupled between the voltage feedback terminal VFB and the cathode terminal of the light-emitting diode 640 in the optical coupler 64. The capacitor C63 and the resistor R63 are connected in series to form a series circuit, and the series circuit is connected in parallel with the capacitor C62. The RC circuit 61 is coupled between the voltage output terminal TOUT and the current feedback terminal IFB, and includes a resistor R64 and capacitors C64 and C65. Capacitor C64 is coupled between the current feedback terminal IFB and the cathode terminal of the light-emitting diode 640 in the optical coupler 64. Capacitor C65 is connected in series with resistor R64 to form a series circuit, and this series circuit is connected in parallel with capacitor C64. Referring to Figures 5 and 6, RC circuit 60 is coupled to the negative input terminal of error amplifier 50 through voltage feedback terminal VFB, and RC circuit 61 is coupled to the negative input terminal of error amplifier 51 through current feedback terminal IFB. RC circuits 60 and RC61 operate to filter out the ripple component of the voltage on the respective negative input terminals of error amplifiers 50 and 51.
同時參閱第5圖與第6圖，埠控制器1的控制輸出端CATH耦接光耦合器64中發光二極體640的陰極端。電阻器54、130、與131共同連接節點N30。當未提供可變控制電壓V50時，節點N30上的感測信號S13_30的電壓位準隨著電壓輸入端Vin的輸入電壓(即AC-DC電壓轉換器6所產生的輸出電壓VOUT60)而改變，即感測信號S13_30表示電壓輸入端Vin的輸入電壓的大小。在本發明實施例中，可變控制電壓V50是依據輸出電壓VOUT60的一期望值而設定的。舉例來說，控制電路18透過Type-C輸入輸出埠P60與外部負載進行通信，以設定可變控制電壓V50的值。此時，感測信號S13_30的電壓位準係根據電壓輸入端Vin的輸入電壓以及可變控制電壓V50來決定。
Referring to FIG. 5 and FIG. 6 simultaneously, the control output terminal CATH of the port controller 1 is coupled to the cathode terminal of the light-emitting diode 640 in the optical coupler 64. The resistors 54, 130, and 131 are connected to the node N30. When the variable control voltage V50 is not provided, the voltage level of the sensing signal S13_30 on the node N30 changes with the input voltage of the voltage input terminal Vin (i.e., the output voltage VOUT60 generated by the AC-DC voltage converter 6), i.e., the sensing signal S13_30 represents the magnitude of the input voltage of the voltage input terminal Vin. In the embodiment of the present invention, the variable control voltage V50 is set according to a desired value of the output voltage VOUT60. For example, the control circuit 18 communicates with the external load through the Type-C input/output port P60 to set the value of the variable control voltage V50. At this time, the voltage level of the sensing signal S13_30 is determined according to the input voltage of the voltage input terminal Vin and the variable control voltage V50.
誤差放大器50根據關於輸出電壓VOUT60的感測信號S13_30的電壓位準與臨界電壓VTH50之間的差異來控制開關(NMOS電晶體)52是否導通。當感測信號S13_30的電壓位準與臨界電壓VTH50之間的差異較大時，開關52導通，使得控制輸出端CATH耦接接地GND，即是發光二極體640的陰極端耦接接地GND。此時，流經發光二極體640的電流增加，且發光二極體640所發射的光線的亮度增加。光耦合器64中光接收器641感測發光二極體640發射的光線，並產生對應的回授信號。PWM控制器62則根據此回授信號來調整控制功率電晶體63的PWM信號的脈波寬度，藉此控制功率電晶體63的切換，以增加AC-DC電壓轉換器6所產生的輸出電壓VOUT60。反之，當感測信號S13_30的電壓位準與臨界電
壓VTH50之間的差異較小時，開關52關斷。此時，發光二極體640所發射的光線的亮度不變或降低，使得PWM控制器62維持控制功率電晶體63的PWM信號的脈波寬度。
The error amplifier 50 controls whether the switch (NMOS transistor) 52 is turned on or not according to the difference between the voltage level of the sensing signal S13_30 related to the output voltage VOUT60 and the critical voltage VTH50. When the difference between the voltage level of the sensing signal S13_30 and the critical voltage VTH50 is large, the switch 52 is turned on, so that the control output terminal CATH is coupled to the ground GND, that is, the cathode terminal of the light-emitting diode 640 is coupled to the ground GND. At this time, the current flowing through the light-emitting diode 640 increases, and the brightness of the light emitted by the light-emitting diode 640 increases. The light receiver 641 in the optical coupler 64 senses the light emitted by the light-emitting diode 640 and generates a corresponding feedback signal. The PWM controller 62 adjusts the pulse width of the PWM signal that controls the power transistor 63 according to the feedback signal, thereby controlling the switching of the power transistor 63 to increase the output voltage VOUT60 generated by the AC-DC voltage converter 6. On the contrary, when the difference between the voltage level of the sensing signal S13_30 and the critical voltage VTH50 is small, the switch 52 is turned off. At this time, the brightness of the light emitted by the light-emitting diode 640 remains unchanged or decreases, so that the PWM controller 62 maintains the pulse width of the PWM signal that controls the power transistor 63.
誤差放大器51根據關於二次側總電流的感測信號S13_31的電壓位準與臨界電壓VTH51之間的差異來控制開關(NMOS電晶體)53是否導通。當感測信號S13_31的電壓位準與臨界電壓VTH51之間的差異較大時，開關53導通。反之，當感測信號S13_30的電壓位準與臨界電壓VTH50之間的差異較小時，開關53關斷。開關53的導通/關斷狀態對AC-DC電壓轉換器6的回授控制如前段所述，在此省略說明。
The error amplifier 51 controls whether the switch (NMOS transistor) 53 is turned on or not according to the difference between the voltage level of the sensing signal S13_31 about the total current on the secondary side and the critical voltage VTH51. When the difference between the voltage level of the sensing signal S13_31 and the critical voltage VTH51 is large, the switch 53 is turned on. On the contrary, when the difference between the voltage level of the sensing signal S13_30 and the critical voltage VTH50 is small, the switch 53 is turned off. The feedback control of the on/off state of the switch 53 on the AC-DC voltage converter 6 is as described in the previous paragraph, and the description is omitted here.
根據上述第2~4圖說明，電晶體494與496。或閘40與41、及閘45、以及驅動器490組成一保護電路，用以透過閘極驅動端VIN_GATE導通或截斷一電源輸出路徑。參閱第6圖，AC-DC電壓轉換器6與Type-C輸入輸出埠P60的VBUS接腳之間形成一電源輸出路徑，用以透過Type-C輸入輸出埠P60將產生的輸出電壓VOUT60提供至外部負載。電壓供應裝置66包括設置在此電源輸出路徑上的一開關65，其耦接於AC-DC電壓轉換器6與Type-C輸入輸出埠P60的VBUS接腳之間。在此實施例中，開關65係以一N型電晶體來實現，例如，以NMOS電晶體來實現。在此情況下，NMOS電晶體(65)的閘極耦接閘極驅動端VIN_GATE，其汲極耦接AC-DC電壓轉換器6以接收輸出電壓VOUT60，且其源極耦接Type-C輸入輸出埠P60的VBUS接腳。開關(NMOS電晶體)65由第4圖中的
驅動器490來導通或關斷，藉以導通或截斷AC-DC電壓轉換器6與Type-C輸入輸出埠P60的VBUS接腳之間的電源輸出路徑，藉以實現過電壓保護操作、欠電壓保護操作、過電流保護操作、短路保護操作、以及溫度過高/過低保護操作中至少一者。驅動器490的相關操作，請參閱說明第4圖的段落。
According to the description of FIGS. 2 to 4 above, transistors 494 and 496, or gates 40 and 41, and gate 45, and driver 490 form a protection circuit for conducting or cutting off a power output path through the gate drive terminal VIN_GATE. Referring to FIG. 6, a power output path is formed between the AC-DC voltage converter 6 and the VBUS pin of the Type-C input/output port P60, for providing the generated output voltage VOUT60 to an external load through the Type-C input/output port P60. The voltage supply device 66 includes a switch 65 disposed on the power output path, which is coupled between the AC-DC voltage converter 6 and the VBUS pin of the Type-C input-output port P60. In this embodiment, the switch 65 is implemented by an N-type transistor, for example, an NMOS transistor. In this case, the gate of the NMOS transistor (65) is coupled to the gate drive terminal VIN_GATE, the drain is coupled to the AC-DC voltage converter 6 to receive the output voltage VOUT60, and the source is coupled to the VBUS pin of the Type-C input-output port P60. The switch (NMOS transistor) 65 is turned on or off by the driver 490 in FIG. 4, thereby turning on or off the power output path between the AC-DC voltage converter 6 and the VBUS pin of the Type-C input/output port P60, thereby realizing at least one of overvoltage protection operation, undervoltage protection operation, overcurrent protection operation, short circuit protection operation, and over/under temperature protection operation. For the relevant operation of the driver 490, please refer to the paragraph describing FIG. 4.
在另一實施例中，如第7圖所示，埠控制器1連接一DC-DC電壓轉換器7。埠控制器1與DC-DC電壓轉換器7組成具有電源供應端角色的電壓供應裝置71，其透過Type-C輸入輸出埠P70與一外部負載連接，以將DC-DC電壓轉換器7所產生的輸出電壓VOUT70提供至外部負載。此外，輸出電壓VOUT70傳送至埠控制器1的電壓輸入端Vin，以作為埠控制器1的輸入電壓。DC-DC電壓轉換器7的回授輸入端FB耦接埠控制器1的電壓回授端VFB。以下將透過第5圖與第7圖來說明回授控制電路19的操作。
In another embodiment, as shown in FIG. 7 , the port controller 1 is connected to a DC-DC voltage converter 7. The port controller 1 and the DC-DC voltage converter 7 form a voltage supply device 71 having a power supply end role, which is connected to an external load through the Type-C input/output port P70 to provide the output voltage VOUT70 generated by the DC-DC voltage converter 7 to the external load. In addition, the output voltage VOUT70 is transmitted to the voltage input terminal Vin of the port controller 1 as the input voltage of the port controller 1. The feedback input terminal FB of the DC-DC voltage converter 7 is coupled to the voltage feedback terminal VFB of the port controller 1. The operation of the feedback control circuit 19 will be described below through FIG. 5 and FIG. 7 .
參閱第5圖，電阻器130與131串接於電壓輸入端Vin與接地端Gnd之間，以形成一分壓電路架構。根據此分壓電路架構的操作，於電阻器130與131之間的節點N30上產生感測信號S13_30，其表示電壓輸入端Vin的輸入電壓的大小。當未提供可變控制電壓V50時，感測信號S13_30的電壓位準隨著電壓輸入端Vin的輸入電壓(即DC-DC電壓轉換器7所產生的輸出電壓VOUT70)而改變，即感測信號S13_30表示電壓輸入端Vin的輸入電壓的大小。感測信號S13_30透過電壓回授端VFB傳送至DC-DC電壓轉換器7的回授輸入端FB，使得DC-DC電壓轉換器7可依據感測信號
S13_30得知輸出電壓VOUT70的大小，並做進一步的電壓調整或控制。
Referring to FIG. 5 , resistors 130 and 131 are connected in series between the voltage input terminal Vin and the ground terminal Gnd to form a voltage divider circuit structure. According to the operation of this voltage divider circuit structure, a sensing signal S13_30 is generated at a node N30 between the resistors 130 and 131, which indicates the magnitude of the input voltage of the voltage input terminal Vin. When the variable control voltage V50 is not provided, the voltage level of the sensing signal S13_30 changes with the input voltage of the voltage input terminal Vin (i.e., the output voltage VOUT70 generated by the DC-DC voltage converter 7), i.e., the sensing signal S13_30 indicates the magnitude of the input voltage of the voltage input terminal Vin. The sensing signal S13_30 is transmitted to the feedback input terminal FB of the DC-DC voltage converter 7 through the voltage feedback terminal VFB, so that the DC-DC voltage converter 7 can know the size of the output voltage VOUT70 according to the sensing signal
S13_30 and make further voltage adjustments or controls.
在本發明實施例中，可變控制電壓V50是依據輸出電壓VOUT70的一期望值而設定的。舉例來說，控制電路18透過Type-C輸入輸出埠P70與外部負載進行通信，以設定可變控制電壓V50的值。此時，感測信號S13_30的電壓位準係根據電壓輸入端Vin的輸入電壓以及可變控制電壓V50來決定。電壓轉換器7的回授輸入端FB透過電壓回授端VFB接收感測信號S13_30，並依照控制電路18與外部負載之間的通信來調整輸出電壓VOUT70至上述期望值。
In the embodiment of the present invention, the variable control voltage V50 is set according to an expected value of the output voltage VOUT70. For example, the control circuit 18 communicates with the external load through the Type-C input and output port P70 to set the value of the variable control voltage V50. At this time, the voltage level of the sensing signal S13_30 is determined according to the input voltage of the voltage input terminal Vin and the variable control voltage V50. The feedback input terminal FB of the voltage converter 7 receives the sensing signal S13_30 through the voltage feedback terminal VFB, and adjusts the output voltage VOUT70 to the above-mentioned expected value according to the communication between the control circuit 18 and the external load.
參閱第7圖，DC-DC電壓轉換器7與Type-C輸入輸出埠P70的VBUS接腳之間形成一電源輸出路徑，用以透過Type-C輸入輸出埠P70將產生的輸出電壓VOUT70提供至外部負載。電壓供應裝置71包括設置在此電源輸出路徑上的一開關70，其耦接於DC-DC電壓轉換器7與Type-C輸入輸出埠P70的VBUS接腳之間。在此實施例中，開關70係以一N型電晶體來實現，例如，以NMOS電晶體來實現。在此情況下，NMOS電晶體(70)的閘極耦接閘極驅動端VIN_GATE，其汲極耦接DC-DC電壓轉換器7以接收輸出電壓VOUT70，且其源極耦接Type-C輸入輸出埠P70的VBUS接腳。開關(NMOS電晶體)71由第4圖中的驅動器490來導通或關斷，藉以導通或截斷DC-DC電壓轉換器7與Type-C輸入輸出埠P70的VBUS接腳之間的電源輸出路徑，藉以實現過電壓保護操作、欠電壓保護
操作、過電流保護操作、短路保護操作、以及溫度過高/過低保護操作中至少一者。驅動器490的相關操作，請參閱說明第4圖的段落。
Referring to FIG. 7 , a power output path is formed between the DC-DC voltage converter 7 and the VBUS pin of the Type-C input/output port P70, for providing the generated output voltage VOUT70 to an external load through the Type-C input/output port P70. The voltage supply device 71 includes a switch 70 disposed on the power output path, which is coupled between the DC-DC voltage converter 7 and the VBUS pin of the Type-C input/output port P70. In this embodiment, the switch 70 is implemented by an N-type transistor, for example, an NMOS transistor. In this case, the gate of the NMOS transistor (70) is coupled to the gate drive terminal VIN_GATE, the drain thereof is coupled to the DC-DC voltage converter 7 to receive the output voltage VOUT70, and the source thereof is coupled to the VBUS pin of the Type-C input/output port P70. The switch (NMOS transistor) 71 is turned on or off by the driver 490 in FIG. 4 to turn on or off the power output path between the DC-DC voltage converter 7 and the VBUS pin of the Type-C input/output port P70, thereby realizing at least one of overvoltage protection operation, undervoltage protection operation, overcurrent protection operation, short circuit protection operation, and over/undertemperature protection operation. For the operation of driver 490, please refer to the paragraph describing Figure 4.
在一實施例中，如第8圖所示，埠控制器1可實施於作為電源接受端(Sink)的電子裝置8。電子裝置8透過Type-C輸入輸出埠P80連接一外部電源裝置，以接收其提供的電壓。電子裝置8所接收的電壓做為輸入電壓VIN80。埠控制器1的電壓輸入端Vin耦接Type-C輸入輸出埠P80的VBUS接腳，以接收輸入電壓VIN80，且根據輸入電壓VIN80來執行至少一保護操作。
In one embodiment, as shown in FIG. 8 , the port controller 1 can be implemented in an electronic device 8 as a power sink. The electronic device 8 is connected to an external power device through the Type-C input/output port P80 to receive the voltage provided by the external power device. The voltage received by the electronic device 8 is used as the input voltage VIN80. The voltage input terminal Vin of the port controller 1 is coupled to the VBUS pin of the Type-C input/output port P80 to receive the input voltage VIN80, and performs at least one protection operation according to the input voltage VIN80.
電子裝置8的內部電路80與Type-C輸入輸出埠P80之間形成一電源輸入路徑，以接收輸入電壓VIN80。電子裝置8包括設置在此電源輸入路徑上的一開關81，其耦接於與Type-C輸入輸出埠P80的VBUS接腳與內部電路80之間。在此實施例中，開關81係以一N型電晶體來實現，例如，以NMOS電晶體來實現。在此情況下，NMOS電晶體(81)的閘極耦接閘極驅動端VBUS_GATE，其汲極耦接Type-C輸入輸出埠P80的VBUS接腳以接收輸入電壓VIN80，且其源極耦接內部電路80。開關(NMOS電晶體)81由第4圖中的驅動器491來導通或關斷，藉以導通或截斷Type-C輸入輸出埠P80與內部電路80之間的電源輸入路徑，藉以實現過電壓保護操作、欠電壓保護操作、過電流保護操作、以及溫度過高/過低保護操作中至少一者。驅動器491的相關操作，請參閱說明第4圖的段落。
A power input path is formed between the internal circuit 80 of the electronic device 8 and the Type-C input/output port P80 to receive the input voltage VIN80. The electronic device 8 includes a switch 81 arranged on the power input path, which is coupled between the VBUS pin of the Type-C input/output port P80 and the internal circuit 80. In this embodiment, the switch 81 is implemented by an N-type transistor, for example, an NMOS transistor. In this case, the gate of the NMOS transistor (81) is coupled to the gate drive terminal VBUS_GATE, its drain is coupled to the VBUS pin of the Type-C input/output port P80 to receive the input voltage VIN80, and its source is coupled to the internal circuit 80. The switch (NMOS transistor) 81 is turned on or off by the driver 491 in Figure 4, thereby turning on or off the power input path between the Type-C input/output port P80 and the internal circuit 80, thereby realizing at least one of overvoltage protection operation, undervoltage protection operation, overcurrent protection operation, and over/under temperature protection operation. For the relevant operation of the driver 491, please refer to the paragraph describing Figure 4.
參閱第4圖與第8圖，在上述電源輸入路徑上，開關
81與Type-C輸入輸出埠P80的VBUS接腳彼此耦接的節點N80耦接埠控制器1的匯流排電壓端VBUS與放電端Disc。在一情況下，由第4圖中的驅動器492來導通或關斷電晶體494，藉此提供或截斷介於匯流排電壓端VBUS與接地GND之間的放電路徑來；在另一情況下，由第4圖中的驅動器493來導通或關斷電晶體496，藉此提供或截斷介於放電端Disc與接地GND之間的放電路徑。如此一來，可實現電壓保護操作、欠電壓保護操作、以及過電流保護操作中至少一者。驅動器492與493的相關操作，請參閱說明第4圖的段落。
Referring to FIG. 4 and FIG. 8, in the above power input path, the node N80 where the switch 81 and the VBUS pin of the Type-C input/output port P80 are coupled to each other couples the bus voltage terminal VBUS and the discharge terminal Disc of the port controller 1. In one case, the driver 492 in FIG. 4 turns on or off the transistor 494, thereby providing or cutting off the discharge path between the bus voltage terminal VBUS and the ground GND; in another case, the driver 493 in FIG. 4 turns on or off the transistor 496, thereby providing or cutting off the discharge path between the discharge terminal Disc and the ground GND. In this way, at least one of the voltage protection operation, undervoltage protection operation, and overcurrent protection operation can be realized. For the relevant operations of drivers 492 and 493, please refer to the paragraph describing Figure 4.
在一實施例中，埠控制器1可實施於作為電源接受端(Sink)的電子裝置8。電子裝置8透過Type-C輸入輸出埠P80連接一外部電源裝置，以接收其提供的電壓。電子裝置8所接收的電壓做為輸入電壓VIN80。埠控制器1透過電壓輸入端Vin接收輸入電壓VIN80，且根據輸入電壓VIN80來執行至少一保護操作。
In one embodiment, the port controller 1 can be implemented in an electronic device 8 as a power sink. The electronic device 8 is connected to an external power device through the Type-C input/output port P80 to receive the voltage provided by the external power device. The voltage received by the electronic device 8 is used as the input voltage VIN80. The port controller 1 receives the input voltage VIN80 through the voltage input terminal Vin, and performs at least one protection operation according to the input voltage VIN80.
在一實施例中，如第9圖所示，埠控制器1可實施於作為具有電源上雙角色(Dual-Role-Power，DRP)(電源接受端(Sink)與電源供應端(Source))的電子裝置9。電子裝置9包括第8圖的內部電路80、開關81、以及Type-C輸入輸出埠P80。透過內部電路80、開關81、以及Type-C輸入輸出埠P80的操作，電子裝置9作為電源接受端。電子裝置9作為電源接受端時內部電路80、開關81、以及Type-C輸入輸出埠P80的操作與第8圖的實施例相同，在此省略敘述。
In one embodiment, as shown in FIG. 9, the port controller 1 can be implemented in an electronic device 9 having a dual-role power (DRP) (power sink and power source). The electronic device 9 includes the internal circuit 80, the switch 81, and the Type-C input/output port P80 of FIG. 8. Through the operation of the internal circuit 80, the switch 81, and the Type-C input/output port P80, the electronic device 9 acts as a power sink. When the electronic device 9 acts as a power sink, the operation of the internal circuit 80, the switch 81, and the Type-C input/output port P80 is the same as the embodiment of FIG. 8, and the description is omitted here.
電子裝置9還包括電源供應器90以及開關91。在此
實施例中，電源供應器90可以是電池、AC-DC電壓轉換器、或AC-DC電壓轉換器。電子裝置9可透過Type-C輸入輸出埠P80連接一外部負載，以將電源供應器90所產生的輸出電壓VOUT90提供至外部負載，藉此實現電源供應端的角色。當電子裝置9可透過Type-C輸入輸出埠P80連接外部負載時，電源供應器90與Type-C輸入輸出埠P80的VBUS接腳之間形成一電源輸出路徑，用以透過Type-C輸入輸出埠P80將產生的輸出電壓VOUT90提供至外部負載。開關91耦接於電源供應器90與Type-C輸入輸出埠P80的VBUS接腳之間。在此實施例中，開關91係以一N型電晶體來實現，例如，以NMOS電晶體來實現。在此情況下，NMOS電晶體(91)的閘極耦接閘極驅動端VIN_GATE，其汲極耦接電源供應器90以接收輸出電壓VOUT90，且其源極耦接Type-C輸入輸出埠P80的VBUS接腳。開關(NMOS電晶體)91由第4圖中的驅動器490來導通或關斷，藉以導通或截斷電源供應器90與Type-C輸入輸出埠P80的VBUS接腳之間的電源輸出路徑，藉以實現過電壓保護操作、欠電壓保護操作、過電流保護操作、短路保護操作、以及溫度過高/過低保護操作中至少一者。驅動器490的相關操作，請參閱說明第4圖的段落。
The electronic device 9 further includes a power supply 90 and a switch 91. In this embodiment, the power supply 90 may be a battery, an AC-DC voltage converter, or an AC-DC voltage converter. The electronic device 9 may be connected to an external load via the Type-C input/output port P80 to provide the output voltage VOUT90 generated by the power supply 90 to the external load, thereby realizing the role of the power supply end. When the electronic device 9 may be connected to the external load via the Type-C input/output port P80, a power output path is formed between the power supply 90 and the VBUS pin of the Type-C input/output port P80, for providing the generated output voltage VOUT90 to the external load via the Type-C input/output port P80. The switch 91 is coupled between the power supply 90 and the VBUS pin of the Type-C input/output port P80. In this embodiment, the switch 91 is implemented by an N-type transistor, for example, an NMOS transistor. In this case, the gate of the NMOS transistor (91) is coupled to the gate drive terminal VIN_GATE, the drain thereof is coupled to the power supply 90 to receive the output voltage VOUT90, and the source thereof is coupled to the VBUS pin of the Type-C input/output port P80. The switch (NMOS transistor) 91 is turned on or off by the driver 490 in FIG. 4, thereby turning on or off the power output path between the power supply 90 and the VBUS pin of the Type-C input/output port P80, thereby realizing at least one of overvoltage protection operation, undervoltage protection operation, overcurrent protection operation, short circuit protection operation, and over/under temperature protection operation. For the relevant operation of the driver 490, please refer to the paragraph describing FIG. 4.
根據上述實施例，本案的埠控制器1可執行匯流排電壓(VBUS)控制通信、電纜供電電壓(VCONN)控制、CC邏輯控制、USB PD協定通信。此外，當埠控制器1耦接一功率轉換器時，可根據功率轉換器的輸出電壓或二次側電流來回授控制功率轉換器，以調整其產生的輸出電壓。再者，不論埠控制器1是應用於作為電源供
應端角色、電源接受端角色、或兼具前兩者的雙角色的裝置，埠控制器1皆可執行保護操作。本案的埠控制器1不需透過大量且連接複雜的外部元件即可執行回授控制以及保護操作。當埠控制器1應用於電子系統時，電子系統的微控制單元不需要即時監控電壓輸入端Vin的輸入電壓以及系統的環境參數，而由埠控制器1根據輸入電壓以及環境參數來執行回授控制以及保護操作。
According to the above-mentioned embodiments, the port controller 1 of the present case can perform bus voltage (V BUS ) control communication, cable power supply voltage (VCONN) control, CC logic control, and USB PD protocol communication. In addition, when the port controller 1 is coupled to a power converter, the power converter can be feedback-controlled according to the output voltage or secondary current of the power converter to adjust the output voltage generated. Furthermore, regardless of whether the port controller 1 is used as a device that serves as a power supply end role, a power receiving end role, or a dual role of the former two, the port controller 1 can perform protection operations. The port controller 1 of the present case can perform feedback control and protection operations without the need for a large number of external components with complex connections. When the port controller 1 is applied to an electronic system, the micro control unit of the electronic system does not need to monitor the input voltage of the voltage input terminal Vin and the environmental parameters of the system in real time, and the port controller 1 performs feedback control and protection operations according to the input voltage and the environmental parameters.
雖然本發明已以較佳實施例揭露如上，然其並非用以限定本發明，任何熟習此項技藝者，在不脫離本發明之精神和範圍內，當可作更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
Although the present invention has been disclosed as above with the preferred embodiment, it is not intended to limit the present invention. Anyone familiar with this technology can make changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope of the patent application attached hereto.