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TWI879709B - Method of forming capacitor - Google Patents

Method of forming capacitor Download PDF

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TWI879709B
TWI879709B TW113147971A TW113147971A TWI879709B TW I879709 B TWI879709 B TW I879709B TW 113147971 A TW113147971 A TW 113147971A TW 113147971 A TW113147971 A TW 113147971A TW I879709 B TWI879709 B TW I879709B
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layer
forming
conductive layer
metal
metal oxynitride
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TW202517014A (en
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楊峻華
呂俊霖
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南亞科技股份有限公司
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Abstract

The present disclosure provides a method of forming a capacitor. The method includes the following operations. A first conductive layer is formed on a side surface of a cylindrical substrate. A dielectric layer is formed on the first conductive layer. A metal nitride layer is formed on the dielectric layer. The metal nitride layer is converted to a metal oxynitride layer under an ozone environment. A second conductive layer is formed on the metal oxynitride layer.

Description

形成電容器的方法Method of forming a capacitor

本揭示內容是關於一種形成電容器的方法。The present disclosure relates to a method of forming a capacitor.

隨著半導體裝置的尺寸越做越小,與半導體裝置相關的製程也越來越複雜,且更具挑戰。例如動態隨機存取記憶體(Dynamic Random Access Memory, DRAM)中的電容器,如何在將其尺寸減小的同時保留高電容值及避免漏電流成為必須解決的問題。因此需要開發一種形成電容器的方法,使形成的電容器不僅具有高電容值,也可避免漏電流。As the size of semiconductor devices becomes smaller and smaller, the manufacturing processes related to semiconductor devices are becoming more and more complex and challenging. For example, for capacitors in dynamic random access memory (DRAM), how to reduce their size while retaining high capacitance and avoiding leakage current has become a problem that must be solved. Therefore, it is necessary to develop a method for forming capacitors that not only has a high capacitance value but also avoids leakage current.

本揭示內容提供一種形成電容器的方法。方法包括以下操作。形成第一導電層在圓柱體基板的側表面上。形成介電層在第一導電層上。形成金屬氮化物層在介電層上。在臭氧環境下將金屬氮化物層轉換為金屬氮氧化物層。形成第二導電層在金屬氮氧化物層上。The present disclosure provides a method for forming a capacitor. The method includes the following operations: forming a first conductive layer on a side surface of a cylindrical substrate; forming a dielectric layer on the first conductive layer; forming a metal nitride layer on the dielectric layer; converting the metal nitride layer into a metal oxynitride layer in an ozone environment; and forming a second conductive layer on the metal oxynitride layer.

在一些實施方式中,臭氧環境中的臭氧濃度在50 g/m 3至500 g/m 3In some embodiments, the ozone concentration in the ozone environment is between 50 g/m 3 and 500 g/m 3 .

在一些實施方式中,臭氧環境中的溫度在200 °C至400 °C。In some embodiments, the temperature in the ozone environment is between 200°C and 400°C.

在一些實施方式中,金屬氮氧化物層中的氧原子數佔金屬氮氧化物層中的總原子數的50%至90%。In some embodiments, the number of oxygen atoms in the metal oxynitride layer accounts for 50% to 90% of the total number of atoms in the metal oxynitride layer.

在一些實施方式中,金屬氮氧化物層中的氧原子數佔金屬氮氧化物層中的總原子數的50%至70%。In some embodiments, the number of oxygen atoms in the metal oxynitride layer accounts for 50% to 70% of the total number of atoms in the metal oxynitride layer.

在一些實施方式中,金屬氮化物層包括氮化鈦,以及金屬氮氧化物層包括氮氧化鈦。In some embodiments, the metal nitride layer includes titanium nitride, and the metal oxynitride layer includes titanium oxynitride.

在一些實施方式中,介電層包括二氧化鋯、二氧化鉿、氧化鋁、氧化矽、氧化銠、氧化釕或其組合。In some embodiments, the dielectric layer includes zirconium dioxide, tantalum dioxide, aluminum oxide, silicon oxide, rhodium oxide, ruthenium oxide, or a combination thereof.

在一些實施方式中,金屬氮氧化物層的厚度在0.3 nm至3 nm。In some embodiments, the metal oxynitride layer has a thickness in a range of 0.3 nm to 3 nm.

在一些實施方式中,金屬氮化物層的厚度在0.3 nm至3 nm。In some embodiments, the thickness of the metal nitride layer is between 0.3 nm and 3 nm.

在一些實施方式中,方法還包括以下操作。在形成第一導電層在圓柱體基板的側表面上之後,移除圓柱體基板,以形成中空圓柱狀的第一導電層,其中形成介電層在第一導電層上包括形成內側介電層在第一導電層的內側表面上以及形成外側介電層在第一導電層的外側表面上、形成金屬氮化物層在介電層上包括形成內側金屬氮化物層在內側介電層上以及形成外側金屬氮化物層在外側介電層上、在臭氧環境下將金屬氮化物層轉換為金屬氮氧化物層包括將內側金屬氮化物層轉換為內側金屬氮氧化物層以及將外側金屬氮化物層轉換為外側金屬氮氧化物層,以及形成第二導電層在金屬氮氧化物層上包括形成內側第二導電層在內側金屬氮氧化物層上以及形成外側第二導電層在外側金屬氮氧化物層上。In some embodiments, the method further includes the following operations. After forming the first conductive layer on the side surface of the cylindrical substrate, removing the cylindrical substrate to form a hollow cylindrical first conductive layer, wherein forming the dielectric layer on the first conductive layer includes forming an inner dielectric layer on the inner surface of the first conductive layer and forming an outer dielectric layer on the outer surface of the first conductive layer, and forming the metal nitride layer on the dielectric layer includes forming an inner metal nitride layer on the inner dielectric layer and forming an outer metal nitride layer. A metal nitride layer is formed on the outer dielectric layer, converting the metal nitride layer into a metal oxynitride layer in an ozone environment includes converting the inner metal nitride layer into an inner metal oxynitride layer and converting the outer metal nitride layer into an outer metal oxynitride layer, and forming a second conductive layer on the metal oxynitride layer includes forming an inner second conductive layer on the inner metal oxynitride layer and forming an outer second conductive layer on the outer metal oxynitride layer.

參照以下說明和所附申請專利範圍可更加地理解本揭示內容的實施方式、特點及優點。應理解的是,上文一般性的說明及下文具體性的說明為示例性及解釋性的,旨在提供本揭示內容的進一步說明。The embodiments, features and advantages of the present disclosure can be better understood by referring to the following description and the attached patent scope. It should be understood that the general description above and the specific description below are exemplary and explanatory, and are intended to provide further explanation of the present disclosure.

為了使本揭示內容的說明更加詳細及完整,下文針對實施方式的態樣及具體的實施方式做出說明性的描述。需注意的是,這並非限制本揭示內容的實施方式為唯一形式。本揭示內容的實施方式在有益的情況下可互相結合或取代,且在未進一步說明的情況下可附加其他的實施方式。In order to make the description of the present disclosure more detailed and complete, the following is an illustrative description of the implementation mode and the specific implementation mode. It should be noted that this does not limit the implementation mode of the present disclosure to a single form. The implementation modes of the present disclosure can be combined or replaced with each other when beneficial, and other implementation modes can be added without further description.

此外空間相對用語,例如上方或下方等,可在本揭示內容中描述一個元件或特徵與圖中另一個元件或特徵的關係。除了圖中描述的方向,空間相對用語旨在涵蓋裝置在使用或操作時的不同方向。例如裝置可能以其他方式定向,例如旋轉90度或其他方向等,因此本揭示內容的空間相對用語可相對應地解釋。在本揭示內容中,除非另有說明,否則不同圖中的相同的元件編號是指以相同或相似的材料通過相同或相似的方法形成的相同或相似的元件。In addition, spatially relative terms, such as above or below, etc., may be used in this disclosure to describe the relationship of one element or feature to another element or feature in the figure. Spatially relative terms are intended to cover different orientations of the device when in use or operation in addition to the orientation described in the figure. For example, the device may be oriented in other ways, such as rotated 90 degrees or in other orientations, so the spatially relative terms of this disclosure may be interpreted accordingly. In this disclosure, unless otherwise specified, the same element number in different figures refers to the same or similar elements formed by the same or similar methods with the same or similar materials.

此外考慮到測量產生的誤差或實際操作產生的誤差等,本揭示內容的「約」、「近似」、「基本上」或「實質上」等包括所述值或所述特徵以及所屬技術領域中通常知識者可接受的偏差範圍內的值或特徵。舉例來說,在±15%、±10%或±5%偏差範圍內的值。而且可依據測量性質或其它影響操作的性質選擇可接受的偏差範圍。In addition, considering the errors caused by measurement or the errors caused by actual operation, the "about", "approximately", "substantially" or "substantially" in the present disclosure include the values or features and the values or features within the deviation range acceptable to the ordinary skilled person in the art. For example, the values within the deviation range of ±15%, ±10% or ±5%. The acceptable deviation range can be selected according to the measurement properties or other properties affecting the operation.

本揭示內容提供一種形成電容器的方法。方法包括以下操作。形成介電層在第一導電層上。形成金屬氮化物層在介電層上。在臭氧環境下將金屬氮化物層轉換為金屬氮氧化物層。形成第二導電層在金屬氮氧化物層上。接下來根據實施方式詳細說明本揭示內容形成電容器的方法。The present disclosure provides a method for forming a capacitor. The method includes the following operations: forming a dielectric layer on a first conductive layer; forming a metal nitride layer on the dielectric layer; converting the metal nitride layer into a metal oxynitride layer in an ozone environment; and forming a second conductive layer on the metal oxynitride layer. Next, the method for forming a capacitor according to the present disclosure is described in detail according to an implementation method.

第1圖是根據一些實施方式的關於上述形成電容器的方法100的流程圖。在第1圖中,方法100包括操作101、操作102、操作103及操作104。在閱讀第1圖時可同時參照下文進一步說明的較佳的實施方式,例如第2圖至第5圖的第一實施方式、第6A圖至第10B圖的第二實施方式,以及未另外繪示的第三實施方式。需注意的是,雖然未另外繪示第三實施方式,但可參考類似的第二實施方式的圖式,而差異部分將另外說明。FIG. 1 is a flow chart of a method 100 for forming a capacitor according to some embodiments. In FIG. 1, method 100 includes operation 101, operation 102, operation 103, and operation 104. FIG. 1 may be read in conjunction with the preferred embodiments further described below, such as the first embodiment of FIGS. 2 to 5, the second embodiment of FIGS. 6A to 10B, and the third embodiment not shown separately. It should be noted that although the third embodiment is not shown separately, the similar drawings of the second embodiment may be referred to, and the differences will be described separately.

在第1圖的方法100中,操作101包括形成介電層203在第一導電層202上,例如參照第2圖或第6A圖至第8B圖。第一導電層202將與在後續操作中形成的第二導電層206共同作為電容器中位在介電層203兩側的電極板,以對介電層203進行充放電。在一些實施方式中,方法100還包括在執行操作101之前,形成第一導電層202在基板上。在一些實施方式中,基板包括平板基板(例如下文進一步說明的第一實施方式)或圓柱體基板(例如下文進一步說明的第二實施方式及第三實施方式)等。In the method 100 of FIG. 1 , operation 101 includes forming a dielectric layer 203 on a first conductive layer 202, for example, referring to FIG. 2 or FIGS. 6A to 8B. The first conductive layer 202 will be used together with a second conductive layer 206 formed in a subsequent operation as electrodes located on both sides of the dielectric layer 203 in a capacitor to charge and discharge the dielectric layer 203. In some embodiments, the method 100 further includes forming the first conductive layer 202 on a substrate before performing operation 101. In some embodiments, the substrate includes a flat substrate (such as the first embodiment further described below) or a cylindrical substrate (such as the second and third embodiments further described below), etc.

繼續說明第1圖的操作101,在一些實施方式中,較佳的第一導電層202包括氮化鈦。在一些實施方式中,較佳的介電層203包括二氧化鋯、二氧化鉿、氧化鋁、氧化矽、氧化銠、氧化釕或其組合,以具有較高的介電常數。在一些實施方式中,形成介電層203在第一導電層202上包括任何合適的製程,例如原子層沉積(Atomic Layer Deposition, ALD)法等。Continuing with operation 101 of FIG. 1 , in some embodiments, the preferred first conductive layer 202 includes titanium nitride. In some embodiments, the preferred dielectric layer 203 includes zirconium dioxide, tantalum dioxide, aluminum oxide, silicon oxide, rhodium oxide, ruthenium oxide, or a combination thereof to have a higher dielectric constant. In some embodiments, forming the dielectric layer 203 on the first conductive layer 202 includes any suitable process, such as atomic layer deposition (ALD) method.

在第1圖的方法100中,操作102包括形成金屬氮化物層204在介電層203上,例如參照第3圖或第8A圖至第8B圖。金屬氮化物層204將在後續操作中形成金屬氮氧化物層205,以具有防止電容器漏電的作用。In the method 100 of FIG. 1 , operation 102 includes forming a metal nitride layer 204 on the dielectric layer 203, such as referring to FIG. 3 or FIGS. 8A to 8B. The metal nitride layer 204 will form a metal oxynitride layer 205 in a subsequent operation to prevent the capacitor from leaking.

繼續說明第1圖的操作102,在一些實施方式中,較佳的金屬氮化物層204的厚度T1在0.3 nm至3 nm,例如0.3 nm、0.5 nm、1.0 nm、1.5 nm、2.0 nm、2.5 nm或3.0 nm。金屬氮化物層204的厚度T1太小將使形成的金屬氮氧化物層205的厚度T2也太小,使得電容器減少漏電的效果下降。金屬氮化物層204的厚度T1太大則使將在後續操作中形成的第二導電層206與介電層203的距離太遠,因此較難通過第二導電層206對介電層203進行充放電。在一些實施方式中,較佳的金屬氮化物層204包括氮化鈦。在一些實施方式中,形成金屬氮化物層204在介電層203上包括任何合適的製程,例如原子層沉積法等。Continuing with the description of operation 102 of FIG. 1 , in some embodiments, the thickness T1 of the metal nitride layer 204 is preferably between 0.3 nm and 3 nm, such as 0.3 nm, 0.5 nm, 1.0 nm, 1.5 nm, 2.0 nm, 2.5 nm, or 3.0 nm. If the thickness T1 of the metal nitride layer 204 is too small, the thickness T2 of the formed metal nitride oxide layer 205 will also be too small, so that the effect of reducing leakage of the capacitor is reduced. If the thickness T1 of the metal nitride layer 204 is too large, the distance between the second conductive layer 206 to be formed in the subsequent operation and the dielectric layer 203 is too far, so it is more difficult to charge and discharge the dielectric layer 203 through the second conductive layer 206. In some embodiments, the preferred metal nitride layer 204 includes titanium nitride. In some embodiments, forming the metal nitride layer 204 on the dielectric layer 203 includes any suitable process, such as atomic layer deposition.

在第1圖的方法100中,操作103包括在臭氧環境下將金屬氮化物層204轉換為金屬氮氧化物層205,例如參照第3圖至第4圖或第8A圖至第9B圖。金屬氮氧化物層205可防止將在後續操作中形成的第二導電層206在直接接觸介電層203時使介電層203中的原子(例如氧原子)遷移至第二導電層206中而造成介電層203中出現原子空缺而漏電。在一些實施方式中,將金屬氮化物層204置於包括臭氧的臭氧環境中以形成金屬氮氧化物層205。In the method 100 of FIG. 1 , operation 103 includes converting the metal nitride layer 204 into the metal oxynitride layer 205 in an ozone environment, for example, referring to FIGS. 3 to 4 or FIGS. 8A to 9B. The metal oxynitride layer 205 can prevent the atoms (e.g., oxygen atoms) in the dielectric layer 203 from migrating into the second conductive layer 206 when the second conductive layer 206 to be formed in a subsequent operation directly contacts the dielectric layer 203, thereby causing atomic vacancies in the dielectric layer 203 and causing leakage. In some embodiments, the metal nitride layer 204 is placed in an ozone environment including ozone to form the metal oxynitride layer 205.

繼續說明第1圖的操作103,操作103還可調整金屬氮氧化物層205中不同原子的數目比例以最佳化地減少電容器的漏電。例如金屬氮化物層204中氧原子數比上總原子數為第一氧原子數比例,在完成操作103之後,金屬氮氧化物層205中氧原子數比上總原子數為第二氧原子數比例,且第二氧原子數比例大於第一氧原子數比例。例如金屬氮化物層204中氮原子數比上總原子數為第一氮原子數比例,在完成操作103之後,金屬氮氧化物層205中氮原子數比上總原子數為第二氮原子數比例,且第二氮原子數比例小於第一氮原子數比例。在一些實施方式中,較佳的金屬氮氧化物層205中的氧原子數佔總原子數的50%至90%,例如50%、60%、70%、80%或90%,其中更佳為50%至70%,例如55%、60%、65%或70%。Continuing to explain operation 103 of FIG. 1, operation 103 can also adjust the ratio of the number of different atoms in the metal oxynitride layer 205 to optimize the reduction of the leakage of the capacitor. For example, the ratio of the number of oxygen atoms in the metal nitride layer 204 to the total number of atoms is a first ratio of the number of oxygen atoms. After completing operation 103, the ratio of the number of oxygen atoms in the metal oxynitride layer 205 to the total number of atoms is a second ratio, and the second ratio is greater than the first ratio. For example, the ratio of the number of nitrogen atoms in the metal nitride layer 204 to the total number of atoms is a first ratio of the number of nitrogen atoms. After completing operation 103, the ratio of the number of nitrogen atoms in the metal oxynitride layer 205 to the total number of atoms is a second ratio, and the second ratio is less than the first ratio. In some embodiments, the number of oxygen atoms in the metal oxynitride layer 205 is preferably 50% to 90% of the total number of atoms, such as 50%, 60%, 70%, 80% or 90%, and more preferably 50% to 70%, such as 55%, 60%, 65% or 70%.

繼續說明第1圖的操作103,在一些實施方式中,較佳的金屬氮氧化物層205的厚度T2在0.3 nm至3 nm,例如0.3 nm、0.5 nm、1.0 nm、1.5 nm、2.0 nm、2.5 nm或3.0 nm。金屬氮氧化物層205的厚度T2太小會使其減少電容器漏電的效果下降。金屬氮氧化物層205的厚度T2太大則會使在後續操作中形成的第二導電層206與介電層203的距離太遠,因此較難通過第二導電層206對介電層203進行充放電。Continuing with the description of operation 103 of FIG. 1 , in some embodiments, a preferred thickness T2 of the metal oxynitride layer 205 is between 0.3 nm and 3 nm, such as 0.3 nm, 0.5 nm, 1.0 nm, 1.5 nm, 2.0 nm, 2.5 nm, or 3.0 nm. If the thickness T2 of the metal oxynitride layer 205 is too small, the effect of reducing capacitor leakage will be reduced. If the thickness T2 of the metal oxynitride layer 205 is too large, the distance between the second conductive layer 206 formed in the subsequent operation and the dielectric layer 203 will be too far, so it is difficult to charge and discharge the dielectric layer 203 through the second conductive layer 206.

繼續說明第1圖的操作103,在一些實施方式中,臭氧環境中較佳的臭氧濃度在50 g/m 3至500 g/m 3,例如50 g/m 3、100 g/m 3、150 g/m 3、200 g/m 3、250 g/m 3、300 g/m 3、350 g/m 3、400 g/m 3、450 g/m 3或500 g/m 3,其中更佳為100 g/m 3至200 g/m 3。臭氧濃度太少或太多可能使金屬氮氧化物層205中的原子數目的比例不符合預期。在一些實施方式中,臭氧環境中較佳的溫度在200 °C至400 °C,例如200 °C、250 °C、300 °C、350 °C或400 °C,其中更佳為250 °C至300 °C。在一些實施方式中,金屬氮氧化物層205包括氮氧化鈦。溫度太低或太高可能使金屬氮氧化物層205中的原子數目的比例不符合預期。 Continuing with operation 103 of FIG. 1 , in some embodiments, a preferred ozone concentration in the ozone environment is 50 g/m 3 to 500 g/m 3 , such as 50 g/m 3 , 100 g/m 3 , 150 g/m 3 , 200 g/m 3 , 250 g/m 3 , 300 g/m 3 , 350 g/m 3 , 400 g/m 3 , 450 g/m 3 or 500 g/m 3 , more preferably 100 g/m 3 to 200 g/m 3 . Too little or too much ozone concentration may cause the ratio of the number of atoms in the metal oxynitride layer 205 to be inconsistent with expectations. In some embodiments, the preferred temperature in the ozone environment is 200°C to 400°C, such as 200°C, 250°C, 300°C, 350°C or 400°C, more preferably 250°C to 300°C. In some embodiments, the metal oxynitride layer 205 includes titanium oxynitride. Too low or too high a temperature may cause the ratio of the number of atoms in the metal oxynitride layer 205 to be undesirable.

在第1圖的方法100中,操作104包括形成第二導電層206在金屬氮氧化物層205上,例如參照第5圖或第10A圖至第10B圖。第二導電層206如上文所述與第一導電層202共同作為電容器中的電極板。In the method 100 of FIG. 1 , operation 104 includes forming a second conductive layer 206 on the metal oxynitride layer 205, such as referring to FIG. 5 or FIG. 10A-10B. The second conductive layer 206 and the first conductive layer 202 serve as electrodes in the capacitor as described above.

繼續說明第1圖的操作104,在一些實施方式中,較佳的第二導電層206的厚度T3大於3 nm,以良好地對介電層203進行充放電。在一些實施方式中,較佳的第二導電層206包括氮化鈦。在一些實施方式中,形成第二導電層206在金屬氮氧化物層205上包括任何合適的製程,例如原子層沉積法等。Continuing with operation 104 of FIG. 1 , in some embodiments, the thickness T3 of the second conductive layer 206 is preferably greater than 3 nm to charge and discharge the dielectric layer 203 well. In some embodiments, the second conductive layer 206 comprises titanium nitride. In some embodiments, forming the second conductive layer 206 on the metal oxynitride layer 205 comprises any suitable process, such as atomic layer deposition.

接下來參照第2圖至第5圖的第一實施方式進一步說明第1圖的方法100,其中第一實施方式的電容器形成平板狀。Next, the method 100 of FIG. 1 is further described with reference to the first embodiment of FIG. 2 to FIG. 5 , wherein the capacitor of the first embodiment is formed in a planar shape.

在第一實施方式中,在執行上文所述的操作101之前,形成第一導電層202在平板基板201P的上表面上,例如參照第2圖。在一些實施方式中,平板基板201P包括未繪示於圖中的主動元件(例如電晶體或二極體等)、被動元件(例如電容器、電阻器或電感器等)或導線等,使得在平板基板201P上形成的電容器可與平板基板201P的其他元件連接。在一些實施方式中,平板基板201P包括任何合適的半導體材料,例如碳、矽、鍺、碳化矽、氮化硼、氮化鋁、氮化鎵、磷化鎵、砷化鎵、磷化銦、砷化銦、銻化銦、氧化鋅、SiGe、AlGaAs、InGaAs、InGaP、AlInAs、GaAsP、AlGaN、InGaN、AlGaInP、其類似物或其組合等。在一些實施方式中,形成第一導電層202在平板基板201P上包括任何合適的製程,例如原子層沉積法等。In the first embodiment, before performing the operation 101 described above, a first conductive layer 202 is formed on the upper surface of the flat substrate 201P, for example, referring to FIG. 2. In some embodiments, the flat substrate 201P includes active elements (such as transistors or diodes, etc.), passive elements (such as capacitors, resistors or inductors, etc.) or wires, etc., which are not shown in the figure, so that the capacitor formed on the flat substrate 201P can be connected to other elements of the flat substrate 201P. In some embodiments, the flat substrate 201P includes any suitable semiconductor material, such as carbon, silicon, germanium, silicon carbide, boron nitride, aluminum nitride, gallium nitride, gallium phosphide, gallium arsenide, indium phosphide, indium arsenide, indium arsenide, zinc oxide, SiGe, AlGaAs, InGaAs, InGaP, AlInAs, GaAsP, AlGaN, InGaN, AlGaInP, the like, or a combination thereof. In some embodiments, forming the first conductive layer 202 on the flat substrate 201P includes any suitable process, such as atomic layer deposition, etc.

在第一實施方式中,在執行上文所述的操作101(例如參照第2圖)、操作102(例如參照第3圖)、操作103(例如參照第3圖至第4圖)及操作104(例如參照第5圖)時,由於平板基板201P為平板狀,因此在平板基板201P上形成的第一導電層202、介電層203、金屬氮化物層204、金屬氮氧化物層205及第二導電層206基本上同平板基板201P為平板狀,並使得最終形成的電容器為平板狀。In the first embodiment, when performing the above-mentioned operation 101 (for example, refer to FIG. 2), operation 102 (for example, refer to FIG. 3), operation 103 (for example, refer to FIGS. 3 to 4), and operation 104 (for example, refer to FIG. 5), since the flat substrate 201P is in a flat shape, the first conductive layer 202, the dielectric layer 203, the metal nitride layer 204, the metal oxynitride layer 205, and the second conductive layer 206 formed on the flat substrate 201P are basically in a flat shape with the flat substrate 201P, and the capacitor finally formed is in a flat shape.

接下來參照第6A圖至第10B圖的第二實施方式進一步說明第1圖的方法100,其中第二實施方式的電容器形成圓柱狀。Next, the method 100 of FIG. 1 is further described with reference to a second embodiment shown in FIGS. 6A to 10B , wherein the capacitor of the second embodiment is formed in a cylindrical shape.

在第二實施方式中,在執行上文所述的操作101之前,形成第一導電層202在圓柱體基板201C的側表面上,以及接著移除圓柱體基板201C,以使得第一導電層202形成中空圓柱狀並具有暴露的內側表面202I及外側表面202O,例如參照第6A圖至第7B圖。在一些實施方式中,圓柱體基板201C包括但不限於矽或二氧化矽等。在一些實施方式中,形成第一導電層202在圓柱體基板201C上包括任何合適的製程,例如原子層沉積法等。在一些實施方式中,移除圓柱體基板201C包括任何合適的製程,例如乾式蝕刻或濕式蝕刻等。In the second embodiment, before performing the operation 101 described above, a first conductive layer 202 is formed on the side surface of the cylindrical substrate 201C, and then the cylindrical substrate 201C is removed, so that the first conductive layer 202 forms a hollow cylindrical shape and has an exposed inner surface 202I and an outer surface 202O, for example, refer to FIGS. 6A to 7B. In some embodiments, the cylindrical substrate 201C includes but is not limited to silicon or silicon dioxide. In some embodiments, forming the first conductive layer 202 on the cylindrical substrate 201C includes any suitable process, such as atomic layer deposition. In some embodiments, removing the cylindrical substrate 201C includes any suitable process, such as dry etching or wet etching.

在第二實施方式中,在執行上文所述的操作101(例如參照第8A圖至第8B圖)、操作102(例如參照第8A圖至第8B圖)、操作103(例如參照第8A圖至第9B圖)及操作104(例如參照第10A圖至第10B圖)時,由於第一導電層202具有內側表面202I及外側表面202O,因此形成介電層203在第一導電層202上包括形成內側介電層203A在第一導電層202的內側表面202I上以及形成外側介電層203B在第一導電層202的外側表面202O上;形成金屬氮化物層204在介電層203上包括形成內側金屬氮化物層204A在內側介電層203A上以及形成外側金屬氮化物層204B在外側介電層203B上、在臭氧環境下將金屬氮化物層204轉換為金屬氮氧化物層205包括將內側金屬氮化物層204A轉換為內側金屬氮氧化物層205A以及將外側金屬氮化物層204B轉換為外側金屬氮氧化物層205B;以及形成第二導電層206在金屬氮氧化物層205上包括形成內側第二導電層206A在內側金屬氮氧化物層205A上以及形成外側第二導電層206B在外側金屬氮氧化物層205B上。In the second embodiment, when performing the above-described operations 101 (e.g., referring to FIGS. 8A to 8B), 102 (e.g., referring to FIGS. 8A to 8B), 103 (e.g., referring to FIGS. 8A to 9B), and 104 (e.g., referring to FIGS. 10A to 10B), since the first conductive layer 202 has an inner surface 202I and an outer surface 202O, forming the dielectric layer 203 on the first conductive layer 202 includes forming an inner dielectric layer 203A on the inner surface 202I of the first conductive layer 202 and forming an outer dielectric layer 203B on the outer surface 202O of the first conductive layer 202; forming the metal nitride layer 204 on the dielectric layer 204; and forming the metal nitride layer 204 on the dielectric layer 204. 03 includes forming an inner metal nitride layer 204A on the inner dielectric layer 203A and forming an outer metal nitride layer 204B on the outer dielectric layer 203B, converting the metal nitride layer 204 into a metal nitride oxide layer 205 in an ozone environment, and converting the inner metal nitride layer 204A into the inner metal nitride oxide layer 205. A and converting the outer metal nitride layer 204B into an outer metal oxynitride layer 205B; and forming the second conductive layer 206 on the metal oxynitride layer 205 includes forming an inner second conductive layer 206A on the inner metal oxynitride layer 205A and forming an outer second conductive layer 206B on the outer metal oxynitride layer 205B.

在第二實施方式中,形成在圓柱體基板201C上的包括第一導電層202、介電層203(包括兩個分離的內側介電層203A及外側介電層203B)、金屬氮化物層204(包括兩個分離的內側金屬氮化物層204A及外側金屬氮化物層204B)、金屬氮氧化物層205(包括兩個分離的內側金屬氮氧化物層205A及外側金屬氮氧化物層205B)及第二導電層206(包括兩個分離的內側第二導電層206A及外側第二導電層206B)等皆為中空圓柱狀或內側第二導電層206A另外為圓柱狀(如第10A至第10B圖所示),並使得最終形成的電容器也為圓柱狀。圓柱狀的電容器可具有更高的長寬比(Aspect Ratio),因此增加半導體裝置(例如動態隨機存取記憶體等)的集成密度。此外介電層203包括兩個分離的內側介電層203A及外側介電層203B還可提高電容器的電容值。In the second embodiment, a first conductive layer 202, a dielectric layer 203 (including two separated inner dielectric layers 203A and an outer dielectric layer 203B), a metal nitride layer 204 (including two separated inner metal nitride layers 204A and an outer metal nitride layer 204B), a metal oxynitride layer 205 (including two separated inner metal nitride layers 204A and an outer metal nitride layer 204B) are formed on a cylindrical substrate 201C. The inner metal oxynitride layer 205A and the outer metal oxynitride layer 205B separated from each other) and the second conductive layer 206 (including two separated inner second conductive layers 206A and outer second conductive layers 206B) are all hollow cylindrical or the inner second conductive layer 206A is also cylindrical (as shown in FIGS. 10A to 10B), and the capacitor finally formed is also cylindrical. The cylindrical capacitor can have a higher aspect ratio, thereby increasing the integration density of semiconductor devices (such as dynamic random access memory, etc.). In addition, the dielectric layer 203 includes two separated inner dielectric layers 203A and outer dielectric layers 203B, which can further increase the capacitance value of the capacitor.

在第二實施方式中,內側介電層203A及外側介電層203B、內側金屬氮化物層204A及外側金屬氮化物層204B、內側金屬氮氧化物層205A及外側金屬氮氧化物層205B以及內側第二導電層206A及外側第二導電層206B所具有的特徵(例如形成材料、形成方式、厚度、原子數比例等)基本上分別同於上文所述的介電層203、金屬氮化物層204、金屬氮氧化物層205以及第二導電層206所具有的特徵(例如形成材料、形成方式、厚度、原子數比例等)。因此詳細請參照上文,此處不再贅述。In the second embodiment, the features (e.g., formation materials, formation methods, thickness, atomic ratio, etc.) of the inner dielectric layer 203A and the outer dielectric layer 203B, the inner metal nitride layer 204A and the outer metal nitride layer 204B, the inner metal oxynitride layer 205A and the outer metal oxynitride layer 205B, and the inner second conductive layer 206A and the outer second conductive layer 206B are substantially the same as the features (e.g., formation materials, formation methods, thickness, atomic ratio, etc.) of the dielectric layer 203, the metal nitride layer 204, the metal oxynitride layer 205, and the second conductive layer 206 described above. Therefore, please refer to the above for details, and no further description is given here.

接下來以第三實施方式進一步說明第1圖的方法100,其中第三實施方式的電容器形成圓柱狀。雖然第三實施方式未另外繪示,但其類似於第二實施方式,因此可參考第二實施方式的第6A圖至第10B圖,而差異部分將另外說明。Next, the method 100 of FIG. 1 is further described with reference to a third embodiment, wherein the capacitor of the third embodiment is formed into a cylindrical shape. Although the third embodiment is not shown separately, it is similar to the second embodiment, and thus reference may be made to FIGS. 6A to 10B of the second embodiment, and the differences will be described separately.

在第三實施方式中,在執行上文所述的操作101之前,形成第一導電層202在圓柱體基板201C的側表面上,以使得第一導電層202形成中空圓柱狀,例如可參照類似的第6A圖至第6B圖。需注意的是,第三實施方式不同於第二實施方式的差異在於第三實施方式不移除圓柱體基板201C。在一些實施方式中,圓柱體基板201C包括但不限於矽或二氧化矽等。在一些實施方式中,形成第一導電層202在圓柱體基板201C上包括任何合適的製程,例如原子層沉積法等。In the third embodiment, before performing the operation 101 described above, a first conductive layer 202 is formed on the side surface of the cylindrical substrate 201C so that the first conductive layer 202 forms a hollow cylindrical shape, for example, similar FIGS. 6A to 6B can be referred to. It should be noted that the difference between the third embodiment and the second embodiment is that the third embodiment does not remove the cylindrical substrate 201C. In some embodiments, the cylindrical substrate 201C includes but is not limited to silicon or silicon dioxide. In some embodiments, forming the first conductive layer 202 on the cylindrical substrate 201C includes any suitable process, such as atomic layer deposition.

在第三實施方式中,在執行上文所述的操作101(例如可參照類似的第8A圖至第8B圖,惟第一導電層202的內側為如第6A圖至第6B圖的圓柱體基板201C)、操作102(例如可參照類似的第8A圖至第8B圖,惟第一導電層202的內側為如第6A圖至第6B圖的圓柱體基板201C)、操作103(例如可參照類似的第8A圖至第9B圖,惟第一導電層202的內側為如第6A圖至第6B圖的圓柱體基板201C)及操作104(例如可參照類似的第10A圖至第10B圖,惟第一導電層202的內側為如第6A圖至第6B圖的圓柱體基板201C)時,由於圓柱體基板201C為圓柱狀,因此在圓柱體基板201C上形成的第一導電層202、介電層203、金屬氮化物層204、金屬氮氧化物層205及第二導電層206基本上具有中空圓柱狀,並使得最終形成的電容器為圓柱狀。圓柱狀的電容器可具有更高的長寬比(Aspect Ratio),因此增加半導體裝置(例如動態隨機存取記憶體等)的集成密度。In the third embodiment, after performing the above-described operation 101 (for example, similar FIGS. 8A to 8B may be referred to, except that the inner side of the first conductive layer 202 is a cylindrical substrate 201C as shown in FIGS. 6A to 6B), operation 102 (for example, similar FIGS. 8A to 8B may be referred to, except that the inner side of the first conductive layer 202 is a cylindrical substrate 201C as shown in FIGS. 6A to 6B), operation 103 (for example, similar FIGS. 8A to 9B may be referred to, except that the inner side of the first conductive layer 202 is a cylindrical substrate 201C as shown in FIGS. 6A to 6B), operation 104 (for example, similar FIGS. 8A to 9B may be referred to, except that the inner side of the first conductive layer 202 is a cylindrical substrate 201C as shown in FIGS. 6A to 6B) and operation 105 (for example, similar FIGS. 8A to 9B may be referred to, except that the inner side of the first conductive layer 202 is a cylindrical substrate 201C as shown in FIGS. B) and operation 104 (for example, similar FIGS. 10A to 10B can be referred to, but the inner side of the first conductive layer 202 is the cylindrical substrate 201C as shown in FIGS. 6A to 6B), since the cylindrical substrate 201C is cylindrical, the first conductive layer 202, the dielectric layer 203, the metal nitride layer 204, the metal oxynitride layer 205 and the second conductive layer 206 formed on the cylindrical substrate 201C basically have a hollow cylindrical shape, and the capacitor finally formed is cylindrical. The cylindrical capacitor can have a higher aspect ratio, thereby increasing the integration density of the semiconductor device (such as dynamic random access memory, etc.).

通過本揭示內容形成電容器的方法所形成的電容器具有高電容且防止漏電。而且本揭示內容形成的電容器具有多種態樣且過程簡單,不僅可與多種半導體製程相容,也可多樣性地應用於尺寸越來越小的半導體裝置中。The capacitor formed by the method of forming a capacitor disclosed in the present invention has high capacitance and prevents leakage. Moreover, the capacitor formed by the present invention has various forms and the process is simple. It is not only compatible with various semiconductor processes, but also can be applied in various semiconductor devices with increasingly smaller sizes.

本揭示內容相當詳細地以一些實施方式進行說明,但其它實施方式也可能可行,因此不應以本揭示內容所含的實施方式的描述限制所附申請專利範圍的範圍和精神。The present disclosure describes some embodiments in considerable detail, but other embodiments may also be possible, and thus the description of the embodiments contained in the present disclosure should not limit the scope and spirit of the appended patent applications.

對於所屬技術領域中具有通常知識者來說,可在不偏離本揭示內容的精神和範圍下對本揭示內容進行修改和變更。只要上述修改和變更屬於所附申請專利範圍的範圍和精神,本揭示內容即涵蓋這些修改和變更。For those with ordinary knowledge in the art, modifications and changes can be made to the present disclosure without departing from the spirit and scope of the present disclosure. As long as the above modifications and changes are within the scope and spirit of the attached patent application, the present disclosure covers these modifications and changes.

100:方法 101:操作 102:操作 103:操作 104:操作 201C:圓柱體基板 201P:平板基板 202:第一導電層 202I:內側表面 202O:外側表面 203:介電層 203A:內側介電層 203B:外側介電層 204:金屬氮化物層 204A:內側金屬氮化物層 204B:外側金屬氮化物層 205:金屬氮氧化物層 205A:內側金屬氮氧化物層 205B:外側金屬氮氧化物層 206:第二導電層 206A:內側第二導電層 206B:外側第二導電層 T1:厚度 T2:厚度 T3:厚度100: method 101: operation 102: operation 103: operation 104: operation 201C: cylindrical substrate 201P: flat substrate 202: first conductive layer 202I: inner surface 202O: outer surface 203: dielectric layer 203A: inner dielectric layer 203B: outer dielectric layer 204: metal nitride layer 204A: inner metal nitride layer 204B: outer metal nitride layer 205: metal oxynitride layer 205A: inner metal oxynitride layer 205B: outer metal oxynitride layer 206: Second conductive layer 206A: Inner second conductive layer 206B: Outer second conductive layer T1: Thickness T2: Thickness T3: Thickness

閱讀本揭示內容的圖式時,建議從下文具體性的說明瞭解本揭示內容的各個面向。需注意的是,按照工業的標準做法,各種元件的尺寸可能未依比例繪製。此外為了使說明更清晰,各種元件的尺寸可能被增加或減小。 第1圖是根據本揭示內容一些實施方式的形成電容器的方法的流程圖。 第2圖至第5圖是根據本揭示內容的第一實施方式的形成電容器的中間過程的電容器剖面圖。 第6A圖、第7A圖、第8A圖、第9A圖及第10A圖是根據本揭示內容的第二實施方式的形成電容器的中間過程的電容器上視圖。 第6B圖、第7B圖、第8B圖、第9B圖及第10B圖是根據本揭示內容的第二實施方式的形成電容器的中間過程的電容器剖面圖。 When reading the drawings of the present disclosure, it is recommended to understand the various aspects of the present disclosure from the detailed description below. It should be noted that in accordance with standard industry practices, the sizes of various components may not be drawn to scale. In addition, in order to make the description clearer, the sizes of various components may be increased or reduced. Figure 1 is a flow chart of a method for forming a capacitor according to some embodiments of the present disclosure. Figures 2 to 5 are cross-sectional views of a capacitor in the intermediate process of forming a capacitor according to the first embodiment of the present disclosure. Figures 6A, 7A, 8A, 9A and 10A are top views of a capacitor in the intermediate process of forming a capacitor according to the second embodiment of the present disclosure. Figures 6B, 7B, 8B, 9B and 10B are cross-sectional views of capacitors during the intermediate process of forming a capacitor according to the second embodiment of the present disclosure.

國內寄存資訊(請依寄存機構、日期、號碼順序註記) 無 國外寄存資訊(請依寄存國家、機構、日期、號碼順序註記) 無 Domestic storage information (please note in the order of storage institution, date, and number) None Foreign storage information (please note in the order of storage country, institution, date, and number) None

100:方法 100:Methods

101:操作 101: Operation

102:操作 102: Operation

103:操作 103: Operation

104:操作 104: Operation

Claims (10)

一種形成電容器的方法,包括: 形成一第一導電層在一圓柱體基板的一側表面上; 形成一介電層在該第一導電層上; 形成一金屬氮化物層在該介電層上: 在一臭氧環境下將該金屬氮化物層轉換為一金屬氮氧化物層;以及 形成一第二導電層在該金屬氮氧化物層上。 A method for forming a capacitor, comprising: forming a first conductive layer on a side surface of a cylindrical substrate; forming a dielectric layer on the first conductive layer; forming a metal nitride layer on the dielectric layer; converting the metal nitride layer into a metal oxynitride layer in an ozone environment; and forming a second conductive layer on the metal oxynitride layer. 如請求項1所述的方法,其中該臭氧環境中的一臭氧濃度在50 g/m 3至500 g/m 3The method of claim 1, wherein an ozone concentration in the ozone environment is between 50 g/m 3 and 500 g/m 3 . 如請求項1所述的方法,其中該臭氧環境中的一溫度在200 °C至400 °C。A method as described in claim 1, wherein a temperature in the ozone environment is between 200°C and 400°C. 如請求項1所述的方法,其中該金屬氮氧化物層中的一氧原子數佔該金屬氮氧化物層中的一總原子數的50%至90%。The method as described in claim 1, wherein the number of oxygen atoms in the metal oxynitride layer accounts for 50% to 90% of the total number of atoms in the metal oxynitride layer. 如請求項4所述的方法,其中該金屬氮氧化物層中的該氧原子數佔該金屬氮氧化物層中的該總原子數的50%至70%。A method as described in claim 4, wherein the number of oxygen atoms in the metal oxynitride layer accounts for 50% to 70% of the total number of atoms in the metal oxynitride layer. 如請求項1所述的方法,其中該金屬氮化物層包括氮化鈦,以及該金屬氮氧化物層包括氮氧化鈦。The method of claim 1, wherein the metal nitride layer comprises titanium nitride, and the metal oxynitride layer comprises titanium oxynitride. 如請求項1所述的方法,其中該介電層包括二氧化鋯、二氧化鉿、氧化鋁、氧化矽、氧化銠、氧化釕或其組合。The method of claim 1, wherein the dielectric layer comprises zirconium dioxide, tantalum dioxide, aluminum oxide, silicon oxide, rhodium oxide, ruthenium oxide or a combination thereof. 如請求項1所述的方法,其中該金屬氮氧化物層的一厚度在0.3 nm至3 nm。The method of claim 1, wherein the metal oxynitride layer has a thickness of 0.3 nm to 3 nm. 如請求項1所述的方法,其中該金屬氮化物層的一厚度在0.3 nm至3 nm。The method of claim 1, wherein the metal nitride layer has a thickness of 0.3 nm to 3 nm. 如請求項1所述的方法,還包括在形成該第一導電層在該圓柱體基板的側表面上之後,移除該圓柱體基板,以形成一中空圓柱狀的該第一導電層,其中: 形成該介電層在該第一導電層上包括:形成一內側介電層在該第一導電層的一內側表面上,以及形成一外側介電層在該第一導電層的一外側表面上; 形成該金屬氮化物層在該介電層上包括:形成一內側金屬氮化物層在該內側介電層上,以及形成一外側金屬氮化物層在該外側介電層上; 在該臭氧環境下將該金屬氮化物層轉換為該金屬氮氧化物層包括:將該內側金屬氮化物層轉換為一內側金屬氮氧化物層,以及將外側金屬氮化物層轉換為一外側金屬氮氧化物層;以及 形成該第二導電層在該金屬氮氧化物層上包括:形成一內側第二導電層在該內側金屬氮氧化物層上,以及形成一外側第二導電層在該外側金屬氮氧化物層上。 The method as described in claim 1 further includes removing the cylindrical substrate after forming the first conductive layer on the side surface of the cylindrical substrate to form a hollow cylindrical first conductive layer, wherein: Forming the dielectric layer on the first conductive layer includes: forming an inner dielectric layer on an inner surface of the first conductive layer, and forming an outer dielectric layer on an outer surface of the first conductive layer; Forming the metal nitride layer on the dielectric layer includes: forming an inner metal nitride layer on the inner dielectric layer, and forming an outer metal nitride layer on the outer dielectric layer; Converting the metal nitride layer to the metal oxynitride layer in the ozone environment includes: converting the inner metal nitride layer to an inner metal oxynitride layer, and converting the outer metal nitride layer to an outer metal oxynitride layer; and Forming the second conductive layer on the metal oxynitride layer includes: forming an inner second conductive layer on the inner metal oxynitride layer, and forming an outer second conductive layer on the outer metal oxynitride layer.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6177305B1 (en) * 1998-12-17 2001-01-23 Lsi Logic Corporation Fabrication of metal-insulator-metal capacitive structures
US20020022334A1 (en) * 2000-01-18 2002-02-21 Micron Technology, Inc. Metal oxynitride capacitor barrier layer
WO2004010471A2 (en) * 2002-07-19 2004-01-29 Aviza Technology, Inc. In-situ formation of metal insulator metal capacitors

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6177305B1 (en) * 1998-12-17 2001-01-23 Lsi Logic Corporation Fabrication of metal-insulator-metal capacitive structures
US20020022334A1 (en) * 2000-01-18 2002-02-21 Micron Technology, Inc. Metal oxynitride capacitor barrier layer
WO2004010471A2 (en) * 2002-07-19 2004-01-29 Aviza Technology, Inc. In-situ formation of metal insulator metal capacitors
WO2004010471A3 (en) 2002-07-19 2004-05-13 Aviza Tech Inc In-situ formation of metal insulator metal capacitors

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