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TWI879322B - Power supply with reverse curremt compensation mechanism - Google Patents

Power supply with reverse curremt compensation mechanism Download PDF

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TWI879322B
TWI879322B TW112149271A TW112149271A TWI879322B TW I879322 B TWI879322 B TW I879322B TW 112149271 A TW112149271 A TW 112149271A TW 112149271 A TW112149271 A TW 112149271A TW I879322 B TWI879322 B TW I879322B
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voltage
coupled
potential
boost inductor
resonant
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TW112149271A
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TW202527444A (en
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詹子增
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宏碁股份有限公司
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Abstract

A power supply includes an active power factor correction circuit, a resonation conversion circuit, a zero-current detection and reverse current compensation circuit, and a control circuit. When determining that the status of the output voltage provided by the resonation conversion circuit is normal and that the boost inductor current in the active power factor correction circuit is in zero-current state, the zero-current detection and reverse current compensation circuit is configured to conduct the signal transmission path from a resonation capacitor in the resonation conversion circuit to a boost inductor in the active power factor correction circuit. This way, the energy stored in the resonation capacitor may be transmitted to the input end of the power supply for compensating the reverse current.

Description

具逆電流補償架構之電源供應器 Power supply with reverse current compensation structure

本發明相關於一種具逆電流補償架構之電源供應器,尤指一種能在零升壓電感電流的狀態下提供逆電流補償架構之電源供應器。 The present invention relates to a power supply with a reverse current compensation structure, and in particular to a power supply capable of providing a reverse current compensation structure under a zero boost inductor current state.

電腦系統中不同組件所需的操作電壓不同,因此普遍採用電源供應器(power supply)以通過變壓、整流與濾波的方式,將交流電室內電源轉換為直流電以驅動不同零組件。隨著環保意識的抬頭,各國針對消費性電子產品、辦公設備、家電製品和外接電源供應器的節能規格都有所規範。舉例來說,美國能源之星是由美國能源部和環境保護署共同贊助的認證計畫,其針對不同額定輸出功率之電源供應器會規範相關節能規格。 Different components in a computer system require different operating voltages, so power supplies are commonly used to convert AC indoor power into DC power to drive different components through transformation, rectification and filtering. With the rise of environmental awareness, countries have set energy-saving specifications for consumer electronic products, office equipment, home appliances and external power supplies. For example, the US Energy Star is a certification program jointly sponsored by the US Department of Energy and the Environmental Protection Agency, which specifies relevant energy-saving specifications for power supplies with different rated output power.

舉例來說,針對輸出功率大於70W的電源供應器和其整體系統配置,美國能源之星規範其額定功率因數需大於0.9。因此,大功率電源供應器之設計架構通常會分為前級的升壓型主動功率因數校正(power factor correction,PFC)電路和後級的降壓型諧振轉換電路。前級 電路透過功率開關來切換升壓電感的儲能充電運作和釋能放電運作,進而優化電源供應器之功率因數。後級電路能透過諧振開關來控制電感和電容等元件之間的相互諧振,以將前級電路之高電壓輸出轉換低電壓輸出以驅動負載裝置。 For example, for power supplies with an output power greater than 70W and their overall system configuration, the US Energy Star standard requires that the rated power factor must be greater than 0.9. Therefore, the design architecture of a high-power power supply is usually divided into a front-stage boost active power factor correction (PFC) circuit and a rear-stage buck resonant conversion circuit. The front-stage circuit uses a power switch to switch the energy storage charging operation and energy release discharge operation of the boost inductor, thereby optimizing the power factor of the power supply. The rear-stage circuit can control the mutual resonance between components such as inductors and capacitors through a resonant switch to convert the high-voltage output of the front-stage circuit into a low-voltage output to drive the load device.

主動式功率因數修正運作之控制方式可分為連續導通模式(continuous conduction mode,CCM)、邊界導通模式(boundary conduction mode,BCM)及非連續導通模式(discontinuous conduction mode,DCM)。邊界導通模式是採用變頻操作,當偵測到升壓電感電流下降為零時會再次導通功率開關元件,其控制電路較簡單,且能達到高效率的功率開關零電流導通切換,因此針對電源功率為130W至230W的低瓦特數應用區間,通常會將升壓電感電流設計在邊界電流模式以達到高效率的功率開關零電流導通切換。然而,在升壓電感電流為零的狀態下,功率開關上的寄生電容會與升壓電感發生諧振,進而產生返還交流電源端的逆向電流。上述逆向電流會產成生熱損耗而影響主動式功率因數校正器之升壓轉換效率,同時也會造成較高的總諧波失真問題。 The control methods of active power factor correction operation can be divided into continuous conduction mode (CCM), boundary conduction mode (BCM) and discontinuous conduction mode (DCM). Boundary conduction mode uses variable frequency operation. When the boost inductor current drops to zero, the power switch element will be turned on again. Its control circuit is simpler and can achieve high-efficiency power switch zero-current conduction switching. Therefore, for low-wattage application ranges of 130W to 230W, the boost inductor current is usually designed in boundary current mode to achieve high-efficiency power switch zero-current conduction switching. However, when the boost inductor current is zero, the parasitic capacitance on the power switch will resonate with the boost inductor, thereby generating a reverse current that is returned to the AC power supply. The reverse current will generate heat loss and affect the boost conversion efficiency of the active power factor corrector, and will also cause a higher total harmonic distortion problem.

因此,需要一種可在零升壓電感電流的狀態下補償逆電流之電源供應器。 Therefore, a power supply is needed that can compensate for reverse current in the state of zero boost inductor current.

本發明提供一種具逆電流補償架構之電源供應器,其包含一升壓型主動功率因數校正電路、一諧振轉換電路、一零電流偵測和逆電流補償電路,以及一控制電路。該升壓型主動功率因數校正電路用 來將一市電供應之一交流電壓轉換成一直流電壓,再將該直流電壓換成一脈動直流電壓,其包含一升壓電感和一功率開關。該升壓電感用來儲存或釋放該直流電壓之能量,其包含耦接至該直流電壓之一第一端,以及一第二端。該功率開關用來依據一第一控制訊號來控制該升壓電感進行能量儲存與能量釋放,其包含耦接至該升壓電感之該第二端之一第一端,耦接至該第一接地電位之一第二端,以及一控制端以用來接收在一第一致能電位和一第一除能電位之間週期性切換的該第一控制訊號。該諧振轉換電路用來將該脈動直流電壓轉換成一輸出電壓,其包含一變壓器、一激磁電感、一諧振電感、一諧振電容、一第一諧振開關和一第二諧振開關。該變壓器用來將該第一脈動直流電壓之能量從一第一初級側感應至一第一次級側以供應該輸出電壓,其包含一初級側繞組,設置在該第一初級側,其包含一第一打點端和一第一非打點端;一第一次級側繞組,設置在該第一次級側,其包含一第二打點端和一第二非打點端;以及一第二次級側繞組,設置在該第一次級側,其包含一第三打點端和一第三非打點端,其中該第二非打點端耦接至該第三打點端。該激磁電感包含耦接至該第一打點端之一第一端,以及耦接至該第一非打點端之一第二端。該諧振電感包含耦接至該第一打點端之一第一端,以及一第二端。該諧振電容包含耦接至該第一非打點端之一第一端,以及耦接至該第一接地電位之一第二端。該第一諧振開關用來依據一第二控制訊號來控制該諧振轉換電路之運作,其包含耦接至該脈動直流電壓之一第一端,耦接至該諧振電感之該第二端之一第二端,以及一控制端以接收在一第二致能電位和一第二除能電位之間週期性切換的該第二控制訊號。該第二諧振開關用來依據一第三控制訊號來控制該諧振轉換電路之運作,其包含耦接 至該諧振電感之該第二端之一第一端,耦接至該第一接地電位之一第二端,以及一控制端以接收在一第三致能電位和一第三除能電位之間週期性切換的該第三控制訊號。該零電流偵測和逆電流補償電路用來偵測流經該升壓電感之一升壓電感電流;當判定該升壓電感電流為零電流狀態時,導通該諧振電容之第一端至該激磁電感之該第一端的訊號傳送路徑;以及當判定該升壓電感電流並非為零電流狀態時,切斷該諧振電容之第一端至該激磁電感之該第一端的訊號傳送路徑。該控制電路用來提供該第一控制訊號、該第二控制訊號和該第三控制訊號;以及依據一邏輯電壓提供具一第四致能電位或具一第四除能電位之一第四控制訊號以選擇性地導通或切斷該諧振電容之第一端至該激磁電感之該第一端的訊號傳送路徑。 The present invention provides a power supply with a reverse current compensation structure, which includes a boost type active power factor correction circuit, a resonant conversion circuit, a zero current detection and reverse current compensation circuit, and a control circuit. The boost type active power factor correction circuit is used to convert an AC voltage supplied by a mains power supply into a DC voltage, and then convert the DC voltage into a pulsed DC voltage, and includes a boost inductor and a power switch. The boost inductor is used to store or release the energy of the DC voltage, and includes a first end coupled to the DC voltage, and a second end. The power switch is used to control the boost inductor to store and release energy according to a first control signal, and includes a first terminal coupled to the second terminal of the boost inductor, a second terminal coupled to the first ground potential, and a control terminal for receiving the first control signal that periodically switches between a first enabling potential and a first disabling potential. The resonant conversion circuit is used to convert the pulsed DC voltage into an output voltage, and includes a transformer, a magnetizing inductor, a resonant inductor, a resonant capacitor, a first resonant switch, and a second resonant switch. The transformer is used to induce the energy of the first pulsed DC voltage from a first primary side to a first secondary side to supply the output voltage, and includes a primary side winding, which is arranged on the first primary side, and includes a first hit end and a first non-hit end; a first secondary side winding, which is arranged on the first secondary side, and includes a second hit end and a second non-hit end; and a second secondary side winding, which is arranged on the first secondary side, and includes a third hit end and a third non-hit end, wherein the second non-hit end is coupled to the third hit end. The excitation inductor includes a first end coupled to the first hit end, and a second end coupled to the first non-hit end. The resonant inductor includes a first end coupled to the first hit end, and a second end. The resonant capacitor includes a first terminal coupled to the first non-striking terminal and a second terminal coupled to the first ground potential. The first resonant switch is used to control the operation of the resonant conversion circuit according to a second control signal, and includes a first terminal coupled to the pulsed DC voltage, a second terminal coupled to the second terminal of the resonant inductor, and a control terminal for receiving the second control signal that is periodically switched between a second enabling potential and a second disabling potential. The second resonant switch is used to control the operation of the resonant conversion circuit according to a third control signal, and includes a first terminal coupled to the second terminal of the resonant inductor, a second terminal coupled to the first ground potential, and a control terminal for receiving the third control signal that is periodically switched between a third enabling potential and a third disabling potential. The zero current detection and reverse current compensation circuit is used to detect a boost inductor current flowing through the boost inductor; when it is determined that the boost inductor current is in a zero current state, the signal transmission path from the first end of the resonant capacitor to the first end of the magnetizing inductor is turned on; and when it is determined that the boost inductor current is not in a zero current state, the signal transmission path from the first end of the resonant capacitor to the first end of the magnetizing inductor is turned off. The control circuit is used to provide the first control signal, the second control signal and the third control signal; and to provide a fourth control signal having a fourth enabling potential or a fourth disabling potential according to a logic voltage to selectively turn on or off the signal transmission path from the first end of the resonant capacitor to the first end of the magnetizing inductor.

10:升壓型主動功率因數校正電路 10: Boost type active power factor correction circuit

12:整流電路 12: Rectifier circuit

20:諧振轉換電路 20: Resonance conversion circuit

30:零電流偵測和逆電流補償電路 30: Zero current detection and reverse current compensation circuit

32:零電流偵測單元 32: Zero current detection unit

34:比較器 34: Comparator

36:邏輯電路 36:Logic circuit

38:放大器 38: Amplifier

40:控制電路 40: Control circuit

100:電源供應器 100: Power supply

TR:變壓器 TR: Transformer

N1:初級側繞組和匝數 N1: Primary side winding and number of turns

N2、N3:次級側繞組和匝數 N2, N3: Secondary winding and number of turns

N4:激磁繞組和匝數 N4: Excitation winding and number of turns

N5:偵測繞組和匝數 N5: Detect windings and turns

GND1、GND2:接地電位 GND1, GND2: ground potential

Q1:功率開關 Q1: Power switch

Q2、Q3:諧振開關 Q2, Q3: Resonance switch

Q4:輔助開關 Q4: Auxiliary switch

DO1:升壓二極體 DO1: boost diode

DO2、DO3:輸出二極體 DO2, DO3: output diodes

D1-D4:二極體 D1-D4: diodes

CO1、CO2:儲能電容 CO1, CO2: Energy storage capacitor

LM1:升壓電感 LM1: boost inductor

LM2:激磁電感 LM2: Magnetizing inductance

LR:諧振電感 LR: Resonance inductor

RS:偵測電阻 RS: Detection resistance

RZ:傳導電阻 RZ: Conductive resistance

VIN:直流電壓 V IN : DC voltage

VOUT:輸出電壓 V OUT : Output voltage

VAC:交流電壓 V AC : Alternating current voltage

VLM1:升壓電感電壓 V LM1 : Boost inductor voltage

VLM2:感應電壓 V LM2 : Inductive voltage

VS:偵測電壓 VS: Detection voltage

VF:參考電壓 VF: reference voltage

VF’:調整後參考電壓 VF’: Adjusted reference voltage

VCP:比較電壓 VCP: Comparative voltage

VAA:邏輯電壓 VAA: logic voltage

VO1:脈動直流電壓 VO1: Pulsating DC voltage

ILM:升壓電感電流 I LM : Boost inductor current

IOUT:輸出電流 I OUT : Output current

IN1-IN3:邏輯電路之輸入端 IN1-IN3: Input terminal of logic circuit

OUT:邏輯電路之輸出端 OUT: Output terminal of logic circuit

GD1-GD4:控制訊號 GD1-GD4: control signal

P1-P7:腳位 P1-P7: Foot position

第1圖為本發明實施例中一種具逆電流補償架構之電源供應器的功能方塊圖。 Figure 1 is a functional block diagram of a power supply with a reverse current compensation structure in an embodiment of the present invention.

第2圖為本發明實施例中一種具逆電流補償架構之電源供應器實作方式之示意圖。 Figure 2 is a schematic diagram of an implementation of a power supply with a reverse current compensation structure in an embodiment of the present invention.

第3圖為本發明實施例中一種具逆電流補償架構之電源供應器運作時相關訊號之波形圖。 Figure 3 is a waveform diagram of related signals when a power supply with a reverse current compensation structure is in operation in an embodiment of the present invention.

第1圖為本發明實施例中一種具逆電流補償架構之電源供應器100的功能方塊圖。電源供應器100包含一升壓型主動功率因數校正 電路10、一諧振轉換電路20、一零電流偵測和逆電流補償電路30,以及一控制電路40。電源供應器100可將由市電供應之交流電壓VAC轉換成一輸出電壓VOUT進而驅動一負載裝置(未顯示於第1圖)。 FIG. 1 is a functional block diagram of a power supply 100 with a reverse current compensation structure in an embodiment of the present invention. The power supply 100 includes a boost type active power factor correction circuit 10, a resonant conversion circuit 20, a zero current detection and reverse current compensation circuit 30, and a control circuit 40. The power supply 100 can convert the alternating current voltage V AC supplied by the mains into an output voltage V OUT to drive a load device (not shown in FIG. 1 ).

第2圖為本發明實施例中電源供應器100實作方式之示意圖。在本發明實施例中,電源供應器100之升壓型主動功率因數校正電路10包含一整流器12、一功率開關Q1、一升壓二極體DO1、一儲能電容CO1,以及一升壓電感LM1,可依據市電供應之交流電壓VAC來提供一脈動直流電壓VO1。在本發明實施例中,整流器12可為一橋式整流器,其包含整流二極體D1-D4,用來將市電供應之交流電壓VAC轉換成一直流電壓VIN。然而,整流器12之實施方式並不限定本發明之範疇。 FIG. 2 is a schematic diagram of the implementation of the power supply 100 in the embodiment of the present invention. In the embodiment of the present invention, the boost type active power factor correction circuit 10 of the power supply 100 includes a rectifier 12, a power switch Q1, a boost diode DO1, an energy storage capacitor CO1, and a boost inductor LM1, which can provide a pulsed DC voltage VO1 according to the AC voltage V AC supplied by the mains. In the embodiment of the present invention, the rectifier 12 can be a bridge rectifier, which includes rectifier diodes D1-D4, and is used to convert the AC voltage V AC supplied by the mains into a DC voltage V IN . However, the implementation of the rectifier 12 does not limit the scope of the present invention.

升壓電感LM1之第一端耦接至整流器10以接收直流電壓VIN,而第二端透過功率開關Q1耦接至接地電位GND1,可儲存直流電壓VIN之能量,其中流經升壓電感LM1之升壓電感電流ILM為電源供應器100之輸入電流。升壓二極體DO1之陽極耦接至升壓電感LM1之第二端,而陰極耦接至諧振轉換電路20和儲能電容CO1。儲能電容CO1之第一端耦接至升壓二極體DO1之陰極,而第二端耦接至接地電位GND1,可儲存脈動直流電壓VO1之能量。功率開關Q1之第一端耦接於升壓電感LM1之第二端和升壓二極體DO1之陽極之間,第二端耦接至接地電位GND1,而控制端耦接至控制電路40以接收一控制訊號GD1,可依據控制訊號GD1來做高頻切換而讓升壓電感LM1進行能量儲存與能量釋放,以使輸入電流追隨輸入電壓,進而提高功率因數和降低電流諧波。 The first end of the boost inductor LM1 is coupled to the rectifier 10 to receive the DC voltage V IN , and the second end is coupled to the ground potential GND1 through the power switch Q1, which can store the energy of the DC voltage V IN , wherein the boost inductor current I LM flowing through the boost inductor LM1 is the input current of the power supply 100. The anode of the boost diode DO1 is coupled to the second end of the boost inductor LM1 , and the cathode is coupled to the resonant conversion circuit 20 and the energy storage capacitor CO1. The first end of the energy storage capacitor CO1 is coupled to the cathode of the boost diode DO1 , and the second end is coupled to the ground potential GND1 , which can store the energy of the pulsed DC voltage VO1 . The first end of the power switch Q1 is coupled between the second end of the boost inductor LM1 and the anode of the boost diode DO1, the second end is coupled to the ground potential GND1, and the control end is coupled to the control circuit 40 to receive a control signal GD1. According to the control signal GD1, high-frequency switching can be performed to allow the boost inductor LM1 to store and release energy, so that the input current tracks the input voltage, thereby improving the power factor and reducing current harmonics.

升壓電感LM1、升壓二極體DO1、儲能電容CO1和功率開關Q1能實現升壓目的。在市電供應交流電壓VAC的期間當功率開關Q1為導通時,升壓電感LM1之第二端會耦接至接地電位GND1,此時升壓電感LM1會因應直流電壓VIN的變化而產生感應電壓,再把電能轉換為磁能以儲存。當功率開關Q1為截止時,升壓電感LM1的接地迴路被斷開,此時會將其內存的磁能轉換為電能,讓大電流通過升壓二極體DO1來對儲能電容CO1充電。在多次快速切換功率開關Q1後,即可達到升高直流電壓VIN以提供脈動直流電壓VO1的目的。 The boost inductor LM1, boost diode DO1, energy storage capacitor CO1 and power switch Q1 can achieve the purpose of boosting. When the power switch Q1 is turned on during the period when the AC voltage V AC is supplied by the mains, the second end of the boost inductor LM1 will be coupled to the ground potential GND1. At this time, the boost inductor LM1 will generate an induced voltage in response to the change of the DC voltage V IN , and then convert the electrical energy into magnetic energy for storage. When the power switch Q1 is turned off, the ground loop of the boost inductor LM1 is disconnected, and the magnetic energy stored in it will be converted into electrical energy, allowing a large current to pass through the boost diode DO1 to charge the energy storage capacitor CO1. After multiple rapid switching of the power switch Q1, the DC voltage V IN can be increased to provide the pulse DC voltage VO1.

在本發明實施例中,電源供應器100之諧振轉換電路20包含一變壓器TR、諧振開關Q2-Q3、一激磁電感LM2、一諧振電感LR、一諧振電容CR、一儲能電容CO2、一偵測電阻RS,以及兩輸出二極體DO2-DO3。諧振轉換電路20可在其輸入端接收脈動直流電壓VO1,將脈動直流電壓VO1轉換成輸出電壓VOUT,進而驅動一負載裝置(未顯示於第2圖)。 In the embodiment of the present invention, the resonant conversion circuit 20 of the power supply 100 includes a transformer TR, resonant switches Q2-Q3, a magnetizing inductor LM2, a resonant inductor LR, a resonant capacitor CR, an energy storage capacitor CO2, a detection resistor RS, and two output diodes DO2-DO3. The resonant conversion circuit 20 can receive a pulsed DC voltage VO1 at its input terminal, convert the pulsed DC voltage VO1 into an output voltage V OUT , and then drive a load device (not shown in FIG. 2 ).

在本發明實施例之諧振轉換電路20中,變壓器TR包含一初級側繞組(由匝數N1來表示)和兩次級側繞組(由匝數N2和N3來表示),其中初級側繞組N1設置在變壓器TR之初級側,而次級側繞組N2和N3設置在變壓器TR之次級側。諧振開關Q2之第一端耦接至升壓型主動功率因數校正電路10中升壓二極體DO1之陰極以接收脈動直流電壓VO1,第二端耦接至諧振開關Q3,而控制端耦接至控制電路40以接收一控制訊號GD2。諧振開關Q3之第一端耦接至諧振開關Q2之第二端,第二端耦接至接地電位GND1,而控制端耦接至控制電路40以接收一控 制訊號GD3。諧振電感LR之第一端耦接於諧振開關Q2之第二端和諧振開關Q3之第一端之間,而第二端耦接至變壓器TR中初級側繞組N1之打點端。激磁電感LM2之第一端耦接至變壓器TR中初級側繞組N1之打點端,而第二端耦接至變壓器TR中初級側繞組N1之非打點端。諧振電容CR之第一端耦接於變壓器TR中初級側繞組N1之非打點端,而第二端耦接至至接地電位GND1。在一實施例中,諧振電感LR、激磁電感LM2和諧振電容CR組成一電感-電感-電容(LLC)諧振電路,但諧振轉換電路20中諧振架構之實施方式並不限定本發明之範疇。 In the resonant converter circuit 20 of the embodiment of the present invention, the transformer TR includes a primary winding (represented by the number of turns N1) and two secondary windings (represented by the number of turns N2 and N3), wherein the primary winding N1 is arranged on the primary side of the transformer TR, and the secondary windings N2 and N3 are arranged on the secondary side of the transformer TR. The first end of the resonant switch Q2 is coupled to the cathode of the boost diode DO1 in the boost active power factor correction circuit 10 to receive the pulsed DC voltage VO1, the second end is coupled to the resonant switch Q3, and the control end is coupled to the control circuit 40 to receive a control signal GD2. The first end of the resonant switch Q3 is coupled to the second end of the resonant switch Q2, the second end is coupled to the ground potential GND1, and the control end is coupled to the control circuit 40 to receive a control signal GD3. The first end of the resonant inductor LR is coupled between the second end of the resonant switch Q2 and the first end of the resonant switch Q3, and the second end is coupled to the tapping end of the primary winding N1 in the transformer TR. The first end of the magnetizing inductor LM2 is coupled to the tapping end of the primary winding N1 in the transformer TR, and the second end is coupled to the non-tapping end of the primary winding N1 in the transformer TR. The first end of the resonant capacitor CR is coupled to the non-pointing end of the primary winding N1 in the transformer TR, and the second end is coupled to the ground potential GND1. In one embodiment, the resonant inductor LR, the magnetizing inductor LM2 and the resonant capacitor CR form an inductor-inductor-capacitor (LLC) resonant circuit, but the implementation of the resonant structure in the resonant converter circuit 20 does not limit the scope of the present invention.

在本發明實施例之諧振轉換電路20中,輸出二極體DO2之陽極耦接至變壓器TR中次級側繞組N2之打點端,而陰極耦接至電源供應器100之輸出端(輸出電壓VOUT)。輸出二極體DO3之陽極耦接至變壓器TR中次級側繞組N3之非打點端,而陰極耦接至電源供應器100之輸出端(輸出電壓VOUT)。儲能電容CO2之第一端耦接至輸出二極體DO2之陰極,而第二端耦接至變壓器TR中次級側繞組N2之非打點端和次級側繞組N3之打點端,用來儲存輸出電壓VOUT之能量,其中流經儲能電容CO2之電流為電源供應器100之輸出電流IOUT。偵測電阻RS之第一端耦接至儲能電容CO2之第二端,而第二端耦接至接地電位GND2,用來偵測輸出電流IOUT,進而提供相關輸出電壓VOUT之一偵測電壓VS。 In the resonant converter circuit 20 of the present embodiment, the anode of the output diode DO2 is coupled to the tapped end of the secondary winding N2 in the transformer TR, and the cathode is coupled to the output end (output voltage V OUT ) of the power supply 100. The anode of the output diode DO3 is coupled to the non-tapped end of the secondary winding N3 in the transformer TR, and the cathode is coupled to the output end (output voltage V OUT ) of the power supply 100. The first end of the energy storage capacitor CO2 is coupled to the cathode of the output diode DO2, and the second end is coupled to the non-striking end of the secondary winding N2 and the tapping end of the secondary winding N3 in the transformer TR, for storing the energy of the output voltage V OUT , wherein the current flowing through the energy storage capacitor CO2 is the output current I OUT of the power supply 100. The first end of the detection resistor RS is coupled to the second end of the energy storage capacitor CO2, and the second end is coupled to the ground potential GND2, for detecting the output current I OUT , and further providing a detection voltage VS related to the output voltage V OUT.

在本發明實施例中,電源供應器100之零電流偵測和逆電流補償電路30包含一零電流偵測單元32、一比較器34、一邏輯電路36、一放大器38、一傳導電阻RZ,以及一輔助開關Q4。零電流偵測單元32可由一變壓器來實作,其包含一激磁繞組(由匝數N4來表示)和一偵測 繞組(由匝數N5來表示)。激磁繞組N4設置在零電流偵測單元32之初級側,且並聯於升壓電感LM1。次級側繞組N5設置在零電流偵測單元32之次級側,其第一端耦接至傳導電阻RZ之第一端,而其第二端耦接至接地電位GND1。零電流偵測單元32可將升壓電感電壓VLM1(升壓電感LM1之跨壓)從激磁繞組N4感應至偵測繞組N5,以在次級側提供一感應電壓VLM2。比較器34之第一輸入端(例如正向輸入端)耦接至控制電路40以接收一參考電壓VF(VF>0),其第二輸入端(例如反向輸入端)耦接至傳導電阻RZ之第二端以接收感應電壓VLM2,而其輸出端耦接至邏輯電路36。依據參考電壓VF和感應電壓VLM2之間的電位關係,比較器34可輸出相對應之比較電壓VCP。舉例來說,當流經升壓電感LM1之升壓電感電流ILM為零電流時,感應電壓VLM2為零電壓,此時比較器34中第一輸入端之電位會高於第二輸入端之電位,因此會於輸出端輸出具第一電位(例如正電位)之比較電壓VCP;當流經升壓電感LM1之升壓電感電流ILM並非零電流時,感應電壓VLM2並非為零電壓,此時比較器34中第一輸入端之電位不會高於第二輸入端之電位,因此會於輸出端輸出具第二電位(例如零電位)之比較電壓VCP。 In the embodiment of the present invention, the zero current detection and reverse current compensation circuit 30 of the power supply 100 includes a zero current detection unit 32, a comparator 34, a logic circuit 36, an amplifier 38, a conduction resistor RZ, and an auxiliary switch Q4. The zero current detection unit 32 can be implemented by a transformer, which includes an excitation winding (represented by the number of turns N4) and a detection winding (represented by the number of turns N5). The excitation winding N4 is arranged on the primary side of the zero current detection unit 32 and is connected in parallel to the boost inductor LM1. The secondary winding N5 is disposed on the secondary side of the zero current detection unit 32, with a first end coupled to the first end of the conduction resistor RZ, and a second end coupled to the ground potential GND1. The zero current detection unit 32 can sense the boost inductor voltage V LM1 (the voltage across the boost inductor LM1) from the excitation winding N4 to the detection winding N5, so as to provide an induced voltage V LM2 on the secondary side. The first input terminal (e.g., the positive input terminal) of the comparator 34 is coupled to the control circuit 40 to receive a reference voltage VF (VF>0), the second input terminal (e.g., the negative input terminal) is coupled to the second end of the conductive resistor RZ to receive the sense voltage V LM2 , and the output terminal is coupled to the logic circuit 36. According to the potential relationship between the reference voltage VF and the sense voltage V LM2 , the comparator 34 can output a corresponding comparison voltage VCP. For example, when the boost inductor current I LM flowing through the boost inductor LM1 is zero current, the induced voltage V LM2 is zero voltage. At this time, the potential of the first input terminal in the comparator 34 will be higher than the potential of the second input terminal, so a comparison voltage VCP with a first potential (for example, a positive potential) will be output at the output terminal; when the boost inductor current I LM flowing through the boost inductor LM1 is not zero current, the induced voltage V LM2 is not zero voltage. At this time, the potential of the first input terminal in the comparator 34 will not be higher than the potential of the second input terminal, so a comparison voltage VCP with a second potential (for example, zero potential) will be output at the output terminal.

在本發明實施例之零電流偵測和逆電流補償電路30中,輔助開關Q4之第一端耦接至諧振轉換電路20中諧振電容CR之第一端,其第二端耦接至升壓型主動功率因數校正電路10中升壓電感LM1之第一端,而其控制端耦接至控制電路40以接收一控制訊號GD4。放大器38耦接於控制電路40和邏輯電路36之間,可接收參考電壓VF並調整參考電壓VF之電位,以提供符合邏輯電路36之電壓操作範圍之調整後參考電壓VF’。邏輯電路36之第一輸入端IN1耦接至儲能電容CO2之第一端 以接收輸出電壓VOUT,其第二輸入端IN2耦接至放大器38以接收調整後參考電壓VF’,其第三輸入端IN3耦接至比較器34之輸出端以接收比較電壓VCP,可依據輸出電壓VOUT、調整後參考電壓VF’和比較電壓VCP之值於其輸出端OUT提供一邏輯電壓VAA。 In the zero current detection and reverse current compensation circuit 30 of the present embodiment, the first end of the auxiliary switch Q4 is coupled to the first end of the resonant capacitor CR in the resonant conversion circuit 20, the second end thereof is coupled to the first end of the boost inductor LM1 in the boost type active power factor correction circuit 10, and the control end thereof is coupled to the control circuit 40 to receive a control signal GD4. The amplifier 38 is coupled between the control circuit 40 and the logic circuit 36, and can receive the reference voltage VF and adjust the potential of the reference voltage VF to provide an adjusted reference voltage VF' that meets the voltage operating range of the logic circuit 36. The first input terminal IN1 of the logic circuit 36 is coupled to the first terminal of the energy storage capacitor CO2 to receive the output voltage V OUT , the second input terminal IN2 thereof is coupled to the amplifier 38 to receive the adjusted reference voltage VF′, and the third input terminal IN3 thereof is coupled to the output terminal of the comparator 34 to receive the comparison voltage VCP. A logic voltage VAA can be provided at its output terminal OUT according to the values of the output voltage V OUT , the adjusted reference voltage VF′ and the comparison voltage VCP.

在一實施例中,邏輯電路36為一及閘(AND gate)。當邏輯電路36之第一輸入端IN1、第二輸入端IN2和第三輸入端IN3皆收到高電位訊號時,其輸出之邏輯電壓VAA才會是高電位;當邏輯電路36之第一輸入端IN1、第二輸入端IN2和第三輸入端IN3至少其中之一未收到高電位訊號時,其輸出之邏輯電壓VAA會是低電位。然而,邏輯電路36之實作方式並不限定本發明之範疇。 In one embodiment, the logic circuit 36 is an AND gate. When the first input terminal IN1, the second input terminal IN2 and the third input terminal IN3 of the logic circuit 36 all receive a high-level signal, the output logic voltage VAA will be a high level; when at least one of the first input terminal IN1, the second input terminal IN2 and the third input terminal IN3 of the logic circuit 36 does not receive a high-level signal, the output logic voltage VAA will be a low level. However, the implementation of the logic circuit 36 does not limit the scope of the present invention.

在第2圖所示之實施例中,控制電路40可為一微處理控制器(MCU),其包含腳位P1-P7,其中腳位P1用來輸出在一第一致能電位和一第一除能電位之間高頻切換之控制訊號GD1至功率開關Q1之控制端,腳位P2用來輸出在一第二致能電位和一第二除能電位之間高頻切換之控制訊號GD2至諧振開關Q2之控制端,腳位P3用來輸出在一第三致能電位和一第三除能電位之間高頻切換之控制訊號GD3至諧振開關Q3之控制端,腳位P4用來具一第四致能電位或一第四除能電位之控制訊號GD4至輔助開關Q4之控制端,腳位P5耦接至零電流偵測和逆電流補償電路30中邏輯電路36之輸出端以接收邏輯電壓VAA,腳位P6耦接至諧振轉換電路20以接收偵測電壓VS,而腳位P7用來輸出具固定正值之參考電壓VF至零電流偵測和逆電流補償電路30。 In the embodiment shown in FIG. 2, the control circuit 40 may be a microprocessor controller (MCU), which includes pins P1-P7, wherein the pin P1 is used to output a control signal GD1 for high-frequency switching between a first enable potential and a first disable potential to the control end of the power switch Q1, the pin P2 is used to output a control signal GD2 for high-frequency switching between a second enable potential and a second disable potential to the control end of the resonant switch Q2, and the pin P3 is used to output a control signal GD1 for high-frequency switching between a third enable potential and a third disable potential to the control end of the resonant switch Q2. The high-frequency switching control signal GD3 is sent to the control end of the resonant switch Q3, the pin P4 is used to send a control signal GD4 with a fourth enable potential or a fourth disable potential to the control end of the auxiliary switch Q4, the pin P5 is coupled to the output end of the logic circuit 36 in the zero current detection and reverse current compensation circuit 30 to receive the logic voltage VAA, the pin P6 is coupled to the resonant conversion circuit 20 to receive the detection voltage VS, and the pin P7 is used to output a reference voltage VF with a fixed positive value to the zero current detection and reverse current compensation circuit 30.

如第2圖所示,當電源供應器100並未連接上市電時,所有控制訊號皆為0,而電源供應器100不會有輸出(VOUT=0)。當電源供應器100連接上市電後,升壓型主動功率因數校正電路10首先開始動作,整流器10可將市電供應之交流電壓VAC轉換成直流輸入電壓VIN,而控制電路40會透過腳位P1輸出在第一致能電位和第一除能電位之間高頻切換之控制訊號GD1至功率開關Q1之控制端,使得功率開關Q1能在導通和截止狀態之間相對應地做高頻切換,進而讓升壓電感LM1週期性地進行能量儲存與能量釋放,以在變壓器TR的初級側提供升壓後之脈動直流電壓VO1。 As shown in FIG. 2 , when the power supply 100 is not connected to the mains, all control signals are 0, and the power supply 100 has no output (V OUT =0). When the power supply 100 is connected to the mains, the boost active power factor correction circuit 10 starts to operate first. The rectifier 10 can convert the AC voltage V AC supplied by the mains into a DC input voltage V IN , and the control circuit 40 outputs a control signal GD1 that switches between a first enable potential and a first disable potential at a high frequency to the control end of the power switch Q1 through the pin P1, so that the power switch Q1 can switch between the on and off states at a high frequency accordingly, thereby allowing the boost inductor LM1 to periodically store and release energy, so as to provide a boosted pulsating DC voltage VO1 on the primary side of the transformer TR.

接著,在升壓型主動功率因數校正電路10穩定運作後所輸出之脈動直流電壓VO1為諧振轉換電路20之輸入電壓,控制電路40會透過腳位P2輸出在第二致能電位和第二除能電位之間高頻切換之控制訊號GD2至諧振開關Q2之控制端,並透過腳位P3輸出在第三致能電位和第三除能電位之間高頻切換之控制訊號GD3至諧振開關Q3之控制端。控制訊號GD2和GD3為互補訊號,也就是當控制訊號GD2具第二致能電位時控制訊號GD3會具第三除能電位,而當控制訊號GD2具第二除能電位時控制訊號GD3會具第三致能電位,使得諧振開關Q2和Q3可分別依據控制訊號GD2和GD3來做高頻互補式切換,進而使諧振電感LR、激磁電感LM2和諧振電容CR相互諧振,以達到零電壓或零電流之柔性切換以降低切換損失。在這種情況下,變壓器TR可將初級側繞組NP所存對應脈動直流電壓VO1之能量感應至次級側繞組N2和N3以提供輸出電壓VOUT。同時,相關輸出電壓VOUT之輸出電流IOUT會經由儲能電容CO2和偵測電阻RS流至接地電位GND2,並在偵測電阻RS上建立偵測電壓 VS。控制電路40會透過腳位P6接收偵測電壓VS,進而得知輸出電流IOUT的瞬時狀態,並依據偵測電壓VS之值調整控制訊號GD1-GD3之責任週期(duty cycle)以達到穩定輸出電壓VOUT之目的。 Next, the pulsed DC voltage VO1 outputted after the boost active power factor correction circuit 10 operates stably is the input voltage of the resonant converter circuit 20, and the control circuit 40 outputs a control signal GD2 for high-frequency switching between the second enable potential and the second disable potential to the control end of the resonant switch Q2 through the pin P2, and outputs a control signal GD3 for high-frequency switching between the third enable potential and the third disable potential to the control end of the resonant switch Q3 through the pin P3. The control signals GD2 and GD3 are complementary signals, that is, when the control signal GD2 has the second enable potential, the control signal GD3 will have the third disable potential, and when the control signal GD2 has the second disable potential, the control signal GD3 will have the third enable potential, so that the resonant switches Q2 and Q3 can perform high-frequency complementary switching according to the control signals GD2 and GD3 respectively, thereby making the resonant inductor LR, the excitation inductor LM2 and the resonant capacitor CR resonate with each other to achieve flexible switching of zero voltage or zero current to reduce switching loss. In this case, the transformer TR can induce the energy of the corresponding pulse DC voltage VO1 stored in the primary winding NP to the secondary windings N2 and N3 to provide the output voltage V OUT . At the same time, the output current I OUT of the output voltage V OUT will flow to the ground potential GND2 through the energy storage capacitor CO2 and the detection resistor RS, and establish the detection voltage VS on the detection resistor RS. The control circuit 40 receives the detection voltage VS through the pin P6, thereby knowing the instantaneous state of the output current I OUT , and adjusting the duty cycle of the control signals GD1 - GD3 according to the value of the detection voltage VS to achieve the purpose of stabilizing the output voltage V OUT .

第3圖為本發明實施例中電源供應器100運作時相關訊號之波形圖。第3圖上方顯示了先前技術之電源供應器在無逆電流補償架構下運作時升壓電感電流ILM’之波形圖,第3圖中央顯示了本發明實施例中具備逆電流補償架構之電源供應器100運作時升壓電感電流ILM之波形圖,而第3圖下方顯示了本發明實施例中具備逆電流補償架構之電源供應器100運作時控制訊號GD4之波形圖, 依據電感元件的冷次定律(Lenz's law),升壓電感LM1之跨壓VLM1會隨著流經升壓電感LM1之升壓電感電流ILM而變化。在市電供應交流電壓VAC的期間當控制訊號GD1具第一致能電位時,升壓電感LM1會被導通之功率開關Q1耦接至接地電位GND1以進行儲能充電運作,而在儲能充電運作期間升壓電感電流ILM會往上爬升,此時升壓電感電壓VLM1為電位遞增之正電壓;在市電供應交流電壓VAC的期間當控制訊號GD1具第一除能電位時,升壓電感LM1之充電路徑會被截止之功率開關Q1切斷,因此會進行釋能放電運作,而在釋能放電運作期間升壓電感電流ILM會往下遞減,此時升壓電感電壓VLM1為電位遞減之正電壓。 FIG. 3 is a waveform diagram of related signals when the power supply 100 is operating in the embodiment of the present invention. The upper portion of FIG. 3 shows a waveform of the boost inductor current I LM ' when the power supply of the prior art operates without a reverse current compensation structure. The center of FIG. 3 shows a waveform of the boost inductor current I LM when the power supply 100 with a reverse current compensation structure in the embodiment of the present invention operates. The lower portion of FIG. 3 shows a waveform of the control signal GD4 when the power supply 100 with a reverse current compensation structure in the embodiment of the present invention operates. According to Lenz's law of the inductor element, the cross-voltage V LM1 of the boost inductor LM1 changes with the boost inductor current I LM flowing through the boost inductor LM1. During the period when the AC voltage V AC is supplied by the mains, when the control signal GD1 has the first enabling level, the boost inductor LM1 will be coupled to the ground potential GND1 by the turned-on power switch Q1 to perform energy storage charging operation, and during the energy storage charging operation, the boost inductor current I LM will increase, and at this time, the boost inductor voltage V LM1 is a positive voltage with increasing potential; during the period when the AC voltage V AC is supplied by the mains, when the control signal GD1 has the first disabling level, the charging path of the boost inductor LM1 will be cut off by the turned-off power switch Q1, so that an energy release discharge operation will be performed, and during the energy release discharge operation, the boost inductor current I LM will decrease downward, and at this time, the boost inductor voltage V LM1 is a positive voltage with decreasing potential.

如第3圖上方所示,由於先前技術之電源供應器並未提供逆電流補償架構,在邊界導通模式下當升壓電感電流ILM’降至零的狀態下,功率開關Q1之寄生電容會與升壓電感LM1發生諧振而產生一返還 交流電源端的逆向電流(升壓電感電流IILM’之值為負值的區間)。上述逆向電流會產成生熱損耗而影響主動式功率因數校正器之升壓轉換效率,同時也會造成較高的總諧波失真問題。 As shown in the upper part of Figure 3, because the power supply of the prior art does not provide a reverse current compensation structure, in the boundary conduction mode, when the boost inductor current I LM ' drops to zero, the parasitic capacitance of the power switch Q1 will resonate with the boost inductor LM1 to generate a reverse current returned to the AC power supply end (the value of the boost inductor current I ILM ' is a negative interval). The above reverse current will generate heat loss and affect the boost conversion efficiency of the active power factor corrector, and will also cause a higher total harmonic distortion problem.

如第2圖和第3圖所示,本發明實施例之電源供應器100可利用零電流偵測單元32來偵測在儲能充電運作和釋能放電運作之間升壓電感電流ILM為零的狀態,激磁繞組N4會傳遞瞬時的電感能量至偵測繞組N5,當偵測繞組N5能量為零時,就意即升壓電感電流ILM為零電流,此時零電流偵測單元32在其次級側所提供之感應電壓VLM2亦為零電壓。當感應電壓VLM2為零電壓時,比較器34中第一輸入端之電位會高於第二輸入端之電位,此時會於其輸出端輸出具第一電位(例如正電位)之比較電壓VCP。 As shown in FIG. 2 and FIG. 3 , the power supply 100 of the embodiment of the present invention can use the zero current detection unit 32 to detect the state where the boost inductor current I LM is zero between the energy storage charging operation and the energy release discharging operation. The exciting winding N4 will transfer the instantaneous inductor energy to the detection winding N5. When the energy of the detection winding N5 is zero, it means that the boost inductor current I LM is zero current. At this time, the inductive voltage V LM2 provided by the zero current detection unit 32 on its secondary side is also zero voltage. When the sense voltage V LM2 is zero voltage, the potential of the first input terminal of the comparator 34 will be higher than the potential of the second input terminal. At this time, a comparison voltage VCP having a first potential (eg, a positive potential) will be output at its output terminal.

在市電供應交流電壓VAC的期間當電源供應器100正常運作時,在諧振轉換電路20提供之輸出電壓VOUT會維持在高電位,而控制電路40會提供具高電位之參考電壓VF。因此,在市電供應交流電壓VAC的期間,當電源供應器100正常運作且偵測到升壓電感電流ILM為零的狀態時,邏輯電路36之第一至第三輸入端的電壓皆為高電位,因此會於其輸出端提供具一第三電位(例如高電位)之邏輯電壓VAA。另一方面,在市電供應交流電壓VAC的期間,當電源供應器100並未偵測到升壓電感電流ILM為零的狀態時,邏輯電路36之第一至第三輸入端的電壓並非皆為高電位,因此會於其輸出端提供具一第四電位(例如低電位)之邏輯電壓VAA。 When the power supply 100 operates normally during the period of the AC voltage V AC supplied by the mains, the output voltage V OUT provided by the resonant converter circuit 20 will be maintained at a high level, and the control circuit 40 will provide a reference voltage VF with a high level. Therefore, during the period of the AC voltage V AC supplied by the mains, when the power supply 100 operates normally and detects that the boost inductor current I LM is zero, the voltages of the first to third input terminals of the logic circuit 36 are all high, so a logic voltage VAA with a third level (e.g., high level) is provided at its output terminal. On the other hand, during the period when the AC voltage V AC is supplied by the mains, when the power supply 100 does not detect that the boost inductor current I LM is zero, the voltages at the first to third input terminals of the logic circuit 36 are not all high voltages, and therefore a logic voltage VAA having a fourth voltage (e.g., a low voltage) is provided at its output terminal.

當控制電路40透過腳位P5接收到具第四電位(例如低電位)之邏輯電壓VAA時,代表目前升壓電感電流ILM之值並非為零,此時會透過腳位P4輸出具第四除能電位之控制訊號GD4以截止輔助開關Q4,進而切斷諧振電容CR之第一端至升壓電感LM1之第一端的訊號傳送路徑。當控制電路40透過腳位P5接收到具第三電位(例如高電位)之邏輯電壓VAA時,代表目前升壓電感電流ILM之值為零,此時會透過腳位P4輸出具第四致能電位之控制訊號GD4以導通輔助開關Q4,進而導通諧振電容CR之第一端至升壓電感LM1之第一端的訊號傳送路徑,如此諧振電容CR內存能量能被傳至升壓電感LM1之第一端以抵銷逆向電流。 When the control circuit 40 receives the logic voltage VAA having a fourth potential (e.g., a low potential) through the pin P5, it indicates that the current value of the boost inductor current I LM is not zero. At this time, the control circuit 40 outputs a control signal GD4 having a fourth disable potential through the pin P4 to turn off the auxiliary switch Q4, thereby cutting off the signal transmission path from the first end of the resonant capacitor CR to the first end of the boost inductor LM1. When the control circuit 40 receives the logic voltage VAA having a third potential (e.g., a high potential) through the pin P5, it indicates that the current value of the boost inductor current I LM is zero. At this time, the control signal GD4 having a fourth enable potential is output through the pin P4 to turn on the auxiliary switch Q4, thereby turning on the signal transmission path from the first end of the resonant capacitor CR to the first end of the boost inductor LM1. In this way, the energy stored in the resonant capacitor CR can be transmitted to the first end of the boost inductor LM1 to offset the reverse current.

在本發明實施例中,當電源供應器100之輸出功率較大時,其輸出負載IO也較大,而升壓電感LM1的平均能量也較大,因此在升壓電感電流ILM之值為零時會造成較大的諧振逆向電流。因此,本發明可依據輸出電流IOUT來決定輔助開關Q4的總導通時間TT(亦即控制訊號訊號GD4具第四致能電位的時間)。 In the embodiment of the present invention, when the output power of the power supply 100 is larger, the output load IO is also larger, and the average energy of the boost inductor LM1 is also larger, so when the value of the boost inductor current I LM is zero, a larger resonant reverse current will be generated. Therefore, the present invention can determine the total on-time TT of the auxiliary switch Q4 (i.e., the time when the control signal GD4 has the fourth enabling potential) according to the output current I OUT .

在一實施例中,控制電路40可依據偵測電阻RS上建立之偵測電壓VS來判斷輸出負載IO之大小,再依此決定輔助開關Q4的工作週期(duty cycle),使得輔助開關Q4的總導通時間TT足以提供相對應能量以抵銷逆向電流。下列表一顯示了輸出負載IO、偵測電壓VS和總導通時間TT的對應關係,其中IOMAX代表電源供應器100之最大輸出輸出負載,而TX代表單位時間。值得注意的是,表一所示之數值僅為說明目的,並不限定本發明之範疇。 In one embodiment, the control circuit 40 can determine the size of the output load IO according to the detection voltage VS established on the detection resistor RS, and then determine the duty cycle of the auxiliary switch Q4 accordingly, so that the total conduction time TT of the auxiliary switch Q4 is sufficient to provide corresponding energy to offset the reverse current. The following table 1 shows the corresponding relationship between the output load IO, the detection voltage VS and the total conduction time TT, where IO MAX represents the maximum output load of the power supply 100, and TX represents the unit time. It is worth noting that the values shown in Table 1 are for illustrative purposes only and do not limit the scope of the present invention.

Figure 112149271-A0305-12-0014-1
Figure 112149271-A0305-12-0014-1

在本發明實施例中,功率開關Q1、諧振開關Q2-Q3和輔助開關Q4可為金屬氧化物半導體場效電晶體(metal-oxide-semiconductor field-effect transistor,MOSFET)、雙極性接面型電晶體(bipolar junction transistor,BJT),或其它具類似功能的元件。對N型電晶體來說,致能電位為高電位,而除能電位為低電位;對P型電晶體來說,致能電位為低電位,而除能電位為高電位。然而,上述開關之種類並不限定本發明之範疇。 In the embodiment of the present invention, the power switch Q1, the resonant switches Q2-Q3 and the auxiliary switch Q4 can be metal-oxide-semiconductor field-effect transistors (MOSFET), bipolar junction transistors (BJT), or other components with similar functions. For N-type transistors, the enable potential is high and the disable potential is low; for P-type transistors, the enable potential is low and the disable potential is high. However, the types of the above switches do not limit the scope of the present invention.

綜上所述,本發明之電源供應器100可偵測升壓電感電流ILM之狀態,並在判定其輸出電壓VOUT為正常且偵測到升壓電感電流ILM為 零的狀態時,透過輔助開關Q4導通諧振電容CR至升壓電感LM1之訊號傳送路徑態,進而讓諧振電容CR內存能量能傳送至輸入端以抵銷逆向電流。此外,本發明之電源供應器100亦可偵測輸出電壓VOUT之狀態以提供相對應之偵測電壓VS,並依據偵測電壓VS來判斷輸出負載之大小,再依此決定輔助開關Q4的總導通時間TT以提供相對應能量來抵銷逆向電流。因此,本發明之電源供應器可降低熱損耗、提升主動式功率因數校正器之升壓轉換效率,且降低總諧波失真之發生機率。 In summary, the power supply 100 of the present invention can detect the state of the boost inductor current I LM , and when it is determined that the output voltage V OUT is normal and the boost inductor current I LM is detected to be zero, the auxiliary switch Q4 is used to turn on the signal transmission path from the resonant capacitor CR to the boost inductor LM1, thereby allowing the energy stored in the resonant capacitor CR to be transmitted to the input end to offset the reverse current. In addition, the power supply 100 of the present invention can also detect the state of the output voltage V OUT to provide a corresponding detection voltage VS, and judge the size of the output load according to the detection voltage VS, and then determine the total conduction time TT of the auxiliary switch Q4 to provide corresponding energy to offset the reverse current. Therefore, the power supply of the present invention can reduce heat loss, improve the boost conversion efficiency of the active power factor corrector, and reduce the probability of total harmonic distortion.

以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。 The above is only the preferred embodiment of the present invention. All equivalent changes and modifications made within the scope of the patent application of the present invention shall fall within the scope of the present invention.

10:升壓型主動功率因數校正電路 10: Boost type active power factor correction circuit

20:諧振轉換電路 20: Resonance conversion circuit

30:零電流偵測和逆電流補償電路 30: Zero current detection and reverse current compensation circuit

40:控制電路 40: Control circuit

100:電源供應器 100: Power supply

VOUT:輸出電壓 V OUT : Output voltage

VAC:交流電壓 V AC : Alternating current voltage

VO1:脈動直流電壓 VO1: Pulsating DC voltage

Claims (10)

一種具逆電流補償架構之電源供應器,其包含:一升壓型主動功率因數校正電路,用來將一市電供應之一交流電壓轉換成一直流電壓,再將該直流電壓換成一脈動直流電壓,其包含:一升壓電感,用來儲存或釋放該直流電壓之能量,其包含:一第一端,耦接至該直流電壓;以及一第二端;以及一功率開關,用來依據一第一控制訊號來控制該升壓電感進行能量儲存與能量釋放,其包含:一第一端,耦接至該升壓電感之該第二端;一第二端,耦接至一第一接地電位;以及一控制端,用來接收在一第一致能電位和一第一除能電位之間週期性切換的該第一控制訊號;一諧振轉換電路,用來將該脈動直流電壓轉換成一輸出電壓,其包含:一變壓器,用來將該脈動直流電壓之能量從一第一初級側感應至一第一次級側以供應該輸出電壓,其包含:一初級側繞組,設置在該第一初級側,其包含一第一打點端和一第一非打點端;一第一次級側繞組,設置在該第一次級側,其包含一第二打點端和一第二非打點端;以及一第二次級側繞組,設置在該第一次級側,其包含一第三打點端和一第三非打點端,其中該第二非打點端耦接 至該第三打點端;一激磁電感,其包含:一第一端,耦接至該第一打點端;以及一第二端,耦接至該第一非打點端;一諧振電感,其包含:一第一端,耦接至該第一打點端;以及一第二端;一諧振電容,其包含:一第一端,耦接至該第一非打點端;以及一第二端,耦接至該第一接地電位;一第一諧振開關,用來依據一第二控制訊號來控制該諧振轉換電路之運作,其包含:一第一端,耦接至該脈動直流電壓;一第二端,耦接至該諧振電感之該第二端;以及一控制端,用來接收在一第二致能電位和一第二除能電位之間週期性切換的該第二控制訊號;以及一第二諧振開關,用來依據一第三控制訊號來控制該諧振轉換電路之運作,其包含:一第一端,耦接至該諧振電感之該第二端;一第二端,耦接至該第一接地電位;以及一控制端,用來接收在一第三致能電位和一第三除能電位之間週期性切換的該第三控制訊號;一零電流偵測和逆電流補償電路,用來:偵測流經該升壓電感之一升壓電感電流; 當判定該升壓電感電流為零電流狀態時,導通該諧振電容之第一端至該升壓電感之該第一端的訊號傳送路徑;以及當判定該升壓電感電流並非為零電流狀態時,切斷該諧振電容之第一端至該升壓電感之該第一端的訊號傳送路徑;以及一控制電路,用來:提供該第一控制訊號、該第二控制訊號和該第三控制訊號;以及依據一邏輯電壓提供具一第四致能電位或具一第四除能電位之一第四控制訊號以選擇性地導通或切斷該諧振電容之第一端至該升壓電感之該第一端的訊號傳送路徑。 A power supply with a reverse current compensation structure includes: a boost type active power factor correction circuit for converting an AC voltage of a mains supply into a DC voltage, and then converting the DC voltage into a pulsed DC voltage, including: a boost inductor for storing or releasing the energy of the DC voltage, including: a first end coupled to the DC voltage; and a second end; and a power The switch is used to control the boost inductor to store and release energy according to a first control signal, and includes: a first end coupled to the second end of the boost inductor; a second end coupled to a first ground potential; and a control end for receiving the first control signal that periodically switches between a first enabling potential and a first disabling potential; a resonant conversion circuit for converting the pulsed DC The voltage is converted into an output voltage, which includes: a transformer for inducing the energy of the pulsed DC voltage from a first primary side to a first secondary side to supply the output voltage, which includes: a primary side winding, arranged on the first primary side, including a first dotted end and a first non-dotted end; a first secondary side winding, arranged on the first secondary side, including a second dotted end and a second non-dotted end; end; and a second secondary side winding, arranged on the first secondary side, comprising a third dotted end and a third non-dotted end, wherein the second non-dotted end is coupled to the third dotted end; an excitation inductor, comprising: a first end, coupled to the first dotted end; and a second end, coupled to the first non-dotted end; a resonant inductor, comprising: a first end, coupled to the first dotted end; and a a second end; a resonant capacitor, comprising: a first end coupled to the first non-striking end; and a second end coupled to the first ground potential; a first resonant switch, used to control the operation of the resonant conversion circuit according to a second control signal, comprising: a first end coupled to the pulsating DC voltage; a second end coupled to the second end of the resonant inductor; and a control end for receiving the second control signal that periodically switches between a second enabling potential and a second disabling potential; and a second resonant switch, used to control the operation of the resonant conversion circuit according to a third control signal, comprising: a first end coupled to the second end of the resonant inductor; a second end coupled to the first ground potential; and a control end for receiving a third enabling potential and a third disabling potential. a third control signal periodically switched between the first and second control signals; a zero current detection and reverse current compensation circuit, used to: detect a boost inductor current flowing through the boost inductor; when the boost inductor current is determined to be in a zero current state, conduct the signal transmission path from the first end of the resonant capacitor to the first end of the boost inductor; and when the boost inductor current is determined not to be in a zero current state, disconnect the first end of the resonant capacitor from the first end of the boost inductor. A signal transmission path from one end of the resonant capacitor to the first end of the boost inductor; and a control circuit for: providing the first control signal, the second control signal and the third control signal; and providing a fourth control signal with a fourth enable potential or a fourth disable potential according to a logic voltage to selectively turn on or off the signal transmission path from the first end of the resonant capacitor to the first end of the boost inductor. 如請求項1所述之電源供應器,其中該零電流偵測和逆電流補償電路另用來:接收該輸出電壓;以及當依據該輸出電壓判定該電源供應器能正常運作且判定該升壓電感電流為零電流狀態時,導通該諧振電容之第一端至該升壓電感之該第一端的訊號傳送路徑。 The power supply as described in claim 1, wherein the zero current detection and reverse current compensation circuit is further used to: receive the output voltage; and when it is determined that the power supply can operate normally based on the output voltage and the boost inductor current is determined to be in a zero current state, conduct the signal transmission path from the first end of the resonant capacitor to the first end of the boost inductor. 如請求項2所述之電源供應器,其中該控制電路另用來提供具一固定電位之一第一參考電壓,且該零電流偵測和逆電流補償電路包含:一零電流偵測單元,用來將該升壓電感電流之能量從一第二初級側感應至一第二次級側以提供一感應電壓,其包含:一激磁繞組,設置在該第二初級側,其中該激磁繞組之一第一 端耦接於該升壓電感之該第一端,而該激磁繞組之一第二端耦接於該升壓電感之該第二端;以及一偵測繞組,設置在該第二次級側,其中該偵測繞組之一第一端用來提供該感應電壓,而該偵測繞組之一第二端耦接於該第一接地電位;一比較器,用來依據該感應電壓和該參考電壓之電位關係來選擇性地提供具一第一電位或具一第二電位之一比較電壓,其包含:一第一輸入端,耦接至該控制電路以接收該第一參考電壓;一第二輸入端,耦接至該零電流偵測單元以接收該感應電壓;以及一輸出端,用來輸出該比較電壓;一邏輯電路,用來依據該比較電壓和相關該第一參考電壓之一第二參考電壓之電位選擇性地提供具一第三電位或具一第四電位之該邏輯電壓,其包含:一第一輸入端,用來接收該輸出電壓;一第二輸入端,用來接收該第二參考電壓;一第三輸入端,耦接至該比較器之該輸出端以接收該比較電壓;以及一輸出端,用來輸出該邏輯電壓;以及一輔助開關,其依據該第四控制訊號來運作,且包含:一第一端,耦接至該諧振電容之該第一端;一第二端,耦接至該升壓電感之該第一端;以及一控制端,耦接至該控制電路以接收該第四控制訊號。 A power supply as claimed in claim 2, wherein the control circuit is further used to provide a first reference voltage having a fixed potential, and the zero current detection and reverse current compensation circuit comprises: a zero current detection unit, used to induce the energy of the boost inductor current from a second primary side to a second secondary side to provide an induced voltage, which comprises: an excitation winding, arranged on the second primary side, wherein a first end of the excitation winding is coupled to the first terminal of the boost inductor; The invention relates to a first input winding, wherein the first end of the detection winding is used to provide the induced voltage, and the second end of the detection winding is coupled to the first ground potential; a comparator, which is used to selectively provide a comparison voltage with a first potential or a second potential according to the potential relationship between the induced voltage and the reference voltage, and comprises: a first input A first input terminal coupled to the control circuit to receive the first reference voltage; a second input terminal coupled to the zero current detection unit to receive the induced voltage; and an output terminal for outputting the comparison voltage; a logic circuit for selectively providing the logic voltage with a third potential or a fourth potential according to the potential of the comparison voltage and a second reference voltage related to the first reference voltage, comprising: a first input terminal for receiving the output voltage; a second input terminal coupled to the zero current detection unit to receive the induced voltage; and an output terminal for outputting the comparison voltage. An input terminal for receiving the second reference voltage; a third input terminal coupled to the output terminal of the comparator to receive the comparison voltage; and an output terminal for outputting the logic voltage; and an auxiliary switch, which operates according to the fourth control signal and includes: a first terminal coupled to the first terminal of the resonant capacitor; a second terminal coupled to the first terminal of the boost inductor; and a control terminal coupled to the control circuit to receive the fourth control signal. 如請求項3所述之電源供應器,其中該零電流偵測和逆電流補償電路另包含一放大器,耦接於該控制電路和該邏輯電路之該第二輸入端之間,用來調整該第一參考電壓之電位以提供符合該邏輯電路之電壓操作範圍之該第二參考電壓。 A power supply as described in claim 3, wherein the zero current detection and reverse current compensation circuit further comprises an amplifier coupled between the control circuit and the second input terminal of the logic circuit, for adjusting the potential of the first reference voltage to provide the second reference voltage that meets the voltage operating range of the logic circuit. 如請求項3所述之電源供應器,其中該零電流偵測和逆電流補償電路另包含一傳導電阻,耦接於該偵測繞組之該第一端和該比較器之該第二輸入端之間。 A power supply as described in claim 3, wherein the zero current detection and reverse current compensation circuit further comprises a conductive resistor coupled between the first end of the detection winding and the second input end of the comparator. 如請求項3所述之電源供應器,其中:該比較器另用來:當該第一參考電壓之電位高於該感應電壓之電位時,輸出具該第一電位之該比較電壓;以及當該第一參考電壓之電位不高於該感應電壓之電位時,輸出具該第二電位之該比較電壓;該邏輯電路另用來:當該輸出電壓具一第一高電位,該比較電壓具該第一電位,且該第二參考電壓具一第二高電位時,輸出具該第三電位之該邏輯電壓;以及當該比較電壓具該第二電位時,輸出具該第四電位之該邏輯電壓;且一控制電路另用來:當接收到具該第三電位之該邏輯電壓時,輸出具該第四致能電 位之該第四控制訊號以導通該輔助開關,進而導通該諧振電容之第一端至該升壓電感之該第一端的訊號傳送路徑;以及當接收到具該第四電位之該邏輯電壓時,輸出具該第四除能電位之該第四控制訊號以截止該輔助開關,進而切斷該諧振電容之第一端至該升壓電感之該第一端的訊號傳送路徑。 The power supply as described in claim 3, wherein: the comparator is further used to: when the potential of the first reference voltage is higher than the potential of the induced voltage, output the comparison voltage having the first potential; and when the potential of the first reference voltage is not higher than the potential of the induced voltage, output the comparison voltage having the second potential; the logic circuit is further used to: when the output voltage has a first high potential, the comparison voltage has the first potential, and the second reference voltage has a second high potential, output the logic voltage having the third potential; and when the comparison voltage has the second high potential When the logic voltage with the third potential is received, the fourth control signal with the fourth enabling potential is output to turn on the auxiliary switch, thereby turning on the signal transmission path from the first end of the resonant capacitor to the first end of the boost inductor; and when the logic voltage with the fourth potential is received, the fourth control signal with the fourth disabling potential is output to turn off the auxiliary switch, thereby cutting off the signal transmission path from the first end of the resonant capacitor to the first end of the boost inductor. 如請求項1所述之電源供應器,其中該控制電路另用來:接收相關該輸出電壓之一偵測電壓;以及依據該偵測電壓來決定該第四控制訊號之工作週期(duty cycle)。 A power supply as described in claim 1, wherein the control circuit is further used to: receive a detection voltage related to the output voltage; and determine the duty cycle of the fourth control signal based on the detection voltage. 如請求項1所述之電源供應器,其中該升壓型主動功率因數校正電路另包含:一第一儲能電容,其第一端耦接至該脈動直流電壓,其第二端耦接至該第一接地電位,用來儲存該脈動直流電壓之能量;以及一第一二極體,其陽極耦接至該升壓電感之該第二端,而其陰極耦接至該第一儲能電容之該第一端。 The power supply as described in claim 1, wherein the boost type active power factor correction circuit further comprises: a first energy storage capacitor, a first end of which is coupled to the pulsed DC voltage, and a second end of which is coupled to the first ground potential, for storing the energy of the pulsed DC voltage; and a first diode, an anode of which is coupled to the second end of the boost inductor, and a cathode of which is coupled to the first end of the first energy storage capacitor. 如請求項1所述之電源供應器,其中該諧振轉換電路另包含:一第二儲能電容,其第一端耦接至該輸出電壓,其第二端耦接至該第二非打點端和該第三打點端,用來儲存該輸出電壓之能量;一第二二極體,其陽極耦接至該第二打點端,而其陰極耦接至該 第二儲能電容之該第一端;以及一第三二極體,其陽極耦接至該第三非打點端,而其陰極耦接至該第二儲能電容之該第一端。 The power supply as described in claim 1, wherein the resonant conversion circuit further comprises: a second energy storage capacitor, whose first end is coupled to the output voltage, and whose second end is coupled to the second non-dot terminal and the third dot terminal, for storing the energy of the output voltage; a second diode, whose anode is coupled to the second dot terminal, and whose cathode is coupled to the first end of the second energy storage capacitor; and a third diode, whose anode is coupled to the third non-dot terminal, and whose cathode is coupled to the first end of the second energy storage capacitor. 如請求項9所述之電源供應器,其中該諧振轉換電路另包含:一偵測電阻,其第一端耦接至該第二儲能電容之該第二端,其第二端耦接至一第二接地電位,用來偵測流經該第二儲能電容之一輸出電流,進而提供相關該輸出電壓之一偵測電壓。 The power supply as described in claim 9, wherein the resonant conversion circuit further comprises: a detection resistor, a first end of which is coupled to the second end of the second energy storage capacitor, and a second end of which is coupled to a second ground potential, for detecting an output current flowing through the second energy storage capacitor, thereby providing a detection voltage related to the output voltage.
TW112149271A 2023-12-18 2023-12-18 Power supply with reverse curremt compensation mechanism TWI879322B (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003017453A1 (en) 2001-08-16 2003-02-27 Green Power Technologies Ltd. Pfc apparatus for a converter operating in the borderline conduction mode
CN101572490A (en) * 2009-06-15 2009-11-04 浙江大学 Zero-voltage switch flyback-type DC-DC power supply conversion device
TW202339411A (en) * 2022-03-28 2023-10-01 宏碁股份有限公司 Power supply

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003017453A1 (en) 2001-08-16 2003-02-27 Green Power Technologies Ltd. Pfc apparatus for a converter operating in the borderline conduction mode
CN101572490A (en) * 2009-06-15 2009-11-04 浙江大学 Zero-voltage switch flyback-type DC-DC power supply conversion device
TW202339411A (en) * 2022-03-28 2023-10-01 宏碁股份有限公司 Power supply

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