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TWI878782B - Magnetic memory device - Google Patents

Magnetic memory device Download PDF

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TWI878782B
TWI878782B TW112101372A TW112101372A TWI878782B TW I878782 B TWI878782 B TW I878782B TW 112101372 A TW112101372 A TW 112101372A TW 112101372 A TW112101372 A TW 112101372A TW I878782 B TWI878782 B TW I878782B
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layer
memory device
magnetic memory
magnetic
upper electrode
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TW112101372A
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TW202401816A (en
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秋山直紀
吉野健一
澤田和也
趙亨峻
島野拓也
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日商鎧俠股份有限公司
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Abstract

本發明之實施形態提供一種特性或可靠性優異之磁性記憶裝置。 實施形態之磁性記憶裝置係具備複數個記憶胞者,該複數個記憶胞分別包含:磁阻效應元件;及開關元件,其設置於上述磁阻效應元件之下層側且相對於上述磁阻效應元件串聯連接;且上述開關元件包含:下部電極;上部電極;及開關材料層,其設置於上述下部電極與上述上部電極之間;且上述上部電極包含:第1部分,其由第1材料形成;及第2部分,其設置於上述第1部分之下層側且由與上述第1材料不同之第2材料形成。 The embodiment of the present invention provides a magnetic memory device with excellent characteristics or reliability. The magnetic memory device of the embodiment has a plurality of memory cells, and the plurality of memory cells respectively include: a magnetoresistance effect element; and a switch element, which is arranged on the lower layer side of the magnetoresistance effect element and connected in series with respect to the magnetoresistance effect element; and the switch element includes: a lower electrode; an upper electrode; and a switch material layer, which is arranged between the lower electrode and the upper electrode; and the upper electrode includes: a first part, which is formed of a first material; and a second part, which is arranged on the lower layer side of the first part and is formed of a second material different from the first material.

Description

磁性記憶裝置Magnetic memory device

本發明之實施形態係關於一種磁性記憶裝置(magnetic memory device:磁性記憶裝置)。An embodiment of the present invention relates to a magnetic memory device.

提案有於半導體基板上將包含磁阻效應元件(magnetoresistance effect element)及選擇器(開關元件)之記憶胞積體化之磁性記憶裝置。A magnetic memory device is proposed in which a memory cell including a magnetoresistance effect element and a selector (switching element) is integrated on a semiconductor substrate.

發明所欲解決之課題係提供一種特性或可靠性優異之磁性記憶裝置。The problem to be solved by the invention is to provide a magnetic memory device with excellent characteristics or reliability.

實施形態之磁性記憶裝置係具備複數個記憶胞者,該複數個記憶胞分別包含:磁阻效應元件;及開關元件,其設置於上述磁阻效應元件之下層側且相對於上述磁阻效應元件串聯連接;且上述開關元件包含:下部電極;上部電極;及開關材料層,其設置於上述下部電極與上述上部電極之間;且上述上部電極包含:第1部分,其由第1材料形成;及第2部分,其設置於上述第1部分之下層側且由與上述第1材料不同之第2材料形成。The magnetic memory device of the implementation form has a plurality of memory cells, which respectively include: a magnetoresistance effect element; and a switch element, which is arranged on the lower layer side of the above-mentioned magnetoresistance effect element and is connected in series with the above-mentioned magnetoresistance effect element; and the above-mentioned switch element includes: a lower electrode; an upper electrode; and a switching material layer, which is arranged between the above-mentioned lower electrode and the above-mentioned upper electrode; and the above-mentioned upper electrode includes: a first part, which is formed by a first material; and a second part, which is arranged on the lower layer side of the above-mentioned first part and is formed by a second material different from the above-mentioned first material.

以下,參照圖式說明實施形態。Hereinafter, the implementation will be described with reference to the drawings.

圖1係模式性顯示實施形態之磁性記憶裝置之構成之立體圖。FIG. 1 is a perspective view schematically showing the structure of a magnetic memory device of an embodiment.

圖1所示之磁性記憶裝置包含:複數個第1配線(wiring line)10,其等分別於X方向延伸;複數個第2配線20,其等分別於Y方向延伸;及複數個記憶胞30,其等連接於複數個第1配線10與複數個第2配線20之間。另,X方向、Y方向及Z方向係相互交叉之方向。更具體而言,X方向、Y方向及Z方向係相互正交之方向。The magnetic memory device shown in FIG1 includes: a plurality of first wiring lines 10, each extending in the X direction; a plurality of second wiring lines 20, each extending in the Y direction; and a plurality of memory cells 30, each connected between the plurality of first wiring lines 10 and the plurality of second wiring lines 20. In addition, the X direction, the Y direction, and the Z direction are mutually intersecting directions. More specifically, the X direction, the Y direction, and the Z direction are mutually orthogonal directions.

各記憶胞30包含:磁阻效應元件40;及選擇器(開關元件)50,其設置於磁阻效應元件40之下層側且相對於磁阻效應元件40串聯連接。Each memory cell 30 includes a magnetoresistive element 40 and a selector (switch element) 50 disposed on the lower layer side of the magnetoresistive element 40 and connected in series with the magnetoresistive element 40.

第1配線10設置於選擇器50之下層側,與選擇器50電性連接。第2配線20設置於磁阻效應元件40之上層側,與磁阻效應元件40電性連接。第1配線10及第2配線20之一者對應於字元線,第1配線10及第2配線20之另一者對應於位元線。The first wiring 10 is provided on the lower layer side of the selector 50 and is electrically connected to the selector 50. The second wiring 20 is provided on the upper layer side of the magnetoresistive effect element 40 and is electrically connected to the magnetoresistive effect element 40. One of the first wiring 10 and the second wiring 20 corresponds to a word line, and the other of the first wiring 10 and the second wiring 20 corresponds to a bit line.

圖2係模式性顯示記憶胞30之詳細構成之剖視圖。FIG. 2 is a cross-sectional view schematically showing the detailed structure of the memory cell 30.

如圖2所示,記憶胞30包含磁阻效應元件40、選擇器(開關元件)50、硬罩層60及保護絕緣層70。As shown in FIG. 2 , the memory cell 30 includes a magnetoresistive element 40 , a selector (switch element) 50 , a hard mask layer 60 , and a protective insulating layer 70 .

圖3係模式性顯示磁阻效應元件40之基本構成之剖視圖。FIG. 3 is a cross-sectional view schematically showing the basic structure of the magnetoresistive effect element 40 .

磁阻效應元件40係MTJ(Magnetic Tunnel Junction:磁性隧道接面)元件,包含記憶層(storage layer)(第1磁性層)41、參照層(reference layer)(第2磁性層)42、隧道障壁層(非磁性層(nonmagnetic layer))43、下部電極(bottom electrode)44及上部電極(top electrode)45。The magnetoresistive element 40 is an MTJ (Magnetic Tunnel Junction) element, including a storage layer (first magnetic layer) 41 , a reference layer (second magnetic layer) 42 , a tunnel barrier layer (nonmagnetic layer) 43 , a bottom electrode 44 , and a top electrode 45 .

記憶層41係具有可變之磁化方向(variable magnetization direction)之強磁性層(ferromagnetic layer)。所謂可變之磁化方向意指磁化方向相對於特定之寫入電流變化。參照層42係具有固定之磁化方向(fixed magnetization direction)之強磁性層。所謂固定之磁化方向意指磁化方向相對於特定之寫入電流不變。隧道障壁層43係設置於記憶層41與參照層42之間之絕緣層。The memory layer 41 is a ferromagnetic layer with a variable magnetization direction. The variable magnetization direction means that the magnetization direction changes relative to a specific write current. The reference layer 42 is a ferromagnetic layer with a fixed magnetization direction. The fixed magnetization direction means that the magnetization direction does not change relative to a specific write current. The tunnel barrier layer 43 is an insulating layer disposed between the memory layer 41 and the reference layer 42.

於記憶層41之磁化方向與參照層42之磁化方向平行之情形時,磁阻效應元件40係電阻相對較低之低電阻狀態。於記憶層41之磁化方向與參照層42之磁化方向反平行(antiparallel)之情形時,磁阻效應元件40係電阻相對較高之高電阻狀態。因此,磁阻效應元件40可根據電阻狀態記憶2值資料。When the magnetization direction of the memory layer 41 is parallel to the magnetization direction of the reference layer 42, the magnetoresistive element 40 is in a low resistance state with a relatively low resistance. When the magnetization direction of the memory layer 41 is antiparallel to the magnetization direction of the reference layer 42, the magnetoresistive element 40 is in a high resistance state with a relatively high resistance. Therefore, the magnetoresistive element 40 can store binary data according to the resistance state.

又,磁阻效應元件40係STT(Spin Transfer Torque:自旋轉移力矩)型之磁阻效應元件,具有垂直磁化(perpendicular magnetization)。即,記憶層41之磁化方向相對於其膜面垂直,參照層42之磁化方向相對於其膜面垂直。The magnetoresistive element 40 is a STT (Spin Transfer Torque) type magnetoresistive element having perpendicular magnetization, that is, the magnetization direction of the memory layer 41 is perpendicular to the film surface, and the magnetization direction of the reference layer 42 is perpendicular to the film surface.

另,於圖3之例中,雖使用記憶層41位於參照層42之下層側之無底型之磁阻效應元件,但亦可使用記憶層41位於參照層42之上層側之無頂型之磁阻效應元件。In addition, in the example of FIG. 3 , although a bottomless magnetoresistive element in which the memory layer 41 is located on the lower layer side of the reference layer 42 is used, a topless magnetoresistive element in which the memory layer 41 is located on the upper layer side of the reference layer 42 may also be used.

如圖2所示,選擇器50包含下部電極51、上部電極52、及設置於下部電極51與上部電極52之間之選擇器材料層(開關材料層)53。下部電極51與圖1所示之第1配線10電性連接,上部電極52與磁阻效應元件40電性連接。As shown in FIG2 , the selector 50 includes a lower electrode 51, an upper electrode 52, and a selector material layer (switch material layer) 53 disposed between the lower electrode 51 and the upper electrode 52. The lower electrode 51 is electrically connected to the first wiring 10 shown in FIG1 , and the upper electrode 52 is electrically connected to the magnetoresistive element 40.

選擇器50係2端子開關元件,若施加於2端子間(下部電極51與上部電極52之間)之電壓成為閾值電壓以上,則自斷開狀態移行至導通狀態。即,若施加於2端子間之電壓成為閾值電壓以上,則自電性非導通狀態移行至電性導通狀態。The selector 50 is a two-terminal switch element, and when the voltage applied between the two terminals (between the lower electrode 51 and the upper electrode 52) becomes greater than the threshold voltage, the selector 50 changes from the disconnected state to the conductive state. In other words, when the voltage applied between the two terminals becomes greater than the threshold voltage, the selector 50 changes from the electrically non-conductive state to the electrically conductive state.

因此,自第1配線10及第2配線20對記憶胞30施加電壓,若施加於選擇器50之電壓成為閾值電壓以上,則電流流至記憶胞30,可對磁阻效應元件40進行寫入或讀取。Therefore, when a voltage is applied to the memory cell 30 from the first wiring 10 and the second wiring 20 and the voltage applied to the selector 50 becomes equal to or higher than the threshold voltage, a current flows to the memory cell 30 and data can be written or read from the magnetoresistive element 40 .

選擇器50之上部電極52包含:第1部分52a,其由第1材料形成;第2部分52b,其設置於第1部分52a之下層側且由與第1材料不同之第2材料形成;及第3部分52c,其設置於第2部分52b之下層側且由與第2材料不同之第3材料形成。即,於第1部分52a與第3部分52c之間設置有第2部分52b。另,亦可將選擇器50之上部電極52作為磁阻效應元件之下部電極44共用。The upper electrode 52 of the selector 50 includes: a first portion 52a, which is formed of a first material; a second portion 52b, which is disposed on the lower layer side of the first portion 52a and is formed of a second material different from the first material; and a third portion 52c, which is disposed on the lower layer side of the second portion 52b and is formed of a third material different from the second material. That is, the second portion 52b is disposed between the first portion 52a and the third portion 52c. In addition, the upper electrode 52 of the selector 50 may be used in common with the lower electrode 44 of the magnetoresistive element.

第2部分52b之對於IBE(Ion Beam Etching:離子束蝕刻)之蝕刻速率低於第1部分52a之對於IBE之蝕刻速率。具體而言,於形成磁阻效應元件40之圖案時使用之IBE中,對於第2部分52b之蝕刻速率低於對於第1部分52a之蝕刻速率。因IBE係物理性蝕刻,故通常第2部分52b所使用之第2材料之硬度(hardness)高於第1部分52a所使用之第1材料之硬度。The etching rate of the second portion 52b for IBE (Ion Beam Etching) is lower than the etching rate of the first portion 52a for IBE. Specifically, in the IBE used when forming the pattern of the magnetoresistive effect element 40, the etching rate for the second portion 52b is lower than the etching rate for the first portion 52a. Since IBE is physical etching, the hardness of the second material used for the second portion 52b is usually higher than the hardness of the first material used for the first portion 52a.

於第1材料使用含有矽(Si)之材料或含有鉿(Hf)之材料等。即,第1部分52a由Si層(多晶Si層)或Hf層等形成。As the first material, a material containing silicon (Si) or a material containing halogen (Hf) is used. That is, the first portion 52a is formed of a Si layer (polycrystalline Si layer) or a Hf layer.

於第2材料使用含有鉿(Hf)及硼(B)之材料、含有鎢(W)之材料、含有碳(C)之材料或含有鈦(Ti)及氮(N)之材料等。即,第2部分52b由HfB層、W層、C層或TiN層等形成。The second material includes a material containing niobium (Hf) and boron (B), a material containing tungsten (W), a material containing carbon (C), or a material containing titanium (Ti) and nitrogen (N). That is, the second portion 52b is formed of a HfB layer, a W layer, a C layer, or a TiN layer.

於第3材料使用含有鈦(Ti)及氮(N)之材料、含有碳(C)之材料或含有鋁(Al)之材料。即,第3部分52c由TiN層、C層或Al層等形成。The third material is a material containing titanium (Ti) and nitrogen (N), a material containing carbon (C), or a material containing aluminum (Al). That is, the third portion 52c is formed of a TiN layer, a C layer, or an Al layer.

於選擇器材料層53使用含有矽(Si)、氧(O)及砷(As)之材料。具體而言,於選擇器材料層53使用含有As之矽氧化物(SiO 2)等。 A material containing silicon (Si), oxygen (O), and arsenic (As) is used for the selector material layer 53. Specifically, silicon oxide ( SiO2 ) containing As or the like is used for the selector material layer 53.

於選擇器50之下部電極51使用含有鈦(Ti)及氮(N)之TiN層等。A TiN layer containing titanium (Ti) and nitrogen (N) is used as the lower electrode 51 of the selector 50.

硬罩層60係設置於磁阻效應元件40上,作為藉由IBE形成磁阻效應元件40時之蝕刻用掩膜發揮功能者。硬罩層60與圖1所示之第2配線20電性連接。The hard mask layer 60 is disposed on the magnetoresistive element 40 and functions as an etching mask when the magnetoresistive element 40 is formed by IBE. The hard mask layer 60 is electrically connected to the second wiring 20 shown in FIG.

保護絕緣層70例如由含有矽(Si)及氮(N)之矽氮化物形成。保護絕緣層70沿著磁阻效應元件40之側面、選擇器50之上部電極52之第1部分52a之側面及硬罩層60之側面設置,覆蓋磁阻效應元件40之側面、選擇器50之上部電極52之第1部分52a之側面及硬罩層60之側面。The protective insulating layer 70 is formed of, for example, silicon nitride containing silicon (Si) and nitrogen (N). The protective insulating layer 70 is provided along the side surface of the magnetoresistive effect element 40, the side surface of the first portion 52a of the upper electrode 52 of the selector 50, and the side surface of the hard mask layer 60, and covers the side surface of the magnetoresistive effect element 40, the side surface of the first portion 52a of the upper electrode 52 of the selector 50, and the side surface of the hard mask layer 60.

因保護絕緣層70設置於選擇器50之上部電極52之第2部分52b之上層側,故未覆蓋上部電極52之第2部分52b及第3部分52c等之側面。Since the protective insulating layer 70 is disposed on the upper layer side of the second portion 52b of the upper electrode 52 of the selector 50, the side surfaces of the second portion 52b and the third portion 52c of the upper electrode 52 are not covered.

又,保護絕緣層70之下端之位置與上部電極52之第2部分52b之上表面之位置一致。因此,包含於複數個記憶胞30之複數個保護絕緣層70之下端之高度方向之位置一致。Furthermore, the position of the lower end of the protective insulating layer 70 coincides with the position of the upper surface of the second portion 52b of the upper electrode 52. Therefore, the positions of the lower ends of the plurality of protective insulating layers 70 included in the plurality of memory cells 30 in the height direction coincide with each other.

接著,參照圖4~圖7及圖2所示之剖視圖,說明本實施形態之磁性記憶裝置之製造方法。Next, a method for manufacturing the magnetic memory device of this embodiment will be described with reference to FIGS. 4 to 7 and the cross-sectional view shown in FIG. 2 .

首先,如圖4所示,於包含半導體基板(未圖示)等之下部區域(未圖示)上形成積層膜。具體而言,形成下部電極層51p、選擇器材料層53p、上部電極層52p及磁阻效應元件層40p。上部電極層52p包含第1部分層52ap、第2部分層52bp及第3部分層52cp。接著,於磁阻效應元件層40p上形成硬罩層60之圖案。First, as shown in FIG. 4 , a laminate film is formed on a lower region (not shown) including a semiconductor substrate (not shown) and the like. Specifically, a lower electrode layer 51p, a selector material layer 53p, an upper electrode layer 52p, and a magnetoresistive element layer 40p are formed. The upper electrode layer 52p includes a first partial layer 52ap, a second partial layer 52bp, and a third partial layer 52cp. Next, a pattern of a hard mask layer 60 is formed on the magnetoresistive element layer 40p.

接著,如圖5所示,將硬罩層60作為掩膜使用,藉由IBE蝕刻磁阻效應元件層40p及第1部分層52ap。於磁阻效應元件含有鐵(Fe)或鈷(Co)等之磁性元素,由通常之蝕刻方法難以進行準確之蝕刻。因此,使用物理性蝕刻即IBE。於進行IBE時,一面使基板旋轉,一面自傾斜方向照射氬(Ar)離子束。其結果,磁阻效應元件40之側面及第1部分52a之側面傾斜成錐形狀。Next, as shown in FIG5 , the hard mask layer 60 is used as a mask to etch the magnetoresistive element layer 40p and the first portion layer 52ap by IBE. Since the magnetoresistive element contains magnetic elements such as iron (Fe) or cobalt (Co), it is difficult to perform accurate etching by conventional etching methods. Therefore, physical etching, i.e., IBE, is used. When performing IBE, the substrate is rotated while an argon (Ar) ion beam is irradiated from an inclined direction. As a result, the side surfaces of the magnetoresistive element 40 and the first portion 52a are inclined in a cone shape.

如已闡述般,第2部分52b之對於IBE之蝕刻速率低於第1部分52a之對於IBE之蝕刻速率。因此,第2部分層52bp作為IBE之蝕刻擋止件發揮功能,可選擇性地蝕刻磁阻效應元件層40p及第1部分層52ap。As described above, the etching rate of the second portion 52b for IBE is lower than the etching rate of the first portion 52a for IBE. Therefore, the second portion layer 52bp functions as an etching stopper for IBE and can selectively etch the magnetoresistive element layer 40p and the first portion layer 52ap.

接著,如圖6所示,於圖5之步驟所獲得之構造之表面堆積矽氮化物層作為保護絕緣層70。Next, as shown in FIG. 6 , a silicon nitride layer is deposited on the surface of the structure obtained in the step of FIG. 5 as a protective insulating layer 70 .

接著,如圖7所示,藉由RIE(Reactive Ion Etching:反應性離子蝕刻)蝕刻保護絕緣層70、第2部分層52bp及第3部分層52cp。藉此,獲得第2部分52b之圖案及第3部分52c之圖案。Next, as shown in Fig. 7, the protective insulating layer 70, the second portion layer 52bp and the third portion layer 52cp are etched by RIE (Reactive Ion Etching), thereby obtaining the pattern of the second portion 52b and the pattern of the third portion 52c.

再者,如圖2所示,藉由RIE蝕刻選擇器材料層53p及下部電極層51p。藉此,獲得選擇器材料層53之圖案及下部電極51之圖案。2, the selector material layer 53p and the lower electrode layer 51p are etched by RIE, thereby obtaining the pattern of the selector material layer 53 and the pattern of the lower electrode 51.

於圖7及圖2之步驟中,自垂直方向進行RIE。因此,第2部分52b之側面、第3部分52c之側面、選擇器材料層53之側面及下部電極51之側面成為垂直。In the steps of FIG7 and FIG2 , RIE is performed from a vertical direction. Therefore, the side surface of the second portion 52 b, the side surface of the third portion 52 c, the side surface of the selector material layer 53, and the side surface of the lower electrode 51 become vertical.

藉由上述之製造方法,形成如圖2所示之記憶胞30。By the above-mentioned manufacturing method, a memory cell 30 as shown in FIG. 2 is formed.

如以上,於本實施形態中,因選擇器50之上部電極52包含對於IBE之蝕刻速率較低之第2部分52b,故如以下所述,可獲得優異之磁性記憶裝置。As described above, in this embodiment, since the upper electrode 52 of the selector 50 includes the second portion 52b having a lower etching rate for IBE, an excellent magnetic memory device can be obtained as described below.

若假設上部電極52未包含第2部分52b,則於藉由IBE形成磁阻效應元件40之圖案時,有除了上部電極52外亦蝕刻選擇器材料層53之虞。因此,有選擇器材料層53受到IBE損傷,使選擇器50之特性或可靠性降低之虞。If the upper electrode 52 does not include the second portion 52b, when the magnetoresistive element 40 is patterned by IBE, the selector material layer 53 may be etched in addition to the upper electrode 52. Therefore, the selector material layer 53 may be damaged by IBE, and the characteristics or reliability of the selector 50 may be reduced.

於本實施形態中,第2部分52b之對於IBE之蝕刻速率低於第1部分52a之對於IBE之蝕刻速率。因此,於藉由IBE形成磁阻效應元件40之圖案時,第2部分52b作為IBE之蝕刻擋止件發揮功能。其結果,可防止由於IBE導致選擇器材料層53被蝕刻。因此,可抑制對於選擇器材料層53之IBE損傷,可獲得特性及可靠性優異之磁性記憶裝置。In this embodiment, the etching rate of the second portion 52b for IBE is lower than the etching rate of the first portion 52a for IBE. Therefore, when the pattern of the magnetoresistive effect element 40 is formed by IBE, the second portion 52b functions as an etching stopper for IBE. As a result, the selector material layer 53 can be prevented from being etched due to IBE. Therefore, the damage of IBE to the selector material layer 53 can be suppressed, and a magnetic memory device with excellent characteristics and reliability can be obtained.

又,一般而言,有由微影製程之不均引起,於相鄰之記憶胞30間之空間寬度產生不均之情形。若於空間寬度存在不均,則於形成記憶胞30之圖案時亦產生不均。例如,於空間寬度較小之部位,與空間寬度較大之部位相比蝕刻深度變小。因此,於空間寬度較小之部位,產生於相鄰之記憶胞30間無法分離選擇器50之下部電極51等之問題。In general, there is a case where the space width between adjacent memory cells 30 is uneven due to unevenness in the lithography process. If there is unevenness in the space width, unevenness will also occur when forming the pattern of the memory cell 30. For example, the etching depth becomes smaller in a portion with a smaller space width than in a portion with a larger space width. Therefore, in a portion with a smaller space width, a problem such as the lower electrode 51 of the selector 50 cannot be separated between adjacent memory cells 30 occurs.

雖為了確實地分離選擇器50之下部電極51,增加IBE之蝕刻量而增大空間寬度即可,但若增加蝕刻量,則產生對於選擇器材料層53之IBE損傷。Although the IBE etching amount may be increased to enlarge the space width in order to reliably separate the lower electrode 51 of the selector 50, if the etching amount is increased, IBE damage to the selector material layer 53 may occur.

於本實施形態中,將選擇器50之上部電極52之第2部分52b作為蝕刻擋止件使用,藉由IBE形成磁阻效應元件40之圖案及選擇器50之上部電極52之第1部分52a之圖案。藉由將第2部分52b作為蝕刻擋止件使用,可不對選擇器材料層53造成IBE損傷地延長進行IBE之時間。因此,可增大相鄰之記憶胞30間之空間寬度。因此,可確實地分離選擇器50之下部電極51,可獲得特性及可靠性優異之磁性記憶裝置。In this embodiment, the second portion 52b of the upper electrode 52 of the selector 50 is used as an etching stopper, and the pattern of the magnetoresistive element 40 and the pattern of the first portion 52a of the upper electrode 52 of the selector 50 are formed by IBE. By using the second portion 52b as an etching stopper, the time for performing IBE can be extended without causing IBE damage to the selector material layer 53. Therefore, the space width between adjacent memory cells 30 can be increased. Therefore, the lower electrode 51 of the selector 50 can be separated reliably, and a magnetic memory device with excellent characteristics and reliability can be obtained.

接著,參照圖8所示之剖視圖,對實施形態之變化例進行說明。Next, a modified example of the embodiment will be described with reference to the cross-sectional view shown in FIG. 8 .

如圖8所示,於本變化例中,選擇器50之上部電極52由第1部分52a及設置於第1部分52a之下層側之第2部分52b形成,於第2部分52b之下層側未設置第3部分52c。其他基本構成與上述實施形態同樣。As shown in Fig. 8, in this variation, the upper electrode 52 of the selector 50 is formed by the first portion 52a and the second portion 52b provided on the lower layer side of the first portion 52a, and the third portion 52c is not provided on the lower layer side of the second portion 52b. The other basic structures are the same as those of the above-mentioned embodiment.

於本變化例,亦與上述實施形態同樣,於藉由IBE形成磁阻效應元件40之圖案時,第2部分52b作為蝕刻擋止件發揮功能。因此,可獲得與上述實施形態同樣之效果,可獲得優異之磁性記憶裝置。In this variation, similarly to the above-mentioned embodiment, when the pattern of the magnetoresistive element 40 is formed by IBE, the second portion 52b functions as an etching stopper. Therefore, the same effect as the above-mentioned embodiment can be obtained, and an excellent magnetic memory device can be obtained.

雖已說明本發明之若干實施形態,但該等實施形態係作為例而提示者,並未意欲限定發明之範圍。該等新穎之實施形態可由其他各種形態實施,於未脫離發明主旨之範圍內,可進行各種省略、置換、變更。該等實施形態或其變化包含於發明之範圍或主旨,且包含於申請專利範圍所記載之發明及其均等之範圍內。 [相關申請案之參考] Although several embodiments of the present invention have been described, these embodiments are provided as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and changes can be made without departing from the scope of the invention. These embodiments or their variations are included in the scope or subject matter of the invention, and are included in the invention described in the scope of the patent application and its equivalents. [References to related applications]

本申請案享受以日本專利申請案2022-038150號(申請日:2022年3月11日)及美國專利申請案17/943160(申請日:2022年9月12日)為基礎申請案之優先權。本申請案藉由參照該基礎申請案而包含基礎申請案之全部內容。This application claims priority from Japanese Patent Application No. 2022-038150 (filing date: March 11, 2022) and U.S. Patent Application No. 17/943160 (filing date: September 12, 2022). This application incorporates all the contents of the basic application by reference.

10:第1配線 20:第2配線 30:記憶胞 40:磁阻效應元件 40p:磁阻效應元件層 41:記憶層(第1磁性層) 42:參照層(第2磁性層) 43:隧道障壁層(非磁性層) 44:下部電極 45:上部電極 50:選擇器(開關元件) 51:下部電極 51p:下部電極層 52:上部電極 52a:第1部分 52ap:第1部分層 52b:第2部分 52bp:第2部分層 52c:第3部分 52cp:第3部分層 52p:上部電極層 53:選擇器材料層(開關材料層) 53p:選擇器材料層 60:硬罩層 70:保護絕緣層 10: 1st wiring 20: 2nd wiring 30: Memory cell 40: Magnetoresistive element 40p: Magnetoresistive element layer 41: Memory layer (1st magnetic layer) 42: Reference layer (2nd magnetic layer) 43: Tunnel barrier layer (non-magnetic layer) 44: Lower electrode 45: Upper electrode 50: Selector (switch element) 51: Lower electrode 51p: Lower electrode layer 52: Upper electrode 52a: Part 1 52ap: Part 1 layer 52b: Part 2 52bp: Part 2 layer 52c: Part 3 52cp: Part 3 layer 52p: Upper electrode layer 53: Selector material layer (switch material layer) 53p: Selector material layer 60: Hard cover layer 70: Protective insulation layer

圖1係模式性顯示實施形態之磁性記憶裝置之構成之立體圖。 圖2係模式性顯示實施形態之磁性記憶裝置之記憶胞之構成之剖視圖。 圖3係模式性顯示實施形態之磁性記憶裝置之磁阻效應元件之基本構成之剖視圖。 圖4、圖5、圖6及圖7係模式性顯示實施形態之磁性記憶裝置之製造方法之剖視圖。 圖8係模式性顯示實施形態之磁性記憶裝置之記憶胞之變化例之構成之剖視圖。 FIG. 1 is a perspective view schematically showing the structure of a magnetic memory device of an embodiment. FIG. 2 is a cross-sectional view schematically showing the structure of a memory cell of a magnetic memory device of an embodiment. FIG. 3 is a cross-sectional view schematically showing the basic structure of a magnetoresistive element of a magnetic memory device of an embodiment. FIG. 4, FIG. 5, FIG. 6 and FIG. 7 are cross-sectional views schematically showing the manufacturing method of a magnetic memory device of an embodiment. FIG. 8 is a cross-sectional view schematically showing the structure of a variation of a memory cell of a magnetic memory device of an embodiment.

30:記憶胞 30: Memory cells

40:磁阻效應元件 40: Magnetoresistance effect element

50:選擇器(開關元件) 50: Selector (switch element)

51:下部電極 51: Lower electrode

52:上部電極 52: Upper electrode

52a:第1部分 52a: Part 1

52b:第2部分 52b: Part 2

52c:第3部分 52c: Part 3

53:選擇器材料層(開關材料層) 53: Selector material layer (switch material layer)

60:硬罩層 60: Hard cover layer

70:保護絕緣層 70: Protective insulation layer

Claims (11)

一種磁性記憶裝置,其係具備複數個記憶胞者,該複數個記憶胞分別包含:磁阻效應元件;及開關元件,其設置於上述磁阻效應元件之下層側且相對於上述磁阻效應元件串聯連接;且上述開關元件包含:下部電極;上部電極;及開關材料層,其設置於上述下部電極與上述上部電極之間;且上述上部電極包含:第1部分,其由第1材料形成;及第2部分,其設置於上述第1部分之下層側且由與上述第1材料不同之第2材料形成,上述第2部分之對於IBE(Ion Beam Etching)之蝕刻速率低於上述第1部分之對於IBE之蝕刻速率。 A magnetic memory device having a plurality of memory cells, the plurality of memory cells respectively comprising: a magnetoresistance effect element; and a switch element, which is arranged on the lower layer side of the magnetoresistance effect element and connected in series with respect to the magnetoresistance effect element; and the switch element comprises: a lower electrode; an upper electrode; and a switch material layer, which is arranged between the lower electrode and the upper electrode; and the upper electrode comprises: a first part, which is formed of a first material; and a second part, which is arranged on the lower layer side of the first part and is formed of a second material different from the first material, and the etching rate of the second part to IBE (Ion Beam Etching) is lower than the etching rate of the first part to IBE. 如請求項1之磁性記憶裝置,其中上述第2材料之硬度高於上述第1材料之硬度。 A magnetic memory device as claimed in claim 1, wherein the hardness of the second material is higher than the hardness of the first material. 如請求項1之磁性記憶裝置,其中上述第2材料係含有鉿(Hf)及硼(B)之材料、含有鎢(W)之材料、含有碳(C)之材料或含有鈦(Ti)及氮(N)之材料。 A magnetic memory device as claimed in claim 1, wherein the second material is a material containing tungsten (W), a material containing carbon (C), or a material containing titanium (Ti) and nitrogen (N). 如請求項1之磁性記憶裝置,其中上述第1材料係含有矽(Si)之材料或含有鉿(Hf)之材料。 A magnetic memory device as claimed in claim 1, wherein the first material is a material containing silicon (Si) or a material containing halogen (Hf). 如請求項1之磁性記憶裝置,其中 上述上部電極進而包含設置於上述第2部分之下層側且由與上述第2材料不同之第3材料形成之第3部分。 A magnetic memory device as claimed in claim 1, wherein the upper electrode further comprises a third part disposed on the lower layer side of the second part and formed of a third material different from the second material. 如請求項1之磁性記憶裝置,其中上述複數個記憶胞之各者進而包含覆蓋上述磁阻效應元件之側面及上述第1部分之側面之保護絕緣層。 A magnetic memory device as claimed in claim 1, wherein each of the plurality of memory cells further comprises a protective insulating layer covering the side surface of the magnetoresistive element and the side surface of the first part. 如請求項6之磁性記憶裝置,其中上述保護絕緣層未覆蓋上述第2部分之側面。 A magnetic memory device as claimed in claim 6, wherein the protective insulating layer does not cover the side surface of the second part. 如請求項6之磁性記憶裝置,其中上述複數個記憶胞所包含之上述保護絕緣層之下端之高度方向之位置一致。 A magnetic memory device as claimed in claim 6, wherein the height direction positions of the lower ends of the protective insulating layers included in the plurality of memory cells are consistent. 如請求項1之磁性記憶裝置,其中上述第1部分之側面傾斜,上述第2部分之側面垂直。 A magnetic memory device as claimed in claim 1, wherein the side surface of the first part is inclined and the side surface of the second part is vertical. 如請求項1之磁性記憶裝置,其中上述磁阻效應元件包含:第1磁性層;第2磁性層;及非磁性層,其設置於上述第1磁性層與上述第2磁性層之間。 A magnetic memory device as claimed in claim 1, wherein the magnetoresistance effect element comprises: a first magnetic layer; a second magnetic layer; and a non-magnetic layer disposed between the first magnetic layer and the second magnetic layer. 如請求項1之磁性記憶裝置,其進而具備:第1配線,其設置於上述開關元件之下層側,於第1方向延伸,與上 述開關元件電性連接;及第2配線,其設置於上述磁阻效應元件之上層側,於與上述第1方向交叉之第2方向延伸,與上述磁阻效應元件電性連接。 The magnetic memory device of claim 1 further comprises: a first wiring, which is arranged on the lower layer side of the switch element, extends in the first direction, and is electrically connected to the switch element; and a second wiring, which is arranged on the upper layer side of the magnetoresistive effect element, extends in the second direction intersecting the first direction, and is electrically connected to the magnetoresistive effect element.
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TW201121034A (en) * 2009-04-28 2011-06-16 Univ Tohoku Tunneling magnetic resistance effect element, and magnetic memory cell and random access memory using the element
TW201946308A (en) * 2018-04-09 2019-12-01 日商索尼半導體解決方案公司 Switch device, storage device, and memory system
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