TWI876507B - Resonant flyback power converter and switching control circuit and method thereof - Google Patents

Abstract

A resonant flyback power converter includes: a first transistor and a second transistor which are configured to switch a transformer and a resonant capacitor for generating an output voltage; and a switching control circuit generating first and second driving signals for controlling the first and the second transistors. The turn-on of the first driving signal magnetizes the transformer. During a DCM (discontinuous conduction mode) operation, the second driving signal includes a resonant pulse for demagnetizing the transformer and a ZVS (zero voltage switching) pulse for achieving ZVS of the first transistor. The resonant pulse is skipped when the output voltage is lower than a low-voltage threshold.

Description

Resonant flyback power converter and switching control circuit and method thereof

The present invention relates to a resonant flyback power converter, and in particular to a resonant flyback power converter capable of performing a conversion function with high efficiency under light load. The present invention also relates to a resonant flyback power converter with an overcurrent protection function. In addition, the present invention also relates to a switching control circuit and method for controlling a resonant flyback power converter.

FIG. 1 is a schematic diagram of a conventional flyback power converter, wherein FIG. 1 is disclosed in a U.S. patent document, wherein the U.S. patent publication number is US 5,959,850 and the title of the U.S. patent is “asymmetric duty cycle flyback power converter”. The prior art of FIG. 1 is intended to disclose a half-bridge resonant flyback power converter 900 with zero voltage switching (ZVS), wherein the prior art of FIG. 1 can achieve high-efficiency power conversion. The so-called “zero voltage switching” is defined as: “When the cross-voltage (e.g., drain-source voltage) of a transistor is zero or approaches zero, the transistor turns on”. However, the disadvantage of the prior art shown in FIG. 1 is that the power conversion efficiency of the flyback power converter 900 of the prior art shown in FIG. 1 is low when the load is light.

Furthermore, the disadvantage of the prior art shown in FIG. 1 is that the output voltage of the flyback power converter 900 of the prior art cannot be changed. Specifically, if the resonant flyback power converter is to have a variable output voltage, the resonant flyback power converter must detect the demagnetizing time of the transformer in order to control the switching of the transformer.

FIG2A and FIG2B show the corresponding signal operation waveforms when the known half-bridge power converter operates in discontinuous conduction mode (DCM) when the output load is medium load or light load.

FIG2A shows the corresponding signal operation waveform diagram when the known half-bridge power converter operates in the output load as a medium load. When the known half-bridge power converter operates in the discontinuous conduction mode, the off time TOFF refers to: a period starting from the off time point of the second drive signal SL to the on time point of the next second drive signal SL. Once the off time TOFF of the current second drive signal SL ends, the second drive signal SL will be turned on again to enable the upper bridge switch to achieve zero voltage switching. The off time TOFF and the switching period are extended as the output load decreases (in this case, the switching frequency decreases as the output load decreases), thereby saving power.

，此固定的最短導通時間用以將諧振電容20放 電。於期間TW1內，當激磁電流IM降低至零後，此固定的最短導通時間將於第二驅動訊號SL的部分導通期間TW’內，產生一個很大的循環電流， 因此當習知半橋式電源轉換器操作於輸出負載為輕載的狀況時，不幸地，會有很高的電源損失的缺點。 FIG2B shows the corresponding signal operation waveform when the known half-bridge power converter operates under the condition of light output load. The pulse width TX of the first drive signal SH is shortened as the output load of the known half-bridge power converter is reduced. Therefore, the excitation current IM is reduced as the output load of the known half-bridge power converter is reduced. The pulse width TW of the second drive signal SL needs to be maintained at a fixed minimum on-time, wherein this fixed minimum on-time is related to the resonant frequency Fr of the leakage inductance value Lr of the transformer 10 and the capacitance value Cr of the resonant capacitor 20, wherein

, this fixed minimum on-time is used to discharge the resonant capacitor 20. During the period TW1, after the excitation current IM decreases to zero, this fixed minimum on-time will generate a large circulating current during the partial on-time TW' of the second drive signal SL. Therefore, when the conventional half-bridge power converter is operated under the condition of light output load, unfortunately, there will be a disadvantage of high power loss.

Compared to the conventional power converters shown in FIG. 1 , FIG. 2A and FIG. 2B , the present invention provides a resonant flyback power converter having a variety of innovative power-saving control methods, thereby improving the power conversion efficiency when the resonant flyback power converter operates under a light output load or even no output load.

In addition, the present invention also provides a switching control circuit with positive current over-current protection function and negative current over-current protection function.

In one aspect, the present invention provides a resonant flyback power converter, comprising: a first transistor and a second transistor, for forming a half bridge circuit; a transformer and a resonant capacitor, wherein the transformer and the resonant capacitor are connected in series with each other, and the transformer and the resonant capacitor are coupled to the half bridge circuit; and a switching control circuit, for generating a first drive signal and a second drive signal, wherein the first drive signal and the second drive signal are used to control the first transistor and the second transistor, respectively. The second transistor switches the transformer and the resonant capacitor to generate an output voltage; wherein the on-state of the first drive signal magnetizes the transformer, and an on-time of the first drive signal is shortened as an output load of the resonant flyback power converter is reduced; wherein the second drive signal is used to discharge the resonant capacitor, wherein when the resonant flyback power converter operates in a discontinuous conduction mode (discontinuous conduction mode), the resonant capacitor is discharged. When the output voltage is lower than a low voltage threshold, the resonant pulse of the second driving signal is skipped.

In another aspect, the present invention provides a switching control circuit for controlling a resonant flyback power converter, wherein the resonant flyback power converter comprises: a first transistor and a second transistor for forming a half-bridge circuit; a transformer and a resonant capacitor, wherein the transformer and the resonant capacitor are connected in series with each other, and the transformer and the resonant capacitor are coupled to the half-bridge circuit; and a switching control circuit for generating a first drive signal and a second drive signal, wherein the first drive signal and the second drive signal are used to control the first transistor and the second transistor respectively, thereby switching the transformer and the resonant capacitor to generate an output voltage; the switching control circuit comprises : an excitation control circuit for generating a first drive signal for switching the first transistor; and a resonant and zero voltage switching control circuit coupled to the excitation control circuit, wherein the resonant and zero voltage switching control circuit is used to generate a second drive signal for switching the second transistor; wherein the on-state of the first drive signal magnetizes the transformer, and an on-time of the first drive signal is shortened as an output load of the resonant flyback power converter is reduced; wherein the second drive signal is used to discharge the resonant capacitor, wherein when the resonant flyback power converter operates in a discontinuous conduction mode (discontinuous conduction mode), the resonant capacitor is discharged. When the output voltage is lower than a low voltage threshold, the resonant pulse of the second driving signal is skipped.

In another aspect, the present invention provides a method for controlling a resonant flyback power converter, wherein the resonant flyback power converter includes: a first transistor and a second transistor, which are used to form a half-bridge circuit; a transformer and a resonant capacitor, wherein the transformer and the resonant capacitor are connected in series with each other, and the transformer and the resonant capacitor are coupled to the half-bridge circuit; and a switching control circuit, which is used to generate a first drive signal and a second drive signal, wherein the first drive signal and the second drive signal are used to control the first transistor and the second transistor respectively, thereby switching the transformer. and the resonant capacitor to generate an output voltage; the method comprises the following steps: generating a first drive signal to switch the first transistor; and generating a second drive signal to switch the second transistor; wherein the on-state of the first drive signal magnetizes the transformer, and an on-time of the first drive signal is shortened as an output load of the resonant flyback power converter is reduced; wherein the second drive signal is used to discharge the resonant capacitor, wherein when the resonant flyback power converter operates in a discontinuous conduction mode (discontinuous conduction mode), the resonant capacitor is discharged; and the resonant capacitor is discharged when the resonant flyback power converter operates in a discontinuous conduction mode (discontinuous conduction mode). When the output voltage is lower than a low voltage threshold, the resonant pulse of the second driving signal is skipped.

In one embodiment, the resonant pulse is generated after the transformer is magnetized; wherein the zero-voltage switching pulse is generated before the start time of a rising edge of the first drive signal, thereby enabling the first transistor to achieve zero-voltage switching.

In one embodiment, a zero-voltage switching pulse width of the zero-voltage switching pulse is extended as the output load is reduced.

In one embodiment, when the resonant pulse is turned on, the resonant pulse includes a minimum resonant period, wherein the minimum resonant period shortens as the output load decreases.

In one embodiment, after the first driving signal is turned off, the second driving signal is turned on by the resonant pulse, thereby discharging the resonant capacitor, wherein during the resonant pulse, a voltage level of the resonant capacitor is related to a voltage level of the output voltage.

In one embodiment, when the resonant flyback power converter operates in the discontinuous conduction mode, the second drive signal further includes: a turn-off time, wherein the turn-off time of the second drive signal starts at a time point after the transformer is demagnetized, wherein the turn-off time of the second drive signal is extended as the output load of the resonant flyback power converter is reduced; wherein during the turn-off time of the second drive signal, both the first drive signal and the second drive signal are turned off.

In one embodiment, after the first driving signal is turned off, the second driving signal is turned on by the resonant pulse, thereby discharging the resonant capacitor, wherein a voltage level of the resonant capacitor is related to a voltage level of the output voltage.

In one embodiment, when the resonant flyback power converter operates in the discontinuous conduction mode, the second drive signal further includes: a turn-off time, wherein the turn-off time of the second drive signal starts at the time point after the transformer is demagnetized, wherein the turn-off time of the turn-off signal is extended as the output load of the resonant flyback power converter is reduced; wherein during the turn-off time of the second drive signal, both the first drive signal and the second drive signal are turned off.

The following will be explained in detail through specific embodiments to make it easier to understand the purpose, technical content, features and effects of the present invention.

900: Learned resonant flyback power converter

100’: Secondary side controller

200’: Primary side controller

100: Secondary side controller

10: Transformer

2010: Resonance and zero-voltage switching control circuit

2012: Resonance and zero-voltage switching control circuit

2014: Power indication circuit

200, 200A, 200B: primary side controller

201: Excitation control circuit

202A, 202B: Resonance and zero-voltage switching control circuit

206, 209: Excitation control circuit

207: Resonance and zero voltage switching control circuit

210, 310: Delay cell

211: Inverter

215, 312: Flip-flop

216: Or gate

220, 231, 232: Comparator

221: Transistor

223, 224, 225, 51, 52, 60, 65: resistors

230, 320’, 380, 380’, 410, 420: Pulse generator

235: And the gate

240: Upper bridge gate driver

241: Self-promotion Diode

242: Self-lifting capacitor

20: Resonance capacitor

300: Resonant Flyback Power Converter

301: Timing circuit

311, 321, 351, 352: Inverter

313: Or gate

315’: Gate

315:Driver

319: And the gate

320, 331: Current source

322: Transistor

325:Capacitor

330: Adder

330’, 335, 450: Comparator

350, 350’: timer

30: First transistor

35, 45, 75: body diode

435, 445: Capacitor

40: Second transistor

60: Inductive flow measuring element

70: Synchronous rectifier

90: Optocoupler

Cr: resonant capacitor

IM: Magnetizing current

IP: primary side switching current

IPP: Positive current

IPN: Negative current

IS: Secondary side switching current

LX: Switch node

Lr: leakage inductance value

PM: Power indication signal

Pres: Harmonic Pulse

Pzv: Zero voltage switching pulse

SG: drive signal

SH: First drive signal

SH1: First sampling signal

SL: Second drive signal

SH2: Second sampling signal

SOCPp: Overcurrent protection signal

SOCPn: Negative overcurrent protection signal

SOFF: Shutdown signal

SWH: First switching control signal

SWL: Second switching control signal

SZ: Zero voltage switching control signal

t1~t7: time point

T1~T9: Time period

TDS: Demagnetization time

TOFF: Off time

Tres_min: shortest resonance period

Tres_min1: first shortest resonance period

Tres_min2: The second shortest resonance period

TRH, TRL: stagnation period

TX: Pulse width

TW: Harmonic pulse width

TW1, TW2, TW’: period (shortest resonator period)

TWr: Resonance period

TZ: Zero voltage switching pulse width

VAUX: auxiliary signal

VCC: power supply

Vcr: cross voltage

VCOM, VCOM’: feedback signal

VCS: current detection signal

VFB: Feedback signal

VHB: switching node voltage

VIN: Input voltage

VNA: Auxiliary coil signal

VO: output voltage

VT: Threshold voltage

VT1, VT2: Threshold value

VTL: Low Voltage Threshold

VTN: Second current threshold voltage

VTP: First current threshold voltage

VX: reflected voltage

WA: Auxiliary coil

WP: primary coil

WS: Secondary coil

FIG1 is a schematic diagram showing a conventional flyback power converter.

FIG2A and FIG2B show the corresponding signal operation waveforms when the known half-bridge power converter operates in discontinuous conduction mode (DCM) when the output load is medium load or light load.

FIG3 is a schematic diagram showing a resonant flyback power converter according to an embodiment of the present invention.

FIG4 is a signal operation waveform diagram corresponding to the resonant flyback power converter shown in FIG3 according to an embodiment of the present invention.

FIG. 5A and FIG. 5B are respectively corresponding signal operation waveform diagrams of the resonant flyback power converter when the resonant flyback power converter operates under the conditions of medium load and light load respectively according to an embodiment of the present invention.

FIG5C is a diagram showing the signal operation waveform corresponding to the resonant flyback power converter when the resonant flyback power converter operates under the condition of extremely light load or even no output load according to one embodiment of the present invention.

Figures 5D and 5E correspond to Figures 5A and 5B respectively, showing the signal operation waveform diagrams in periodic operation, expanding the visible range of the waveform and using more precise distinction of the operation time segments.

FIG. 6A and FIG. 6B are block diagrams of a primary-side controller 200A and a primary-side controller 200B of a resonant flyback power converter, respectively, according to the second embodiment of the present invention.

FIG. 7 is a schematic diagram showing an excitation control circuit in a resonant flyback power converter according to an embodiment of the present invention.

FIG8 is a schematic diagram showing the resonant and zero-voltage switching control circuit in a resonant flyback power converter according to an embodiment of the present invention.

FIG. 9A shows a resonant flyback power converter operating during transformer excitation according to an embodiment of the present invention, when the primary side switching current is positive.

FIG. 9B shows the state of the resonant flyback power converter operating during the resonant period according to an embodiment of the present invention.

FIG. 10 is a schematic diagram showing an excitation control circuit in a resonant flyback power converter according to an embodiment of the present invention.

FIG. 11 is a schematic diagram showing a resonant and zero-voltage switching control circuit in a resonant flyback power converter according to an embodiment of the present invention.

FIG. 12A is a signal operation waveform diagram corresponding to a resonant flyback power converter according to an embodiment of the present invention.

Figure 12B shows that under periodic operation, the visible range of the waveform in Figure 12A is expanded and a signal operation waveform diagram is used to more precisely distinguish the operation time period.

FIG. 13 is a schematic diagram showing a resonant and zero-voltage switching control circuit in a resonant flyback power converter according to an embodiment of the present invention.

FIG. 14 is a schematic diagram showing a power indication circuit in a resonant flyback power converter according to an embodiment of the present invention.

The diagrams in this invention are schematic, and are mainly intended to show the coupling relationship between the circuits and the relationship between the signal waveforms. The circuits, signal waveforms and frequencies are not drawn to scale.

FIG3 is a schematic diagram showing a resonant flyback power converter according to an embodiment of the present invention. The resonant flyback power converter 300 includes: a first transistor 30 and a second transistor 40, which are used to form a half bridge circuit. The transformer 10 and the resonant capacitor 20 connected in series with each other are coupled to a switching node LX of the half bridge circuit. The transformer 10 includes: a primary winding WP, a secondary winding WS and an auxiliary winding WA. The primary winding WP and the secondary winding WS have a turns ratio of n=Np/Ns, the auxiliary winding WA and the secondary winding WS have a turns ratio of m=Na/Ns, and the auxiliary winding WA and the primary winding WP have a turns ratio of k=Na/Np. It is worth noting that Np, Ns, and Na are the turns of the primary coil WP, secondary coil WS, and auxiliary coil WA, respectively.

The primary side controller 200 generates a first drive signal SH and a second drive signal SL, wherein the drive signal SH and the drive signal SL control the half-bridge circuit to switch the transformer 10, thereby generating an output voltage VO on the secondary side of the transformer 10. The first drive signal SH is used to drive the first transistor 30 to excite the excitation transformer 10. The second drive signal SL turns on the second transistor 40 during the demagnetization time of the transformer 10 and the resonance period of the transformer 10. In one embodiment, the second drive signal SL is also used to turn on the second transistor 40, thereby generating a circulating current through the transformer 10, thereby achieving zero voltage switching of the first transistor 30. The resistor 60 is coupled to the primary winding WP to generate a current sensing signal VCS according to the primary switching current IP of the transformer 10.

In one embodiment, the first drive signal SH and the second drive signal SL are generated according to the feedback signal VFB related to the output power (e.g., output voltage VO) of the resonant flyback power converter 300. In one embodiment, the secondary side controller 100 is coupled to the output voltage VO to generate the feedback signal VFB. In one embodiment, the feedback signal VFB is coupled to the primary side controller 200 via an optical coupler 90 coupled to the secondary side controller 100. The secondary side controller 100 is also used to generate a drive signal SG, wherein the drive signal SG is used to drive the synchronous rectifier 70 during the demagnetization time TDS of the transformer 10. The auxiliary coil WA generates an auxiliary coil signal VNA when the transformer 10 switches. Resistors 51 and 52 are used to attenuate the auxiliary coil signal VNA to generate an auxiliary signal VAUX coupled to the primary-side controller 200.

FIG. 4 is a signal operation waveform diagram corresponding to the resonant flyback power converter shown in FIG. 3 according to an embodiment of the present invention. When the first drive signal SH is turned on (i.e., the first drive signal SH is enabled to, for example, a high level state), the transformer 10 is magnetized, and the excitation current IM is generated. When the first drive signal SH is turned off (i.e., the first drive signal SH is disabled to, for example, a low level state). During the demagnetization time TDS of the transformer 10, the secondary side switching current IS is generated. The resonant pulse Pres of the second drive signal SL has a resonant pulse width TW, and the resonant pulse width TW is related to the demagnetization time TDS of the transformer 10. In one embodiment, the resonant pulse width TW of the second driving signal SL is configured to be equal to or longer than the demagnetization time TDS of the transformer 10, thereby preventing the transformer 10 from operating in a continuous conduction mode (CCM). During the demagnetization time TDS of the transformer 10, a reflected voltage VX is generated in the resonant capacitor 20, wherein the reflected voltage VX can be expressed by the following relationship: VX=VO*Np/Ns

When the first drive signal SH is turned off, the second drive signal SL can be turned on. On the other hand, when the second drive signal SL is turned off, the first drive signal SH can be turned on. Between the first drive signal SH and the second drive signal SL, there may be a stagnation period (e.g., TRH and TRL).

The corresponding operations at different periods as shown in Figure 4 will be explained more clearly in the following paragraphs.

The period from time point t1 to time point t2 represents: the excitation period of the excitation transformer. During the period from time point t1 to time point t2, the first transistor 30 is turned on and the second transistor 40 is turned off. In this case, the current IP in the transformer 10 increases, and the voltage in the resonant capacitor also increases. In other words, the transformer 10 is excited and the resonant capacitor 20 is charged. On the other hand, the synchronous rectifier 70 on the secondary side is turned off, and the body diode 75 of the synchronous rectifier 70 on the secondary side is reverse biased. Therefore, no energy is transferred to the secondary side.

The period from time point t2 to time point t3 refers to the first circulating current period. During the period from time point t2 to time point t3, both the first transistor 30 and the second transistor 40 are turned off. The circulating current of the transformer 10 will drive the switching node voltage VHB of the half-bridge circuit to decrease, thereby turning on the body diode 45 of the second transistor 40. The period from time point t2 to time point t3 is related to the quasi-resonant cycle, which can achieve zero-voltage switching of the second transistor 40. In this case, the voltage of the primary side of the transformer 10 at time point t3 is the same as the voltage of the resonant capacitor 20 at time point t3.

The period from time point t3 to time point t4 refers to a resonance period (positive current). During the period from time point t3 to time point t4, under zero voltage switching, the first transistor 30 is off and the second transistor 40 is on. In this case, the output voltage VO is equal to the quotient obtained by dividing the cross-voltage Vcr of the resonance capacitor 20 by the turns ratio n. Therefore, the current begins to flow through the synchronous rectifier 70 on the secondary side, so that the energy stored in the transformer 10 is transferred to the output terminal to generate the output voltage VO. Since the LC tank is formed by the leakage inductance Lr of the transformer 10 and the resonant capacitance Cr of the resonant capacitor 20, the frequency of the sinusoidal waveform of the secondary switching current IS is determined by the resonant frequency of the leakage inductance Lr and the resonant capacitance Cr. In this way, the primary switching current IP of the transformer 10 is equal to the difference between the excitation current IM and the reflected current of the secondary switching current. In this case, the current in the resonant tank is still positive, wherein the positive current in the resonant tank is mainly driven by the excitation of the magnetizing electromagnet and flows into the resonant capacitor 20.

The period from time point t4 to time point t5 refers to a resonance period (negative current). During the period from time point t4 to time point t5, the first transistor 30 is turned off, while the second transistor 40 is continuously turned on. The energy stored in the transformer 10 is still continuously transferred to the secondary side, but in this case, the current in the resonant cavity is reversely driven by the voltage in the resonant capacitor 20. When the second transistor 40 is continuously turned on, the energy in the resonant capacitor 20 is not only transferred to the secondary side, but also the energy in the resonant capacitor 20 is used to convert the excitation current IM of the transformer 10 into a current with a negative level (for example: a negative current during the period from time point t4 to time point t5).

The period from time point t5 to time point t6 refers to a backward magnetized transformer excitation period (backward magnetized transformer cycle) (negative current). The backward magnetized transformer excitation period starts at the end of the demagnetization time TDS of the transformer 10 and ends at the time when the second transistor 40 turns off. In this case, the resonant capacitor 20 reversely magnetizes the transformer 10 and generates a negative current.

The period from time point t6 to time point t7 is referred to as the second circulating current period. During this period, both the first transistor 30 and the second transistor 40 are turned off. During the period from time point t5 to time point t6, the negative current induced in the transformer 10 will drive the switching node voltage VHB on the switching node LX of the half-bridge circuit to increase until the switching node voltage VHB turns on the body diode 35 of the first transistor 30. In this way, when the first transistor 30 turns on again at time point t7, zero voltage switching can be achieved.

After time point t7, another cycle starts again (i.e., cyclic switching), similar to the period from time point t1 to time point t2, in which the first transistor 30 is turned on at zero voltage switching, while the second transistor 40 is turned off. If the current in the resonant cavity in the transformer 10 is still a negative current, the excess energy stored in the resonant cavity will be returned to the input voltage VIN.

FIG. 5A and FIG. 5B are respectively corresponding signal operation waveforms of the resonant flyback power converter when the resonant flyback power converter is operated under the conditions of medium load and light load, respectively, according to an embodiment of the present invention. Please refer to FIG. 5A. The off time TOFF of the second drive signal SL starts at the off time point of the second drive signal SL and ends at the next on time point of the second drive signal SL, wherein once the timer 350 (as shown in FIG. 8 ) ends, the second drive signal SL will turn on. In one embodiment, the off time TOFF of the second drive signal SL is extended as the output load of the resonant flyback power converter 300 is reduced (at this time, the switching frequency is reduced as the output load of the resonant flyback power converter 300 is reduced), thereby saving power. In one embodiment, under the medium load condition as shown in FIG. 5A , the demagnetization time TDS approaches the resonant period TWr, and the resonant pulse width TW of the second drive signal SL approaches the demagnetization time TDS and the resonant period TWr. It is worth noting that the demagnetization time TDS refers to the period during which the excitation current IM decreases from the peak value of its waveform to zero. The resonance period TWr refers to the resonance period of the resonance capacitor 20 and the leakage inductance Lr of the transformer 10 plus the period when the primary switching current IP decreases from the peak value of its waveform to zero. The resonance pulse width TW refers to the pulse width of the first pulse of the second drive signal SL (i.e., the resonance pulse Pres) after the first drive signal SH is turned off.

In one embodiment, as shown in FIG. 5A , the resonant pulse width TW of the second drive signal SL has a shortest resonant period Tres_min, wherein the shortest resonant period Tres_min is equal to the shortest resonant period TW1 with a fixed period plus the shortest resonant period TW2 with an adjustable period. In this embodiment, as shown in FIG. 5A , since the output load is within the medium load range, the resonant pulse width TW is not limited by the shortest resonant period Tres_min.

In one embodiment, the shortest resonant period TW2 with an adjustable period is shortened as the output load is reduced. Therefore, the shortest resonant period Tres_min is also shortened as the output load is reduced.

Please refer to FIG. 5B. In one embodiment, when the resonant flyback power converter 300 operates under a light output load, the resonant pulse width TW is limited by the shortest resonant period Tres_min. In this embodiment, due to the lighter output load (e.g., lighter output power or lighter output current), the shortest resonant period TW2 with an adjustable period shown in FIG. 5B is adjusted to be shorter than the shortest resonant period TW2 with an adjustable period shown in FIG. 5A. As a result, the resonant pulse width TW shown in FIG. 5B is shorter than the resonant pulse width TW shown in FIG. 5A. Compared with FIG. 5A , the resonant pulse width TW shown in FIG. 5B is shorter to a certain extent, so that the circulating current (i.e., the negative current of the primary switching current IP) is less than that in FIG. 5A , or the duration of the circulating current is shorter than that in FIG. 5A .

From one point of view, the shortest resonant period Tres_min of the second driving signal SL of the present embodiment will not generate a circulating current. Alternatively, after the excitation current is reduced to zero, the shortest resonant period Tres_min of the second driving signal SL of the present embodiment will only generate an extremely low circulating current, thereby being able to significantly reduce the power loss caused when the resonant flyback power converter 300 operates under a light load output load condition.

Please refer to FIG5C. FIG5C is a waveform diagram of a signal operation corresponding to the resonant flyback power converter when the resonant flyback power converter operates under an extremely light load or even without any output load according to an embodiment of the present invention. In one embodiment, when the resonant flyback power converter 300 operates under an extremely light load or even without any output load, the pulse width TW is limited by the shortest resonant period Tres_min. In this embodiment, as shown in FIG5C , as the output load is continuously reduced, the shortest resonant period TW2 with an adjustable period is adjusted to zero. Thus, the pulse width TW shown in FIG5C is equal to the shortest resonant period TW1 with a fixed period (ie, Tres_min=TW1+0).

From one point of view, when the resonant flyback power converter 300 operates under a condition where the output load is heavy, when the shortest resonant period TW2 with an adjustable period is not equal to zero, the first shortest resonant period Tres_min1 can be expressed by the following relationship: Tres_min1=TW1+TW2. On the other hand, when the resonant flyback power converter 300 operates under a condition where the output load is light, so that the shortest resonant period TW2 with an adjustable period is equal to zero, the second shortest resonant period Tres_min2 can be expressed by the following relationship: Tres_min2=TW1+0. Based on the above, in this case, the first shortest resonant period Tres_min1 is longer than the second shortest resonant period Tres_min2.

FIG. 5D and FIG. 5E are respectively corresponding signal operation waveforms of the resonant flyback power converter when the resonant flyback power converter operates at a light load and a lighter load, respectively, according to an embodiment of the present invention. From another perspective, in the case of periodic switching, the visible range of the waveforms of FIG. 5B and FIG. 5C is expanded and redrawn as FIG. 5D and FIG. 5E, respectively. From one perspective, the switching cycle may include the first to seventh time segments T1~T7 in sequence as shown in the figure, and the operation details are described as follows.

In a first time segment T1, the first drive signal SH is in an off state, and the second drive signal SL is in an on state. In the first time segment T1, the transformer 10 is reversely excited so that the excitation current IM of the transformer 10 and the primary switching current IP are accumulated into a circulating current with a negative value, wherein the on state of the second drive signal SL in the first time segment T1 corresponds to a zero voltage pulse Pzv.

Then, in a second time period T2, which can be regarded as the dead time between the second drive signal SL and the first drive signal SH, the first drive signal SH and the second drive signal SL are both in the off state, and the switching node LX is charged by the circulating current to reduce a drain-source voltage of the first transistor 30.

Then, in a third time period T3, the first drive signal SH is in the on state to achieve zero voltage switching and to excite the transformer 10, and the second drive signal SL is in the off state. Since both embodiments operate in DCM, the peak value of the excitation current IM is related to the load. Therefore, the third time period T3 is shortened as the output load of the resonant flyback power converter is reduced; then, in a fourth time period T4, the first drive signal SH and the second drive signal SL are both in the off state, which can be regarded as the dead time between the first drive signal SH and the second drive signal SL to avoid the first transistor 30 and the second transistor 40 from generating a short-circuit current.

Then, in a fifth time segment T5, the first drive signal SH is in an off state, and the second drive signal SL is in an on state, wherein the transformer 10 is demagnetized, and at the end of the fifth time segment T5, the primary switching current IP (i.e., the current of the primary winding of the transformer 10) drops to 0.

Then, in a sixth time segment T6, the first drive signal SH continues to be in the off state, the second drive signal SL continues to be in the on state, the resonant capacitor 20 resonates with the transformer 10, and in at least a portion of the sixth time segment T6, the primary switching current IP accumulates to a negative resonant current, thus operating in a resonant flyback conversion mode. In addition, at the end of the sixth time segment T6, the magnetizing current accumulates to 0.

Then, in a seventh time segment T7 (roughly corresponding to the aforementioned off time TOFF), the first drive signal SH and the second drive signal SL are both in an off state, and the excitation current IM is maintained at 0 (i.e., DCM state). In one embodiment, as described above, the off time TOFF (seventh time segment T7) is extended as the output load of the resonant flyback power converter 300 is reduced.

It should be noted that in this embodiment, since the operation is in DCM, in the resonant flyback conversion mode, the time lengths of the first to seventh time segments T1~T7 are not 0.

The conduction state of the second driving signal SL in the fifth time segment T5 and the sixth time segment T6 corresponds to the aforementioned resonant pulse Pres having a resonant pulse width TW, wherein the resonant pulse width TW corresponds to the sum of the fifth time segment T5 and the sixth time segment T6, wherein the resonant pulse width TW shortens as the output load is reduced, so as to reduce the absolute value of the resonant current accumulated as a negative value, thereby reducing the power loss of the resonant flyback power converter.

In order to make the conduction time of the second transistor 40 long enough to complete the demagnetization of the transformer, and because the required demagnetization time is related to the load, in one embodiment, the resonance pulse width TW needs to be greater than or equal to a lower limit time period, wherein the lower limit time period shortens as the output load is reduced; wherein the lower limit time period is greater than or equal to a minimum lower limit time period. The lower limit time period corresponds to the aforementioned first shortest resonance period Tres_min1=(TW1+TW2), and the shortest lower limit time period corresponds to the aforementioned second shortest resonance period Tres_min2=(TW1).

It should also be noted that, from one point of view, the lower limit time period being greater than or equal to a minimum lower limit time period can ensure that a voltage level of the resonant capacitor 20 is related to a voltage level of the output voltage.

FIG6A and FIG6B are block diagrams of a primary side controller 200A and a primary side controller 200B of a resonant flyback power converter, respectively, according to the second embodiment of the present invention. In one embodiment, as shown in FIG6A , the primary side controller 200A includes: an excitation control circuit 201 and a resonant and zero voltage switching control circuit 202A. The excitation control circuit 201 is used to generate a first drive signal SH according to the current sensing signal VCS, the feedback signal VFB and the signal generated by the resonant and zero voltage switching control circuit 202A. The resonant and zero voltage switching control circuit 202A is used to generate a second drive signal SL according to the signal generated by the excitation control circuit 201. In one embodiment, as shown in FIG. 6B , the primary-side controller 200B includes: an excitation control circuit 201 and a resonance and zero-voltage switching control circuit 202B. In one embodiment, the resonance and zero-voltage switching control circuit 202B is used to generate a second drive signal SL based on the auxiliary signal VAUX.

FIG. 7 is a schematic diagram showing an excitation control circuit 206 for generating a first drive signal SH in a resonant flyback power converter according to an embodiment of the present invention. In one embodiment, a transistor 221 is used to offset a feedback signal VFB to generate a feedback signal VCOM. In one embodiment, the level of the feedback signal VFB is proportional to the level of the output load of the resonant flyback power converter 300. After a delay time provided by a delay cell 210, the falling edge of the zero-voltage switching control signal SZ enables the flip-flop 215, thereby enabling the first drive signal SH, wherein the generation of the zero-voltage switching control signal SZ will be described in detail later. In one embodiment, the delay time provided by the delay element 210 is related to the quasi-resonant delay of zero voltage switching, wherein the quasi-resonant delay is related to the resonance period of the magnetizing inductance of the primary coil WP and the total equivalent parasitic capacitance on the switching node LX. Once the first drive signal SH is turned on, the pulse generator 230 determines the shortest on-time of the first drive signal SH. The resistor 224 and the resistor 225 are used to generate the attenuated feedback signal VCOM'. When the current sensing signal VCS is greater than the attenuated feedback signal VCOM', the comparator 220 is used to reset the flip-flop 215 to turn off the first drive signal SH. The output of the flip-flop 215 (i.e., the first switching control signal SWH) generates the first driving signal SH through the upper bridge gate driver 240. The self-boosting capacitor 242 and the self-boosting diode 241 are used to provide power to the upper bridge gate driver 240.

FIG8 is a schematic diagram showing a resonant and zero voltage switching control circuit 207 in a resonant flyback power converter according to an embodiment of the present invention. The second switching control signal SWL and the zero voltage switching control signal SZ are operated by an OR gate 313 and buffered by a driver 315 to generate a second drive signal SL. The falling edge of the first drive signal SH triggers a flip-flop 312 after a quasi-resonant delay time provided by a delay cell 310, so that the flip-flop 312 enables the second switching control signal SWL. In one embodiment, the delay cell 310 is used to provide a quasi-resonant delay so that the second transistor 40 achieves zero voltage switching. The current source 320, the capacitor 325, the transistor 322, the inverter 321 and the comparator 335 are used to form the timing circuit 301. When the first driving signal SH becomes logic-low, the capacitor 325 starts to be charged through the current source 320. When the voltage level of the capacitor 325 is higher than a threshold voltage VT, the comparator 335 generates a reset signal to reset the flip-flop 312, thereby turning off the second switching control signal SWL, thereby turning off the second transistor 40. In this case, the pulse width of the second switching control signal SWL is determined by the voltage level of the threshold voltage VT, wherein the threshold VT1 and the threshold VT2 are superimposed by the adder 330 to determine the voltage level of the threshold voltage VT (VT=VT1+VT2). The threshold VT1 corresponds to the shortest resonator period TW1 with a fixed period, and the threshold VT2 corresponds to the shortest resonator period TW2 with an adjustable period. In one embodiment, the threshold VT2 is related to the feedback signal VCOM, so that the voltage level of the threshold VT2 decreases as the output load decreases. The threshold VT1 is a fixed value. In this case, the threshold VT1 is used to provide the shortest resonator period TW1 with a fixed period in the second switching control signal SWL to discharge the resonant capacitor 20 at light load.

It is worth noting that in one embodiment, the threshold VT2 is not related to the output load until the output load is lighter than a preset threshold. In other words, in one embodiment, when the output load is heavier than the preset threshold, the shortest resonance period Tres_min is a fixed value.

Please continue to refer to FIG8. Turning off the second switching control signal SWL enables the timer 350 to start timing. The feedback signal VCOM determines the off time TOFF of the timer 350. In one embodiment, since the off time TOFF is inversely proportional to the feedback signal VCOM, the off time TOFF is extended as the output load is reduced. When the timer 350 ends its operation mechanism, the timer 350 enables the pulse generator 380 to generate the zero voltage switching control signal SZ. During the period when the resonant flyback power converter 300 operates in the discontinuous conduction mode (DCM), the zero voltage switching control signal SZ is used to generate a circulating current, thereby enabling the first transistor 30 to achieve zero voltage switching. The pulse width of the zero voltage switching control signal SZ (herein referred to as the zero voltage switching pulse width TZ) is determined by the voltage level of the input voltage VIN, the output voltage VO and the inductance value of the transformer 10.

To summarize, when the resonant flyback power converter 300 operates in the discontinuous conduction mode, the second driving signal SL includes: a resonant pulse Pres having a resonant pulse width TW (wherein the resonant pulse width TW is determined by the second switching control signal SWL) and a zero-voltage switching pulse Pzv having a zero-voltage switching pulse width TZ (wherein the zero-voltage switching pulse width TZ is determined by the zero-voltage switching control signal SZ). The resonant pulse width TW has: a first shortest resonant period Tres_min1=(TW1+TW2) corresponding to a heavy output load and a second shortest resonant period Tres_min2=(TW1) corresponding to a light output load, wherein the second shortest resonant period (TW1) is shorter than the first shortest resonant period (TW1+TW2). In one embodiment, the first shortest resonant period (TW1+TW2) shortens as the output load decreases.

FIG. 9A shows a resonant flyback power converter operating during the transformer excitation period according to an embodiment of the present invention, at which time the primary switching current IP is a positive excitation excitation. FIG. 9A shows a positive current IPP, which is the positive portion of the primary switching current IP. The positive current IPP is generated when the first transistor 30 turns on and the second transistor 40 is off, at which time the resonant flyback power converter 300 operates during the excitation transformer excitation period, wherein the positive current IPP corresponds to the current during the period from “time point t1 to time point t2” shown in FIG. 4 . The positive current IPP excites the transformer 10 and charges the resonant capacitor 20. In this case, if the output terminal of the resonant flyback power converter 300 is short-circuited, the magnetic flux of the transformer 10 will be saturated after a few switching cycles. In this case, the primary winding WP of the transformer 10 will be equivalent to a short circuit, which will cause permanent damage to the first transistor 30. Therefore, when the positive current IPP of the primary switching current IP exceeds a positive over-current threshold, in order to protect the first transistor 30, the present invention needs to perform an over-current protection mechanism for the first transistor 30, that is, the present invention will immediately shut down the first transistor 30.

FIG. 9B shows the resonant flyback power converter operating in the resonant period according to an embodiment of the present invention, when the primary switching current IP is negative. FIG. 9B shows the negative current IPN, which is the negative portion of the primary switching current IP. The negative current IPN is generated when the first transistor 30 is turned off and the second transistor 40 is turned on, when the resonant flyback power converter 300 is operating in the resonant period, wherein the negative current IPN corresponds to the current during the period from “time point t4 to time point t5” shown in FIG. 4 . The energy in the resonant capacitor 20 is transferred to the output end of the resonant flyback power converter 300 through the transformer 10. In this case, if the output end of the resonant flyback power converter 300 is short-circuited, the resonant capacitor 20 will be equivalently short-circuited through the transformer 10, which will cause the second transistor 40 to be permanently damaged. Therefore, when the negative current IPN of the primary switching current IP exceeds a negative over-current threshold, in order to protect the second transistor 40, the present invention needs to implement an over-current protection mechanism for the second transistor 40, that is, the present invention will immediately turn off the second transistor 40.

FIG. 10 is a schematic diagram showing an excitation control circuit 209 for generating a first drive signal SH in a resonant flyback power converter according to an embodiment of the present invention. The excitation control circuit 209 of FIG. 10 is similar to the excitation control circuit 206 of FIG. 7 , except that the excitation control circuit 209 of FIG. 10 further includes a comparator 231 and an AND gate 235 replacing the OR gate 216. The comparator 231 is used to generate a positive over-current protection signal SOCPp, wherein when the level of the current sensing signal VCS exceeds a first current threshold voltage VTP, the positive over-current protection signal SOCPp resets the flip-flop 215 through the AND gate 235, thereby shutting off the first drive signal SH.

FIG. 11 is a schematic diagram showing a resonant and zero voltage switching control circuit 2010 for generating a second drive signal SL in a resonant flyback power converter according to an embodiment of the present invention. The second drive signal SL is composed of a second switching control signal SWL (having a resonant pulse width TW) and a zero voltage switching control signal SZ (having a zero voltage switching pulse width TZ). The second drive signal SL is generated by an OR gate 313 and an AND gate 315', wherein the OR gate 313 and the AND gate 315' are used to process the second switching control signal SWL, the zero voltage switching control signal SZ and the signal SOFF. It is worth noting that the signal SOFF generated by the timer 350' is used to represent the off time TOFF shown in Figures 5A to 5C above. In addition, the signal SOFF generated by the timer 350' is used to ensure that the first drive signal SH (Figure 10) and the second drive signal SL (Figure 11) are both turned off during the off time TOFF.

Please continue to refer to FIG. 11. After a quasi-resonant delay time provided by the delay element (delay cell) 310, the falling edge of the first driving signal SH triggers the flip-flop 312 to enable the second switching control signal SWL. In one embodiment, the delay element 310 is used to provide a quasi-resonant delay so that the second transistor 40 can achieve zero voltage switching. When the second switching control signal SWL is enabled, the pulse generator 320' is used to determine the pulse width (i.e., the resonant pulse width TW) of the second switching control signal SWL according to the level of the feedback signal VCOM. The pulse width (i.e., the resonant pulse width TW) of the second switching control signal SWL is shortened as the output load is reduced. At the end time of the pulse generated by the pulse generator 320', a reset signal is generated to reset the flip-flop 312, thereby turning off the second switching control signal SWL. At this time, the turning off of the second switching control signal SWL corresponds to the start time of the above-mentioned turn-off time TOFF. The current source 331 associated with the resistor 65 (e.g., as shown in FIG. 9B ) provides a bias to the current sensing signal VCS. The comparator 330' is used to receive the current flow detection signal VCS, and to generate a negative over-current protection signal SOCPn when the level of the current flow detection signal VCS exceeds a second current threshold voltage VTN. The negative over-current protection signal SOCPn is used to reset the flip-flop 312, the timer 350' and the pulse generator 380', thereby ensuring that the second drive signal SL is turned off through the gate 315' to achieve negative over-current protection.

In one embodiment, turning off the second switching control signal SWL (i.e., the second switching control signal SWL is at a low level) will cause the timer 350' to start timing to generate a shutdown signal SOFF (which is a low-level true signal). In one embodiment, the off time TOFF of the timer 350' is inversely proportional to the level of the feedback signal VCOM. During the period when the resonant flyback power converter 300 operates in the discontinuous conduction mode, the off time TOFF is extended as the output load is reduced (thereby reducing the switching frequency). Once the timer 350' ends, the timer 350' enables the pulse generator 380' to generate a zero-voltage switching control signal SZ. When the resonant flyback power converter 300 operates in a heavy load state, the off time TOFF of the timer 350' is zero. When the timer 350' is reset by the negative over-current protection signal SOCPn, a preset off time is generated. During the period when the resonant flyback power converter 300 operates in the discontinuous conduction mode, the zero voltage switching control signal SZ is used to generate a circulating current, thereby enabling the first transistor 30 to achieve zero voltage switching.

Please refer back to FIG. 5B . In one embodiment, the pulse width TX of the first drive signal SH is shortened as the output load is reduced. The resonant pulse width TW of the second drive signal SL is also shortened as the pulse width TX of the first drive signal SH is shortened. However, the second drive signal SL still has the shortest on-time, wherein the shortest on-time of the second drive signal SL is used to discharge the resonant capacitor 20. In one embodiment, when the resonant flyback power converter 300 operates in a medium load or light load output state, once the current sensing signal VCS exceeds the second current threshold voltage VTN, the second drive signal SL will be turned off (i.e., the second switching control signal SWL or the zero voltage switching control signal SZ will be turned off). In addition, when the level of the negative current IPN exceeds the negative overcurrent threshold, the first drive signal SH and the second drive signal SL are both turned off for a preset off time.

To summarize the above, the first drive signal SH and the second drive signal SL are used to control the switching of the first transistor 30 and the second transistor 40 respectively. The first transistor 30 and the second transistor 40 form a half-bridge circuit, and the half-bridge circuit switches the transformer 10 through the resonant capacitor 20 and the inductive sensing element 60 to generate the output voltage VO. The conduction state of the first drive signal SH generates a positive current IPP of the primary switching current IP, thereby exciting the transformer 10 and charging the resonant capacitor 20. The conduction state of the second drive signal SL generates a negative current IPN of the primary switching current IP, thereby discharging the resonant capacitor 20. When the level of the positive current IPP exceeds the positive over-current threshold, the first transistor 30 is turned off. When the level of the negative current IPN exceeds the negative over-current threshold, the second transistor 40 is turned off. In one embodiment, the current sensing element 60 is a current sensing resistor, wherein the current sensing resistor is used to detect the level of the positive current IPP of the primary switching current IP and the level of the negative current IPN of the primary switching current IP. The polarities of the positive current IPP and the negative current IPN are opposite to each other. The resistor 65 and the current source 331 are coupled to the current sensing element 60, thereby generating the current sensing signal VCS. The current detection signal VCS is used to compare with the first current threshold voltage VTP or the second current threshold voltage VTN respectively.

FIG. 12A is a waveform diagram of a signal operation corresponding to the resonant flyback power converter 300 when the output load is light and the output voltage is low according to an embodiment of the present invention. In one embodiment, when the output voltage VO is lower than a low voltage threshold, the second drive signal SL is controlled to skip the resonant pulse Pres of the second drive signal SL. In other words, in this case, the resonant flyback power converter 300 will operate in a non-resonant flyback mode, thereby saving more power when the resonant flyback power converter 300 operates under a light load condition.

FIG12B shows a signal operation waveform diagram that expands the visible range of the waveform in FIG12A and uses a more precise distinction of the operation time segment under periodic operation. The waveform in FIG12B is similar to FIG5D, except that, in the embodiment of FIG12B, when the output voltage is lower than a low voltage threshold, the aforementioned resonant pulse Pres in the second drive signal SL is optionally skipped, thereby operating in a non-resonant flyback mode.

Continuing to refer to FIG. 12B, the operations of the first to third time periods T1-T3 can refer to the description of FIG. 5D. Then, as shown in FIG. 12B, in the eighth time period T8, the first drive signal SH and the second drive signal SL are both in the off state, wherein the transformer 10 is demagnetized and the current IP of the primary winding drops to 0 at the end of the eighth time period T8.

Then, in a ninth time segment T9, the first drive signal SH and the second drive signal SL continue to be in the off state, the transformer 10 is demagnetized, the excitation current IM decreases, and at the end of the ninth time segment T9, the excitation current IM accumulates and demagnetizes and decreases to 0. During the ninth time segment T9, the current of the primary winding is maintained at 0.

When the ninth time segment T9 ends, the seventh time segment T7 mentioned above will follow. It should be noted that in the non-resonant feedback mode, the time lengths of the first to third, seventh to ninth time segments (T1~T3, T7~T9) mentioned above are not 0.

From Figure 12B and the above description, it can be seen that in the non-resonant flyback mode, the resonant pulse Pres is skipped, and the zero voltage switching pulse Pzv still exists.

Referring to FIG. 3 and FIG. 12B , the non-resonant flyback mode means that when the output voltage VO is lower than a low voltage threshold, after the pulse of the first drive signal SH turns to a low level (disabled), before the zero voltage pulse Pzv, the second drive signal SL continues to be non-conductive. Therefore, the primary current IP, which is still positive, is reduced to zero by the conduction of the body diode 45 of the second transistor 40. (Eighth time segment T8), due to the unidirectional conduction characteristics of the body diode 45, the primary current IP will not generate a negative resonant current (i.e., the aforementioned circulating current) as the second transistor 40 in FIG. 4 has when the resonant pulse Pres is turned on. Therefore, compared with FIG. 4, the primary current IP and the secondary current IS in FIG. 12B do not have a circulating current with a negative resonant sinusoidal waveform.

On the other hand, from one point of view, in the non-resonant flyback mode, the first transistor 30 and the body diode 45 are switched in an asynchronous switching manner (at least with respect to T3, T8, and T9).

FIG. 13 is a schematic diagram showing a resonant and zero-voltage switching control circuit 2012 in a resonant flyback power converter according to an embodiment of the present invention. The resonant and zero-voltage switching control circuit 2012 is similar to the resonant and zero-voltage switching control circuit 207, except that the second driving signal SL of the embodiment of FIG. 13 is further determined according to the power indication signal PM.

In one embodiment, the second drive signal SL is composed of the second switching control signal SWL and the zero voltage switching control signal SZ. Specifically, the second drive signal SL is generated by the AND gate 319, or the gate 313 and the driver 315. The power indication signal PM is generated to shield the second switching control signal SWL in the second drive signal SL. In one embodiment, the power indication signal PM is generated when the output voltage VO is lower than a low voltage threshold.

In an embodiment where the resonant flyback power converter 300 complies with the Universal Serial Bus Power Delivery (USB PD) specification, the output voltage VO is lower than the low voltage threshold, which indicates that the resonant flyback power converter 300 is operating under a relatively light output load. In this case, when the output voltage VO is lower than the low voltage threshold, the second switching control signal SWL is controlled to be shielded, thereby turning off the second drive signal SL. In this way, the resonant flyback power converter 300 will operate in the non-resonant flyback mode, thereby saving more power.

FIG. 14 is a schematic diagram showing a power indication circuit for generating a power indication signal PM in a resonant flyback power converter according to an embodiment of the present invention. The reflected output voltage a*VO is generated by sampling and maintaining the voltage of the auxiliary signal VAUX. The coefficient "a" can be expressed by the following relationship: a=(R52/(R51+R52))* m

The pulse generator 410 generates a first sampling signal SH1 according to the falling edge of the first driving signal SH. The first sampling signal SH1 is used to sample and maintain the voltage of the auxiliary signal VAUX, and stores the voltage of the auxiliary signal VAUX in the capacitor 435. The pulse generator 420 generates a second sampling signal SH2 according to the end time of the first sampling signal SH1. The second sampling signal SH2 is used to sample and maintain the voltage in the capacitor 435, and stores the voltage in the capacitor 435 in the capacitor 445, thereby generating a reflected output voltage a*VO. The voltage level of the reflected output voltage a*VO is related to the voltage level of the output voltage VO. When the voltage level of the reflected output voltage a*VO is lower than the low voltage threshold VTL, the power indication signal PM is generated by the comparator 450.

The present invention has been described above with reference to the preferred embodiments. However, the above description is only for the purpose of making it easier for those familiar with the art to understand the content of the present invention, and is not intended to limit the scope of the invention. The embodiments described are not limited to single application, but can also be applied in combination. For example, two or more embodiments can be used in combination, and a part of the components in one embodiment can also be used to replace the corresponding components in another embodiment. In addition, under the same spirit of the present invention, those familiar with the present technology can think of various equivalent changes and various combinations. For example, the present invention refers to "processing or calculating or generating an output result according to a certain signal", which is not limited to the signal itself, but also includes, when necessary, converting the signal into voltage-current, current-voltage, and/or ratio, and then processing or calculating the converted signal to generate an output result. It can be seen that under the same spirit of the present invention, those familiar with the present technology can think of various equivalent changes and various combinations, and there are many combinations, which are not listed here one by one. Therefore, the scope of the present invention should cover the above and all other equivalent changes.

IM: Excitation current IP: Primary switching current IS: Secondary switching current Pzv: Zero voltage switching pulse SH: First drive signal SL: Second drive signal TOFF: Off time TX: Pulse width TZ: Zero voltage switching pulse width T1~T3, T7~T9: Time period

Claims (18)

A resonant flyback power converter comprises: a first transistor and a second transistor, coupled to each other at a switching node and used to form a half-bridge circuit; a transformer and a resonant capacitor, wherein a primary winding of the transformer and the resonant capacitor are connected in series to form a resonant slot, and the resonant slot is coupled between the switching node and a ground potential; and A switching control circuit is used to generate a first drive signal and a second drive signal, wherein the first drive signal and the second drive signal are used to control the first transistor and the second transistor respectively, thereby periodically switching the resonant slot based on a switching cycle to generate an output voltage; wherein the first drive signal and the second drive signal are non-complementary to each other, wherein the resonant flyback power converter operates in a discontinuous conduction mode (DCM); Optionally, when the output voltage is higher than a low voltage threshold, the switching control circuit controls the resonant flyback power converter to operate in a resonant flyback conversion mode, wherein in the resonant flyback conversion mode, the switching cycle sequentially includes: In a first time period, the first drive signal is in an off state, and the second drive signal is in an on state, wherein the transformer is reversely excited so that an excitation current of the transformer accumulates to a circulating current with a negative value, wherein the on state of the second drive signal in the first time period corresponds to a zero voltage pulse; Then, in a second time period, the first drive signal and the second drive signal are both in an off state, and the switching node is charged by the circulating current to reduce a drain-source voltage of the first transistor; Then, in a third time period, the first drive signal is in an on state to achieve zero-voltage switching and to excite the transformer, and the second drive signal is in an off state, wherein the third time period is shortened as an output load of the resonant flyback power converter is reduced; Then, in a fourth time period, the first drive signal and the second drive signal are both in an off state to prevent the first transistor and the second transistor from generating a short-circuit current; Then, in a fifth time segment, the first drive signal is in an off state, and the second drive signal is in an on state, wherein the transformer is demagnetized and the current of the primary winding is reduced to 0 at the end of the fifth time segment; Then, in a sixth time segment, the first drive signal continues to be in an off state, and the second drive signal continues to be in an on state, the resonant capacitor resonates with the transformer, and in at least a portion of the sixth time segment, the current of the primary winding is accumulated as a negative resonant current, and at the end of the sixth time segment, the excitation current is accumulated and demagnetized to 0; and Then in a seventh time segment, the first drive signal and the second drive signal are both in the off state, and the excitation current is maintained at 0; wherein the time lengths of the first to seventh time segments are not 0; wherein the second drive signal corresponds to a resonant pulse in the fifth time segment and the sixth time segment; wherein optionally when the output voltage is lower than the low voltage threshold, the switching control circuit controls the resonant flyback power converter to operate in a non-resonant flyback mode, wherein in the non-resonant flyback mode, the switching cycle sequentially includes: the first time segment, the second time segment, the third time segment; Then in an eighth time segment, the first drive signal and the second drive signal are both in the off state, wherein the transformer is demagnetized and the current of the primary winding is reduced to 0 at the end of the eighth time segment; Then in a ninth time segment, the first drive signal and the second drive signal continue to be in the off state, wherein the transformer is demagnetized and the accumulated excitation current is reduced to 0 at the end of the ninth time segment, and the current of the primary winding is maintained at 0; and The seventh time segment; wherein in the non-resonant flyback mode, the resonant pulse is skipped and the zero voltage switching pulse is maintained; In the non-resonant flyback mode, in the eighth time segment, the drain-source channel of the second transistor is not conducting, and a body diode of the second transistor is conducting; In the non-resonant flyback mode, the time lengths of the first to third time segments and the seventh to ninth time segments are not 0. A resonant flyback power converter as described in claim 1, wherein in the resonant flyback conversion mode, the resonant pulse is generated after the transformer is excited; wherein in the resonant flyback conversion mode and the non-resonant flyback mode, the first time segment is generated before the start time of a rising edge of the first drive signal in the third time segment, thereby enabling the first transistor to achieve zero voltage switching. A resonant flyback power converter as described in claim 1, wherein the first time period is extended as the output load is reduced. A resonant flyback power converter as described in claim 1, wherein in the resonant flyback conversion mode, the width of the resonant pulse is greater than or equal to a lower limit time period, wherein the lower limit time period is shortened as the output load is reduced, thereby reducing the absolute value of the circulating current to a negative value. A resonant flyback power converter as described in claim 4, wherein in the resonant flyback conversion mode, the second transistor is turned on by the resonant pulse to discharge the resonant capacitor, wherein the width of the resonant pulse is greater than or equal to the shortest lower limit time period to ensure that a voltage level of the resonant capacitor is related to a voltage level of the output voltage. A resonant flyback power converter as described in claim 1, wherein the seventh time period starts at a point in time after the transformer is demagnetized, and wherein the seventh time period is extended as the output load of the resonant flyback power converter is reduced. A switching control circuit is used to control a resonant flyback power converter, wherein the resonant flyback power converter includes: a first transistor and a second transistor, which are coupled to each other at a switching node and used to form a half bridge circuit; a transformer and a resonant capacitor, wherein a primary winding of the transformer and the resonant capacitor are connected in series to form a resonant slot, and the resonant slot is coupled between the switching node and a ground potential. and a switching control circuit for generating a first drive signal and a second drive signal, wherein the first drive signal and the second drive signal are used to control the first transistor and the second transistor respectively, thereby periodically switching the resonant slot based on a switching cycle to generate an output voltage; wherein the first drive signal and the second drive signal are non-complementary to each other. , wherein the resonant flyback power converter operates in a discontinuous conduction mode (DCM); the switching control circuit comprises: an excitation control circuit for generating a first drive signal to switch the first transistor; and a resonant and zero voltage switching control circuit coupled to the excitation control circuit, wherein the resonant and zero voltage switching control circuit is used to generate a second drive signal to switch the second transistor; Optionally, when the output voltage is higher than a low voltage threshold, the switching control circuit controls the resonant flyback power converter to operate in a resonant flyback conversion mode, wherein in the resonant flyback conversion mode, the switching cycle sequentially includes: In a first time period, the first drive signal is in an off state, and the second drive signal is in an on state, wherein the transformer is reversely excited so that an excitation current of the transformer accumulates to a circulating current with a negative value, wherein the on state of the second drive signal in the first time period corresponds to a zero voltage pulse; Then, in a second time period, the first drive signal and the second drive signal are both in an off state, and the switching node is charged by the circulating current to reduce a drain-source voltage of the first transistor; Then, in a third time period, the first drive signal is in an on state to achieve zero-voltage switching and to excite the transformer, and the second drive signal is in an off state, wherein the third time period is shortened as an output load of the resonant flyback power converter is reduced; Then, in a fourth time period, the first drive signal and the second drive signal are both in an off state to prevent the first transistor and the second transistor from generating a short-circuit current; Then, in a fifth time segment, the first drive signal is in an off state, and the second drive signal is in an on state, wherein the transformer is demagnetized and the current of the primary winding is reduced to 0 at the end of the fifth time segment; Then, in a sixth time segment, the first drive signal continues to be in an off state, and the second drive signal continues to be in an on state, the resonant capacitor resonates with the transformer, and in at least a portion of the sixth time segment, the current of the primary winding is accumulated as a negative resonant current, and at the end of the sixth time segment, the excitation current is accumulated and demagnetized to 0; and Then in a seventh time segment, the first drive signal and the second drive signal are both in the off state, and the excitation current is maintained at 0; wherein the time lengths of the first to seventh time segments are not 0; wherein the second drive signal corresponds to a resonant pulse in the fifth time segment and the sixth time segment; wherein optionally when the output voltage is lower than the low voltage threshold, the switching control circuit controls the resonant flyback power converter to operate in a non-resonant flyback mode, wherein in the non-resonant flyback mode, the switching cycle sequentially includes: the first time segment, the second time segment, the third time segment; Then in an eighth time segment, the first drive signal and the second drive signal are both in the off state, wherein the transformer is demagnetized and the current of the primary winding is reduced to 0 at the end of the eighth time segment; Then in a ninth time segment, the first drive signal and the second drive signal continue to be in the off state, wherein the transformer is demagnetized and the accumulated excitation current is reduced to 0 at the end of the ninth time segment, and the current of the primary winding is maintained at 0; and The seventh time segment; wherein in the non-resonant flyback mode, the resonant pulse is skipped and the zero voltage switching pulse is maintained; In the non-resonant flyback mode, in the eighth time segment, the drain-source channel of the second transistor is not conducting, and a body diode of the second transistor is conducting; In the non-resonant flyback mode, the time lengths of the first to third time segments and the seventh to ninth time segments are not 0. A switching control circuit as described in claim 7, wherein in the resonant flyback conversion mode, the resonant pulse is generated after the transformer is excited; wherein in the resonant flyback conversion mode and the non-resonant flyback mode, the first time segment is generated before the start time of a rising edge of the first drive signal in the third time segment, thereby enabling the first transistor to achieve zero voltage switching. A switching control circuit as described in claim 7, wherein the first time period is extended as the output load is reduced. A switching control circuit as described in claim 7, wherein in the resonant flyback conversion mode, the width of the resonant pulse is greater than or equal to a lower limit time period, wherein the lower limit time period is shortened as the output load is reduced, thereby reducing the absolute value of the circulating current to a negative value. A switching control circuit as described in claim 10, wherein in the resonant flyback conversion mode, the second transistor is turned on by the resonant pulse to discharge the resonant capacitor, wherein the width of the resonant pulse is greater than or equal to the shortest lower limit time period to ensure that a voltage level of the resonant capacitor is related to a voltage level of the output voltage. A switching control circuit as described in claim 7, wherein the seventh time period starts at a point in time after the transformer is demagnetized, and wherein the seventh time period is extended as the output load of the resonant flyback power converter is reduced. A method for controlling a resonant flyback power converter, wherein the resonant flyback power converter comprises: a first transistor and a second transistor, coupled to each other at a switching node and used to form a half bridge circuit; a transformer and a resonant capacitor, wherein the transformer and the resonant capacitor are connected in series to form a resonant tank, and the resonant tank is coupled between the switching node and a ground potential; and A switching control circuit is provided for generating a first driving signal and a second driving signal, wherein the first driving signal and the second driving signal are used to control the first transistor and the second transistor respectively, thereby periodically switching the resonant slot based on all switching cycles to generate an output voltage; wherein the first driving signal and the second driving signal are non-complementary to each other. , wherein the resonant flyback power converter operates in a discontinuous conduction mode (DCM); the method comprises the following steps: generating a first drive signal to switch the first transistor; and generating a second drive signal to switch the second transistor; optionally, when the output voltage is higher than a low voltage threshold, controlling the resonant flyback power converter to operate in a resonant flyback conversion mode, wherein in the resonant flyback conversion mode, the switching cycle sequentially includes: In a first time period, the first drive signal is in an off state, and the second drive signal is in an on state, wherein the transformer is reversely excited so that an excitation current of the transformer accumulates into a circulating current with a negative value, wherein the on state of the second drive signal in the first time period corresponds to a zero voltage pulse; Then in a second time period, the first drive signal and the second drive signal are both in an off state, and the switching node is charged by the circulating current to reduce a drain-source voltage of the first transistor; Then, in a third time period, the first drive signal is in an on state to achieve zero voltage switching and to excite the transformer, and the second drive signal is in an off state, wherein the third time period is shortened as an output load of the resonant flyback power converter is reduced; Then, in a fourth time period, both the first drive signal and the second drive signal are in an off state to prevent the first transistor and the second transistor from generating a short-circuit current; Then, in a fifth time period, the first drive signal is in an off state, and the second drive signal is in an on state, wherein the transformer is demagnetized and the current of the primary winding is reduced to 0 at the end of the fifth time period; Then, in a sixth time segment, the first drive signal continues to be in the off state, the second drive signal continues to be in the on state, the resonant capacitor resonates with the transformer, and in at least a portion of the sixth time segment, the current of the primary winding accumulates to a negative resonant current, and at the end of the sixth time segment, the magnetizing current accumulates to 0; and Then, in a seventh time segment, the first drive signal and the second drive signal are both in the off state, and the magnetizing current remains at 0; Wherein the time lengths of the first to seventh time segments are not 0; Wherein the second drive signal corresponds to a resonant pulse in the fifth time segment and the sixth time segment; Optionally, when the output voltage is lower than the low voltage threshold, the switching control circuit controls the resonant flyback power converter to operate in a non-resonant flyback mode, wherein in the non-resonant flyback mode, the switching cycle includes in sequence: The first time segment, the second time segment, and the third time segment; Then in an eighth time segment, the first drive signal and the second drive signal are both in an off state, wherein the transformer is demagnetized and the current of the primary winding drops to 0 at the end of the eighth time segment; Then, in a ninth time segment, the first drive signal and the second drive signal continue to be in the off state, wherein the transformer is demagnetized and the excitation current accumulates and demagnetizes and drops to 0 at the end of the ninth time segment, and the current of the primary winding is maintained at 0; and the seventh time segment; wherein in the non-resonant flyback mode, the resonant pulse is skipped and the zero voltage switching pulse is maintained; wherein in the non-resonant flyback mode, in the eighth time segment, the drain-source channel of the second transistor is not conducting, and a body diode of the second transistor is conducting; wherein in the non-resonant flyback mode, the time lengths of the first to third time segments and the seventh to ninth time segments are not 0. A method as described in claim 13, wherein in the resonant flyback conversion mode, the resonant pulse is generated after the transformer is magnetized; wherein in the resonant flyback conversion mode and in the non-resonant flyback mode, it is generated before the start time of a rising edge of the first time segment, thereby enabling the first transistor to achieve zero voltage switching. The method of claim 13, wherein a zero-voltage switching pulse width of the first time period is extended as the output load is reduced. A method as described in claim 13, wherein in the resonant flyback conversion mode, the width of the resonant pulse is greater than or equal to a lower limit time period, wherein the lower limit time period is shortened as the output load is reduced, thereby reducing the absolute value of the circulating current which is a negative value. A method as described in claim 13, wherein in the resonant flyback conversion mode, the second transistor is turned on by the resonant pulse to discharge the resonant capacitor, wherein the width of the resonant pulse is greater than or equal to the shortest lower limit time period to ensure that a voltage level of the resonant capacitor is related to a voltage level of the output voltage. The method of claim 13, wherein the seventh time period begins at a point in time after the transformer is demagnetized, and wherein the seventh time period is extended as the output load of the resonant flyback power converter is reduced.

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