TWI875717B - Semiconductor adhesive, method for manufacturing semiconductor device, and semiconductor device - Google Patents

Abstract

A semiconductor adhesive comprises (a) an inorganic filler, wherein the (a) inorganic filler comprises 50% by mass or more of an inorganic filler surface-treated to have a glycidyl group, based on the total amount of the (a) inorganic filler.

Description

Semiconductor adhesive, method for manufacturing semiconductor device, and semiconductor device

The present disclosure relates to a semiconductor adhesive, a method for manufacturing a semiconductor device, and a semiconductor device.

In the past, the wire bonding method using fine metal wires such as gold wires was widely used to connect semiconductor chips to substrates. On the other hand, in order to meet the requirements for higher functionality, higher integration, and higher speed of semiconductor devices, the flip chip connection method (FC (flip chip) connection method) is being promoted, which forms conductive protrusions called bumps on the semiconductor chip or substrate to directly connect the semiconductor chip to the substrate.

As FC connection methods, there are known methods of metal bonding the connection parts using solder, tin, gold, silver, copper, etc., methods of metal bonding the connection parts by applying ultrasonic vibration, methods of maintaining mechanical contact by the shrinkage force of resin, etc. However, from the perspective of the reliability of the connection parts, the method of metal bonding the connection parts using solder, tin, gold, silver, copper, etc. is generally used.

For example, regarding the connection between a semiconductor chip and a substrate, the chip on board (COB) type connection method popularly used in ball grid array (BGA) and chip size package (CSP) is also equivalent to the FC connection method. In addition, the FC connection method is also widely used in the stacked chip (Chip On Chip, COC) type connection method in which a connection portion (bump or wiring) is formed on a semiconductor chip to connect between semiconductor chips, and the chip on wafer (Chip On Wafer, COW) type connection method in which a connection portion (bump or wiring) is formed on a semiconductor wafer to connect between semiconductor chips and semiconductor wafers (for example, refer to patent document 1).

In addition, in the strong demand for further miniaturization, thinning, and high-functionality packaging, chip stacking packaging, stacked packaging (Package On Package, POP), through-silicon via (TSV), etc., which are formed by stacking and multi-leveling the above-mentioned connection methods, have also begun to become widely popular. This stacking and multi-level technology configures semiconductor chips in three dimensions, so it can reduce the package compared to the two-dimensional configuration method. In addition, this stacking and multi-level technology is also effective in improving semiconductor performance, reducing noise, reducing mounting area, and saving power, so it has attracted attention as the next generation of semiconductor wiring technology. [Existing technical literature] [Patent literature]

Patent document 1: Japanese Patent Publication No. 2016-102165

[Problems to be solved by the invention] Flip chip packages, which have advanced in functionality, integration, and cost, are expected to have a wider range of uses and, with this, a larger production volume. When flip chip packages are continuously mass-produced, the semiconductor adhesive used must be continuously supplied, and therefore, the semiconductor adhesive is required to have excellent stability over time. If the semiconductor adhesive has poor stability over time, the viscosity of the semiconductor adhesive will increase when it is left at room temperature, and there is a risk that the mountability during semiconductor device assembly will deteriorate.

Therefore, the purpose of the present disclosure is to provide a semiconductor adhesive that can suppress the viscosity increase after being left at room temperature and is less likely to deteriorate in mounting performance over time during semiconductor device assembly, as well as a method for manufacturing a semiconductor device using the semiconductor adhesive and a semiconductor device. [Means for Solving the Problem]

To achieve the above object, the present disclosure provides a semiconductor adhesive, which contains (a) an inorganic filler, wherein the (a) inorganic filler contains 50% by mass or more of an inorganic filler surface-treated with a glycidyl group, based on the total amount of the (a) inorganic filler. According to the semiconductor adhesive, 50% by mass or more of the total amount of the (a) inorganic filler is an inorganic filler surface-treated with a glycidyl group, thereby suppressing the increase in viscosity due to the influence of moisture brought by moisture absorption during storage at room temperature. For example, in the case of inorganic fillers subjected to surface treatments such as methacrylic acid groups, the surface treatment agent forms hydrogen bonds with water and easily increases viscosity, but in the case of inorganic fillers subjected to surface treatments having glycidyl groups, it is not easy to form hydrogen bonds with water, and thus it is not easy to increase viscosity. In addition, according to the semiconductor adhesive, since the viscosity increase after being left at room temperature can be suppressed, the deterioration of the mountability during the assembly of the semiconductor device over time can be suppressed. In addition, by subjecting the inorganic filler to surface treatments having glycidyl groups, the dispersibility in the semiconductor adhesive is excellent, and the semiconductor adhesive can obtain good adhesion and good insulation reliability.

The semiconductor adhesive may further contain (b) an epoxy resin, (c) a curing agent, and (d) a high molecular weight component having a weight average molecular weight of 10000 or more. In addition, the semiconductor adhesive may further contain (e) a flux.

The semiconductor adhesive may be in the form of a film. In this case, the handleability of the semiconductor adhesive can be improved, thereby improving the workability and productivity during package manufacturing.

In addition, the present disclosure provides a method for manufacturing a semiconductor device, wherein the semiconductor device is a semiconductor device in which the connection parts of a semiconductor chip and a wiring circuit board are electrically connected to each other, or a semiconductor device in which the connection parts of a plurality of semiconductor chips are electrically connected to each other, and the method for manufacturing the semiconductor device includes: using the semiconductor adhesive to seal at least a portion of the connection part. According to the manufacturing method, the semiconductor adhesive used is not likely to increase in viscosity over time, so good mounting properties can be stably obtained.

Furthermore, the present disclosure provides a semiconductor device, which includes: a connection structure formed by electrically connecting the connection parts of a semiconductor chip and a wiring circuit substrate, or a connection structure formed by electrically connecting the connection parts of multiple semiconductor chips, and a bonding material that seals at least a portion of the connection part, wherein the bonding material includes a cured product of the semiconductor adhesive. The semiconductor device has good mountability, and the bonding strength and reliability between the semiconductor chip and the wiring circuit substrate or the semiconductor chip are excellent. [Effect of the invention]

According to the present disclosure, it is possible to provide a semiconductor adhesive that can suppress the viscosity increase after being left at room temperature and is unlikely to deteriorate in mountability over time during semiconductor device assembly, as well as a method for manufacturing a semiconductor device using the semiconductor adhesive and a semiconductor device.

Hereinafter, the preferred embodiments of the present disclosure will be described in detail with reference to the drawings as appropriate. In addition, in the drawings, the same or equivalent parts are marked with the same symbols and repeated descriptions are omitted. In addition, unless otherwise specified, the positional relationships such as up and down, left and right are considered to be based on the positional relationships shown in the drawings. Furthermore, the dimensional ratios in the drawings are not limited to the ratios shown in the drawings.

In this specification, the numerical range represented by "～" indicates a range that includes the numerical values recorded before and after "～" as the minimum and maximum values, respectively. In the numerical range recorded in stages in this specification, the upper limit or lower limit of the numerical range in a certain stage can be arbitrarily combined with the upper limit or lower limit of the numerical range in another stage. In the numerical range recorded in this specification, the upper limit or lower limit of the numerical range can also be replaced by the value shown in the embodiment. The so-called "A or B" only needs to include either A and B, or both. Unless otherwise specified, the materials exemplified in this specification can be used alone or in combination of two or more. In this specification, the so-called "(meth)acrylic acid" refers to acrylic acid or its corresponding methacrylic acid.

<Adhesive for semiconductor> The adhesive for semiconductor of the present embodiment contains (a) an inorganic filler (hereinafter, referred to as "component (a)" as the case may be). The (a) inorganic filler contains 50% by mass or more of an inorganic filler that has been surface-treated to have a glycidyl group, based on the total amount of the (a) inorganic filler. In addition, the adhesive for semiconductor of the present embodiment may contain one or more of (b) an epoxy resin (hereinafter, referred to as "component (b)" as the case may be), (c) a hardener (hereinafter, referred to as "component (c)" as the case may be), and (d) a high molecular weight component having a weight average molecular weight of 10,000 or more (hereinafter, referred to as "component (d)" as the case may be). Furthermore, the semiconductor adhesive of the present embodiment may contain (e) a flux (hereinafter referred to as "component (e)" as the case may be). Each component is described below.

(Component (a): Inorganic filler) Inorganic fillers as component (a) include insulating inorganic fillers, etc. Among them, inorganic fillers with an average particle size of 100 nm or less are more preferred. Materials of insulating inorganic fillers include glass, silica, alumina, silica-alumina, titanium oxide, mica, boron nitride, etc. Among them, silica, alumina, silica-alumina, titanium oxide, boron nitride are preferred, and silica, alumina, and boron nitride are more preferred. The insulating inorganic filler may also be crystal whiskers. Examples of the materials of the crystal whiskers include aluminum borate, aluminum titanate, zinc oxide, calcium silicate, magnesium sulfate, boron nitride, etc. The insulating inorganic filler may be used alone or in combination of two or more.

From the viewpoint of improving dispersibility and adhesion, component (a) is preferably a surface-treated filler. Examples of the surface treatment include glycidyl-based (epoxy-based), amine-based, phenyl-based, phenylamine-based, acrylic-based, and vinyl-based fillers.

As the surface treatment, silane treatment using silane compounds such as epoxysilane, aminosilane, and acrylic silane is preferred from the perspective of ease of surface treatment. As the surface treatment agent, glycidyl, phenylamine, and (meth)acrylic acid compounds are preferred from the perspective of excellent dispersibility and fluidity and further improved adhesion. As the surface treatment agent, glycidyl compounds are preferred from the perspective of suppressing the increase in viscosity of the semiconductor adhesive after being left at room temperature.

In this embodiment, component (a) contains 50% by mass or more of an inorganic filler subjected to a surface treatment having a glycidyl group, based on the total amount of component (a). The surface treatment having a glycidyl group can be performed using a glycidyl-based compound having a structure represented by the following general formula (1) as a surface treatment agent. Thus, the inorganic filler has a structure represented by the following general formula (1) on its surface.

[Chemistry 1] In the formula, R represents a divalent organic group.

The content of the inorganic filler having a surface treatment having a glycidyl group is 50% by mass or more based on the total amount of component (a). From the viewpoint of further suppressing the increase in viscosity of the adhesive for semiconductors after being left at room temperature, it is preferably 60% by mass or more, and more preferably 80% by mass or more. The total amount (100% by mass) of component (a) may be the inorganic filler having a surface treatment having a glycidyl group.

From the viewpoint of improving visibility (transparency), the average particle size of the component (a) is preferably 100 nm or less, and more preferably 60 nm or less. The average particle size of the component (a) can be measured by a laser diffraction particle size distribution analyzer.

In addition, if the average particle size of component (a) exceeds 100 nm, the viscosity of the semiconductor adhesive may become too low due to the large particle size, and after the semiconductor chip is mounted, the resin called fillet may overflow outside the chip. In contrast, if the average particle size of component (a) is 100 nm or less, it is easy to adjust the viscosity of the semiconductor adhesive to a preferred range, and the generation of fillet can be sufficiently suppressed, or the amount of fillet can be sufficiently reduced.

The lower limit of the average particle size of the component (a) is not particularly limited, but from the viewpoint of suppressing the aggregation of the component (a), it may be 1 nm or more, 5 nm or more, or 10 nm or more. When an inorganic filler that has not been subjected to surface treatment is used, for example, there is a risk of aggregation even when the average particle size is about 50 nm, but when an inorganic filler that has been subjected to surface treatment with a glycidyl group is used, the generation of aggregation can be suppressed even when the average particle size is about 50 nm or less.

The component (a) may be used alone or in the form of a mixture of two or more components. The shape of the component (a) is not particularly limited.

The content of component (a) is preferably 10% to 80% by mass, more preferably 15% to 60% by mass, and even more preferably 20% to 50% by mass, based on the total solid content of the semiconductor adhesive. If the content is 10% by mass or more, the adhesion and reflow resistance tend to be further improved, while if it is 80% by mass or less, the decrease in connection reliability due to viscosity increase tends to be suppressed.

The semiconductor adhesive of this embodiment may contain a resin filler. Examples of the resin filler include fillers containing resins such as polyurethane and polyimide. The resin filler has a smaller thermal expansion coefficient than other organic components (epoxy resin and hardener, etc.), and thus has an excellent effect of improving connection reliability. In addition, the viscosity of the semiconductor adhesive can be easily adjusted according to the resin filler. In addition, the resin filler has an excellent function of relieving stress compared to inorganic fillers.

From the viewpoint of insulation reliability, the filler contained in the semiconductor adhesive is preferably insulating. The semiconductor adhesive preferably does not contain conductive metal fillers such as silver fillers and solder fillers. The semiconductor adhesive (circuit connection material) that does not contain conductive fillers (conductive particles) is sometimes also called non-conductive film (Non-Conductive-FILM, NCF) or non-conductive paste (Non-Conductive-Paste, NCP). The semiconductor adhesive of this embodiment can be preferably used as NCF or NCP.

(Component (b): Epoxy resin) The epoxy resin as component (b) includes epoxy resins having two or more epoxy groups in the molecule, such as bisphenol A type epoxy resin, bisphenol F type epoxy resin, naphthalene type epoxy resin, phenol novolac type epoxy resin, cresol novolac type epoxy resin, phenol aralkyl type epoxy resin, biphenyl type epoxy resin, triphenylmethane type epoxy resin, dicyclopentadiene type epoxy resin, various polyfunctional epoxy resins, etc. Component (b) may be used alone or in combination of two or more.

Among epoxy resins, bisphenol A type or bisphenol F type liquid epoxy resins have a 1% thermal weight loss temperature of 250°C or less, so there is a risk of decomposition and generation of volatile components when heated at high temperatures. Therefore, it is preferred to use epoxy resins that are solid at room temperature (1 atmosphere, 25°C). When using liquid epoxy resins, it is preferred to use them in combination with solid epoxy resins.

The weight average molecular weight of the component (b) may be less than 10,000, but is preferably 100 or more and less than 10,000, more preferably 300 or more and 8,000 or less, and further preferably 300 or more and 5,000 or less from the viewpoint of heat resistance.

The content of component (b) is preferably 10% to 50% by mass, more preferably 20% to 45% by mass, and still more preferably 30% to 40% by mass, based on the total solid content of the semiconductor adhesive. If the content of component (b) is 10% by mass or more, the flow of the resin after curing can be easily controlled, and if it is 50% by mass or less, the resin component of the cured product will not be excessive, and the warping of the package can be easily reduced.

The semiconductor adhesive of this embodiment may further contain other thermosetting resins other than the above-mentioned (b) epoxy resin. Examples of other thermosetting resins include phenol resins, imide resins, (meth) acrylic compounds, and the like.

(Component (c): Hardener) As the (c) hardener, there can be listed: phenol resin hardener, acid anhydride hardener, amine hardener, imidazole hardener, and phosphine hardener. If the (c) component contains a phenolic hydroxyl group, an acid anhydride, amine, or imidazole, it is easy to show flux activity that suppresses the formation of an oxide film in the connection part, thereby easily improving the connection reliability and insulation reliability. The following is an explanation of each hardener.

(c-i) Phenolic resin hardeners Phenolic resin hardeners include hardeners having two or more phenolic hydroxyl groups in the molecule, such as phenol novolac resins, cresol novolac resins, phenol aralkyl resins, cresol naphthol formaldehyde condensates, triphenylmethane type multifunctional phenol resins, and various multifunctional phenol resins. Phenolic resin hardeners may be used alone or in combination of two or more.

From the viewpoint of excellent curability, adhesion and storage stability, the equivalent ratio (phenolic hydroxyl group/epoxy group, molar ratio) of the phenol resin curing agent to the component (b) is preferably 0.3 to 1.5, more preferably 0.4 to 1.0, and further preferably 0.5 to 1.0. If the equivalent ratio is 0.3 or more, the curability tends to be improved and the adhesion tends to be improved. If it is 1.5 or less, there will be no excessive unreacted phenolic hydroxyl groups remaining, the water absorption rate is suppressed to a low value, and the insulation reliability tends to be further improved.

(c-ii) Acid anhydride hardener As the acid anhydride hardener, methylcyclohexane tetracarboxylic dianhydride, trimellitic anhydride, pyromellitic anhydride, benzophenone tetracarboxylic dianhydride, ethylene glycol bis(trimellitic anhydride) and the like can be used. The acid anhydride hardener can be used alone or in combination of two or more.

From the viewpoint of excellent curability, adhesion and storage stability, the equivalent ratio (anhydride group/epoxy group, molar ratio) of the acid anhydride curing agent to the component (b) is preferably 0.3 to 1.5, more preferably 0.4 to 1.0, and further preferably 0.5 to 1.0. If the equivalent ratio is 0.3 or more, the curability tends to be improved and the adhesion tends to be improved, and if it is 1.5 or less, there is no excessive residual unreacted acid anhydride, the water absorption is suppressed to a low value, and the insulation reliability tends to be further improved.

(c-iii) Amine hardeners As amine hardeners, dicyandiamide, various amine compounds, etc. can be used.

From the viewpoint of excellent curability, adhesion and storage stability, the equivalent ratio (amine/epoxy, molar ratio) of the amine curing agent to the component (b) is preferably 0.3 to 1.5, more preferably 0.4 to 1.0, and still more preferably 0.5 to 1.0. When the equivalent ratio is 0.3 or more, the curability and adhesion tend to be improved, and when it is 1.5 or less, there is no excessive residual unreacted amine, and the insulation reliability tends to be further improved.

(c-iv) Imidazole hardeners As imidazole hardeners, there are 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-s-triazine, 2,4 -diamino-6-[2'-undecylimidazolyl-(1')]-ethyl-s-triazine, 2,4-diamino-6-[2'-ethyl-4'-methylimidazolyl-(1')]-ethyl-s-triazine, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-s-triazine isocyanuric acid adduct, 2-phenylimidazole isocyanuric acid adduct, 2-phenyl-4,5-dihydroxymethylimidazole, 2-phenyl-4-methyl-5-hydroxymethylimidazole, adducts of epoxy resins and imidazoles, etc. Among them, 1-cyanoethyl-2-undecyl imidazole, 1-cyano-2-phenyl imidazole, 1-cyanoethyl-2-undecyl imidazole trimellitate, 1-cyanoethyl-2-phenyl imidazolium trimellitate, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-homogeneous imidazole are preferred from the viewpoint of superior curability, storage stability and connection reliability. Triazine, 2,4-diamino-6-[2'-ethyl-4'-methylimidazolyl-(1')]-ethyl-s-triazine, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-s-triazine isocyanuric acid adduct, 2-phenylimidazole isocyanuric acid adduct, 2-phenyl-4,5-dihydroxymethylimidazole and 2-phenyl-4-methyl-5-hydroxymethylimidazole. The imidazole-based curing agent may be used alone or in combination of two or more. In addition, these may be microencapsulated as latent curing agents.

The content of the imidazole hardener is preferably 0.1 to 20 parts by mass, more preferably 0.1 to 10 parts by mass, relative to 100 parts by mass of the component (b). If the content of the imidazole hardener is 0.1 parts by mass or more, the hardening property tends to be improved, while if it is 20 parts by mass or less, the adhesive composition does not harden before the metal joint is formed, and poor connection tends to be less likely to occur.

(c-v) Phosphine-based hardeners As phosphine-based hardeners, there are: triphenylphosphine, tetraphenylphosphonium tetraphenylborate, tetraphenylphosphonium tetrakis (4-methylphenyl) borate and tetraphenylphosphonium (4-fluorophenyl) borate.

The content of the phosphine-based hardener is preferably 0.1 to 10 parts by mass, more preferably 0.1 to 5 parts by mass, relative to 100 parts by mass of the component (b). When the content of the phosphine-based hardener is 0.1 parts by mass or more, the hardening property tends to be improved, while when it is 10 parts by mass or less, the semiconductor adhesive does not harden before the metal bond is formed, and poor connection tends to be less likely to occur.

Phenol resin hardeners, acid anhydride hardeners, and amine hardeners may be used alone or in combination of two or more. Imidazole hardeners and phosphine hardeners may be used alone or in combination with phenol resin hardeners, acid anhydride hardeners, or amine hardeners.

As component (c), from the viewpoint of excellent curability, it is preferable to use a phenol resin hardener and an imidazole hardener in combination, an acid anhydride hardener and an imidazole hardener in combination, an amine hardener and an imidazole hardener in combination, or an imidazole hardener alone. If the hardener is used continuously for a short time, productivity is improved, so it is more preferable to use an imidazole hardener alone, which has excellent rapid curability. In this case, if the hardener is used for a short time, volatile components such as low molecular weight components can be suppressed, so the generation of voids can also be easily suppressed.

(Component (d): high molecular weight component with a weight average molecular weight of 10,000 or more) As the high molecular weight component (d) with a weight average molecular weight of 10,000 or more (excluding compounds equivalent to component (b)), there can be listed: phenoxy resin, polyimide resin, polyamide resin, polycarbodiimide resin, cyanate resin, (meth) acrylic resin, polyester resin, polyethylene resin, polyether sulfone resin, polyether Among them, from the viewpoint of excellent heat resistance and film forming property, phenoxy resin, polyimide resin, (meth)acrylic resin, acrylic rubber, cyanate resin, polycarbodiimide resin are preferred, phenoxy resin, polyimide resin, (meth)acrylic resin, acrylic rubber are more preferred, and phenoxy resin is further preferred. Component (d) may be used alone or in the form of a mixture or copolymer of two or more thereof.

The mass ratio of component (d) to component (b) is not particularly limited. From the viewpoint of maintaining a good film shape, the content of component (b) is preferably 0.01 to 5 parts by mass, more preferably 0.05 to 4 parts by mass, and further preferably 0.1 to 3 parts by mass, relative to 1 part by mass of component (d). If the content of component (b) is 0.01 parts by mass or more, there is no reduction in curability or adhesiveness, and if the content is 5 parts by mass or less, there is no film formability or reduction in film formability.

The weight average molecular weight of the component (d) is 10,000 or more in terms of polystyrene conversion, preferably 30,000 or more, more preferably 40,000 or more, and further preferably 50,000 or more in order to exhibit good film forming properties alone. When the weight average molecular weight is 10,000 or more, there is no risk of reduced film forming properties. In this specification, the so-called weight average molecular weight refers to the weight average molecular weight measured by high performance liquid chromatography (C-R4A manufactured by Shimadzu Corporation) in terms of polystyrene conversion.

(Component (e): flux) The semiconductor adhesive may further contain a compound that exhibits flux activity (activity to remove oxides, impurities, etc.), namely, a flux (e). Examples of flux include nitrogen-containing compounds having non-covalent electron pairs (imidazoles, amines, etc.; however, compounds included in component (c) are excluded), carboxylic acids, phenols, and alcohols. In addition, carboxylic acids exhibit a stronger flux activity than alcohols, and are more likely to improve connectivity.

From the viewpoint of solder wettability, the content of the component (e) is preferably 0.2 to 3 mass %, more preferably 0.4 to 1.8 mass %, based on the total solid content of the semiconductor adhesive.

The semiconductor adhesive can further include: ion scavengers, antioxidants, silane coupling agents, titanium coupling agents, leveling agents, etc. These can be used alone or in combination of two or more. The amount of these can be appropriately adjusted in a way that the effect of each additive is exhibited.

The shear viscosity at 80°C when the semiconductor adhesive is made into a film is preferably 4500 Pa·s to 14000 Pa·s, more preferably 5000 Pa·s to 13000 Pa·s, and further preferably 5000 Pa·s to 10000 Pa·s. By making the shear viscosity 4500 Pa·s or more, the generation of filler can be sufficiently suppressed or the amount of filler can be sufficiently reduced. By making the shear viscosity 14000 Pa·s or less, the mountability during semiconductor device assembly can be improved. The shear viscosity of the semiconductor adhesive formed into a film can be measured, for example, using a dynamic shear viscoelasticity measuring device (manufactured by TA Instruments Japan Co., Ltd., trade name "ARES-G2", etc.) at a temperature increase rate of 10°C/min, a measurement temperature range of 30°C to 145°C, and a frequency of 10 Hz. The viscosity value measured by the above method at 80°C can be obtained as the shear viscosity of the semiconductor adhesive at 80°C when formed into a film.

<Method for producing semiconductor adhesive> From the perspective of improving productivity, the semiconductor adhesive of this embodiment is preferably in the form of a film (film-like adhesive). The following describes a method for producing a film-like adhesive.

First, the components (a), (b), (c), (d) and other components as required are added to an organic solvent and dissolved or dispersed by stirring, mixing, kneading, etc. to prepare a resin varnish. Then, the resin varnish is applied to a substrate film subjected to a mold release treatment using a blade coater, a roll coater, an applicator, a die coater, a comma coater, etc., and then the organic solvent is reduced by heating to form a film-like adhesive on the substrate film. Alternatively, a film-like adhesive may be formed on a wafer by spin-coating a resin varnish on a wafer or the like to form a film before reducing an organic solvent by heating, and then drying the solvent.

The organic solvent used in the preparation of the resin varnish preferably has the property of making each component dissolve or disperse uniformly, for example, dimethylformamide, dimethylacetamide, N-methyl-2-pyrrolidone, dimethyl sulfoxide, diethylene glycol dimethyl ether, toluene, benzene, xylene, methyl ethyl ketone, tetrahydrofuran, ethyl solvent, ethyl solvent acetate, butyl solvent, dioxane, cyclohexanone, and ethyl acetate. These organic solvents can be used alone or in combination of two or more. Stirring, mixing and kneading when preparing the resin varnish can be carried out, for example, using a stirrer, a grinder, a three-roller, a ball mill, a bead mill or a homogenizer.

The substrate film is not particularly limited as long as it has heat resistance that can withstand the heating conditions for volatilizing the organic solvent, and examples thereof include polyester film, polypropylene film, polyethylene terephthalate film, polyimide film, polyetherimide film, polyether naphthalate film, methylpentene film, etc. The substrate film is not limited to a single-layer film including one of these films, and may be a multi-layer film including two or more films.

Specifically, the conditions for volatilizing the organic solvent from the resin varnish after coating are preferably heating at 50°C to 200°C for 0.1 to 90 minutes. As long as the porosity and viscosity adjustment after installation are not affected, the organic solvent is preferably volatilized to 1.5% by mass or less.

From the viewpoints of visibility, fluidity, and filling properties, the thickness of the film in the film-like adhesive of the present embodiment is preferably 10 μm to 100 μm, more preferably 20 μm to 50 μm.

<Semiconductor device> The semiconductor adhesive of this embodiment can be preferably used in a semiconductor device, and can be particularly preferably used for sealing the connection portion in a semiconductor device in which the electrodes of the connection portions of a semiconductor chip and a wiring circuit substrate are electrically connected to each other, or in a semiconductor device in which the electrodes of the connection portions of a plurality of semiconductor chips are electrically connected to each other. The following describes a semiconductor device using the semiconductor adhesive of this embodiment. The electrodes of the connection portion in the semiconductor device can be either a metal bond between a bump and a wiring, or a metal bond between bumps. In the semiconductor device, for example, a flip chip connection in which electrical connection is achieved via a semiconductor adhesive can be used.

FIG. 1 (a) and FIG. 1 (b) are schematic cross-sectional views showing an implementation form of a semiconductor device (a COB type connection state of a semiconductor chip and a substrate). As shown in FIG. 1 (a), a first semiconductor device 100 has: a semiconductor chip 10 and a substrate (wiring circuit substrate) 20 facing each other, wiring 15 arranged on the mutually facing surfaces of the semiconductor chip 10 and the substrate 20, respectively, a connection bump 30 connecting the wiring 15 of the semiconductor chip 10 and the substrate 20 to each other, and a bonding material 40 filling the gap between the semiconductor chip 10 and the substrate 20 without a gap. The semiconductor chip 10 and the substrate 20 are connected by flip chip connection through the wiring 15 and the connection bump 30. The wiring 15 and the connection bump 30 are sealed by the bonding material 40 and blocked from the external environment. The adhesive material 40 is a cured product of the semiconductor adhesive of this embodiment.

As shown in FIG. 1( b ), the second semiconductor device 200 includes: a semiconductor chip 10 and a substrate (wiring circuit substrate) 20 facing each other, bumps 32 respectively arranged on the facing surfaces of the semiconductor chip 10 and the substrate 20, and a bonding material 40 seamlessly filled in the gap between the semiconductor chip 10 and the substrate 20. The semiconductor chip 10 and the substrate 20 are connected to each other by the facing bumps 32 and are flip-chip connected. The bumps 32 are sealed by the bonding material 40 and blocked from the external environment.

FIG. 2 (a) and FIG. 2 (b) are schematic cross-sectional views showing another embodiment of the semiconductor device (a COC type connection state between semiconductor chips). As shown in FIG. 2 (a), the third semiconductor device 300 is the same as the first semiconductor device 100 except that the two semiconductor chips 10 are flip-chip connected by wiring 15 and connection bumps 30. As shown in FIG. 2 (b), the fourth semiconductor device 400 is the same as the second semiconductor device 200 except that the two semiconductor chips 10 are flip-chip connected by bumps 32.

The semiconductor chip 10 is not particularly limited, and various semiconductors can be used, such as elemental semiconductors composed of the same type of elements such as silicon and germanium, and compound semiconductors such as gallium-arsenic and indium-phosphorus.

The substrate 20 is not particularly limited as long as it is a wiring circuit substrate, and can be used as follows: a circuit substrate having wiring (wiring pattern) formed by etching away unnecessary parts of a metal layer formed on the surface of an insulating substrate mainly composed of glass epoxy resin, polyimide resin, polyester resin, ceramic, epoxy resin, dimaleimide triazine resin, etc.; a circuit substrate having wiring (wiring pattern) formed on the surface of the insulating substrate by metal plating; a circuit substrate having wiring (wiring pattern) formed by printing a conductive material on the surface of the insulating substrate, etc.

The connection parts such as the wiring 15 and the bump 32 contain gold, silver, copper, solder (main components such as tin-silver, tin-lead, tin-bismuth, tin-copper), nickel, tin, lead, etc. as main components, and may also contain multiple metals.

A metal layer with gold, silver, copper, solder (main components such as tin-silver, tin-lead, tin-bismuth, tin-copper), tin, nickel, etc. as main components may also be formed on the surface of the wiring (wiring pattern). The metal layer may contain only a single component or may contain multiple components. In addition, a structure in which multiple metal layers are stacked may also be formed. Copper and solder are generally used because they are cheap. Furthermore, copper and solder contain oxides, impurities, etc., so the semiconductor adhesive preferably has fluxing activity.

As the material of the conductive protrusion called a bump, gold, silver, copper, solder (main components such as tin-silver, tin-lead, tin-bismuth, tin-copper), tin, nickel, etc. can be used as the main components. It can contain only a single component or multiple components. In addition, it can also be formed in a structure formed by stacking these metals. Bumps can also be formed on semiconductor chips or substrates. Copper and solder are generally used because they are cheap. Furthermore, copper and solder contain oxides, impurities, etc., so it is better for semiconductor adhesives to have flux activity.

In addition, semiconductor devices (packages) such as those shown in FIG. 1 (a), FIG. 1 (b) or FIG. 2 (a), FIG. 2 (b) may be stacked and electrically connected using gold, silver, copper, solder (main components such as tin-silver, tin-lead, tin-bismuth, tin-copper), tin, nickel, etc. For example, as seen in TSV technology, an adhesive may be placed between semiconductor chips to perform flip-chip connection or stacking, forming a hole that penetrates the semiconductor chip and is connected to an electrode on the pattern surface.

FIG3 is a schematic cross-sectional view showing another embodiment of a semiconductor device (a semiconductor chip stacking type (TSV)). As shown in FIG3, in a fifth semiconductor device 500, wiring 15 formed on an interposer 50 is connected to wiring 15 of a semiconductor chip 10 via a connection bump 30, thereby flip-chip connecting the semiconductor chip 10 to the interposer 50. The gap between the semiconductor chip 10 and the interposer 50 is filled with a bonding material 40 without a gap. On the surface of the semiconductor chip 10 opposite to the interposer 50, the semiconductor chip 10 is repeatedly stacked via wiring 15, connection bump 30 and bonding material 40. The wirings 15 on the patterned surfaces of the front and back of the semiconductor chip 10 are connected to each other via the through-electrodes 34 filled in the holes penetrating the inside of the semiconductor chip 10. The through-electrodes 34 can be made of copper, aluminum, or the like.

By using this TSV technology, signals can be obtained from the back side of a semiconductor chip that is not normally used. Furthermore, since the through-electrode 34 is vertically penetrated in the semiconductor chip 10, the distance between the semiconductor chips 10 facing each other or between the semiconductor chip 10 and the interposer 50 can be shortened, thereby achieving flexible connection. The semiconductor adhesive of this embodiment can be preferably used as a sealing material between the semiconductor chips 10 facing each other or between the semiconductor chip 10 and the interposer 50 in this TSV technology.

<Method for manufacturing semiconductor device> The method for manufacturing a semiconductor device of the present embodiment is to connect a semiconductor chip and a wiring circuit board, or a plurality of semiconductor chips to each other using the semiconductor adhesive of the present embodiment. The method for manufacturing a semiconductor device of the present embodiment includes, for example: connecting a semiconductor chip and a wiring circuit board to each other via a semiconductor adhesive, and electrically connecting the respective connecting portions of the semiconductor chip and the wiring circuit board to each other to obtain a semiconductor device; or connecting a plurality of semiconductor chips to each other via a semiconductor adhesive, and electrically connecting the respective connecting portions of the plurality of semiconductor chips to each other to obtain a semiconductor device.

In the method for manufacturing a semiconductor device of this embodiment, the connection parts can be connected to each other by metal bonding. That is, the connection parts of a semiconductor chip and a wiring circuit board can be connected to each other by metal bonding, or the connection parts of a plurality of semiconductor chips can be connected to each other by metal bonding.

As an example of a method for manufacturing a semiconductor device according to the present embodiment, a method for manufacturing a sixth semiconductor device 600 shown in FIG. 4 is described. In the sixth semiconductor device 600, a substrate (e.g., a glass epoxy substrate) 60 having wiring (copper wiring) 15 and a semiconductor chip 10 having wiring (e.g., a copper pillar, a copper post) 15 are connected to each other via a bonding material 40. The wiring 15 of the semiconductor chip 10 and the wiring 15 of the substrate 60 are electrically connected by a connection bump (solder bump) 30. On the surface of the substrate 60 where the wiring 15 is formed, a solder resist 70 is arranged outside the formation position of the connection bump 30.

In the manufacturing method of the sixth semiconductor device 600, a semiconductor adhesive (film adhesive, etc.) is first attached to the substrate 60 formed with the solder resist 70. The attachment can be performed by heat pressing, roller lamination, vacuum lamination, etc. The supply area and thickness of the semiconductor adhesive can be appropriately set according to the size of the semiconductor chip 10 or the substrate 60, the bump height, etc. The semiconductor adhesive can be attached to the semiconductor chip 10, or the semiconductor adhesive can be attached to the semiconductor wafer and then diced (dicing) to be singulated into semiconductor chips 10, thereby manufacturing the semiconductor chip 10 attached with the semiconductor adhesive. In this case, if the adhesive for semiconductors has high light transmittance, visibility can be ensured even when covering the alignment mark, so there is no restriction on the attachment range not only on the semiconductor wafer (semiconductor chip) but also on the substrate, and the workability is excellent.

After the semiconductor adhesive is attached to the substrate 60 or the semiconductor chip 10, the connection bumps 30 on the wiring 15 of the semiconductor chip 10 are aligned with the wiring 15 of the substrate 60 using a connection device such as a flip chip bonder. Then, the semiconductor chip 10 and the substrate 60 are pressed while being heated at a temperature above the melting point of the connection bumps 30 (when solder is used in the connection portion, preferably 240°C or above is applied to the solder portion), thereby connecting the semiconductor chip 10 and the substrate 60, and the semiconductor adhesive is hardened, and the gap between the semiconductor chip 10 and the substrate 60 is sealed and filled by the bonding material 40 containing the hardened material of the semiconductor adhesive. The connection load depends on the number of bumps, but it should be set in consideration of absorbing uneven bump heights and controlling bump deformation. From the perspective of improving productivity, the connection time is preferably short. It is preferred to melt the solder to remove oxide films and surface impurities, and form a metal joint at the connection portion.

The so-called short connection time (pressing time) means that the time during which the connection is formed (formal pressing) at a temperature of 240°C or higher (for example, when solder is used) is 10 seconds or less. The connection time is preferably 5 seconds or less, and more preferably 3 seconds or less.

In the manufacturing method of the semiconductor device of this embodiment, temporary fixing (through the state of semiconductor adhesive) can also be performed after alignment, and heat treatment can be performed in a reflow furnace to melt the solder bumps and connect the semiconductor chip to the substrate, thereby manufacturing the semiconductor device. Temporary fixing does not significantly require the formation of metal joints, so compared with the formal compression bonding, it can be low load, short time, and low temperature, resulting in advantages such as improved productivity and prevention of degradation of the connection part. After the semiconductor chip is connected to the substrate, it can also be heated in an oven to further harden the semiconductor adhesive. The heating temperature is a temperature at which the semiconductor adhesive is hardened, preferably a temperature at which it is almost completely hardened. The heating temperature and heating time can be set appropriately.

The method for manufacturing a semiconductor device of the present embodiment may be a method comprising the following steps in sequence: heating and pressurizing a laminated body by clamping it with a pair of opposing temporary pressing members, wherein the laminated body comprises a semiconductor chip; a substrate, another semiconductor chip, or a semiconductor wafer including a portion equivalent to another semiconductor chip; and a semiconductor adhesive ( The method comprises the following steps: a step of temporarily pressing the substrate, other semiconductor chips or semiconductor wafer to the semiconductor chip by placing the connecting portion of the semiconductor chip and the connecting portion of the substrate or other semiconductor chips facing each other (temporary pressing step); and a step of electrically connecting the connecting portion of the semiconductor chip to the connecting portion of the substrate or other semiconductor chips by metal bonding (formal pressing step).

In the manufacturing method, when at least one of the pair of pressing members for temporary pressing used in the temporary pressing step heats and presses the laminate, it is heated to a temperature lower than the melting point of the metal material on the surface of the connection portion forming the semiconductor chip and the melting point of the metal material on the surface of the connection portion forming the substrate or other semiconductor chips.

On the other hand, in the formal pressing step, the laminate is heated to a temperature higher than at least one of the melting point of the metal material forming the surface of the connection portion of the semiconductor chip or the melting point of the metal material forming the surface of the connection portion of the substrate or other semiconductor chip. Here, the formal pressing step can be performed, for example, by the following method.

(First method) The laminate is sandwiched by a pair of pressing members for regular press-bonding that are prepared separately from the pressing members for temporary press-bonding, and is heated and pressurized, whereby the connection portion of the semiconductor chip and the connection portion of the substrate or other semiconductor chip are electrically connected by metal bonding. In this case, when at least one of the pair of pressing members for regular press-bonding heats and presses the laminate, the laminate is heated to a temperature higher than the melting point of the metal material forming the surface of the connection portion of the semiconductor chip or the melting point of the metal material forming the surface of the connection portion of the substrate or other semiconductor chip.

According to the method, by using different pressing members for pressing, the step of temporary pressing at a temperature lower than the melting point of the metal material forming the surface of the connection part and the step of formal pressing at a temperature above the melting point of the metal material forming the surface of the connection part can be shortened. Therefore, compared with pressing with one pressing member for pressing, semiconductor devices can be manufactured with good productivity in a short time. As a result, a large number of highly reliable semiconductor devices can be manufactured in a short time. In the formal pressing step, connections can be made in batches. In the case of batch connection, a larger number of semiconductor chips are pressed in the final press bonding than in the temporary press bonding, so a press bonding member including a large-area press bonding head can be used. If the final press bonding of a plurality of semiconductor chips can be performed in batches to ensure connection, the productivity of semiconductor devices can be improved.

(Second method) By using a platform and a press head facing the platform to clamp a plurality of laminates arranged on the platform or a laminate having a plurality of semiconductor chips, semiconductor wafers and adhesives and a batch connection sheet arranged in a manner covering the laminates, the plurality of laminates are heated and pressurized in batches, thereby electrically connecting the connection portion of the semiconductor chip to the connection portion of a substrate or another semiconductor chip by metal bonding. In this case, at least one of the platform and the press head is heated to a temperature higher than the melting point of the metal material forming the surface of the connection portion of the semiconductor chip or the melting point of the metal material forming the surface of the connection portion of the substrate or another semiconductor chip.

According to the method, when a plurality of semiconductor chips are subjected to formal compression bonding in batches with a plurality of substrates, a plurality of other semiconductor chips or semiconductor wafers, the proportion of semiconductor devices with poor connection can be reduced.

The raw materials of the batch connection sheet are not particularly limited, and examples thereof include polytetrafluoroethylene resin, polyimide resin, phenoxy resin, epoxy resin, polyamide resin, polycarbodiimide resin, cyanate resin, acrylic resin, polyester resin, polyethylene resin, polyether sulfone resin, polyetherimide resin, polyvinyl acetal resin, urethane resin, and acrylic rubber. From the viewpoint of excellent heat resistance and film forming property, the sheet for batch connection may be a sheet containing at least one resin selected from polytetrafluoroethylene resin, polyimide resin, epoxy resin, phenoxy resin, acrylic resin, acrylic rubber, cyanate resin, and polycarbodiimide resin. From the viewpoint of particularly excellent heat resistance and film forming property, the resin of the sheet for batch connection may be a sheet containing at least one resin selected from polytetrafluoroethylene resin, polyimide resin, phenoxy resin, acrylic resin, and acrylic rubber. These resins may be used alone or in combination of two or more.

(Third method) The laminate is heated in a heating furnace or on a heating plate to a temperature higher than the melting point of the metal material forming the surface of the connection portion of the semiconductor chip or the melting point of the metal material forming the surface of the connection portion of the substrate or other semiconductor chip.

In the case of the method, by performing the temporary pressing step and the formal pressing step separately, the time required for heating and cooling the pressing member for temporary pressing can also be shortened. Therefore, compared with pressing using a single pressing member for pressing, semiconductor devices can be manufactured with good productivity in a short time. As a result, a large number of highly reliable semiconductor devices can be manufactured in a short time. In addition, in the method, a plurality of laminates can be heated in batches in a heating furnace or on a heating plate. In this way, semiconductor devices can be manufactured with higher productivity.

In such a manufacturing method in which the temporary pressing step and the final pressing step are performed separately, after the temporary pressing step is performed on a plurality of laminates, the temporary pressing step can be performed on the laminates in batches. However, in this case, it is required that the quality of the laminates that are temporarily pressed first and the laminates that are temporarily pressed last do not differ after the final pressing step. That is, the first laminates that are temporarily pressed are kept in the temporary pressing state for a longer time than the last laminates that are temporarily pressed. Therefore, it is required that the semiconductor adhesive used does not easily increase in viscosity from the beginning to the end of the temporary pressing step. The semiconductor adhesive (film adhesive) of this embodiment can suppress the increase in viscosity over time, and thus can meet the above requirements and can be preferably used in the above manufacturing method. [Example]

The present disclosure is further specifically described below with reference to the following embodiments, but the present disclosure is not limited to these embodiments.

The compounds used in each example and comparative example are as follows. (a) Inorganic filler ・Epoxy surface treated nanosilica filler (an inorganic filler subjected to surface treatment with a glycidyl group, manufactured by Admatechs Co., Ltd., trade name "50 nm SE-AH1", average particle size: about 50 nm, hereinafter referred to as "SE nanosilica") ・Methacrylic acid surface treated nanosilica filler (manufactured by Admatechs Co., Ltd., trade name "50 nm YA050C-HGF", average particle size: about 50 nm, hereinafter referred to as "YA nanosilica")

(b) Epoxy resin ・Trisphenol methane skeleton-containing multifunctional solid epoxy resin (manufactured by Mitsubishi Chemical Co., Ltd., trade name "EP1032H60", hereinafter referred to as "EP1032") ・Flexible epoxy resin (manufactured by Mitsubishi Chemical Co., Ltd., trade name "YL7175", hereinafter referred to as "YL7175")

(c) Hardener ・2,4-Diamino-6-[2'-methylimidazole-(1')]-ethyl-s-triazine isocyanuric acid adduct (manufactured by Shikoku Chemical Industries, Ltd., trade name "2MAOK-PW", hereinafter referred to as "2MAOK")

(d) High molecular weight component with a weight average molecular weight of 10,000 or more ・Acrylic resin (manufactured by Kuraray Co., Ltd., trade name "Kurarity LA4285", Mw/Mn=1.28, weight average molecular weight Mw: 80,000, hereinafter referred to as "LA4285")

(e) Flux ・Glutaric acid (manufactured by Sigma Aldrich Co., Ltd., Japan, melting point: about 97°C)

<Preparation of film-like adhesive> (Example 1) 12.4 g of epoxy resin "EP1032", 0.72 g of epoxy resin "YL7175", 0.9 g of hardener "2MAOK", 1.2 g of glutaric acid, 33.9 g of inorganic filler "SE nanosilica", 6.0 g of acrylic resin "LA4285", and cyclohexanone (an amount such that the solid content in the resin varnish becomes 49% by mass) were added, and 1.0 mm diameter zirconium oxide beads of the same mass as the solid content were added, and stirred for 30 minutes using a bead mill (manufactured by Fritsch Co., Ltd., Japan, planetary micro-pulverizer P-7). Thereafter, the zirconia beads used for stirring were removed by filtration to obtain a resin varnish.

The obtained resin varnish was applied to a base film (manufactured by Teijin DuPont Film Co., Ltd., trade name "Purex A54") using a small precision coating device (manufactured by Ren'ai Seiki Co., Ltd.), and the applied resin varnish was dried (100°C/5 minutes) in a clean oven (manufactured by ESPEC Co., Ltd.) to obtain a film-like adhesive. The thickness was 0.02 mm.

(Example 2) The inorganic filler "SE nanosilica" was reduced to 17 g, and 17 g of the inorganic filler "YA nanosilica" was added. The same process as in Example 1 was followed to prepare a film adhesive.

(Comparative Example 1) Except for removing the inorganic filler "SE nanosilica" and adding 33.9 g of the inorganic filler "YA nanosilica", the same process as in Example 1 was performed to prepare a film-like adhesive.

Table 1 summarizes the formulations of Examples 1 to 2 and Comparative Example 1 (unit: g).

<Evaluation> The following is a method for evaluating the film adhesives obtained in the examples and comparative examples.

(1) Preparation of shear viscosity measurement samples Using a tabletop laminating press (manufactured by Lami Corporation, trade name "HOTDOG GK-13DX"), the prepared film-like adhesive was laminated (laminated) until the total thickness reached 0.4 mm (400 μm), and then cut into pieces with a length of 7.3 mm and a width of 7.3 mm to obtain the measurement sample.

Shear viscosity measurement The shear viscosity of the obtained measurement sample was measured using a dynamic shear viscoelasticity measuring device (manufactured by TA Instruments Japan Co., Ltd., trade name "ARES-G2"). The measurement was carried out under the measurement conditions of a temperature rise rate of 10°C/min, a measurement temperature range of 30°C to 145°C, and a frequency of 10 Hz, and the viscosity value at 80°C was read. The shear viscosity of the measurement sample after being placed at room temperature (23°C, 50%RH) for 4 weeks was measured by the same method. The shear viscosity measurement results before and after being placed at room temperature, and the viscosity increase rate before and after being placed at room temperature are shown in Table 2.

[Table 1] Embodiment 1 Embodiment 2 Comparison Example 1 (a) Filling SE Nanosilica 33.9 17 - YA Nano Silica - 17 33.9 (b) Epoxy EP1032 12.4 12.4 12.4 YL7175 0.72 0.72 0.72 (c) Hardener 2MAOK 0.9 0.9 0.9 (d) High molecular weight components LA4285 6.0 6.0 6.0 (e) Flux Glutaric acid 1.2 1.2 1.2

[Table 2] Embodiment 1 Embodiment 2 Comparison Example 1 Viscosity before standing at room temperature (Pa·s) 8579 11858 9951 Viscosity after standing at room temperature (Pa·s) 9950 12928 17976 Viscosity increase rate (%) 16 9 81

According to the evaluation results in Table 2, it was confirmed that in the film-like adhesives of Example 1 and Example 2, in which the inorganic filler having a surface treatment having a glycidyl group accounted for 50% or more of the total inorganic filler, the viscosity increase rate before and after standing at room temperature was 20% or less, and the viscosity increase over time was suppressed. Since the film-like adhesives of these Examples 1 and Example 2 suppressed the viscosity increase over time, it was not easy to deteriorate the mountability during semiconductor device assembly over time. On the other hand, it was found that in the film-like adhesive of Comparative Example 1, in which the inorganic filler having a surface treatment having a glycidyl group accounted for less than 50% of the total inorganic filler, the viscosity increase rate before and after standing at room temperature was 80% or more, and the viscosity was likely to increase over time.

10: semiconductor chip 15: wiring 20, 60: substrate 30: connection bump 32: bump 34: through electrode 40: bonding material 50: interlayer 70: solder resist 100: semiconductor device/first semiconductor device 200: semiconductor device/second semiconductor device 300: semiconductor device/third semiconductor device 400: semiconductor device/fourth semiconductor device 500: semiconductor device/fifth semiconductor device 600: semiconductor device/sixth semiconductor device

FIG. 1 (a) and FIG. 1 (b) are schematic cross-sectional views showing one embodiment of the semiconductor device disclosed herein. FIG. 2 (a) and FIG. 2 (b) are schematic cross-sectional views showing another embodiment of the semiconductor device disclosed herein. FIG. 3 is a schematic cross-sectional view showing another embodiment of the semiconductor device disclosed herein. FIG. 4 is a schematic cross-sectional view showing another embodiment of the semiconductor device disclosed herein.

10: Semiconductor chip

15: Wiring

20: Substrate

30: Connecting bump

32: Bump

40: Next, the materials

100: Semiconductor device/first semiconductor device

200: Semiconductor device/second semiconductor device

Claims (4)

A semiconductor adhesive, comprising (a) an inorganic filler, (b) an epoxy resin, (c) a hardener, (d) a high molecular weight component with a weight average molecular weight of 10,000 or more, and (e) a flux, wherein the (a) inorganic filler comprises 50% or more of an inorganic filler surface-treated with a glycidyl group based on the total amount of the (a) inorganic filler, and the content of the (a) inorganic filler is 3390/55.12% to 80% by mass based on the total amount of solid components of the semiconductor adhesive, and the average particle size of the (a) inorganic filler is 100 nm or less. The semiconductor adhesive as described in Item 1 of the patent application is in film form. A method for manufacturing a semiconductor device, wherein the semiconductor device is a semiconductor device in which the connection parts of a semiconductor chip and a wiring circuit substrate are electrically connected to each other, or a semiconductor device in which the connection parts of multiple semiconductor chips are electrically connected to each other, and the method for manufacturing the semiconductor device comprises: using a semiconductor adhesive as described in item 1 or 2 of the patent application scope to seal at least a part of the connection part. A semiconductor device, comprising: a connection structure formed by electrically connecting the connection parts of a semiconductor chip and a wiring circuit substrate, or a connection structure formed by electrically connecting the connection parts of a plurality of semiconductor chips; and a bonding material for sealing at least a portion of the connection part, wherein the bonding material comprises a cured product of a semiconductor bonding agent as described in item 1 or 2 of the patent application scope.

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