TWI872460B - Method for manufacturing circuit unit with coplanar structure - Google Patents

Abstract

The present invention mainly discloses a method for manufacturing a circuit unit with a coplanar structure, which mainly utilizes evaporation technology, photolithography technology, self-assembled single layer technology, adhesive plate imprinting technology, and spin coating technology to manufacture a plurality of electronic components with a coplanar structure on a substrate, so that at least two of the electronic components form a circuit unit. For example, a diode and a capacitor are manufactured on the substrate to form a rectifier, or two diodes and two capacitors are manufactured to form a double voltage rectifier. The manufacturing method of the present invention has the following advantages: high yield, good stability, low equipment cost, and suitability for large-scale mass production.

Description

Method for manufacturing circuit unit with coplanar structure

The present invention relates to the related technical field of electronic circuits used for wireless communication, and more particularly to a method for manufacturing a circuit unit with a coplanar structure.

In recent years, Radio Frequency Identification (RFID) technology has developed rapidly and is often used in ID cards, access cards, EasyCards, debit cards, credit cards, and electronic tags.

Please refer to FIG. 1, which shows a schematic diagram of a known RFID system. As shown in FIG. 1, the known RFID system 1a mainly includes: a transponder 11a and a reader 12a, wherein the reader 12a is usually integrated into an electronic device 2a. Further, FIG. 2 is a circuit block diagram of the transponder 11a and the reader 12a shown in FIG. 1. As shown in FIG. 1 and FIG. 2, the transponder 11a includes a first antenna 111a and a first control circuit 112a, and the control circuit 112a includes: a first capacitor C1a, a modulator 11Ma, a rectifier unit 11Fa, and a logic circuit unit 11La. On the other hand, the reader 12a includes a second antenna 121a and a second control circuit 122a, and the second control circuit 122a includes: a second capacitor C1a and a reading circuit unit 12Ra.

As shown in Fig. 2, the diode and the capacitor are the main electronic components of the rectifier unit 11Fa, so that the rectifier unit 11Fa can convert an AC signal received by the first antenna 111a into a DC signal. In other words, the performance of the diode and the capacitor directly affects the performance of the answering machine 11a.

It is known that the prior art uses organic materials or inorganic materials to make diodes and capacitors. For example, document 1 proposes an organic diode made of pentacene and a rectifier using the organic diode. On the other hand, document 2 proposes a diode made of C60 and WO ₃ and a rectifier using the diode. Here, document 1 refers to D. Im et al., “Towards gigahertz operation: Ultrafast low turn-on organic diodes and rectifiers based on C60 and tungsten oxide”, Nat. Mater. 4, 597-600 (2005). Furthermore, reference 2 refers to S. Steudel et al., “50MHz rectifier based on an organic diode”, Adv. Mater., vol. 23, no. 5, pp. 644–648 (2011). Furthermore, reference 3 proposes a Schottky diode made of amorphous indium gallium zinc oxide (amorphous IGZO) and a rectifier using the Schottky diode. Here, reference 3 refers to Chasin A et al., “Gigahertz operation of a-IGZO Schottky diodes”, IEEE Trans. Electron. Devices 60, 3407–3412 (2013).

Practical experience shows that the manufacturing methods proposed in Reference 1, Reference 2 and Reference 3 can all be applied to the manufacture of rectifier diodes. However, the conventional manufacturing methods need to be implemented in a vacuum environment, and thus have disadvantages such as low yield and high cost.

From the above description, it can be seen that there is an urgent need in the art for a method for manufacturing a circuit unit with a coplanar structure.

The main purpose of the present invention is to provide a method for manufacturing a circuit unit with a coplanar structure, which mainly utilizes evaporation technology, lithography technology, self-assembled single layer technology, adhesive plate imprinting technology, and spin coating technology to manufacture a plurality of electronic components with a coplanar structure on a substrate, so that at least two of the electronic components form a circuit unit. For example, a diode and a capacitor are manufactured on the substrate to form a rectifier, or two diodes and two capacitors are manufactured to form a double voltage rectifier. The manufacturing method of the present invention has the following advantages: high yield, good stability, low equipment cost, and suitability for large-scale mass production.

To achieve the above-mentioned purpose, the present invention proposes an embodiment of a method for manufacturing a circuit unit with a coplanar structure, which comprises: Forming a first patterned metal layer including at least one first metal plate on a substrate; Covering each of the first metal plates with a self-assembled monolayer (SAM); Forming a metal layer on the substrate and the at least one first metal plate covered with the self-assembled monolayer, and attaching a tape to the metal layer; Tearing the tape in one direction so that the metal layer becomes a second patterned metal layer including at least one second metal plate on the substrate; Removing all the self-assembled monolayers so that there is a gap between any of the first metal plates and a second metal plate adjacent thereto; and A dielectric layer is formed in each of the gaps, so that the dielectric layer and the first metal plate and the second metal plate sandwiching the dielectric layer together constitute an electronic component, and at least two of the electronic components constitute a circuit unit.

In one embodiment, the electronic component is a diode or a capacitor.

In one embodiment, the first patterned metal layer further includes at least one first metal pad and at least one first metal line, and the second patterned metal layer further includes at least one second metal pad and at least one second metal line.

In one embodiment, the first metal plate and the second metal plate are made of a metal material, and the metal material includes at least one metal selected from the group consisting of gold, platinum, aluminum, silver, and copper.

In one embodiment, the dielectric layer includes at least one dielectric material selected from _{the group} consisting of aluminum oxide ( _Al2O3 ), helium oxide ( _HfO2 ), tantalum pentoxide ( _Ta2O5 ), zirconium oxide ( _ZrO2 ), zinc oxide ( _ZnO ), titanium oxide ( _TiO2 ), magnesium oxide (MgO), and titanium nitride (TiN).

In one embodiment, the self-assembled monolayer has a molecular length, so that the size of the gap is equal to the size of the molecular length.

In one embodiment, when all self-assembled monolayers are removed, the substrate is placed in a UV-ozone cleaning machine, and the UV-ozone cleaning machine is operated to provide UV light and ozone to the self-assembled monolayers on the substrate, thereby utilizing UV light and ozone to decompose the self-assembled monolayers, and finally removing the decomposed self-assembled monolayers from the substrate.

In one embodiment, the self-assembled monolayer is made of an organic material, and the molecular structure of the organic material includes a first end with metallophilicity, a second end with metallophobicity, and a middle section connected between the first end and the second end.

In one embodiment, the organic material is any one selected from the group consisting of octadecanethiolate (ODT) and octadecylphosphonic acid (ODPA).

In one embodiment, at least one of the dielectric materials is first dissolved in a solvent to obtain a solution, and then the solution is filled into the gaps. After the solvent evaporates, the dielectric layer is formed in each gap.

In order to enable the Review Committee to further understand the structure, features, purpose, and advantages of the present invention, the following are attached with drawings and detailed descriptions of preferred specific embodiments.

Please refer to FIG3, which is a top view of a circuit unit manufactured by the manufacturing method of the present invention. The present invention mainly discloses a manufacturing method of a circuit unit with a coplanar structure, which mainly utilizes evaporation technology, lithography technology, self-assembled single layer technology, adhesive plate imprinting technology, and spin coating technology to manufacture a plurality of electronic components (1C1, 1C2, 1D1, 1D2) with a coplanar structure on a substrate 10, so that at least two of the electronic components form a circuit unit 1 with a coplanar structure.

FIG4 is a circuit diagram of the circuit unit shown in FIG3. As shown in FIG3 and FIG4, the circuit unit 1 is a double voltage rectifier, which includes: a first diode 1D1, a second diode 1D2, a first capacitor 1C1, and a second capacitor 1C2, wherein the anode end of the first diode 1D1 is coupled to a first metal pad MP1 through a first wire, and the cathode end thereof is coupled to a second metal pad MP2 through a second wire. On the other hand, the cathode end of the second diode 1D2 is coupled to the first metal pad MP1 through a third wire, and the anode end thereof is coupled to a third metal pad MP3 through a fourth wire. On the other hand, to explain in more detail, the first end of the first capacitor 1C1 is coupled to the second wire through a fifth wire, and the second end thereof is coupled to a fourth metal pad MP4 through a sixth wire. Furthermore, the first end of the second capacitor 1C2 is coupled to the sixth wire, and the second end thereof is coupled to the fourth wire through a seventh wire.

As can be seen from FIG. 4 and FIG. 3 , the first diode 1D1 is composed of a first metal plate M1, a dielectric layer DL, and a second metal plate M2 in the same plane, and the second diode 1D2 is also composed of a first metal plate M1, a dielectric layer DL, and a second metal plate M2 in the same plane. On the other hand, the first capacitor 1C1 is composed of a first metal plate M1, a dielectric layer DL, and a second metal plate M2 in the same plane, and the second capacitor 1C2 is also composed of a first metal plate M1, a dielectric layer DL, and a second metal plate M2 in the same plane.

It must be emphasized that the circuit unit 1 manufactured by the manufacturing method of the present invention includes at least one diode and/or capacitor, and is therefore not limited to a double voltage rectifier. The double voltage rectifiers shown in FIG3 and FIG4 are only used as examples to represent the circuit unit 1 with a coplanar structure of the present invention. Next, in the following, it will be explained how to manufacture the circuit unit 1 with a coplanar structure as shown in FIG3 with the aid of a plurality of manufacturing flow charts.

Please refer to FIG. 5, which is a flow chart of a method for manufacturing a circuit unit with a coplanar structure of the present invention. In addition, please refer to FIG. 6A to FIG. 6H, which are flow charts of manufacturing a circuit unit with a coplanar structure of the present invention. As shown in FIG. 5 and FIG. 6A, the manufacturing method first performs step S1: forming a first patterned metal layer 11 including at least one first metal plate M1 on a substrate 10. Specifically, a metal layer can be first deposited on the substrate 10 using an evaporation device, and then the metal layer is processed into the first patterned metal layer 11 using photolithography technology, so that the first patterned metal layer 11 includes at least one first metal plate M1. Furthermore, in practice, the first patterned metal layer 11 may also include at least one first metal pad (as a signal input or output metal electrode) and at least one first metal wire (as a connection between two electronic components). On the other hand, the manufacturing material of the first metal plate M1 may be gold, platinum, aluminum, silver, copper, a composite of any two of the foregoing, or a composite of any two or more of the foregoing.

As shown in FIG. 5 and FIG. 6B , the method flow then performs step S2: a self-assembled monolayer (SAM) 12 is coated on each of the first metal plates M1. It is worth noting that the self-assembled monolayer 12 is made of an organic material, and the molecular structure of the organic material includes a first end with metal affinity, a second end with metal phobicity, and a middle section connected between the first end and the second end. For example, octadecanethiolate (ODT) or octadecylphosphonic acid (ODPA) can be used as an organic material for forming the self-assembled monolayer 12. Since the molecular length of ODT and ODPA is about 20 nm, the self-assembled monolayer 12 made using ODT or ODPA will only have a film thickness of 20 nm. Furthermore, since ODT (or ODPA) contains a metal-philic first end and a metal-phobic second end, during the deposition process of ODT (or ODPA), a molecular self-assembled monolayer film of ODT (or ODPA) will only be formed on the surface of the first metal plate M1 and will not be deposited on the substrate 10.

As shown in FIG. 5 and FIG. 6C-6F, the method flow then performs step S3: forming a metal layer 13 on the substrate 10 and the at least one first metal plate M1 covered with the self-assembled monolayer 12, and attaching a tape 14 to the metal layer 13. Further, in step S4, the tape 14 is torn off in one direction, so that the metal layer 13 becomes a second patterned metal layer 15 including at least one second metal plate M2 on the substrate 10. It should be understood that steps S3-S4 utilize evaporation technology and adhesive plate imprinting technology to further produce a second patterned metal layer 15 on the substrate 10 and the at least one first metal plate M1 covered with the self-assembled monolayer 12. It is worth noting that, since the self-assembled monolayer 12 covered on the first metal plate M1 is connected to the first metal plate M1 with its metallophilic end (i.e., the first end), its metallophilic end is the lower side of the self-assembled monolayer 12. Therefore, the metalphobic end of the self-assembled monolayer 12 is naturally located on its upper side (i.e., the side away from the first metal plate M1). In other words, in FIG. 6C , the self-assembled monolayer 12 contacts the metal layer 13 with its metalphobic end. Therefore, in Figures 6D and 6E, when the tape 14 is torn off in one direction, the portion of the metal layer 13 located on the self-assembled monolayer 12 is completely adhered and taken away by the tape 14, while the portion of the metal layer 13 located between any two of the first metal plates M1 is partially adhered and taken away by the tape 14.

In practice, the second patterned metal layer 12 may also include at least one second metal pad (as a signal input or output metal electrode) and at least one second metal wire (as a connection between two electronic components). On the other hand, the manufacturing material of the second metal plate M2 may be gold, platinum, aluminum, silver, copper, a composite of any two of the foregoing, or a composite of any two or more of the foregoing.

As shown in FIG. 5 and FIG. 6F-6G , the method flow then performs step S5: removing all the self-assembled monolayers 12, so that there is a gap 12S between any of the first metal plates M1 and one of the second metal plates M2 adjacent thereto. Specifically, when removing all the self-assembled monolayers 12, the substrate 10 is placed in a UV-ozone cleaning machine, and then the UV-ozone cleaning machine is operated to provide UV light and/or ozone to the self-assembled monolayers 12 on the substrate 10, thereby utilizing the UV light and/or ozone to decompose the self-assembled monolayers 12, and finally removing the decomposed self-assembled monolayers 12 from the substrate 10. It is to be repeated that since the molecular length of ODT and ODPA is about 20 nm, the self-assembled monolayer 12 made of ODT or ODPA will only have a thickness of 20 nm. In other words, the size of the gap 12S will be equal to the size of the molecular length.

As shown in FIG. 5 and FIG. 6G to FIG. 6H , the method flow finally performs step S6: forming a dielectric layer DL in each of the gaps 12S, so that the dielectric layer and the first metal plate M1 and the second metal plate M2 sandwiching the dielectric layer together constitute an electronic component (1C1, 1C2, 1D1, or 1D2), and at least two of the electronic components constitute a circuit unit 1. Specifically, when performing step S6, at least one dielectric material is first dissolved in a solvent to obtain a solution, and then the solution is filled into the gaps 12S, and after the solvent evaporates, the dielectric layer DL is formed in each of the gaps 12S. The dielectric layer may be aluminum oxide (Al ₂ O ₃ ), helium oxide (HfO ₂ ), tantalum pentoxide (Ta ₂ O ₅ ), zirconium oxide (ZrO ₂ ), zinc oxide (ZnO), titanium oxide (TiO ₂ ), magnesium oxide (MgO), or titanium nitride (TiN).

For example, when the material of the first metal plate M1 is gold and the material of the first metal plate M2 is aluminum, ZnO can be added to NH ₄ (OH) to obtain a solution, and then the solution is filled into the gaps 12S. After the solvent evaporates, a ZnO nanostructure layer is formed in each gap 12S to serve as the dielectric layer DL. At this time, the ZnO nanostructure layer and the first metal plate M1 and the second metal plate M2 sandwiching the ZnO nanostructure layer together form a Schottky diode, and the turn-on voltage of the Schottky diode is only 0.1V, and its rectification ratio can reach 105. For another example, when the material of the first metal plate M1 is gold and the material of the first metal plate M2 is aluminum, zirconium dioxide (ZrO ₂ ) may be used as the dielectric material for manufacturing the dielectric layer DL.

Finally, by comparing FIG. 6H with FIG. 3 , it can be seen that the first diode 1D1 in FIG. 3 is composed of a first metal plate M1, a dielectric layer DL, and a second metal plate M2 in the same plane, wherein the dielectric layer DL is, for example, a ZnO nanostructure layer. Similarly, the second diode 1D2 in FIG. 3 is composed of a first metal plate M1, a dielectric layer DL, and a second metal plate M2 in the same plane, wherein the dielectric layer DL is, for example, a ZnO nanostructure layer. On the other hand, the first capacitor 1C1 in FIG. 3 is composed of a first metal plate M1, a dielectric layer DL, and a second metal plate M2 in the same plane, wherein the dielectric layer DL is a zirconia layer. Similarly, the two capacitors 1C2 in FIG. 3 are also composed of a first metal plate M1, a dielectric layer DL, and a second metal plate M2 on the same plane, wherein the dielectric layer DL is a zirconia layer.

Thus, the above has completely and clearly described the manufacturing method of the circuit unit with a coplanar structure of the present invention; and, from the above, it can be known that the present invention has the following advantages:

(1) The present invention provides a method for manufacturing a circuit unit with a coplanar structure, which mainly utilizes evaporation technology, photolithography technology, self-assembled single layer technology, adhesive plate imprinting technology, and spin coating technology to manufacture a plurality of electronic components with a coplanar structure on a substrate, so that at least two of the electronic components form a circuit unit. For example, a diode and a capacitor are manufactured on the substrate to form a rectifier, or two diodes and two capacitors are manufactured to form a double voltage rectifier. The manufacturing method of the present invention has the following advantages: high yield, good stability, low equipment cost, and suitability for large-scale mass production.

It must be emphasized that what is disclosed in the above-mentioned case is a preferred embodiment. Any partial changes or modifications that are derived from the technical ideas of this case and are easily inferred by people familiar with the art do not deviate from the scope of the patent rights of this case.

In summary, this case shows that its purpose, means and effects are very different from the known technology, and it is the first invention that is practical and indeed meets the patent requirements for invention. We sincerely request the review committee to examine this carefully and grant a patent as soon as possible to benefit the society. This is our utmost prayer.

1a: RFID system 11a: transponder 111a: first antenna 112a: first control circuit 11Ma: modulator 11Fa: rectifier unit 11La: logic circuit unit 12a: reader 121a: second antenna 122a: second control circuit 12Ra: reader circuit unit 2a: electronic device C1a: first capacitor C2a: second capacitor 1: circuit unit 10: substrate 11: first patterned metal layer 12: self-assembled monolayer 13: metal layer 14: tape 15: second patterned metal layer 1D1: first diode 1D2: second diode 1C1: first capacitor 1C2: second capacitor MP1: first metal pad MP2: second metal pad MP3: third metal pad MP4: fourth metal pad M1: first metal plate M2: second metal plate S1: forming a first patterned metal layer including at least one first metal plate on a substrate S2: coating each of the first metal plates with a self-assembled monolayer S3: forming a metal layer on the substrate and the at least one first metal plate coated with the self-assembled monolayer, and attaching a tape to the metal layer S4: tearing the tape in a direction, so that the metal layer becomes a second patterned metal layer including at least one second metal plate on the substrate S5: remove all self-assembled monolayers, so that there is a gap between any of the first metal plates and the second metal plates adjacent to it S6: form a dielectric layer in each of the gaps, so that the dielectric layer and the first metal plate and the second metal plate sandwiching the dielectric layer together constitute an electronic component, and at least two of the electronic components constitute a circuit unit

FIG. 1 is a block diagram of a known RFID system; FIG. 2 is a circuit block diagram of the transponder and reader shown in FIG. 1; FIG. 3 is a top view of a circuit unit manufactured using the manufacturing method of the present invention; FIG. 4 is a circuit diagram of the circuit unit shown in FIG. 3; FIG. 5 is a flow chart of a manufacturing method of a circuit unit with a coplanar structure of the present invention; and FIG. 6A to FIG. 6H are manufacturing flow charts of a circuit unit with a coplanar structure of the present invention.

S1: Forming a first patterned metal layer including at least one first metal plate on a substrate

S2: Cover each of the first metal plates with a self-assembled monolayer

S3: Form a metal layer on the substrate and the at least one first metal plate covered with the self-assembled monolayer, and attach a tape to the metal layer

S4: Tear the tape in one direction so that the metal layer on the substrate becomes a second patterned metal layer including at least one second metal plate

S5: Remove all self-assembled monolayers, so that there is a gap between any of the first metal plates and the second metal plate adjacent to it

S6: forming a dielectric layer in each of the gaps, so that the dielectric layer and the first metal plate and the second metal plate sandwiching the dielectric layer together constitute an electronic component, and at least two of the electronic components constitute a circuit unit

Claims (9)

A method for manufacturing a circuit unit with a coplanar structure comprises: forming a first patterned metal layer including at least one first metal plate on a substrate; covering each of the first metal plates with a self-assembled monolayer (SAM); wherein the self-assembled monolayer comprises a first end with metal affinity, a second end with metal phobic property and a middle section connected between the first end and the second end, and the first end with metal affinity is connected to the first metal plate; forming a metal layer on the substrate and each of the self-assembled monolayers, and attaching a tape on the metal layer; tearing the tape in a direction so that the metal layer is on the substrate; The first metal plate is changed into a second patterned metal layer including at least one second metal plate; all self-assembled monolayers are removed so that there is a gap between any of the first metal plates and one of the second metal plates adjacent thereto; and a dielectric layer is formed in each of the gaps so that the dielectric layer and one of the first metal plates and one of the second metal plates sandwiching the dielectric layer together constitute an electronic component, and at least two of the electronic components constitute a circuit unit. A method for manufacturing a circuit unit with a coplanar structure as described in claim 1, wherein the electronic component is a diode or a capacitor. The method for manufacturing a circuit unit with a coplanar structure as described in claim 1, wherein the first patterned metal layer further includes at least one first metal pad and at least one first metal line, and the second patterned metal layer further includes at least one second metal pad and at least one second metal line. The method for manufacturing a circuit unit with a coplanar structure as described in claim 1, wherein the first metal plate and the second metal plate are made of a metal material, and the metal material includes at least one metal selected from the group consisting of gold, platinum, aluminum, silver, and copper. A method for manufacturing a circuit unit with a coplanar structure as described in claim 1, wherein the dielectric layer comprises at least one dielectric material selected from _{the group consisting of aluminum oxide (Al2O3), helium oxide (HfO2), tantalum pentoxide (Ta2O5 ) , zirconium oxide} ( _ZrO2 ), zinc oxide (ZnO), titanium oxide ( _TiO2 ), magnesium oxide (MgO), and titanium nitride (TiN). A method for manufacturing a circuit unit with a coplanar structure as described in claim 1, wherein the self-assembled monolayer has a molecular length, so that the size of the gap is equal to the size of the molecular length. The manufacturing method of the circuit unit with a coplanar structure as described in claim 1, wherein when removing all the self-assembled monolayers, the substrate is placed in a UV-ozone cleaning machine, and the UV-ozone cleaning machine is operated to provide UV light and ozone to the self-assembled monolayers on the substrate, thereby utilizing the UV light and ozone to decompose the self-assembled monolayers, and finally removing the decomposed self-assembled monolayers from the substrate. The manufacturing method of the circuit unit with a coplanar structure as described in claim 5, wherein at least one of the dielectric materials is first dissolved in a solvent to obtain a solution, and then the solution is filled into the gaps, and after the solvent evaporates, the dielectric layer is formed in each gap. A method for manufacturing a circuit unit with a coplanar structure as described in claim 8, wherein the self-assembled monolayer is made of an organic material selected from the group consisting of octadecanethiolate (ODT) and octadecylphosphonic acid (ODPA).