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TWI871503B - Optoelectronic semiconductor device - Google Patents

Optoelectronic semiconductor device Download PDF

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Publication number
TWI871503B
TWI871503B TW111107452A TW111107452A TWI871503B TW I871503 B TWI871503 B TW I871503B TW 111107452 A TW111107452 A TW 111107452A TW 111107452 A TW111107452 A TW 111107452A TW I871503 B TWI871503 B TW I871503B
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insulating
conductive layer
semiconductor element
contact
insulating structure
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TW111107452A
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Chinese (zh)
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TW202337043A (en
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林俊宇
鄭偉文
吳長修
邱毅揚
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晶元光電股份有限公司
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Abstract

An optoelectronic semiconductor device, including an epitaxial structure; a first insulating structure overlying the epitaxial structure, and in a cross-section view, the first insulating structure including a plurality of first insulating portions separated from each other and a plurality of first openings, each of the first openings is between two adjacent first insulating portions; a contact structure covering the epitaxial structure a first conductive layer overlying the contact structure and on the first insulating structure; and a second insulating structure overlying the first conductive layer, and in a cross section view, the second insulating structure including a plurality of second insulating portions separated from each other and a plurality of second openings, each of the second openings is between two adjacent second insulating portions, and the second insulating portions corresponding to a location of the first insulating portions.

Description

光電半導體元件 Optoelectronic semiconductor components

本揭露是關於半導體元件,特別是關於一種光電半導體元件。 The present disclosure relates to semiconductor devices, and in particular to a photoelectric semiconductor device.

半導體元件的用途十分廣泛,相關材料的開發研究也持續進行。舉例來說,包含III族及V族元素的III-V族半導體材料可應用於各種光電半導體元件如發光晶片(例如:發光二極體或雷射二極體)、吸光晶片(光電偵測器或太陽能電池)或不發光晶片(例如:開關或整流器的功率元件),能用於照明、醫療、顯示、通訊、感測、電源系統等領域。隨著科技的發展,現今對於光電半導體元件仍存在許多技術研發的需求。雖然現有的光電半導體元件大致上已經符合多種需求,但並非在各方面皆令人滿意,仍需要進一步的改良。 Semiconductor components have a wide range of uses, and the development and research of related materials are also ongoing. For example, III-V semiconductor materials containing group III and group V elements can be applied to various optoelectronic semiconductor components such as light-emitting chips (e.g., light-emitting diodes or laser diodes), light-absorbing chips (photodetectors or solar cells) or non-light-emitting chips (e.g., power components of switches or rectifiers), which can be used in lighting, medical, display, communication, sensing, power supply systems and other fields. With the development of technology, there are still many technical research and development needs for optoelectronic semiconductor components. Although existing optoelectronic semiconductor components generally meet various needs, they are not satisfactory in all aspects and still need further improvement.

本揭露實施例提供一種光電半導體元件,包含磊晶 結構;第一絕緣結構,覆蓋磊晶結構,且由剖面觀之包含互相分離的複數個第一絕緣部及複數個第一開孔,第一開孔位於兩相鄰的第一絕緣部之間;接觸結構,覆蓋該磊晶結構;第一導電層,覆蓋於接觸結構及第一絕緣結構上;以及第二絕緣結構,覆蓋第一導電層,且由剖面觀之包含互相分離的複數個第二絕緣部及複數個第二開孔,第二開孔位於兩相鄰的第二絕緣部之間,且所述第二絕緣部對應於所述第一絕緣部的位置。 The disclosed embodiment provides a photoelectric semiconductor element, comprising an epitaxial structure; a first insulating structure covering the epitaxial structure and comprising a plurality of first insulating portions and a plurality of first openings separated from each other from a cross-sectional view, wherein the first opening is located between two adjacent first insulating portions; a contact structure covering the epitaxial structure; a first conductive layer covering the contact structure and the first insulating structure; and a second insulating structure covering the first conductive layer and comprising a plurality of second insulating portions and a plurality of second openings separated from each other from a cross-sectional view, wherein the second opening is located between two adjacent second insulating portions, and the second insulating portion corresponds to the position of the first insulating portion.

本揭露實施例提供一種光電半導體元件,包含磊晶結構;第一絕緣結構,覆蓋磊晶結構,且由剖面觀之包含互相分離的複數個第一絕緣部及複數個第一開孔,第一開孔位於兩相鄰的第一絕緣部之間;接觸結構,覆蓋該磊晶結構;第一導電層,覆蓋於接觸結構及第一絕緣結構上;以及第二絕緣結構,覆蓋第一導電層,且由剖面觀之包含互相分離的複數個第二絕緣部及複數個第二開孔,第二開孔位於兩相鄰的第二絕緣部之間,且所述第二絕緣部具有第一部份與接觸結構重疊及第二部分與接觸結構不重疊。 The disclosed embodiment provides a photoelectric semiconductor device, comprising an epitaxial structure; a first insulating structure covering the epitaxial structure and comprising a plurality of first insulating portions and a plurality of first openings separated from each other from a cross-sectional view, wherein the first opening is located between two adjacent first insulating portions; a contact structure covering the epitaxial structure; a first conductive layer covering the contact structure; structure and the first insulating structure; and a second insulating structure covering the first conductive layer and including a plurality of second insulating portions and a plurality of second openings separated from each other from a cross-sectional view, the second openings being located between two adjacent second insulating portions, and the second insulating portion having a first portion overlapping the contact structure and a second portion not overlapping the contact structure.

10:光電半導體元件 10: Optoelectronic semiconductor components

20:光電半導體元件 20: Optoelectronic semiconductor components

21:封裝基板 21:Packaging substrate

22:通孔 22:Through hole

23:載體 23: Carrier

23a:載體的第一部 23a: The first part of the carrier

23b:載體的第二部 23b: The second part of the carrier

25:接合線 25:Joining line

26:接觸電極 26: Contact electrode

26a:第一接觸墊 26a: First contact pad

26b:第二接觸墊 26b: Second contact pad

28:封裝層 28: Packaging layer

30:光電半導體元件 30: Optoelectronic semiconductor components

40:光電半導體元件 40: Optoelectronic semiconductor components

50:光電半導體元件 50: Optoelectronic semiconductor components

60:光電半導體元件 60: Optoelectronic semiconductor components

70:半導體組件 70:Semiconductor components

80:感測模組 80:Sensor module

100:基底 100: Base

110:接合結構 110:Joint structure

120:接觸結構 120: Contact structure

120a:接觸部 120a: Contact part

120a1:第一下表面 120a1: first lower surface

125:第一絕緣結構 125: First insulation structure

125a:第一絕緣部 125a: First insulating part

125a1:第二下表面 125a1: Second lower surface

126:第一開孔 126: First opening

130:第一導電層 130: First conductive layer

135:第二絕緣結構 135: Second insulation structure

135a:第二絕緣部 135a: Second insulation section

135a1:第二絕緣部的第一部分 135a1: The first part of the second insulating section

135a2:第二絕緣部的第二部分 135a2: The second part of the second insulating section

136:第二開孔 136: Second opening

140:第二導電層 140: Second conductive layer

145:反射層 145:Reflective layer

150:第三導電層 150: The third conductive layer

155:第三絕緣結構 155: The third insulation structure

155a:第三絕緣部 155a: The third insulated section

200:磊晶結構 200: Epitaxial structure

201:第一半導體結構 201: First semiconductor structure

202:第二半導體結構 202: Second semiconductor structure

203:主動區 203: Active zone

300:第一電極 300: First electrode

301:第一電極墊 301: first electrode pad

302:延伸電極 302: Extension electrode

400:第二電極 400: Second electrode

811:第一半導體元件 811: First semiconductor element

812:出射光 812: Outgoing light

820:承載體 820:Carrier

821:第一擋牆 821: The first barrier

822:第二擋牆 822: The second barrier

823:第三擋牆 823: The third barrier

824:載板 824:Carrier board

825:第一空間 825: First Space

826:第二空間 826: Second Space

831:第二半導體元件 831: Second semiconductor element

832:入射光 832: Incident light

A:方框 A: Box

B:方框 B: Box

A-A’:剖線 A-A’: section line

E1:邊緣 E1: Edge

E2:邊緣 E2: Edge

L1:出光表面 L1: light emitting surface

L2:接觸表面 L2: Contact surface

R:反射結構 R: Reflection structure

S:表面 S: Surface

S1:第一表面 S 1 : First surface

S2:第二表面 S2 : Second surface

S3:第三表面 S 3 : Third surface

W1:第一寬度 W1: First width

W2:第二寬度 W2: Second width

W3:第三寬度 W3: Third width

W4:第四寬度 W4: Fourth width

W5:第五寬度 W5: Fifth width

由以下的詳細敘述配合所附圖式,可最好地理解本揭露實施例。應注意的是,依據在業界的標準做法,各種特徵並未按照比例繪製且僅用於說明。事實上,可任意地放大或縮小各種元件的尺寸,以清楚地表現出本揭露實施例之特徵。 The present disclosed embodiments are best understood from the following detailed description in conjunction with the accompanying drawings. It should be noted that, in accordance with standard practice in the industry, various features are not drawn to scale and are used for illustration purposes only. In fact, the sizes of various components may be arbitrarily enlarged or reduced to clearly show the features of the present disclosed embodiments.

第1圖是根據本揭露的一實施例,繪示出光電半導體元件的剖面示意圖。 FIG. 1 is a schematic cross-sectional view of a photoelectric semiconductor device according to an embodiment of the present disclosure.

第2圖是根據本揭露的另一實施例,繪示出光電半導體元件對應第1圖中的方框A的位置的局部剖面示意圖。 FIG. 2 is a partial cross-sectional schematic diagram showing the position of the optoelectronic semiconductor element corresponding to the box A in FIG. 1 according to another embodiment of the present disclosure.

第3圖是根據本揭露的一實施例,繪示出光電半導體元件對應第1圖中的方框A的位置的局部剖面示意圖。 FIG. 3 is a partial cross-sectional schematic diagram showing the position of the optoelectronic semiconductor element corresponding to the box A in FIG. 1 according to an embodiment of the present disclosure.

第4圖是根據本揭露的一實施例,繪示出光電半導體元件對應第1圖中的方框A的位置的局部剖面示意圖。 FIG. 4 is a partial cross-sectional schematic diagram showing the position of the optoelectronic semiconductor element corresponding to the box A in FIG. 1 according to an embodiment of the present disclosure.

第5圖是根據本揭露的一實施例,繪示出光電半導體元件對應第1圖中的方框A的位置的局部剖面示意圖。 FIG. 5 is a partial cross-sectional schematic diagram showing the position of the optoelectronic semiconductor element corresponding to the box A in FIG. 1 according to an embodiment of the present disclosure.

第6圖是根據本揭露的一實施例,繪示出光電半導體元件對應第1圖中的方框A的位置的局部剖面示意圖。 FIG. 6 is a partial cross-sectional schematic diagram showing the position of the optoelectronic semiconductor element corresponding to the box A in FIG. 1 according to an embodiment of the present disclosure.

第7A圖是根據本揭露的一實施例,繪示出光電半導體元件一部分的上視示意圖。 FIG. 7A is a schematic top view of a portion of a photoelectric semiconductor element according to an embodiment of the present disclosure.

第7B圖是根據本揭露的一實施例,繪示出光電半導體元件對應第7A圖中方框B的位置的局部上視示意圖。 FIG. 7B is a partial top view schematic diagram showing the position of the optoelectronic semiconductor element corresponding to the box B in FIG. 7A according to an embodiment of the present disclosure.

第8圖是根據本揭露的一實施例之半導體組件的剖面結構示意圖。 Figure 8 is a schematic diagram of the cross-sectional structure of a semiconductor component according to an embodiment of the present disclosure.

第9圖是根據本揭露的一實施例之感測模組的部分剖面結構示意圖。 Figure 9 is a schematic diagram of a partial cross-sectional structure of a sensing module according to an embodiment of the present disclosure.

以下揭露提供了許多的實施例或範例,用於實施所提供的標的物之不同元件。各元件和其配置的具體範例描述如下, 以簡化本揭露實施例之說明。當然,這些僅僅是範例,並非用以限定本揭露實施例。舉例而言,敘述中若提及第一元件形成在第二元件之上,可能包含第一和第二元件直接接觸的實施例,也可能包含額外的元件形成在第一和第二元件之間,使得它們不直接接觸的實施例。 The following disclosure provides a number of embodiments or examples for implementing different elements of the subject matter provided. Specific examples of each element and its configuration are described below to simplify the description of the disclosed embodiments. Of course, these are merely examples and are not intended to limit the disclosed embodiments. For example, if the description refers to a first element formed on a second element, it may include an embodiment in which the first and second elements are directly in contact, and it may also include an embodiment in which an additional element is formed between the first and second elements so that they are not in direct contact.

再者,其中可能用到與空間相對用詞,例如「在……之下」、「下方」、「較低的」、「上方」、「較高的」等類似用詞,是為了便於描述圖式中一個(些)部件或特徵與另一個(些)部件或特徵之間的關係。空間相對用詞用以包括使用中或操作中的裝置之不同方位,以及圖式中所描述的方位。當裝置被轉向不同方位時(旋轉90度或其他方位),其中所使用的空間相對形容詞也將依轉向後的方位來解釋。 Furthermore, spatially relative terms such as "under", "below", "lower", "above", "higher" and the like may be used to facilitate the description of the relationship between one (or more) parts or features and another (or more) parts or features in the diagram. Spatially relative terms are used to include different orientations of the device in use or operation, as well as the orientations described in the diagram. When the device is turned to a different orientation (rotated 90 degrees or other orientations), the spatially relative adjectives used will also be interpreted according to the orientation after the rotation.

除非另外定義,在此使用的全部用語(包含技術及科學用語)具有與本揭露所屬技術領域中具通常知識者所理解的相同涵義。應理解的是,這些用語例如在通常使用的字典中定義用語,應被解讀成具有與相關技術及本揭露的背景或上下文一致的意思,而不應以一理想化或過度正式的方式解讀,除非在本揭露實施例有特別定義。 Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as understood by a person of ordinary skill in the art to which the present disclosure belongs. It should be understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the background or context of the relevant technology and the present disclosure, and should not be interpreted in an idealized or overly formal manner unless specifically defined in the embodiments of the present disclosure.

本揭露內容的半導體元件包含的各層組成、摻質(dopant)及缺陷可用任何適合的方式分析而得,例如:二次離子質譜儀(secondary ion mass spectrometer;SIMS)、穿透式電子顯微鏡(transmission electron microscopy;TEM)或是掃描 式電子顯微鏡(scanning electron microscope;SEM);各層的厚度也可用任何適合的方式分析而得,例如:穿透式電子顯微鏡或是掃描式電子顯微鏡。 The composition, dopant and defects of each layer of the semiconductor device disclosed herein can be analyzed by any suitable method, such as secondary ion mass spectrometer (SIMS), transmission electron microscopy (TEM) or scanning electron microscope (SEM); the thickness of each layer can also be analyzed by any suitable method, such as transmission electron microscope or scanning electron microscope.

一般而言,在光電半導體元件中,由於絕緣結構與半導體層之間存在著折射率差異,因此絕緣結構對半導體層的覆蓋面積越大,越能增加絕緣結構反射光線的能力,然而覆蓋面積過大的絕緣結構也可能會造成光電半導體元件具有較少的電流路徑進而增加光電半導體元件的順向偏壓。。根據本揭露實施例,藉由光電半導體元件具有兩層以上的圖案化的絕緣結構,提升絕緣結構的覆蓋率C,並搭配導電層的設計來增加電流散布,從而提升元件亮度及維持正向偏壓,並使電光轉換效率(wall-plug efficiency;WPE)提升。 Generally speaking, in optoelectronic semiconductor devices, due to the difference in refractive index between the insulating structure and the semiconductor layer, the larger the coverage area of the insulating structure on the semiconductor layer, the greater the ability of the insulating structure to reflect light. However, an insulating structure with too large a coverage area may also cause the optoelectronic semiconductor device to have fewer current paths, thereby increasing the forward bias of the optoelectronic semiconductor device. According to the disclosed embodiment, the optoelectronic semiconductor device has two or more layers of patterned insulating structures, the coverage rate C of the insulating structure is increased, and the design of the conductive layer is used to increase the current spread, thereby increasing the device brightness and maintaining the forward bias, and improving the electro-optical conversion efficiency (wall-plug efficiency; WPE).

本揭露之光電半導體元件可包含發光晶片(例如,發光二極體或雷射二極體)、吸光晶片(例如,光電偵測器或太陽能電池)、或者不發光晶片(例如,開關或整流器的功率元件)。雷射二極體可為垂直共振腔面射型雷射二極體(vertical-cavity surface-emitting laser;VCSEL)。在下方描述的各種示意圖和例示性實施例中,相似的元件符號用來表示相似的元件。 The optoelectronic semiconductor element disclosed herein may include a light-emitting chip (e.g., a light-emitting diode or a laser diode), a light-absorbing chip (e.g., a photodetector or a solar cell), or a non-light-emitting chip (e.g., a power element of a switch or a rectifier). The laser diode may be a vertical-cavity surface-emitting laser diode (VCSEL). In the various schematic diagrams and exemplary embodiments described below, similar element symbols are used to represent similar elements.

第1圖是根據本揭露的一實施例,繪示出光電半導體元件10的剖面示意圖。在本實施例中,光電半導體元件10包含了基底100、接合結構110、反射結構R、磊晶結構200、第一電 極300、以及第二電極400。在本揭露的各種實施例中,各種示意圖中的元件的上下順序並不代表其形成的順序。 FIG. 1 is a schematic cross-sectional view of a photoelectric semiconductor element 10 according to an embodiment of the present disclosure. In the present embodiment, the photoelectric semiconductor element 10 includes a substrate 100, a bonding structure 110, a reflective structure R, an epitaxial structure 200, a first electrode 300, and a second electrode 400. In various embodiments of the present disclosure, the upper and lower order of the elements in various schematic diagrams does not represent the order in which they are formed.

繼續參見第1圖,磊晶結構200位於基底100上方。磊晶結構200具有出光表面L1,第一電極300及第二電極400分別位於磊晶結構200相對的上下兩側,第一電極300包含第一電極墊(參考第7A圖)及延伸電極302。具體而言,第一電極300位於磊晶結構200接近出光表面L1的一側,而第二電極400位於接近基底100且遠離出光表面L1的一側。 Continuing with FIG. 1, the epitaxial structure 200 is located above the substrate 100. The epitaxial structure 200 has a light-emitting surface L1, and the first electrode 300 and the second electrode 400 are respectively located on the upper and lower sides of the epitaxial structure 200. The first electrode 300 includes a first electrode pad (refer to FIG. 7A) and an extended electrode 302. Specifically, the first electrode 300 is located on a side of the epitaxial structure 200 close to the light-emitting surface L1, and the second electrode 400 is located on a side close to the substrate 100 and away from the light-emitting surface L1.

磊晶結構200可包含雙異質結構(double heterostructure;DH)、雙側雙異質結構(double-side double heterostructure;DDH)、量子點(quantum dot;QD)、或多重量子井(multiple quantum wells;MQW)結構。在一些實施例中,磊晶結構200為多重量子井結構。在本實施例中,磊晶結構200包含了第一半導體結構201、第二半導體結構202以及主動區203。磊晶結構200的出光表面L1為第二半導體結構202的表面。主動區203位於第一半導體結構201與第二半導體結構202之間。第一半導體結構201與第二半導體結構202可具有相異的導電類型,從而分別提供電子以及電洞,或分別提供電洞及電子。在本實施例中,第一半導體結構201、第二半導體結構202、以及主動區203可分別包含III-V族半導體材料,例如:包含鋁(Al)、鎵(Ga)、砷(As)、磷(P)、銦(In)、或氮(N)的III-V族半導體材料。具體而言,在本實施例中,上述III-V族半導體材料可為二元化合 物半導體(如GaAs、GaP、或GaN)、三元化合物半導體(如InGaAs、AlGaAs、InGaP、AlInP、InGaN、或AlGaN)、或四元化合物半導體(如AlGaInAs、AlGaInP、AlInGaN、InGaAsP、InGaAsN、或AlGaAsP)。在本實施例中,出光表面L1具有範圍為0.1微米至2微米的平均粗糙度,上述之平均粗糙度可降低主動區203發出的光在出光表面L1發生的反射,並提升光電半導體元件10的發光效率。 The epitaxial structure 200 may include a double heterostructure (DH), a double-side double heterostructure (DDH), a quantum dot (QD), or a multiple quantum wells (MQW) structure. In some embodiments, the epitaxial structure 200 is a multiple quantum well structure. In this embodiment, the epitaxial structure 200 includes a first semiconductor structure 201, a second semiconductor structure 202, and an active region 203. The light emitting surface L1 of the epitaxial structure 200 is the surface of the second semiconductor structure 202. The active region 203 is located between the first semiconductor structure 201 and the second semiconductor structure 202. The first semiconductor structure 201 and the second semiconductor structure 202 may have different conductivity types, thereby providing electrons and holes, or holes and electrons, respectively. In the present embodiment, the first semiconductor structure 201, the second semiconductor structure 202, and the active region 203 may respectively include III-V semiconductor materials, such as: III-V semiconductor materials including aluminum (Al), gallium (Ga), arsenic (As), phosphorus (P), indium (In), or nitrogen (N). Specifically, in this embodiment, the III-V semiconductor material can be a binary compound semiconductor (such as GaAs, GaP, or GaN), a ternary compound semiconductor (such as InGaAs, AlGaAs, InGaP, AlInP, InGaN, or AlGaN), or a quaternary compound semiconductor (such as AlGaInAs, AlGaInP, AlInGaN, InGaAsP, InGaAsN, or AlGaAsP). In this embodiment, the light-emitting surface L1 has an average roughness ranging from 0.1 microns to 2 microns. The above average roughness can reduce the reflection of the light emitted by the active region 203 on the light-emitting surface L1, and improve the light-emitting efficiency of the optoelectronic semiconductor element 10.

在本實施例中,光電半導體元件10為發光元件,且於光電半導體元件10操作時,電流可藉由第一電極300與第二電極400在光電半導體元件10中導通,使載子(例如:電子及電洞)於主動區203中產生復合(recombination),能量便以光能的形式釋放出來,亦即發出光線,光線可藉由反射結構R使主動區203發出的光線朝光電半導體元件10的同一方向(出光表面L1)射出。 In this embodiment, the optoelectronic semiconductor element 10 is a light-emitting element, and when the optoelectronic semiconductor element 10 is in operation, the current can be conducted in the optoelectronic semiconductor element 10 through the first electrode 300 and the second electrode 400, so that the carriers (e.g., electrons and holes) are recombined in the active region 203, and the energy is released in the form of light energy, that is, light is emitted. The light can be emitted from the active region 203 toward the same direction (light emitting surface L1) of the optoelectronic semiconductor element 10 through the reflective structure R.

主動區203所發出的光線包含可見光或不可見光。光電半導體元件10發出的光線的波長取決於主動區203的材料組成。主動區203之材料可包含InGaAs、AlGaAsP或GaAsP、InGaAsP、AlGaAs、AlGaInAs、InGaP或AlGaInP。舉例來說:主動區203可以發射出峰值波長為700至1700nm的紅外光、峰值波長為610nm至700nm的紅光、或是峰值波長為530nm至600nm的黃光。於本實施例中,主動區203發出峰值波長為610nm至700nm的紅光。 The light emitted by the active region 203 includes visible light or invisible light. The wavelength of the light emitted by the optoelectronic semiconductor element 10 depends on the material composition of the active region 203. The material of the active region 203 may include InGaAs, AlGaAsP or GaAsP, InGaAsP, AlGaAs, AlGaInAs, InGaP or AlGaInP. For example: the active region 203 can emit infrared light with a peak wavelength of 700 to 1700nm, red light with a peak wavelength of 610nm to 700nm, or yellow light with a peak wavelength of 530nm to 600nm. In this embodiment, the active region 203 emits red light with a peak wavelength of 610nm to 700nm.

在本實施例中,主動區203可包含一或多對由阻障層與阱層堆疊形成的半導體疊層(未繪出),每一對半導體疊層之間可具有相同或不同的材料組成及能障。 In this embodiment, the active region 203 may include one or more pairs of semiconductor stacks (not shown) formed by stacking barrier layers and well layers, and each pair of semiconductor stacks may have the same or different material compositions and energy barriers.

基底100可用來支撐其上方的磊晶結構200。在本實施例中,基底100可包含半導體材料,例:如砷化鎵(GaAs)、磷化銦(InP)、碳化矽(SiC)、磷化鎵(GaP)、氧化鋅(ZnO)、氮化鎵(GaN)、氮化鋁(AlN)、磷化碘(IP)、硒化鋅(ZnSe)、磷砷化鎵(GaAsP)、鍺(Ge)、或矽(Si)。在本實施例中,基底100為矽基底。 The substrate 100 can be used to support the epitaxial structure 200 thereon. In the present embodiment, the substrate 100 may include a semiconductor material, such as gallium arsenide (GaAs), indium phosphide (InP), silicon carbide (SiC), gallium phosphide (GaP), zinc oxide (ZnO), gallium nitride (GaN), aluminum nitride (AlN), iodine phosphide (IP), zinc selenide (ZnSe), gallium arsenide phosphide (GaAsP), germanium (Ge), or silicon (Si). In the present embodiment, the substrate 100 is a silicon substrate.

第一電極300以及第二電極400可用來與外部電源電性連接。第一電極300以及第二電極400可包含相同或不同的材料,例如分別包含金屬氧化物材料、金屬或合金。金屬氧化物材料包括但不限於銦錫氧化物(ITO)、氧化銦(InO)、氧化錫(SnO)、鎘錫氧化物(CTO)、銻錫氧化物(ATO)、鋁鋅氧化物(AZO)、鋅錫氧化物(ZTO)、鎵鋅氧化物(GZO)、銦鎢氧化物(IWO)、氧化鋅(ZnO)、或銦鋅氧化物(IZO)。金屬可列舉如鍺(Ge)、鈹(Be)、鋅(Zn)、金(Au)、鉑(Pt)、鈦(Ti)、鋁(Al)、鎳(Ni)、或銅(Cu)。合金可包含選自由上述金屬所組成之群組中的至少兩者,如鍺金鎳(GeAuNi)、鈹金(BeAu)、鍺金(GeAu)、或鋅金(ZnAu)等。 The first electrode 300 and the second electrode 400 can be used to electrically connect to an external power source. The first electrode 300 and the second electrode 400 can include the same or different materials, for example, metal oxide materials, metals or alloys. The metal oxide material includes but is not limited to indium tin oxide (ITO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide (AZO), zinc tin oxide (ZTO), gallium zinc oxide (GZO), indium tungsten oxide (IWO), zinc oxide (ZnO), or indium zinc oxide (IZO). Metals may include germanium (Ge), benzium (Be), zinc (Zn), gold (Au), platinum (Pt), titanium (Ti), aluminum (Al), nickel (Ni), or copper (Cu). The alloy may include at least two selected from the group consisting of the above metals, such as germanium gold nickel (GeAuNi), benzium gold (BeAu), germanium gold (GeAu), or zinc gold (ZnAu).

在本實施例中,光電半導體元件10的反射結構R包含第一絕緣結構125、反射層145以及位於第一絕緣結構125與 反射層145之間的第二絕緣結構135。第一絕緣結構125及第二絕緣結構135係為圖案化結構,圖案化的第一絕緣結構125及第二絕緣結構135可利用其絕緣的特性增加光電半導體元件10的電流散布,亦可利用第一絕緣結構125及第二絕緣結構135與磊晶結構200之間折射率的差異,使光線發生全反射的機率增加,以提升反射至出光表面L1的光量,藉此提升光電半導體元件10的亮度。 In this embodiment, the reflective structure R of the optoelectronic semiconductor device 10 includes a first insulating structure 125, a reflective layer 145, and a second insulating structure 135 located between the first insulating structure 125 and the reflective layer 145. The first insulating structure 125 and the second insulating structure 135 are patterned structures. The patterned first insulating structure 125 and the second insulating structure 135 can increase the current spreading of the optoelectronic semiconductor element 10 by using their insulating properties. The difference in refractive index between the first insulating structure 125 and the second insulating structure 135 and the epitaxial structure 200 can also be used to increase the probability of total reflection of light, thereby increasing the amount of light reflected to the light-emitting surface L1, thereby increasing the brightness of the optoelectronic semiconductor element 10.

由剖面觀之,第一絕緣結構125具有互相分離的複數個第一絕緣部125a及複數個第一開孔126,第一開孔126設於相鄰兩個第一絕緣部125a之間,各第一開孔126具有第一寬度W1。同樣地,第二絕緣結構135具有互相分離的複數個第二絕緣部135a及複數個第二開孔136,第二開孔136設於相鄰兩個第二絕緣部135a之間。各第二開孔136具有第二寬度W2相同或不同於第一寬度W1。在本實施例中,第二寬度W2小於第一寬度W1,複數第一開孔126各對位於複數第二開孔136,即複數個第二絕緣部135a對應於該複數個第一絕緣部125a的位置。由上視觀之,第一絕緣結構125為連續之層狀結構,因具有複數個第一開孔126而形成圖案化;由上視觀之,第二絕緣結構135亦為連續之層狀結構,因具有複數個第一開孔126而形成圖案化,待後解說的7A、7B圖時再行詳述。複數個第一絕緣部125a各具有一第三寬度W3,複數個第二絕緣部135a各具有一第四寬度W4相同或不同於第三寬度W3。在本實施例中,第四寬度W4大於第三寬度W3;在另一實施例中,第四寬度W4小於第三寬度W3。 From the cross-sectional view, the first insulating structure 125 has a plurality of first insulating portions 125a separated from each other and a plurality of first openings 126, the first openings 126 are disposed between two adjacent first insulating portions 125a, and each first opening 126 has a first width W1. Similarly, the second insulating structure 135 has a plurality of second insulating portions 135a separated from each other and a plurality of second openings 136, the second openings 136 are disposed between two adjacent second insulating portions 135a. Each second opening 136 has a second width W2 which is the same as or different from the first width W1. In this embodiment, the second width W2 is smaller than the first width W1, and the plurality of first openings 126 are located at the plurality of second openings 136, that is, the plurality of second insulating portions 135a correspond to the positions of the plurality of first insulating portions 125a. When viewed from above, the first insulating structure 125 is a continuous layered structure, which is patterned due to the plurality of first openings 126; when viewed from above, the second insulating structure 135 is also a continuous layered structure, which is patterned due to the plurality of first openings 126, which will be described in detail later in FIGS. 7A and 7B. The plurality of first insulating portions 125a each have a third width W3, and the plurality of second insulating portions 135a each have a fourth width W4 which is the same as or different from the third width W3. In this embodiment, the fourth width W4 is greater than the third width W3; in another embodiment, the fourth width W4 is less than the third width W3.

在本實施例中,反射結構R選擇性地另包含接觸結構120、第一導電層130或/及第二導電層140。接觸結構120覆蓋該磊晶結構200且包括複數個接觸部120a位於複數個第一開孔126中;第一導電層130位於第一絕緣結構125與第二絕緣結構135之間;第二導電層140填入複數個第二開孔136中。 In this embodiment, the reflective structure R selectively further includes a contact structure 120, a first conductive layer 130 and/or a second conductive layer 140. The contact structure 120 covers the epitaxial structure 200 and includes a plurality of contact portions 120a located in a plurality of first openings 126; the first conductive layer 130 is located between the first insulating structure 125 and the second insulating structure 135; and the second conductive layer 140 is filled in a plurality of second openings 136.

在本實施例中,第一絕緣結構125可包含折射率(refractive index)小於2.5的絕緣材料,諸如氮化矽(SiNx)、氧化鋁(AlOx)、氧化矽(SiOx)、氟化鎂(MgFx)、或上述之組合。在本實施例中,第一絕緣結構125包含折射率小於1.7的絕緣材料,例如:第一絕緣結構125為包含氟化鎂(MgF2)。在本實施例中,由於第一絕緣結構125與第一半導體結構201之間存在著極大的折射率差異(例如,折射率的差異大於1.5),第一半導體結構201與第一絕緣結構125之間的界面的臨界角小於第一半導體結構201與接觸結構120之間的界面的臨界角,因此當主動區203發出的光射向第一絕緣結構125時,在第一半導體結構201與第一絕緣結構125之間的界面形成全反射的機率會增加,並減少了主動區203發出的光折射穿透第一絕緣結構125的機率。另一方面,第一絕緣結構125亦可防止電流直接由第一電極300的下方導通,從而增加電流散布。在本實施例中,第一絕緣結構125的厚度為200埃米至2500埃米,例如250埃;第二絕緣結構135的厚度為300埃米至2800埃米,例如800埃米。 In this embodiment, the first insulating structure 125 may include an insulating material with a refractive index less than 2.5, such as silicon nitride ( SiNx ), aluminum oxide ( AlOx ), silicon oxide ( SiOx ), magnesium fluoride ( MgFx ), or a combination thereof. In this embodiment, the first insulating structure 125 includes an insulating material with a refractive index less than 1.7, for example, the first insulating structure 125 includes magnesium fluoride ( MgF2 ). In the present embodiment, since there is a large refractive index difference between the first insulating structure 125 and the first semiconductor structure 201 (for example, the refractive index difference is greater than 1.5), the critical angle of the interface between the first semiconductor structure 201 and the first insulating structure 125 is smaller than the critical angle of the interface between the first semiconductor structure 201 and the contact structure 120. Therefore, when the light emitted by the active region 203 is emitted toward the first insulating structure 125, the probability of total reflection at the interface between the first semiconductor structure 201 and the first insulating structure 125 is increased, and the probability of the light emitted by the active region 203 being refracted and penetrating the first insulating structure 125 is reduced. On the other hand, the first insulating structure 125 can also prevent the current from being directly conducted from the bottom of the first electrode 300, thereby increasing the current spreading. In this embodiment, the thickness of the first insulating structure 125 is 200 angstroms to 2500 angstroms, such as 250 angstroms; the thickness of the second insulating structure 135 is 300 angstroms to 2800 angstroms, such as 800 angstroms.

詳言之,接觸結構120位於磊晶結構200遠離出光表面L1的一側,並與第一半導體結構201直接接觸。本實施例中,複數個接觸部120a亦直接接觸於第一導電層130。在本實施例中,第一電極300與複數個接觸部120a在垂直基底方向上互相錯位,藉此增加電流散布,進而提高光電半導體元件10的發光效率。在本實施例中,複數個接觸部120a的材料可包含例如III-V族半導體材料,例如:GaAs、GaP、或GaN。接觸結構120及第一半導體結構201可以為相同的半導體材料,且皆具有第一摻質,接觸結構120中的第一摻質濃度大於第一半導體結構201的第一摻質濃度,藉此獲得較低的接觸電阻,例如接觸結構120的摻雜濃度為5×1017/cm3至1×1020/cm3In detail, the contact structure 120 is located on a side of the epitaxial structure 200 away from the light-emitting surface L1, and is in direct contact with the first semiconductor structure 201. In this embodiment, the plurality of contact portions 120a are also in direct contact with the first conductive layer 130. In this embodiment, the first electrode 300 and the plurality of contact portions 120a are mutually offset in a direction perpendicular to the substrate, thereby increasing current spreading and further improving the light-emitting efficiency of the optoelectronic semiconductor element 10. In this embodiment, the material of the plurality of contact portions 120a may include, for example, a III-V semiconductor material, such as GaAs, GaP, or GaN. The contact structure 120 and the first semiconductor structure 201 may be made of the same semiconductor material and both have a first dopant. The first dopant concentration in the contact structure 120 is greater than the first dopant concentration in the first semiconductor structure 201, thereby obtaining a lower contact resistance. For example, the doping concentration of the contact structure 120 is 5×10 17 /cm 3 to 1×10 20 /cm 3 .

在本實施例中,複數個接觸結構120與第一絕緣結構125在遠離磊晶結構200的出光表面L1實質上為共平面。換句話說,複數個接觸結構120與第一絕緣結構125兩者為同層設置,藉此可增加後續堆疊之膜層(例如:第一導電層130、第二導電層140、或反射層145)的平整度。例如:複數個接觸部120a各具有一第一下表面120a1遠離出光表面L1,且複數個絕緣結構125a各具有一第二下表面125a1遠離出光表面L1,第一下表面120a1與第二下表面125a1實質上共平面。 In this embodiment, the plurality of contact structures 120 and the first insulating structure 125 are substantially coplanar on the light-emitting surface L1 of the remote epitaxial structure 200. In other words, the plurality of contact structures 120 and the first insulating structure 125 are disposed on the same layer, thereby increasing the flatness of the subsequently stacked film layers (e.g., the first conductive layer 130, the second conductive layer 140, or the reflective layer 145). For example: each of the plurality of contact portions 120a has a first lower surface 120a1 away from the light-emitting surface L1, and each of the plurality of insulating structures 125a has a second lower surface 125a1 away from the light-emitting surface L1, and the first lower surface 120a1 and the second lower surface 125a1 are substantially coplanar.

在本實施例中,第一導電層130覆蓋接觸結構120以及第一絕緣結構125。承上所述,由於複數個接觸部120與第一絕緣結構125為同層設置,因此第一導電層130為平坦的膜層。第 一導電層130與接觸結構120直接接觸並形成電性連接,第一導電層130可包含透明導電氧化物(transparent conducting oxide;TCO)材料,包括但不限於銦錫氧化物(ITO)、氧化銦(InO)、氧化錫(SnO)、鎘錫氧化物(CTO)、銻錫氧化物(ATO)、鋁鋅氧化物(AZO)、鋅錫氧化物(ZTO)、鎵鋅氧化物(GZO)、氧化鋅(ZnO)、磷銦鈰氧化物(ICO)、銦鎢氧化物(IWO)、氧化銦鈦(ITiO)、銦鋅氧化物(IZO)、銦鎵氧化物(IGO)、鎵鋁鋅氧化物(GAZO)或上述之組合。第二導電層140位於第一導電層130及反射層145之間,並透過複數個第二開孔136與第一導電層130接觸,第二導電層140可包含與第一導電層130相同或不同的透明導電氧化物材料。在本實施例中,第一導電層130的材料為銦錫氧化物(ITO),而第二導電層140為銦鋅氧化物(IZO)。第二導電層140可以選擇經過平坦化處理,因而具有平坦的表面S,使後續堆疊於其上的反射層145具有高平整性,藉此提升反射結構R整體的反射能力。在本實施例中,平坦化處理可包含化學機械拋光處理(chemical mechanical polishing;CMP)。第一導電層130的厚度與第二導電層140的厚度可以相同或不同,在本實施例中,第二導電層140的厚度大於第一導電層130的厚度,第一導電層130的厚度為50埃米至200埃米,第二導電層140的厚度為2000埃米至5000埃米。 In this embodiment, the first conductive layer 130 covers the contact structure 120 and the first insulating structure 125. As mentioned above, since the plurality of contact portions 120 and the first insulating structure 125 are disposed in the same layer, the first conductive layer 130 is a flat film layer. The first conductive layer 130 is in direct contact with the contact structure 120 and forms an electrical connection. The first conductive layer 130 may include a transparent conducting oxide (TCO) material, including but not limited to indium tin oxide (ITO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide (AZO), zinc tin oxide (ZTO), gallium zinc oxide (GZO), zinc oxide (ZnO), phosphite indium oxide (ICO), indium tungsten oxide (IWO), indium titanium oxide (ITiO), indium zinc oxide (IZO), indium gallium oxide (IGO), gallium aluminum zinc oxide (GAZO), or a combination thereof. The second conductive layer 140 is located between the first conductive layer 130 and the reflective layer 145, and contacts the first conductive layer 130 through a plurality of second openings 136. The second conductive layer 140 may include a transparent conductive oxide material that is the same as or different from the first conductive layer 130. In the present embodiment, the material of the first conductive layer 130 is indium tin oxide (ITO), and the second conductive layer 140 is indium zinc oxide (IZO). The second conductive layer 140 may be optionally planarized to have a flat surface S, so that the reflective layer 145 subsequently stacked thereon has high flatness, thereby improving the overall reflective ability of the reflective structure R. In the present embodiment, the planarization process may include chemical mechanical polishing (CMP). The thickness of the first conductive layer 130 and the thickness of the second conductive layer 140 may be the same or different. In this embodiment, the thickness of the second conductive layer 140 is greater than the thickness of the first conductive layer 130. The thickness of the first conductive layer 130 is 50 angstroms to 200 angstroms, and the thickness of the second conductive layer 140 is 2000 angstroms to 5000 angstroms.

在本實施例中,第二絕緣結構135可與上方描述過的第一絕緣結構125具有相同的材料,例如:第一絕緣結構125及 第二絕緣結構135皆為氟化鎂(MgF2)或皆為氧化矽(SiOx);在其他實施例中,第一絕緣結構125與第二絕緣結構135為不同的材料,例如:第一絕緣結構125為氟化鎂(MgF2),而第二絕緣結構135為氧化矽(SiOx)或是第一絕緣結構125為氧化矽(SiOx),而第二絕緣結構135為氟化鎂(MgF2)。在另一實施例中,第一絕緣結構125及/或第二絕緣結構135為不導電且包含布拉格反射結構(Distributed Bragg Reflector structure,DBR),且由下述兩種以上的絕緣材料交替堆疊而形成,材料例如為氮化矽(SiNx)、氧化鋁(AlOx)、氧化矽(SiOx)、氟化鎂(MgFx)、氧化鈦(TiO2)或氧化鈮(Nb2O5)。 In this embodiment, the second insulating structure 135 may have the same material as the first insulating structure 125 described above, for example, the first insulating structure 125 and the second insulating structure 135 are both magnesium fluoride (MgF 2 ) or both silicon oxide (SiO x ); in other embodiments, the first insulating structure 125 and the second insulating structure 135 are different materials, for example, the first insulating structure 125 is magnesium fluoride (MgF 2 ) and the second insulating structure 135 is silicon oxide (SiO x ) or the first insulating structure 125 is silicon oxide (SiO x ) and the second insulating structure 135 is magnesium fluoride (MgF 2 ). In another embodiment, the first insulating structure 125 and/or the second insulating structure 135 is non-conductive and includes a distributed Bragg reflector structure (DBR), and is formed by alternately stacking two or more insulating materials, such as silicon nitride ( SiNx ), aluminum oxide ( AlOx ), silicon oxide ( SiOx ), magnesium fluoride ( MgFx ), titanium oxide ( TiO2 ) or niobium oxide ( Nb2O5 ).

如前所述,第二絕緣結構135具有互相分離的複數個第二絕緣部135a,且兩個第二絕緣部135a之間設有複數個第二開孔136,複數個第二開孔136的位置大致對應於複數個接觸部120a的位置。在本實施例中,由於複數個第二絕緣部135a各具有第四寬度W4大於複數個第一絕緣部125a的第三寬度W3,第二絕緣結構135被設計為比第一絕緣結構125覆蓋更多的磊晶結構200,以增加反射光線的面積。詳言之,當光線從主動區203射入反射結構R時,部分光線被第一絕緣結構125反射,且部分光線穿過第一絕緣結構125及/或接觸結構120,類似地,由於第二絕緣結構135與第一導電層130之間存在著折射率差異(例如,折射率的差異大於0.3),第一導電層130與第二絕緣結構135之間的界面的臨界角小於第一導電層130與第二導電層140之間的界面的臨 界角,因此,藉由第二絕緣結構135的設置,穿透第一絕緣結構125及/或接觸結構120的光線在第一導電層130與第二絕緣結構135之間的界面形成全反射的機率會增加,進而增加出光效率。在一實施例,當反射結構R未具有第一導電層130時,類似地,由於第二絕緣結構135與接觸結構120之間存在著折射率差異(例如,折射率的差異大於1.5),接觸結構120與第二絕緣結構135之間的界面的臨界角小於接觸結構120與第二導電層140之間的界面的臨界角,因此,第二絕緣結構135的設置可增加光電半導體元件10的出光效率。 As mentioned above, the second insulating structure 135 has a plurality of second insulating portions 135a separated from each other, and a plurality of second openings 136 are provided between two second insulating portions 135a, and the positions of the plurality of second openings 136 roughly correspond to the positions of the plurality of contact portions 120a. In this embodiment, since the plurality of second insulating portions 135a each have a fourth width W4 greater than the third width W3 of the plurality of first insulating portions 125a, the second insulating structure 135 is designed to cover more epitaxial structure 200 than the first insulating structure 125 to increase the area of reflected light. Specifically, when light enters the reflective structure R from the active region 203, part of the light is reflected by the first insulating structure 125, and part of the light passes through the first insulating structure 125 and/or the contact structure 120. Similarly, due to the difference in refractive index between the second insulating structure 135 and the first conductive layer 130 (for example, the difference in refractive index is greater than 0.3), the first conductive layer 130 and the second insulating structure 135 are not reflected by the first conductive layer 130. The critical angle of the interface between the first conductive layer 130 and the second conductive layer 140 is smaller than the critical angle of the interface between the first conductive layer 130 and the second conductive layer 140. Therefore, by providing the second insulating structure 135, the probability of the light penetrating the first insulating structure 125 and/or contacting the structure 120 being totally reflected at the interface between the first conductive layer 130 and the second insulating structure 135 is increased, thereby increasing the light extraction efficiency. In one embodiment, when the reflective structure R does not have the first conductive layer 130, similarly, due to the refractive index difference between the second insulating structure 135 and the contact structure 120 (for example, the refractive index difference is greater than 1.5), the critical angle of the interface between the contact structure 120 and the second insulating structure 135 is smaller than the critical angle of the interface between the contact structure 120 and the second conductive layer 140. Therefore, the second insulating structure 135 can increase the light extraction efficiency of the optoelectronic semiconductor element 10.

在本實施例中,第二絕緣結構135在磊晶結構200方向上的正投影面積大於第一絕緣結構125在磊晶結構200方向上的正投影面積。詳言之,磊晶結構200具有一接觸表面L2相對於出光表面L1,接觸表面L2具有一第一面積A1,複數個第一絕緣部125a各具有一第一表面S1面對該接觸表面L2,複數個第一絕緣部125a的第一表面S1之總和為第二面積A2;而複數個第二絕緣部135a各具有一第二表面S2面對該接觸表面L2,複數第二絕緣部135a的第二表面S2之總和為第三面積A3,複數個第一絕緣部125及複數個第二絕緣部135重疊的區域具有一第四面積AO1,其中A2<A3<A1。在一實施例中,絕緣結構覆蓋率C介於80%至98%之間,例如為90%至98%之間、95%至97%之間。上述「絕緣結構覆蓋率C」為第一絕緣結構125及第二絕緣結構135覆蓋磊晶結構200的接觸表面L2的比例,計算方式為

Figure 111107452-A0305-12-0015-1
×100%。在本實施例中,由於第二絕緣結構135對位於第一絕緣結構125,且各第二絕緣部135a的第四寬度W4大於各第一絕緣部125a的第三寬度W3,因此,第二面積A2等於第四面積AO1,絕緣結構覆蓋率C的計算方式可以簡化為
Figure 111107452-A0305-12-0015-2
×100%。 In this embodiment, the orthographic projection area of the second insulating structure 135 in the direction of the epitaxial structure 200 is larger than the orthographic projection area of the first insulating structure 125 in the direction of the epitaxial structure 200 . In detail, the epitaxial structure 200 has a contact surface L2 opposite to the light emitting surface L1, the contact surface L2 has a first area A1, the plurality of first insulating portions 125a each have a first surface S1 facing the contact surface L2, the sum of the first surfaces S1 of the plurality of first insulating portions 125a is a second area A2; and the plurality of second insulating portions 135a each have a second surface S2 facing the contact surface L2, the sum of the second surfaces S2 of the plurality of second insulating portions 135a is a third area A3, and the overlapping area of the plurality of first insulating portions 125 and the plurality of second insulating portions 135 has a fourth area AO1, wherein A2<A3<A1. In one embodiment, the insulating structure coverage C is between 80% and 98%, for example, between 90% and 98%, or between 95% and 97%. The above-mentioned "insulating structure coverage C" is the ratio of the first insulating structure 125 and the second insulating structure 135 covering the contact surface L2 of the epitaxial structure 200, and is calculated as follows:
Figure 111107452-A0305-12-0015-1
× 100%. In this embodiment, since the second insulating structure 135 is opposite to the first insulating structure 125, and the fourth width W4 of each second insulating portion 135a is greater than the third width W3 of each first insulating portion 125a, the second area A2 is equal to the fourth area AO1, and the calculation method of the insulating structure coverage C can be simplified as follows:
Figure 111107452-A0305-12-0015-2
×100%.

反射層145可反射主動區203所發出的光線,使光線朝出光表面L1射出光電半導體元件10外。在本實施例中,反射層145可導電且包含半導體材料、金屬或合金。半導體材料可包含三五族半導體材料,例如二元、三元或四元三五族半導體材料。金屬包含但不限於銅(Cu)、鋁(Al)、錫(Sn)、金(Au)或銀(Ag)等。合金可包含選自由上述金屬所組成之群組中的至少兩者。在其他實施例中,反射層145亦可包含布拉格反射結構(distributed bragg reflector structure;DBR),其由兩種以上具有不同折射率的半導體材料交替堆疊而形成,諸如由AlAs/GaAs、AlGaAs/GaAs、或InGaP/GaAs所交替堆疊形成。在本實施例中,反射層145的材料為金屬,以獲得具有高反射率的反射結構R。 The reflective layer 145 can reflect the light emitted by the active area 203, so that the light is emitted toward the light-emitting surface L1 outside the optoelectronic semiconductor element 10. In this embodiment, the reflective layer 145 can be conductive and include semiconductor materials, metals or alloys. The semiconductor material can include III-V semiconductor materials, such as binary, ternary or quaternary III-V semiconductor materials. The metal includes but is not limited to copper (Cu), aluminum (Al), tin (Sn), gold (Au) or silver (Ag). The alloy can include at least two selected from the group consisting of the above metals. In other embodiments, the reflective layer 145 may also include a distributed bragg reflector structure (DBR), which is formed by alternately stacking two or more semiconductor materials with different refractive indices, such as AlAs/GaAs, AlGaAs/GaAs, or InGaP/GaAs. In this embodiment, the material of the reflective layer 145 is metal to obtain a reflective structure R with high reflectivity.

接合結構110用以接合基底100與反射結構R。接合結構110可為單層或多層結構。磊晶結構200在第1圖中被繪示為位於基底100的上方,但本實施例的磊晶結構200以及反射結構R製程上是先形成於另外的成長基板上(未繪出)後,再倒置接合到基底100。換句話說,在成長基底上形成磊晶結構200、接觸結構120、第一絕緣結構125、第一導電層130、第二絕緣結構135、 第二導電層140、以及反射層145,隨後再透過接合結構110接合至基底100,接著,移除成長基板。接合結構110之材料可包含透明氧化物材料、金屬或合金。透明氧化物材料包含但不限於氧化銦錫(ITO)、氧化銦(InO)、氧化錫(SnO)、氧化鎘錫(CTO)、氧化銻錫(ATO)、氧化鋁鋅(AZO)、氧化鋅錫(ZTO)、氧化鎵鋅(GZO)、氧化鋅(ZnO)、氧化銦鈰(ICO)、氧化銦鎢(IWO)、氧化銦鈦(ITiO)、氧化銦鋅(IZO)、氧化銦鎵(IGO)、氧化鎵鋁鋅(GAZO)或上述材料之組合。金屬包含但不限於銦(In)、銅(Cu)、鋁(Al)、錫(Sn)、金(Au)、銀(Ag)、鈦(Ti)、鎳(Ni)、鉑(Pt)或鎢(W)等。合金可包含選自由上述金屬所組成之群組中的至少兩者。 The bonding structure 110 is used to bond the substrate 100 and the reflective structure R. The bonding structure 110 can be a single-layer or multi-layer structure. The epitaxial structure 200 is shown in FIG. 1 as being located above the substrate 100, but the epitaxial structure 200 and the reflective structure R of this embodiment are first formed on another growth substrate (not shown) and then invertedly bonded to the substrate 100. In other words, the epitaxial structure 200, the contact structure 120, the first insulating structure 125, the first conductive layer 130, the second insulating structure 135, the second conductive layer 140, and the reflective layer 145 are formed on the growth substrate, and then bonded to the substrate 100 through the bonding structure 110, and then the growth substrate is removed. The material of the bonding structure 110 may include a transparent oxide material, a metal or an alloy. The transparent oxide material includes but is not limited to indium tin oxide (ITO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide (AZO), zinc tin oxide (ZTO), gallium zinc oxide (GZO), zinc oxide (ZnO), indium caerium oxide (ICO), indium tungsten oxide (IWO), indium titanium oxide (ITiO), indium zinc oxide (IZO), indium gallium oxide (IGO), gallium aluminum zinc oxide (GAZO) or a combination of the above materials. The metal includes but is not limited to indium (In), copper (Cu), aluminum (Al), tin (Sn), gold (Au), silver (Ag), titanium (Ti), nickel (Ni), platinum (Pt) or tungsten (W). The alloy may include at least two selected from the group consisting of the above metals.

綜上所述,光電半導體元件10包含了具有第一絕緣結構125、第一導電層130以及第二絕緣結構135的反射結構R,一方面藉由圖案化的第一絕緣結構125、圖案化的第二絕緣結構135以及第一導電層130的配置增加了光電半導體元件10的電流散布;另一方面,第二絕緣結構135增加覆蓋了磊晶結構200的面積,使光發生全反射的機率增加,從而提升了反射結構R的反射能力。 In summary, the optoelectronic semiconductor device 10 includes a reflective structure R having a first insulating structure 125, a first conductive layer 130, and a second insulating structure 135. On the one hand, the current spreading of the optoelectronic semiconductor device 10 is increased by configuring the patterned first insulating structure 125, the patterned second insulating structure 135, and the first conductive layer 130; on the other hand, the second insulating structure 135 increases the area covered by the epitaxial structure 200, so that the probability of total reflection of light is increased, thereby improving the reflective ability of the reflective structure R.

第2圖是根據本的另一實施例,繪示出光電半導體元件20對應第1圖中的方框A的位置的局部剖面示意圖。光電半導體元件20與光電半導體元件10具有相似的構件及構件相對位置關係,主要差別在於,光電半導體元件20另包含一第三絕緣結構 155及選擇性地包含第三導電層150。第三絕緣結構155包含互相分離的複數個第三絕緣部155a,各第三絕緣部155a大致對位於各第二開孔136及/或第一開孔126,使主動區203發射的光線可以在第三絕緣結構155的界面被全反射,藉此構成更全面的反射結構R。詳言之,當光線從主動區203射入反射結構R時,部分光線被第一絕緣結構125反射,且部分光線穿過第一絕緣結構125及/或接觸結構120,接著,在穿過第一絕緣結構125及/或接觸結構120的光線中,其中一部分被第二絕緣結構135反射,其中一部分穿過第二絕緣結構135及/或第二導電層140,類似地,由於第二導電層140與第三絕緣結構155之間存在著折射率差異(例如,折射率的差異大於0.3),第二導電層140與第三絕緣結構155之間的界面的臨界角小於第二導電層140與第三導電層150之間的界面的臨界角,因此,藉由第三絕緣結構155的設置,可增加出光效率。 FIG. 2 is a partial cross-sectional schematic diagram of the position of the optoelectronic semiconductor element 20 corresponding to the box A in FIG. 1 according to another embodiment of the present invention. The optoelectronic semiconductor element 20 has similar components and relative positional relationships of the components as the optoelectronic semiconductor element 10, and the main difference is that the optoelectronic semiconductor element 20 further includes a third insulating structure 155 and optionally includes a third conductive layer 150. The third insulating structure 155 includes a plurality of third insulating portions 155a separated from each other, and each third insulating portion 155a is roughly aligned with each second opening 136 and/or first opening 126, so that the light emitted by the active area 203 can be totally reflected at the interface of the third insulating structure 155, thereby forming a more comprehensive reflection structure R. Specifically, when light is incident from the active region 203 into the reflective structure R, part of the light is reflected by the first insulating structure 125, and part of the light passes through the first insulating structure 125 and/or the contact structure 120. Then, of the light passing through the first insulating structure 125 and/or the contact structure 120, part of it is reflected by the second insulating structure 135, and part of it passes through the second insulating structure 135 and/or the second conductive structure 120. Similarly, since there is a refractive index difference between the second conductive layer 140 and the third insulating structure 155 (for example, the refractive index difference is greater than 0.3), the critical angle of the interface between the second conductive layer 140 and the third insulating structure 155 is smaller than the critical angle of the interface between the second conductive layer 140 and the third conductive layer 150. Therefore, the light extraction efficiency can be increased by setting the third insulating structure 155.

如第2圖所示,第三導電層150覆蓋第二導電層140及第三絕緣結構155,並且被反射層145覆蓋。由於各第二開孔136大致對位於各接觸部120a,各第三絕緣部155a亦對位於各接觸部120a。在本實施例中,第三絕緣結構155為適形地覆蓋第二導電層140,且在對應第二絕緣結構135的複數個第二開口136處朝向第一導電層130的方向凹陷,。在其他實施例中,第二導電層140在遠離第一導電層130的表面可為一平整表面,使後續披覆於第二導電層140之第三絕緣結構155在遠離第一導電層130的表面亦為一平整表面。 As shown in FIG. 2 , the third conductive layer 150 covers the second conductive layer 140 and the third insulating structure 155, and is covered by the reflective layer 145. Since each second opening 136 is substantially aligned with each contact portion 120a, each third insulating portion 155a is also aligned with each contact portion 120a. In this embodiment, the third insulating structure 155 conformally covers the second conductive layer 140, and is recessed toward the first conductive layer 130 at a plurality of second openings 136 corresponding to the second insulating structure 135. In other embodiments, the surface of the second conductive layer 140 away from the first conductive layer 130 can be a flat surface, so that the surface of the third insulating structure 155 subsequently coated on the second conductive layer 140 away from the first conductive layer 130 is also a flat surface.

在本實施例中,第三絕緣結構155在磊晶結構200上的正投影面積小於第一絕緣結構125在磊晶結構200上的正投影面積,第三絕緣結構155在磊晶結構200上的正投影面積小於第二絕緣結構135在磊晶結構200上的正投影面積;或者,複數個第三絕緣部155a各具有一第五寬度W5小於複數個第二絕緣部135a的第四寬度W4。在本實施例中,第五寬度W5大於第二開孔136的第二寬度W2且小於第一開孔126的第一寬度W1。 In this embodiment, the orthographic projection area of the third insulating structure 155 on the epitaxial structure 200 is smaller than the orthographic projection area of the first insulating structure 125 on the epitaxial structure 200, and the orthographic projection area of the third insulating structure 155 on the epitaxial structure 200 is smaller than the orthographic projection area of the second insulating structure 135 on the epitaxial structure 200; or, each of the plurality of third insulating portions 155a has a fifth width W5 that is smaller than the fourth width W4 of the plurality of second insulating portions 135a. In this embodiment, the fifth width W5 is greater than the second width W2 of the second opening 136 and less than the first width W1 of the first opening 126.

詳言之,磊晶結構200的接觸表面L2具有一第一面積A1,各第一絕緣部125a各具有第一表面S1面對該接觸表面L2,複數第一絕緣部125a的第一表面S1總和為第二面積A2;而各第二絕緣部135各具有第二表面S2面對該接觸表面L2,複數第二絕緣部135的第二表面S2總和為第三面積A3;而各第三絕緣部155a各具有第三表面S3面對該接觸表面L2,複數第三絕緣部155a的第三表面S3總和為第四面積A4,且第一表面S1與第二表面S2、第一表面S1與第三表面S3、及第三表面S3與第二表面S2具有一重疊面積總和AO2;其中,A4<A2<A3<A1。在一實施例中,絕緣結構覆蓋率C介於85%至100%之間,例如為90%至100%之間、95%至100%之間。上述「絕緣結構覆蓋率C」為第一絕緣結構125、第二絕緣結構135及第三絕緣結構145覆蓋磊晶結構200的接觸表面L2的比例,計算方式為

Figure 111107452-A0305-12-0018-6
×100%。第三絕緣結構155可與第一絕緣結構125以及第二絕緣結構135具有相同或不同的材料,第三導電層150可與第一導電層130及第二導電層140具 有相同或不同的材料,例如:第一導電層130及第二導電層140具有相同材料(例如皆為銦錫氧化物(ITO)),第三導電層150具有不同材料(例如為銦鋅氧化物(IZO))。第三導電層150的厚度可以相同或不同於第一導電層130及/或第二導電層140,在本實施例中,第三導電層150的厚度大於第一導電層130且大致等於第二導電層140,第三導電層150經過平坦化處理,因而具有平坦的表面。在本實施例中,第三絕緣結構155的厚度為200埃米至2000埃米,例如250埃,第三導電層150的厚度為2000埃米至5000埃米。 Specifically, the contact surface L2 of the epitaxial structure 200 has a first area A1, each first insulating portion 125a has a first surface S1 facing the contact surface L2, and the first surfaces S1 of the plurality of first insulating portions 125a are summed up to a second area A2; each second insulating portion 135 has a second surface S2 facing the contact surface L2, and the second surfaces S2 of the plurality of second insulating portions 135 are summed up to a third area A3; each third insulating portion 155a has a third surface S3 facing the contact surface L2, and the third surfaces S3 of the plurality of third insulating portions 155a are summed up to a fourth area A4, and the first surface S1 and the second surface S2 , the first surface S1 and the third surface S3 are summed up to a fourth area A5 . , and the third surface S3 and the second surface S2 have a total overlapping area AO2; wherein A4<A2<A3<A1. In one embodiment, the insulating structure coverage C is between 85% and 100%, for example, between 90% and 100%, or between 95% and 100%. The above-mentioned "insulating structure coverage C" is the ratio of the first insulating structure 125, the second insulating structure 135, and the third insulating structure 145 covering the contact surface L2 of the epitaxial structure 200, and the calculation method is
Figure 111107452-A0305-12-0018-6
×100%. The third insulating structure 155 may have the same or different materials as the first insulating structure 125 and the second insulating structure 135, and the third conductive layer 150 may have the same or different materials as the first conductive layer 130 and the second conductive layer 140. For example, the first conductive layer 130 and the second conductive layer 140 may have the same material (for example, both are indium tin oxide (ITO)), and the third conductive layer 150 may have a different material (for example, indium zinc oxide (IZO)). The thickness of the third conductive layer 150 may be the same as or different from the first conductive layer 130 and/or the second conductive layer 140. In the present embodiment, the thickness of the third conductive layer 150 is greater than the first conductive layer 130 and is substantially equal to the second conductive layer 140. The third conductive layer 150 is planarized to have a flat surface. In the present embodiment, the thickness of the third insulating structure 155 is 200 angstroms to 2000 angstroms, for example, 250 angstroms, and the thickness of the third conductive layer 150 is 2000 angstroms to 5000 angstroms.

第3圖是根據本揭露的一實施例,繪示出光電半導體元件30對應第1圖中的方框A的位置的局部剖面示意圖。光電半導體元件30與光電半導體元件10具有相似的構件及構件相對位置關係,主要差別在於,在光電半導體元件30中,各第二絕緣部135a各自對位於各接觸部120a,亦即第二絕緣結構135覆蓋了接觸結構120。在本實施例中,第二絕緣部135a各具有第四寬度W4,第四寬度W4大於各第一開孔126的第一寬度W1及第二開孔136的第二寬度W2。各第二開孔136的位置與各接觸部120a的位置在基底100的垂直方向上互相錯位,換言之,第一開孔126與第二開孔136在垂直基底100的方向上不重疊。第二導電層140覆蓋第二絕緣結構135並填入複數個第二開孔136。本實施例的光電半導體元件30較光電半導體元件10具有更大的絕緣結構覆蓋率C(例如:本實施例的絕緣結構覆蓋率C實質上等於100%),且第 一開孔126與第二開孔136錯位設置也有利於電流散布。上述「絕緣結構覆蓋率C」可參考描述第1圖之計算方式。 FIG. 3 is a partial cross-sectional schematic diagram of a location of a photoelectric semiconductor device 30 corresponding to the box A in FIG. 1 according to an embodiment of the present disclosure. The photoelectric semiconductor device 30 has similar components and relative positional relationships of the components as the photoelectric semiconductor device 10, and the main difference is that in the photoelectric semiconductor device 30, each second insulating portion 135a is respectively located opposite to each contact portion 120a, that is, the second insulating structure 135 covers the contact structure 120. In this embodiment, each second insulating portion 135a has a fourth width W4, and the fourth width W4 is greater than the first width W1 of each first opening 126 and the second width W2 of the second opening 136. The positions of the second openings 136 and the positions of the contact portions 120a are offset from each other in the vertical direction of the substrate 100. In other words, the first opening 126 and the second opening 136 do not overlap in the direction perpendicular to the substrate 100. The second conductive layer 140 covers the second insulating structure 135 and fills a plurality of second openings 136. The optoelectronic semiconductor element 30 of this embodiment has a greater insulating structure coverage C than the optoelectronic semiconductor element 10 (for example: the insulating structure coverage C of this embodiment is substantially equal to 100%), and the offset arrangement of the first opening 126 and the second opening 136 is also beneficial to current spreading. The above-mentioned "insulating structure coverage C" can refer to the calculation method described in Figure 1.

第4圖是根據本揭露的一實施例,繪示出光電半導體元件40對應第1圖中的方框A的位置的局部剖面示意圖。光電半導體元件40與光電半導體元件30具有相似的構件及構件相對位置關係,主要差別在於,光電半導體元件40的第一開孔126的第一寬度W1大致等於第二絕緣部135a的第四寬度W4,且第二開孔136的第二寬度W2大於第一寬度W1及第四寬度W4。本實施例的光電半導體元件40可以保持絕緣結構具有高覆蓋率C,同時減少電流路徑,而達到均勻分散電流的功效。在本實施例中,絕緣結構覆蓋率C實質上等於100%。上述「絕緣結構覆蓋率C」可參考描述第1圖之計算方式。 FIG. 4 is a partial cross-sectional schematic diagram of the position of the optoelectronic semiconductor element 40 corresponding to the box A in FIG. 1 according to an embodiment of the present disclosure. The optoelectronic semiconductor element 40 has similar components and relative positional relationships of the components as the optoelectronic semiconductor element 30, and the main difference is that the first width W1 of the first opening 126 of the optoelectronic semiconductor element 40 is substantially equal to the fourth width W4 of the second insulating portion 135a, and the second width W2 of the second opening 136 is greater than the first width W1 and the fourth width W4. The optoelectronic semiconductor element 40 of this embodiment can maintain the insulating structure with a high coverage C, while reducing the current path, thereby achieving the effect of uniformly dispersing the current. In this embodiment, the insulating structure coverage C is substantially equal to 100%. The above "Insulation Structure Coverage Rate C" can refer to the calculation method described in Figure 1.

第5圖是根據本揭露的一實施例,繪示出光電半導體元件50對應第1圖中的方框A的位置的局部剖面示意圖。光電半導體元件50與光電半導體元件40具有相似的構件及構件相對位置關係,主要差別在於,光電半導體元件50的第二絕緣結構135部分與接觸部120a重疊、部分與接觸部120a不重疊。詳言之,各第二絕緣部135a具有一第一部份135a1與接觸部120a在垂直基底100的方向上重疊、一第二部分135a2與第一絕緣部125在垂直基底100的方向上重疊且與接觸部120a不重疊。在本實施例中,光電半導體元件50的第一開孔126的第一寬度W1大致等於第二絕緣部135a的第四寬度W4且小於第二開孔136的第二寬度W2。 在其他實施例中,第一寬度W1、第二寬度W2及第四寬度W4亦可以視情況進行調整。在本實施例中,絕緣結構覆蓋率C大於等於80%且小於100%。上述「絕緣結構覆蓋率C」可參考描述第1圖之計算方式。 FIG. 5 is a partial cross-sectional schematic diagram showing the position of the optoelectronic semiconductor element 50 corresponding to the box A in FIG. 1 according to an embodiment of the present disclosure. The optoelectronic semiconductor element 50 has similar components and relative positional relationships of the components as the optoelectronic semiconductor element 40, and the main difference is that the second insulating structure 135 of the optoelectronic semiconductor element 50 partially overlaps with the contact portion 120a and partially does not overlap with the contact portion 120a. In detail, each second insulating portion 135a has a first portion 135a1 overlapping with the contact portion 120a in a direction perpendicular to the substrate 100, and a second portion 135a2 overlapping with the first insulating portion 125 in a direction perpendicular to the substrate 100 and does not overlap with the contact portion 120a. In this embodiment, the first width W1 of the first opening 126 of the optoelectronic semiconductor element 50 is substantially equal to the fourth width W4 of the second insulating portion 135a and is smaller than the second width W2 of the second opening 136. In other embodiments, the first width W1, the second width W2 and the fourth width W4 can also be adjusted as appropriate. In this embodiment, the insulating structure coverage C is greater than or equal to 80% and less than 100%. The above-mentioned "insulating structure coverage C" can refer to the calculation method described in Figure 1.

第6圖是根據本揭露的一實施例,繪示出光電半導體元件60對應第1圖中的方框A的位置的局部剖面示意圖。光電半導體元件60與光電半導體元件40具有相似的構件及構件相對位置關係,主要差別在於光電半導體元件60的第二絕緣結構135位於第二導電層140及反射層145之間,反射層145填入第二絕緣結構135的複數個第二開孔136中。在本實施例中,第二開孔136的位置與接觸部120a的位置在垂直基底100的方向上互相錯位。在本實施例中,光電半導體元件60的第一開孔126的第一寬度W1大致等於第二絕緣部135a的第四寬度W4且小於第二開孔136的第二寬度W2。在其他實施例中,第一寬度W1、第二寬度W2及第四寬度W4亦可以視情況進行調整。在本實施例中,若不考慮製程誤差,絕緣結構覆蓋率C等於100%。上述「絕緣結構覆蓋率C」可參考描述第1圖之計算方式。在另一實施例,光電半導體元件具有類似光電半導體元件60的結構,惟,第一絕緣結構125及反射層145之間僅具有一層導電層(例如第一導電層130或第二導電層140。 FIG. 6 is a partial cross-sectional schematic diagram showing the position of the optoelectronic semiconductor device 60 corresponding to the frame A in FIG. 1 according to an embodiment of the present disclosure. The optoelectronic semiconductor device 60 has similar components and relative positional relationships of the components as the optoelectronic semiconductor device 40, and the main difference is that the second insulating structure 135 of the optoelectronic semiconductor device 60 is located between the second conductive layer 140 and the reflective layer 145, and the reflective layer 145 is filled in the plurality of second openings 136 of the second insulating structure 135. In this embodiment, the position of the second opening 136 and the position of the contact portion 120a are offset from each other in a direction perpendicular to the substrate 100. In this embodiment, the first width W1 of the first opening 126 of the optoelectronic semiconductor element 60 is substantially equal to the fourth width W4 of the second insulating portion 135a and is smaller than the second width W2 of the second opening 136. In other embodiments, the first width W1, the second width W2 and the fourth width W4 can also be adjusted as appropriate. In this embodiment, if the process error is not considered, the insulating structure coverage C is equal to 100%. The above-mentioned "insulating structure coverage C" can refer to the calculation method described in Figure 1. In another embodiment, the optoelectronic semiconductor element has a structure similar to the optoelectronic semiconductor element 60, but only one conductive layer (such as the first conductive layer 130 or the second conductive layer 140) is provided between the first insulating structure 125 and the reflective layer 145.

第7A圖是根據第1圖之實施例,繪示出光電半導體元件10一部分的上視示意圖,第7B圖是根據第1圖之實施例, 繪示出第7A圖中的方框B的位置的局部上視示意圖,且第1圖為對應第7B圖中剖線A-A’的局部剖面示意圖。為了清楚起見,第7A圖以及第7B圖僅繪製出部分構件,例如:僅繪製第一電極墊301、延伸電極302、第一絕緣結構125、第一開孔126、第二絕緣結構135、第二開孔136,並省略了其他構件。在本實施例中,光電半導體元件10具有兩個第一電極墊301,分別靠近光電半導體元件10的兩相對邊緣E1、E2,且具有互相平行的複數個延伸電極302位於邊緣E1、E2之間。兩相鄰的延伸電極302之間具有一第一開孔126及複數個第二開孔136對位於第一開孔126,如第7B圖所示,虛線圓圈處表示對應至第二開孔136的位置,且第二絕緣結構135位於第二開孔136以外的位置(第二絕緣結構135的分布如第7A、7B圖中的斜線圖樣),第一絕緣結構125的第一開孔126可對應至接觸結構120的形成區域。由上視示意圖可得知,第二開孔136位於第一開孔126中,且第二絕緣結構135在磊晶結構200上的正投影面積(即前述之實施例的第三面積A3)大於第一絕緣結構125在磊晶結構200上的正投影面積(即前述之實施例的第二面積A2)。 FIG. 7A is a schematic top view of a portion of the optoelectronic semiconductor element 10 according to the embodiment of FIG. 1, and FIG. 7B is a schematic top view of a portion of the position of the box B in FIG. 7A according to the embodiment of FIG. 1, and FIG. 1 is a schematic partial cross-sectional view corresponding to the section line A-A' in FIG. 7B. For the sake of clarity, FIG. 7A and FIG. 7B only depict part of the components, for example, only the first electrode pad 301, the extended electrode 302, the first insulating structure 125, the first opening 126, the second insulating structure 135, and the second opening 136, and omit other components. In this embodiment, the optoelectronic semiconductor element 10 has two first electrode pads 301, which are respectively close to two opposite edges E1 and E2 of the optoelectronic semiconductor element 10, and a plurality of mutually parallel extension electrodes 302 are located between the edges E1 and E2. A first opening 126 and a plurality of second openings 136 are located between the two adjacent extension electrodes 302, and are located opposite to the first opening 126, as shown in FIG. 7B, where the dotted circle indicates the position corresponding to the second opening 136, and the second insulating structure 135 is located outside the second opening 136 (the distribution of the second insulating structure 135 is shown in the oblique line pattern in FIGS. 7A and 7B), and the first opening 126 of the first insulating structure 125 can correspond to the formation area of the contact structure 120. It can be seen from the top view that the second opening 136 is located in the first opening 126, and the orthographic projection area of the second insulating structure 135 on the epitaxial structure 200 (i.e., the third area A3 of the aforementioned embodiment) is larger than the orthographic projection area of the first insulating structure 125 on the epitaxial structure 200 (i.e., the second area A2 of the aforementioned embodiment).

第8圖是根據本揭露一實施例的半導體組件70的剖面結構示意圖。半導體組件70包含光電半導體元件(10、20、30、40、50、或60)、封裝基板21、載體23、接合線25、接觸電極26以及封裝層28。封裝基板21可包含陶瓷或玻璃材料。封裝基板21中具有多個通孔22。通孔22中可填充有導電性材料如 金屬等而有助於導電或/且散熱。載體23位於封裝基板21一側的表面上,且亦包含導電性材料,如金屬。接觸電極26位於封裝基板21另一側的表面上。接觸電極26包含第一接觸墊26a以及第二接觸墊26b,且第一接觸墊26a以及第二接觸墊26b可藉由通孔22而與載體23電性連接。在一實施例中,接觸電極26可進一步包含散熱墊(thermal pad)(未繪示),例如位於第一接觸墊26a與第二接觸墊26b之間。 FIG. 8 is a schematic diagram of a cross-sectional structure of a semiconductor component 70 according to an embodiment of the present disclosure. The semiconductor component 70 includes a photoelectric semiconductor element (10, 20, 30, 40, 50, or 60), a package substrate 21, a carrier 23, a bonding wire 25, a contact electrode 26, and a package layer 28. The package substrate 21 may include a ceramic or glass material. The package substrate 21 has a plurality of through holes 22. The through holes 22 may be filled with a conductive material such as metal to facilitate electrical conduction and/or heat dissipation. The carrier 23 is located on the surface of one side of the package substrate 21 and also includes a conductive material such as metal. The contact electrode 26 is located on the surface of the other side of the package substrate 21. The contact electrode 26 includes a first contact pad 26a and a second contact pad 26b, and the first contact pad 26a and the second contact pad 26b can be electrically connected to the carrier 23 through the through hole 22. In one embodiment, the contact electrode 26 can further include a thermal pad (not shown), for example, located between the first contact pad 26a and the second contact pad 26b.

光電半導體元件10、20、30、40、50或60位於載體23上。載體23包含第一部23a及第二部23b,光電半導體元件10、20、30、40、50或60藉由接合線25而與載體23的第二部分23b電性連接。接合線25的材質可包含金屬,例如金、銀、銅、鋁或至少包含上述任一元素之合金。封裝層28覆蓋於光電半導體元件10、20、30、40、50或60上,具有保護光電半導體元件之效果。具體來說,封裝層28可包含樹脂材料如環氧樹脂(epoxy)、矽氧烷樹脂(silicone)等。封裝層28選擇性地可包含複數個波長轉換粒子(未繪示)以轉換光電半導體元件10、20、30、40、50或60所發出的第一光為一第二光。第二光的波長大於第一光的波長。 The optoelectronic semiconductor element 10, 20, 30, 40, 50 or 60 is located on a carrier 23. The carrier 23 includes a first portion 23a and a second portion 23b, and the optoelectronic semiconductor element 10, 20, 30, 40, 50 or 60 is electrically connected to the second portion 23b of the carrier 23 via a bonding wire 25. The material of the bonding wire 25 may include a metal, such as gold, silver, copper, aluminum or an alloy containing at least one of the above elements. The encapsulation layer 28 covers the optoelectronic semiconductor element 10, 20, 30, 40, 50 or 60 and has the effect of protecting the optoelectronic semiconductor element. Specifically, the encapsulation layer 28 may include a resin material such as epoxy, silicone, etc. The packaging layer 28 may optionally include a plurality of wavelength conversion particles (not shown) to convert the first light emitted by the optoelectronic semiconductor element 10, 20, 30, 40, 50 or 60 into a second light. The wavelength of the second light is greater than the wavelength of the first light.

第9圖為根據本揭露的一實施例的感測模組80的部分剖面結構示意圖,感測模組80包含一承載體820、第一半導體元件811及第二半導體元件831。第一半導體元件811及/或第二半導體元件831可以為上述的光電半導體元件10、20、30、40、 50、或60。承載體820包含第一擋牆821、第二擋牆822、第三擋牆823、載板824、第一空間825及第二空間826,第一半導體元件811位於第一擋牆821與第二擋牆822之間的空間825中,第二半導體元件831位於第二擋牆822與第三擋牆823之間的空間826中。第一半導體元件811及/或第二半導體元件831可以為諸如第1圖所繪示的垂直式晶片。第一半導體元件811及第二半導體元件831位於載板824上,並與載板824上的電路連接結構(未繪示)形成電性連接。在本實施例中,第一半導體元件811為一發光元件,第二半導體元件831為一光接收元件,且感測模組80可置於穿戴裝置(例如:手錶、耳機)中,第一半導體元件811發出之光線(亦即,出射光812)穿過皮膚並照射身體細胞以及血液,再藉由第二半導體元件831吸收從身體細胞以及血液散射/反射回來的光(亦即,入射光832),根據此反射、散射光的變化,用以偵測人體的生理訊號,例如:心率、血糖、血壓、血氧濃度等。 FIG. 9 is a partial cross-sectional structural diagram of a sensing module 80 according to an embodiment of the present disclosure. The sensing module 80 includes a carrier 820, a first semiconductor element 811, and a second semiconductor element 831. The first semiconductor element 811 and/or the second semiconductor element 831 may be the above-mentioned optoelectronic semiconductor element 10, 20, 30, 40, 50, or 60. The carrier 820 includes a first baffle 821, a second baffle 822, a third baffle 823, a carrier 824, a first space 825, and a second space 826. The first semiconductor element 811 is located in the space 825 between the first baffle 821 and the second baffle 822, and the second semiconductor element 831 is located in the space 826 between the second baffle 822 and the third baffle 823. The first semiconductor element 811 and/or the second semiconductor element 831 may be a vertical chip as shown in FIG. 1. The first semiconductor element 811 and the second semiconductor element 831 are located on the carrier 824 and are electrically connected to a circuit connection structure (not shown) on the carrier 824. In this embodiment, the first semiconductor element 811 is a light-emitting element, the second semiconductor element 831 is a light-receiving element, and the sensing module 80 can be placed in a wearable device (e.g., a watch, earphones). The light emitted by the first semiconductor element 811 (i.e., the outgoing light 812) passes through the skin and irradiates the body cells and blood, and then the second semiconductor element 831 absorbs the light scattered/reflected back from the body cells and blood (i.e., the incident light 832). Based on the changes in the reflected and scattered light, physiological signals of the human body, such as heart rate, blood sugar, blood pressure, blood oxygen concentration, etc., are detected.

具體來說,本揭露內容之光電半導體元件、半導體組件及感測模組可應用於照明、醫療、顯示、通訊、感測、電源系統等領域的產品,例如燈具、監視器、手機、平板電腦、車用儀表板、電視、電腦、穿戴裝置(如手錶、手環、項鍊等)、交通號誌、戶外顯示器、醫療器材等。 Specifically, the optoelectronic semiconductor elements, semiconductor components and sensing modules disclosed herein can be applied to products in the fields of lighting, medical treatment, display, communication, sensing, power supply system, etc., such as lamps, monitors, mobile phones, tablet computers, car dashboards, televisions, computers, wearable devices (such as watches, bracelets, necklaces, etc.), traffic signs, outdoor displays, medical equipment, etc.

綜上所述,本揭露之實施例藉由提供具有兩層以上的絕緣結構的光電半導體元件且/或搭配絕緣結構的開孔位置的設置且/或各絕緣結構的寬度設計,以得到對磊晶結構具有更高絕緣結 構覆蓋率C的反射結構及利於電流於光電半導體元件中的散布,進而提升亮度並維持正向偏壓。應理解的是,並非全部的優點皆已必然在此討論,也非所有實施例都需要具備特定的優點,且其他實施例可提供不同的優點。 In summary, the embodiments disclosed herein provide a photoelectric semiconductor element with two or more insulating structures and/or the arrangement of the opening positions of the insulating structures and/or the width design of each insulating structure to obtain a reflective structure with a higher insulating structure coverage C for the epitaxial structure and facilitate the distribution of current in the photoelectric semiconductor element, thereby improving the brightness and maintaining the forward bias. It should be understood that not all advantages are necessarily discussed here, and not all embodiments need to have specific advantages, and other embodiments may provide different advantages.

以上概述數個實施例之部件,以便在本揭露所屬技術領域中具有通常知識者可更易理解本揭露實施例的觀點。在本揭露所屬技術領域中具有通常知識者應理解,他們能以本揭露實施例為基礎,設計或修改其他製程和結構,以達到與在此介紹的實施例相同之目的及/或優勢。在本揭露所屬技術領域中具有通常知識者也應理解到,此類等效的製程和結構並無悖離本揭露的精神與範圍,且他們能在不違背本揭露之精神和範圍之下,做各式各樣的改變、取代和替換。 The above summarizes the components of several embodiments so that those with ordinary knowledge in the art to which the present disclosure belongs can more easily understand the viewpoints of the embodiments of the present disclosure. Those with ordinary knowledge in the art to which the present disclosure belongs should understand that they can design or modify other processes and structures based on the embodiments of the present disclosure to achieve the same purpose and/or advantages as the embodiments introduced herein. Those with ordinary knowledge in the art to which the present disclosure belongs should also understand that such equivalent processes and structures do not violate the spirit and scope of the present disclosure, and they can make various changes, substitutions and replacements without violating the spirit and scope of the present disclosure.

10:光電半導體元件 10: Optoelectronic semiconductor components

100:基底 100: Base

110:接合結構 110:Joint structure

120:接觸結構 120: Contact structure

120a:接觸部 120a: Contact part

120a1:第一下表面 120a1: first lower surface

125:第一絕緣結構 125: First insulation structure

125a:第一絕緣部 125a: First insulating part

125a1:第二下表面 125a1: Second lower surface

126:第一開孔 126: First opening

130:第一導電層 130: First conductive layer

135:第二絕緣結構 135: Second insulation structure

135a:第二絕緣部 135a: Second insulation section

136:第二開孔 136: Second opening

140:第二導電層 140: Second conductive layer

145:反射層 145:Reflective layer

200:磊晶結構 200: Epitaxial structure

201:第一半導體結構 201: First semiconductor structure

202:第二半導體結構 202: Second semiconductor structure

203:主動區 203: Active zone

300:第一電極 300: First electrode

302:延伸電極 302: Extension electrode

400:第二電極 400: Second electrode

A:方框 A: Box

L1:出光表面 L1: light emitting surface

L2:接觸表面 L2: Contact surface

R:反射結構 R: Reflection structure

S:表面 S: Surface

S1:第一表面 S 1 : First surface

S2:第二表面 S2 : Second surface

W1:第一寬度 W1: First width

W2:第二寬度 W2: Second width

W3:第三寬度 W3: Third width

W4:第四寬度 W4: Fourth width

Claims (10)

一種光電半導體元件,包括:一磊晶結構具有一第一表面及相對於該第一表面的第二表面;一第一絕緣結構,位於該磊晶結構的該第一表面,且由剖面觀之,該第一絕緣結構包含互相分離的複數個第一絕緣部及複數個第一開孔,該第一開孔位於兩相鄰的第一絕緣部之間;一接觸結構,覆蓋該磊晶結構;一第一導電層,覆蓋該接觸結構及該第一絕緣結構;一第二絕緣結構,覆蓋該第一導電層,且由剖面觀之,該第二絕緣結構包含互相分離的複數個第二絕緣部及複數個第二開孔,該第二開孔位於兩相鄰的第二絕緣部之間,且該複數個第二絕緣部對應於該複數個第一絕緣部的位置;一第一電極,位於該磊晶結構的該第二表面。 A photoelectric semiconductor element comprises: an epitaxial structure having a first surface and a second surface opposite to the first surface; a first insulating structure located on the first surface of the epitaxial structure, and in cross-section, the first insulating structure comprises a plurality of first insulating portions separated from each other and a plurality of first openings, the first opening being located between two adjacent first insulating portions; a contact structure covering the epitaxial structure; a first conductive layer, covering the contact structure and the first insulating structure; a second insulating structure, covering the first conductive layer, and from a cross-sectional view, the second insulating structure includes a plurality of second insulating portions and a plurality of second openings separated from each other, the second openings are located between two adjacent second insulating portions, and the plurality of second insulating portions correspond to the positions of the plurality of first insulating portions; a first electrode, located on the second surface of the epitaxial structure. 如請求項1之光電半導體元件,更包括一第二導電層,覆蓋該第二絕緣結構且填入該複數個第二開孔。 The optoelectronic semiconductor element of claim 1 further includes a second conductive layer covering the second insulating structure and filling the plurality of second openings. 如請求項1之光電半導體元件,其中,該接觸結構具有一摻雜濃度為5×1017/cm3至1×1020/cm3The optoelectronic semiconductor device of claim 1, wherein the contact structure has a doping concentration of 5×10 17 /cm 3 to 1×10 20 /cm 3 . 如請求項1之光電半導體元件,更包含一第二電極,該第二絕緣結構位於該磊晶結構的該第一表面及該第二電極之間。 The optoelectronic semiconductor element of claim 1 further comprises a second electrode, and the second insulating structure is located between the first surface of the epitaxial structure and the second electrode. 如請求項1之光電半導體元件,其中,由剖面觀之,該第一電極與該接觸結構互相錯位。 As in claim 1, the optoelectronic semiconductor element, wherein, viewed from a cross-section, the first electrode and the contact structure are misaligned with each other. 如請求項1至5任一項之光電半導體元件,更包含一基底及一接合結構位於該基底及該第二絕緣結構之間。 The optoelectronic semiconductor device of any one of claims 1 to 5 further comprises a substrate and a bonding structure located between the substrate and the second insulating structure. 一種光電半導體元件,包括:一磊晶結構;一第一絕緣結構,覆蓋該磊晶結構,且由剖面觀之,該第一絕緣結構包含互相分離的複數個第一絕緣部及複數個第一開孔,該第一開孔位於兩相鄰的第一絕緣部之間;一接觸結構,覆蓋該磊晶結構;一第一導電層,覆蓋該接觸結構及該第一絕緣結構;一第二絕緣結構,覆蓋該第一導電層,且由剖面觀之,該第二絕緣結構包含互相分離的複數個第二絕緣部及複數個第二開孔,該第二開孔位於兩相鄰的第二絕緣部之間,且該複數個第二絕緣部具有一第一部份與該接觸結構重疊及一第二部分與該接觸結構不重疊;一第一電極,位於該磊晶結構上方;以及一第二電極,該磊晶結構位於該第一電極及該第二電極之間。 A photoelectric semiconductor element comprises: an epitaxial structure; a first insulating structure covering the epitaxial structure, wherein the first insulating structure comprises a plurality of first insulating portions and a plurality of first openings separated from each other in cross section, wherein the first opening is located between two adjacent first insulating portions; a contact structure covering the epitaxial structure; a first conductive layer covering the contact structure and the first insulating structure; and a second insulating structure covering the first conductive layer. layer, and from a cross-sectional view, the second insulating structure includes a plurality of second insulating portions and a plurality of second openings separated from each other, the second openings are located between two adjacent second insulating portions, and the plurality of second insulating portions have a first portion overlapping with the contact structure and a second portion not overlapping with the contact structure; a first electrode located above the epitaxial structure; and a second electrode, the epitaxial structure is located between the first electrode and the second electrode. 如請求項1或7之光電半導體元件,其中該接觸結構包含半導體材料,該導電層的材料包含透明導電氧化物。 As claimed in claim 1 or 7, the optoelectronic semiconductor element, wherein the contact structure comprises a semiconductor material, and the material of the conductive layer comprises a transparent conductive oxide. 如請求項1或7之光電半導體元件,其中該第一開孔具有一第一寬度,該第二開孔具有一第二寬度大於、小於或等於該第一寬度。 The optoelectronic semiconductor element of claim 1 or 7, wherein the first opening has a first width, and the second opening has a second width greater than, less than, or equal to the first width. 如請求項1或7之光電半導體元件,其中,該接觸結構包含複數個接觸部,位於該複數個第一開孔中。 As in claim 1 or 7, the optoelectronic semiconductor element, wherein the contact structure comprises a plurality of contact portions located in the plurality of first openings.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201703278A (en) * 2015-02-17 2017-01-16 新世紀光電股份有限公司 Light-emitting diode with Bragg reflector and manufacturing method thereof
CN114038964A (en) * 2021-09-16 2022-02-11 重庆康佳光电技术研究院有限公司 Flip light-emitting chip and preparation method thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201703278A (en) * 2015-02-17 2017-01-16 新世紀光電股份有限公司 Light-emitting diode with Bragg reflector and manufacturing method thereof
CN114038964A (en) * 2021-09-16 2022-02-11 重庆康佳光电技术研究院有限公司 Flip light-emitting chip and preparation method thereof

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