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TWI866692B - Display driver chip, liquid crystal display and information processing device capable of avoiding flickering phenomenon at the initial stage of awakening - Google Patents

Display driver chip, liquid crystal display and information processing device capable of avoiding flickering phenomenon at the initial stage of awakening Download PDF

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TWI866692B
TWI866692B TW112148558A TW112148558A TWI866692B TW I866692 B TWI866692 B TW I866692B TW 112148558 A TW112148558 A TW 112148558A TW 112148558 A TW112148558 A TW 112148558A TW I866692 B TWI866692 B TW I866692B
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detection circuit
channel
floating detection
switch
liquid crystal
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TW202524175A (en
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齊元
吳昭呈
高振凱
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大陸商北京集創北方科技股份有限公司
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Abstract

一種可避免喚醒初期之閃爍現象的顯示驅動晶片,具有一第一浮接偵測電路及一第二浮接偵測電路以偵測一正類比電壓輸入端及一負類比電壓輸入端之輸入狀態,且其係在偵測到所述輸入狀態為浮接時將該正類比電壓輸入端及該負類比電壓輸入端接地,從而可避免系統被喚醒時之液晶螢幕發生閃爍現象。A display driver chip that can avoid flickering in the early stage of awakening has a first floating detection circuit and a second floating detection circuit to detect the input status of a positive analog voltage input terminal and a negative analog voltage input terminal, and when the input status is detected to be floating, the positive analog voltage input terminal and the negative analog voltage input terminal are grounded, thereby avoiding flickering on the liquid crystal screen when the system is awakened.

Description

可避免喚醒初期之閃爍現象的顯示驅動晶片、液晶顯示器及資訊處理裝置Display driver chip, liquid crystal display and information processing device capable of avoiding flickering phenomenon at the initial stage of awakening

本發明係有關液晶顯示器之驅動電路,尤指一種可避免喚醒初期之閃爍現象的顯示驅動晶片。The present invention relates to a driving circuit of a liquid crystal display, and more particularly to a display driving chip that can avoid flickering in the early stage of wake-up.

請參照圖1,其繪示一現有顯示驅動電路之方塊圖。如圖1所示,該顯示驅動電路包含一電源管理晶片10及一驅動晶片20以驅動一液晶顯示面板30以為一資訊處理裝置,例如智慧型手機,提供一顯示畫面。Please refer to Fig. 1, which shows a block diagram of a conventional display driver circuit. As shown in Fig. 1, the display driver circuit includes a power management chip 10 and a driver chip 20 to drive a liquid crystal display panel 30 to provide a display screen for an information processing device, such as a smart phone.

電源管理晶片10提供一數位供應電壓V CC、一正類比電壓V SP及一負類比電壓V SN至驅動晶片20之接腳A、B、C以使驅動晶片20的輸出通道能夠依顯示資料產生源極電壓以驅動液晶顯示面板30之像素。 The power management chip 10 provides a digital supply voltage V CC , a positive analog voltage V SP and a negative analog voltage V SN to pins A, B and C of the driver chip 20 so that the output channel of the driver chip 20 can generate a source voltage according to display data to drive the pixels of the liquid crystal display panel 30 .

請一併參照圖2a及圖2b,其分別繪示驅動晶片20之一輸出通道中的正源極電壓輸出電路及負源極電壓輸出電路,其中,該正源極電壓輸出電路包含由一PMOS電晶體21和一NMOS電晶體22所組成之一反相放大器,且該負源極電壓輸出電路包含由一PMOS電晶體23和一NMOS電晶體24所組成之一反相放大器。當該輸出通道須輸出正的源極電壓時,該正源極電壓輸出電路會依該類比電壓V X產生一正輸出電壓V OUTP;當該輸出通道須輸出負的源極電壓時,該負源極電壓輸出電路會依一類比電壓V X產生一負輸出電壓V OUTNPlease refer to Figures 2a and 2b, which respectively illustrate a positive source voltage output circuit and a negative source voltage output circuit in an output channel of a driver chip 20, wherein the positive source voltage output circuit includes an inverting amplifier composed of a PMOS transistor 21 and an NMOS transistor 22, and the negative source voltage output circuit includes an inverting amplifier composed of a PMOS transistor 23 and an NMOS transistor 24. When the output channel needs to output a positive source voltage, the positive source voltage output circuit generates a positive output voltage V OUTP according to the analog voltage V X ; when the output channel needs to output a negative source voltage, the negative source voltage output circuit generates a negative output voltage V OUTN according to the analog voltage V X.

另外,一般而言,當該資訊處理裝置處於休眠狀態時,電源管理晶片10會關掉正類比電壓V SP及負類比電壓V SN,只提供數位供應電壓V CC以節省功耗。 In addition, generally speaking, when the information processing device is in a sleep state, the power management chip 10 turns off the positive analog voltage V SP and the negative analog voltage V SN and only provides the digital supply voltage V CC to save power consumption.

然而,當電源管理晶片關掉正類比電壓V SP及負類比電壓V SN時,接腳B、C的電位會呈現未定狀態而可能經由PMOS電晶體21之寄生二極體和NMOS電晶體24之寄生二極體分別影響正輸出電壓V OUTP和負輸出電壓V OUTN,使得液晶顯示面板30的液晶分子承受直流殘留效應,致使該資訊處理裝置在由休眠狀態被喚醒而再次點亮液晶顯示面板30時,其螢幕會發生閃爍(flicker)現象。 However, when the power management chip turns off the positive analog voltage V SP and the negative analog voltage V SN , the potentials of the pins B and C will be in an uncertain state and may affect the positive output voltage V OUTP and the negative output voltage V OUTN respectively through the parasitic diode of the PMOS transistor 21 and the parasitic diode of the NMOS transistor 24, so that the liquid crystal molecules of the liquid crystal display panel 30 are subjected to the DC residual effect, causing the screen of the information processing device to flicker when it is awakened from the sleep state and the liquid crystal display panel 30 is lit again.

為解決上述的問題,本領域亟需一種新穎的顯示驅動電路架構。In order to solve the above problems, a novel display driver circuit architecture is urgently needed in the art.

本發明之一目的在於提供一種顯示驅動晶片,用以驅動一液晶顯示面板,其可在偵測到正、負供應電壓輸入接腳處於浮接狀態時將該二接腳短路至一參考地,以確保多個輸出通道之輸出電壓能在該二接腳處於浮接狀態之期間穩定在該參考地的電位而避免該液晶顯示面板的液晶分子承受直流殘留效應,從而在該二接腳重新獲得各自的供應電壓而使各該輸出通道恢復輸出源極電壓時,該液晶顯示面板的螢幕不致發生閃爍現象。One purpose of the present invention is to provide a display driver chip for driving a liquid crystal display panel, which can short-circuit the positive and negative supply voltage input pins to a reference ground when detecting that the two pins are in a floating state, so as to ensure that the output voltages of multiple output channels can be stabilized at the potential of the reference ground during the period when the two pins are in a floating state to avoid the liquid crystal molecules of the liquid crystal display panel from being subjected to a DC residual effect, so that when the two pins regain their respective supply voltages and each output channel recovers the output source voltage, the screen of the liquid crystal display panel will not flicker.

本發明之另一目的在於提供一種液晶顯示器,其可藉由前述之顯示驅動晶片避免其螢幕在由休眠狀態被喚醒時產生閃爍現象。Another object of the present invention is to provide a liquid crystal display that can prevent the screen from flickering when awakened from a sleep state by using the aforementioned display driver chip.

本發明之又一目的在於提供一種資訊處理裝置,其可藉由前述之液晶顯示器避免其螢幕在由休眠狀態被喚醒時產生閃爍現象。Another object of the present invention is to provide an information processing device which can prevent the screen from flickering when awakened from a sleep state by using the aforementioned liquid crystal display.

為達上述目的,一種可避免喚醒初期之閃爍現象的顯示驅動晶片乃被提出,用以驅動一液晶顯示面板,且其具有: 一第一浮接偵測電路及一第一開關,該第一浮接偵測電路係由一數位供應電壓供電以偵測一正類比電壓輸入端之一第一輸入狀態,該第一開關具有一第一控制端及一第一通道,該第一控制端係與該第一浮接偵測電路之輸出端耦接,該第一通道係耦接於該正類比電壓輸入端與一參考地之間,當該第一輸入狀態為浮接時,該第一浮接偵測電路呈現作用狀態以導通該第一通道,且當該第一輸入狀態為一正類比電壓時,該第一浮接偵測電路呈現不作用狀態以斷開該第一通道;以及 一第二浮接偵測電路及一第二開關,該第二浮接偵測電路係由該數位供應電壓供電以偵測一負類比電壓輸入端之一第二輸入狀態,該第二開關具有一第二控制端及一第二通道,該第二控制端係與該第二浮接偵測電路之輸出端耦接,該第二通道係耦接於該負類比電壓輸入端與該參考地之間,當該第二輸入狀態為浮接時,該第二浮接偵測電路呈現作用狀態以導通該第二通道,且當該第二輸入狀態為一負類比電壓時,該第二浮接偵測電路呈現不作用狀態以斷開該第二通道。 To achieve the above-mentioned purpose, a display driver chip that can avoid flickering in the early stage of wake-up is proposed to drive a liquid crystal display panel, and it has: A first floating detection circuit and a first switch, the first floating detection circuit is powered by a digital supply voltage to detect a first input state of a positive analog voltage input terminal, the first switch has a first control terminal and a first channel, the first control terminal is coupled to the output terminal of the first floating detection circuit, the first channel is coupled between the positive analog voltage input terminal and a reference ground, when the first input state is floating, the first floating detection circuit is in an active state to turn on the first channel, and when the first input state is a positive analog voltage, the first floating detection circuit is in an inactive state to disconnect the first channel; and A second floating detection circuit and a second switch, the second floating detection circuit is powered by the digital supply voltage to detect a second input state of a negative analog voltage input terminal, the second switch has a second control terminal and a second channel, the second control terminal is coupled to the output terminal of the second floating detection circuit, the second channel is coupled between the negative analog voltage input terminal and the reference ground, when the second input state is floating, the second floating detection circuit is in an active state to turn on the second channel, and when the second input state is a negative analog voltage, the second floating detection circuit is in an inactive state to disconnect the second channel.

在一實施例中,該第一浮接偵測電路和該第二浮接偵測電路各係一反相邏輯電路。In one embodiment, the first floating detection circuit and the second floating detection circuit are each an inverting logic circuit.

在可能的實施例中,該第一開關可為一NMOS電晶體、一PMOS電晶體或一CMOS電晶體。In possible embodiments, the first switch may be an NMOS transistor, a PMOS transistor or a CMOS transistor.

在可能的實施例中,該第二開關可為一NMOS電晶體、一PMOS電晶體或一CMOS電晶體。In possible embodiments, the second switch may be an NMOS transistor, a PMOS transistor or a CMOS transistor.

為達上述目的,本發明進一步提出一種液晶顯示器,其具有一液晶顯示面板及用以驅動該液晶顯示面板之一驅動晶片,且其特徵在於該驅動晶片具有: 一第一浮接偵測電路及一第一開關,該第一浮接偵測電路係由一數位供應電壓供電以偵測一正類比電壓輸入端之一第一輸入狀態,該第一開關具有一第一控制端及一第一通道,該第一控制端係與該第一浮接偵測電路之輸出端耦接,該第一通道係耦接於該正類比電壓輸入端與一參考地之間,當該第一輸入狀態為浮接時,該第一浮接偵測電路呈現作用狀態以導通該第一通道,且當該第一輸入狀態為一正類比電壓時,該第一浮接偵測電路呈現不作用狀態以斷開該第一通道;以及 一第二浮接偵測電路及一第二開關,該第二浮接偵測電路係由該數位供應電壓供電以偵測一負類比電壓輸入端之一第二輸入狀態,該第二開關具有一第二控制端及一第二通道,該第二控制端係與該第二浮接偵測電路之輸出端耦接,該第二通道係耦接於該負類比電壓輸入端與該參考地之間,當該第二輸入狀態為浮接時,該第二浮接偵測電路呈現作用狀態以導通該第二通道,且當該第二輸入狀態為一負類比電壓時,該第二浮接偵測電路呈現不作用狀態以斷開該第二通道。 To achieve the above-mentioned purpose, the present invention further proposes a liquid crystal display having a liquid crystal display panel and a driving chip for driving the liquid crystal display panel, and the driving chip has the following characteristics: A first floating detection circuit and a first switch, the first floating detection circuit is powered by a digital supply voltage to detect a first input state of a positive analog voltage input terminal, the first switch has a first control terminal and a first channel, the first control terminal is coupled to the output terminal of the first floating detection circuit, the first channel is coupled between the positive analog voltage input terminal and a reference ground, when the first input state is floating, the first floating detection circuit is in an active state to turn on the first channel, and when the first input state is a positive analog voltage, the first floating detection circuit is in an inactive state to disconnect the first channel; and A second floating detection circuit and a second switch, the second floating detection circuit is powered by the digital supply voltage to detect a second input state of a negative analog voltage input terminal, the second switch has a second control terminal and a second channel, the second control terminal is coupled to the output terminal of the second floating detection circuit, the second channel is coupled between the negative analog voltage input terminal and the reference ground, when the second input state is floating, the second floating detection circuit is in an active state to turn on the second channel, and when the second input state is a negative analog voltage, the second floating detection circuit is in an inactive state to disconnect the second channel.

在一實施例中,該第一浮接偵測電路和該第二浮接偵測電路各係一反相邏輯電路。In one embodiment, the first floating detection circuit and the second floating detection circuit are each an inverting logic circuit.

在可能的實施例中,該第一開關可為一NMOS電晶體、一PMOS電晶體或一CMOS電晶體。In possible embodiments, the first switch may be an NMOS transistor, a PMOS transistor or a CMOS transistor.

在可能的實施例中,該第二開關可為一NMOS電晶體、一PMOS電晶體或一CMOS電晶體。In possible embodiments, the second switch may be an NMOS transistor, a PMOS transistor or a CMOS transistor.

為達上述目的,本發明進一步提出一種資訊處理裝置,其具有一中央處理單元及如前述之液晶顯示器,其中,該中央處理單元係用以與所述之液晶顯示器通信。To achieve the above-mentioned object, the present invention further proposes an information processing device, which has a central processing unit and a liquid crystal display as mentioned above, wherein the central processing unit is used to communicate with the liquid crystal display.

在可能的實施例中,該資訊處理裝置可為個人電腦、攜帶型電腦、車用電腦或智慧型手機。In possible embodiments, the information processing device may be a personal computer, a portable computer, a car computer or a smart phone.

為使  貴審查委員能進一步瞭解本發明之結構、特徵、目的、與其優點,茲附以圖式及較佳具體實施例之詳細說明如後。In order to enable the Review Committee to further understand the structure, features, purpose, and advantages of the present invention, the following are attached with drawings and detailed descriptions of preferred specific embodiments.

請參照圖3,其繪示本發明之液晶顯示器之一實施例的方塊圖。如圖3所示,一液晶顯示器100包含一驅動晶片110及一液晶顯示面板120,其中,驅動晶片110係經由接腳A、B、C對應耦接一數位供應電壓V CC、一正類比電壓V SP及一負類比電壓V SN以在該些電壓源之供電下驅動液晶顯示面板120,且驅動晶片110具有一第一浮接偵測電路111、一第一開關112、一第二浮接偵測電路113、一第二開關114及n個輸出通道電路115,n為大於1之整數,其中,數位供應電壓V CC、正類比電壓V SP及負類比電壓V SN係由一電源管理晶片提供,且該電源管理晶片在休眠時會關斷正類比電壓V SP及負類比電壓V SN,只留下數位供應電壓V CCPlease refer to FIG. 3 , which is a block diagram of an embodiment of a liquid crystal display of the present invention. As shown in FIG. 3 , a liquid crystal display 100 includes a driver chip 110 and a liquid crystal display panel 120, wherein the driver chip 110 is coupled to a digital supply voltage V CC , a positive analog voltage V SP and a negative analog voltage V SN via pins A, B and C respectively to drive the liquid crystal display panel 120 under the power supply of these voltage sources, and the driver chip 110 has a first floating detection circuit 111, a first switch 112, a second floating detection circuit 113, a second switch 114 and n output channel circuits 115, where n is an integer greater than 1, wherein the digital supply voltage V CC , the positive analog voltage V SP and the negative analog voltage V SN is provided by a power management chip, and the power management chip will shut down the positive analog voltage V SP and the negative analog voltage V SN when in sleep mode, leaving only the digital supply voltage V CC .

第一浮接偵測電路111係由數位供應電壓V CC供電以偵測接腳B之一第一輸入狀態;第一開關112具有一第一控制端及一第一通道,該第一控制端係與第一浮接偵測電路111之輸出端耦接,該第一通道係耦接於接腳B與一參考地GND之間。當該第一輸入狀態為浮接時,第一浮接偵測電路111之一第一開關信號SW1會呈現作用狀態以導通該第一通道,且當該第一輸入狀態為正類比電壓V SP時,第一浮接偵測電路111之第一開關信號SW1會呈現不作用狀態以斷開該第一通道。 The first floating detection circuit 111 is powered by a digital supply voltage VCC to detect a first input state of the pin B; the first switch 112 has a first control terminal and a first channel, the first control terminal is coupled to the output terminal of the first floating detection circuit 111, and the first channel is coupled between the pin B and a reference ground GND. When the first input state is floating, a first switch signal SW1 of the first floating detection circuit 111 will be in an active state to turn on the first channel, and when the first input state is a positive analog voltage VSP , the first switch signal SW1 of the first floating detection circuit 111 will be in an inactive state to disconnect the first channel.

第二浮接偵測電路113係由數位供應電壓V CC供電以偵測接腳C之一第二輸入狀態;第二開關114具有一第二控制端及一第二通道,該第二控制端係與第二浮接偵測電路113之輸出端耦接,該第二通道係耦接於接腳C與參考地GND之間。當該第二輸入狀態為浮接時,第二浮接偵測電路113之一第二開關信號SW2會呈現作用狀態以導通該第二通道,且當該第二輸入狀態為負類比電壓V SN時,第二浮接偵測電路113之第二開關信號SW2會呈現不作用狀態以斷開該第二通道。 The second floating detection circuit 113 is powered by the digital supply voltage V CC to detect a second input state of the pin C; the second switch 114 has a second control terminal and a second channel, the second control terminal is coupled to the output terminal of the second floating detection circuit 113, and the second channel is coupled between the pin C and the reference ground GND. When the second input state is floating, a second switch signal SW2 of the second floating detection circuit 113 will be in an active state to turn on the second channel, and when the second input state is a negative analog voltage V SN , the second switch signal SW2 of the second floating detection circuit 113 will be in an inactive state to disconnect the second channel.

各輸出通道電路115係在正類比電壓V SP及負類比電壓V SN之供電下依一類比電壓V D(j)產生一源極電壓V OUT(j),n為大於1之整數,j為1至n中之一整數。詳細而言,輸出通道電路115具有二反相放大器及一多工器,該二反相放大器係分別由正類比電壓V SP及負類比電壓V SN供電,且該多工器係用以選擇一正源極電壓或一負源極電壓作為源極電壓V OUT(j)。為避免液晶顯示面板120產生直流殘留效應,輸出通道電路115會使多工器交替選擇該正源極電壓和該負源極電壓作為源極電壓V OUT(j)。 Each output channel circuit 115 generates a source voltage V OUT (j) according to an analog voltage V D (j) under the supply of a positive analog voltage V SP and a negative analog voltage V SN , where n is an integer greater than 1, and j is an integer between 1 and n. In detail, the output channel circuit 115 has two inverting amplifiers and a multiplexer, the two inverting amplifiers are respectively supplied by the positive analog voltage V SP and the negative analog voltage V SN , and the multiplexer is used to select a positive source voltage or a negative source voltage as the source voltage V OUT (j). To prevent the liquid crystal display panel 120 from generating a DC residual effect, the output channel circuit 115 causes the multiplexer to alternately select the positive source voltage and the negative source voltage as the source voltage V OUT (j).

另外,第一開關112可為一NMOS電晶體、一PMOS電晶體或一CMOS電晶體,且第二開關114可為一NMOS電晶體、一PMOS電晶體或一CMOS電晶體。In addition, the first switch 112 may be an NMOS transistor, a PMOS transistor or a CMOS transistor, and the second switch 114 may be an NMOS transistor, a PMOS transistor or a CMOS transistor.

另外,第一浮接偵測電路111和第二浮接偵測電路113可各由一反相邏輯電路實現。請一併參照圖4a及4b,其中,圖4a繪示第一浮接偵測電路111之一實施例之電路圖;圖4b繪示第二浮接偵測電路113之一實施例之電路圖。In addition, the first floating detection circuit 111 and the second floating detection circuit 113 can each be implemented by an inverting logic circuit. Please refer to FIG. 4a and FIG. 4b, where FIG. 4a shows a circuit diagram of an embodiment of the first floating detection circuit 111; FIG. 4b shows a circuit diagram of an embodiment of the second floating detection circuit 113.

如圖4a所示,第一浮接偵測電路111具有一NMOS電晶體111a、一電阻111b及二反相器111c、111d,其中,NMOS電晶體111a和電阻111b組成一反相電路以依接腳B和參考地GND之電位差導通或關斷NMOS電晶體111a。As shown in FIG. 4a, the first floating detection circuit 111 has an NMOS transistor 111a, a resistor 111b and two inverters 111c and 111d, wherein the NMOS transistor 111a and the resistor 111b form an inverter circuit to turn on or off the NMOS transistor 111a according to the potential difference between the pin B and the reference ground GND.

當接腳B為正類比電壓V SP時,NMOS電晶體111a被導通,其汲極的電位被下拉至參考地GND,致使第一開關信號SW1呈現不作用狀態以斷開第一開關112之一NMOS電晶體112a之通道。當接腳B為浮接時,NMOS電晶體111a未被導通,其汲極的電位被上拉至正類比電壓V SP,致使第一開關信號SW1呈現作用狀態以導通NMOS電晶體112a之通道,從而將接腳B的電位下拉至參考地GND;而在接腳B的電位被下拉至參考地GND後,NMOS電晶體111a的閘極、源極電位會同為參考地GND,從而確保第一開關信號SW1持續呈現作用狀態。 When the pin B is at the positive analog voltage V SP , the NMOS transistor 111 a is turned on, and the potential of its drain is pulled down to the reference ground GND, so that the first switch signal SW1 is in an inactive state to disconnect the channel of an NMOS transistor 112 a of the first switch 112 . When pin B is floating, the NMOS transistor 111a is not turned on, and the potential of its drain is pulled up to the positive analog voltage V SP , causing the first switch signal SW1 to be in an active state to turn on the channel of the NMOS transistor 112a, thereby pulling the potential of pin B down to the reference ground GND; and after the potential of pin B is pulled down to the reference ground GND, the gate and source potentials of the NMOS transistor 111a are both the reference ground GND, thereby ensuring that the first switch signal SW1 continues to be in an active state.

如圖4b所示,第二浮接偵測電路113具有一NMOS電晶體113a及一電阻113b,其中,NMOS電晶體113a和電阻113b組成一反相電路以依參考地GND和接腳C之電位差導通或關斷NMOS電晶體113a。As shown in FIG. 4b, the second floating detection circuit 113 has an NMOS transistor 113a and a resistor 113b, wherein the NMOS transistor 113a and the resistor 113b form an inverting circuit to turn on or off the NMOS transistor 113a according to the potential difference between the reference ground GND and the pin C.

當接腳C為負類比電壓V SN時,NMOS電晶體113a被導通,其汲極的電位被下拉至負類比電壓V SN,致使第二開關信號SW2呈現不作用狀態以斷開第二開關114之一NMOS電晶體114a之通道。當接腳C為浮接時,NMOS電晶體113a未被導通,其汲極的電位被上拉至正類比電壓V SP,致使第二開關信號SW2呈現作用狀態以導通NMOS電晶體114a之通道,從而使接腳C的電位等於參考地GND;而在接腳C的電位等於參考地GND後,NMOS電晶體113a的閘極、源極電位會同為參考地GND,從而確保第一開關信號SW1持續呈現作用狀態。 When the pin C is at the negative analog voltage V SN , the NMOS transistor 113 a is turned on, and the potential of its drain is pulled down to the negative analog voltage V SN , so that the second switch signal SW2 is in an inactive state to disconnect the channel of an NMOS transistor 114 a of the second switch 114 . When pin C is floating, the NMOS transistor 113a is not turned on, and the potential of its drain is pulled up to the positive analog voltage V SP , causing the second switch signal SW2 to be in an active state to turn on the channel of the NMOS transistor 114a, thereby making the potential of pin C equal to the reference ground GND; and after the potential of pin C is equal to the reference ground GND, the gate and source potentials of the NMOS transistor 113a will be the reference ground GND, thereby ensuring that the first switch signal SW1 continues to be in an active state.

另外,為降低靜態功耗,電阻111b和電阻113b可具有較大的阻值。In addition, to reduce static power consumption, the resistor 111b and the resistor 113b may have a larger resistance.

另外,依上述的說明,本發明進一步提出一種資訊處理裝置。請參照圖5,其繪示本發明之資訊處理裝置之一實施例之方塊圖。如圖5所示,一資訊處理裝置200具有一中央處理單元210及一液晶顯示器220,其中,中央處理單元210係用以與液晶顯示器220通信以指示液晶顯示器220進入休眠狀態或恢復正常工作模式,且液晶顯示器220係由液晶顯示器100實現。另外,資訊處理裝置200可為個人電腦、攜帶型電腦、車用電腦或智慧型手機。In addition, according to the above description, the present invention further proposes an information processing device. Please refer to FIG. 5, which shows a block diagram of an embodiment of the information processing device of the present invention. As shown in FIG. 5, an information processing device 200 has a central processing unit 210 and a liquid crystal display 220, wherein the central processing unit 210 is used to communicate with the liquid crystal display 220 to instruct the liquid crystal display 220 to enter a sleep state or resume a normal working mode, and the liquid crystal display 220 is implemented by the liquid crystal display 100. In addition, the information processing device 200 can be a personal computer, a portable computer, a car computer or a smart phone.

依上述的設計,本發明乃具有下列之優點: (1)本發明之顯示驅動晶片可在偵測到正、負供應電壓輸入接腳處於浮接狀態時將該二接腳短路至一參考地,以確保多個輸出通道之輸出電壓能在該二接腳處於浮接狀態之期間穩定在該參考地的電位而避免一液晶顯示面板的液晶分子承受直流殘留效應,從而在該二接腳重新獲得各自的供應電壓而使各該輸出通道恢復輸出源極電壓時,該液晶顯示面板的螢幕不致發生閃爍現象; (2)本發明之液晶顯示器可藉由前述之顯示驅動晶片避免其螢幕在由休眠狀態被喚醒時產生閃爍現象;以及 (3)本發明之資訊處理裝置可藉由前述之液晶顯示器避免其螢幕在由休眠狀態被喚醒時產生閃爍現象。 According to the above design, the present invention has the following advantages: (1) The display driver chip of the present invention can short-circuit the positive and negative supply voltage input pins to a reference ground when detecting that the two pins are in a floating state, so as to ensure that the output voltages of multiple output channels can be stabilized at the potential of the reference ground during the period when the two pins are in a floating state to avoid the liquid crystal molecules of a liquid crystal display panel from being subjected to the DC residual effect, so that when the two pins regain their respective supply voltages and each output channel restores the output source voltage, the screen of the liquid crystal display panel will not flicker; (2) The liquid crystal display of the present invention can prevent the screen from flickering when it is awakened from a sleep state by means of the aforementioned display driver chip; and (3) The information processing device of the present invention can prevent the screen from flickering when it is awakened from a sleep state by means of the aforementioned liquid crystal display.

本案所揭示者,乃較佳實施例,舉凡局部之變更或修飾而源於本案之技術思想而為熟習該項技藝之人所易於推知者,俱不脫本案之專利權範疇。The invention disclosed in this case is a preferred embodiment. Any partial changes or modifications that are derived from the technical concept of this case and are easily inferred by people familiar with the art do not deviate from the scope of the patent rights of this case.

綜上所陳,本案無論目的、手段與功效,皆顯示其迥異於習知技術,且其首先發明合於實用,確實符合發明之專利要件,懇請 貴審查委員明察,並早日賜予專利俾嘉惠社會,是為至禱。In summary, this case shows that it is very different from the known technology in terms of purpose, means and effect, and it is the first invention that is practical and indeed meets the patent requirements for invention. We sincerely request the review committee to examine this carefully and grant a patent as soon as possible to benefit the society. This is our utmost prayer.

10:電源管理晶片10: Power management chip

20:驅動晶片20: Driver chip

21:PMOS電晶體21: PMOS transistor

22:NMOS電晶體22:NMOS transistor

23:PMOS電晶體23: PMOS transistor

24:NMOS電晶體24:NMOS transistor

30:液晶顯示面板30: LCD panel

100:液晶顯示器100: LCD display

110:驅動晶片110:Drive chip

111:第一浮接偵測電路111: First floating detection circuit

111a:NMOS電晶體111a: NMOS transistor

111b:電阻111b:Resistance

111c:反相器111c: Inverter

111d:反相器111d: Inverter

112:第一開關112: First switch

112a:NMOS電晶體112a: NMOS transistor

113:第二浮接偵測電路113: Second floating detection circuit

113a:NMOS電晶體113a:NMOS transistor

113b:電阻113b:Resistance

114:第二開關114: Second switch

114a:NMOS電晶體114a: NMOS transistor

115:輸出通道電路115: Output channel circuit

120:液晶顯示面板120: LCD panel

200:資訊處理裝置200: Information processing device

210:中央處理單元210: Central Processing Unit

220:液晶顯示器220: LCD display

圖1繪示一現有顯示驅動電路之方塊圖; 圖2a及圖2b分別繪示圖1之顯示驅動電路之驅動晶片之一輸出通道中的正源極電壓輸出電路及負源極電壓輸出電路; 圖3繪示本發明之液晶顯示器之一實施例的方塊圖; 圖4a繪示圖3之液晶顯示器之驅動晶片之第一浮接偵測電路之一實施例之電路圖; 圖4b繪示圖3之液晶顯示器之驅動晶片之第二浮接偵測電路之一實施例之電路圖;以及 圖5繪示本發明之資訊處理裝置之一實施例之方塊圖。 FIG. 1 shows a block diagram of an existing display driver circuit; FIG. 2a and FIG. 2b show a positive source voltage output circuit and a negative source voltage output circuit in an output channel of a driver chip of the display driver circuit of FIG. 1, respectively; FIG. 3 shows a block diagram of an embodiment of a liquid crystal display of the present invention; FIG. 4a shows a circuit diagram of an embodiment of a first floating detection circuit of a driver chip of the liquid crystal display of FIG. 3; FIG. 4b shows a circuit diagram of an embodiment of a second floating detection circuit of a driver chip of the liquid crystal display of FIG. 3; and FIG. 5 shows a block diagram of an embodiment of an information processing device of the present invention.

100:液晶顯示器 100: LCD display

110:驅動晶片 110:Drive chip

111:第一浮接偵測電路 111: First floating detection circuit

112:第一開關 112: First switch

113:第二浮接偵測電路 113: Second floating detection circuit

114:第二開關 114: Second switch

115:輸出通道電路 115: Output channel circuit

120:液晶顯示面板 120: LCD panel

Claims (10)

一種可避免喚醒初期之閃爍現象的顯示驅動晶片,用以驅動一液晶顯示面板,具有:一第一浮接偵測電路及一第一開關,該第一浮接偵測電路係由一數位供應電壓供電以偵測一正類比電壓輸入端之一第一輸入狀態,該第一開關具有一第一控制端及一第一通道,該第一控制端係與該第一浮接偵測電路之輸出端耦接,該第一通道係耦接於該正類比電壓輸入端與一參考地之間,當該第一輸入狀態為浮接時,該第一浮接偵測電路呈現作用狀態以導通該第一通道,且當該第一輸入狀態為一正類比電壓時,該第一浮接偵測電路呈現不作用狀態以斷開該第一通道;以及一第二浮接偵測電路及一第二開關,該第二浮接偵測電路係由該數位供應電壓供電以偵測一負類比電壓輸入端之一第二輸入狀態,該第二開關具有一第二控制端及一第二通道,該第二控制端係與該第二浮接偵測電路之輸出端耦接,該第二通道係耦接於該負類比電壓輸入端與該參考地之間,當該第二輸入狀態為浮接時,該第二浮接偵測電路呈現作用狀態以導通該第二通道,且當該第二輸入狀態為一負類比電壓時,該第二浮接偵測電路呈現不作用狀態以斷開該第二通道。 A display driver chip capable of avoiding flickering in the early stage of wake-up is used to drive a liquid crystal display panel. The chip comprises: a first floating detection circuit and a first switch. The first floating detection circuit is powered by a digital supply voltage to detect a first input state of a positive analog voltage input terminal. The first switch has a first control terminal and a first channel. The first control terminal is coupled to the output terminal of the first floating detection circuit. The first channel is coupled between the positive analog voltage input terminal and a reference ground. When the first input state is floating, the first floating detection circuit is in an active state to turn on the first channel. When the first input state is a positive analog voltage, the first floating detection circuit is in an active state to turn on the first channel. The circuit is in an inactive state to disconnect the first channel; and a second floating detection circuit and a second switch, the second floating detection circuit is powered by the digital supply voltage to detect a second input state of a negative analog voltage input terminal, the second switch has a second control terminal and a second channel, the second control terminal is coupled to the output terminal of the second floating detection circuit, the second channel is coupled between the negative analog voltage input terminal and the reference ground, when the second input state is floating, the second floating detection circuit is in an active state to conduct the second channel, and when the second input state is a negative analog voltage, the second floating detection circuit is in an inactive state to disconnect the second channel. 如請求項1所述之可避免喚醒初期之閃爍現象的顯示驅動晶片,其中,該第一浮接偵測電路和該第二浮接偵測電路各係一反相邏輯電路。 A display driver chip capable of avoiding flickering in the early stage of wake-up as described in claim 1, wherein the first floating detection circuit and the second floating detection circuit are each an inverting logic circuit. 如請求項1所述之可避免喚醒初期之閃爍現象的顯示驅動晶片,其中,該第一開關係由一NMOS電晶體、一PMOS電晶體和一CMOS電晶體所組成之群組所選擇的一種開關。 A display driver chip capable of avoiding flickering in the early stage of wake-up as described in claim 1, wherein the first switch is a switch selected from a group consisting of an NMOS transistor, a PMOS transistor and a CMOS transistor. 如請求項1所述之可避免喚醒初期之閃爍現象的顯示驅動晶片,其中,該第二開關係由一NMOS電晶體、一PMOS電晶體和一CMOS電晶體所組成之群組所選擇的一種開關。 A display driver chip capable of avoiding flickering in the early stage of wake-up as described in claim 1, wherein the second switch is a switch selected from a group consisting of an NMOS transistor, a PMOS transistor and a CMOS transistor. 一種液晶顯示器,其具有一液晶顯示面板及用以驅動該液晶顯示面板之一驅動晶片,其特徵在於該驅動晶片具有:一第一浮接偵測電路及一第一開關,該第一浮接偵測電路係由一數位供應電壓供電以偵測一正類比電壓輸入端之一第一輸入狀態,該第一開關具有一第一控制端及一第一通道,該第一控制端係與該第一浮接偵測電路之輸出端耦接,該第一通道係耦接於該正類比電壓輸入端與一參考地之間,當該第一輸入狀態為浮接時,該第一浮接偵測電路呈現作用狀態以導通該第一通道,且當該第一輸入狀態為一正類比電壓時,該第一浮接偵測電路呈現不作用狀態以斷開該第一通道;以及一第二浮接偵測電路及一第二開關,該第二浮接偵測電路係由該數位供應電壓供電以偵測一負類比電壓輸入端之一第二輸入狀態,該第二開關具有一第二控制端及一第二通道,該第二控制端係與該第二浮接偵測電路之輸出端耦接,該第二通道係耦接於該負類比電壓輸入端與該參考地之間,當該第二輸入狀態為浮接時,該第二浮接偵測電路呈現作用狀態以導通該第二通道,且當該 第二輸入狀態為一負類比電壓時,該第二浮接偵測電路呈現不作用狀態以斷開該第二通道。 A liquid crystal display having a liquid crystal display panel and a driver chip for driving the liquid crystal display panel, wherein the driver chip has: a first floating detection circuit and a first switch, wherein the first floating detection circuit is powered by a digital supply voltage to detect a first input state of a positive analog voltage input terminal, wherein the first switch has a first control terminal and a first channel, wherein the first control terminal is coupled to the output terminal of the first floating detection circuit, wherein the first channel is coupled between the positive analog voltage input terminal and a reference ground, wherein when the first input state is floating, the first floating detection circuit is in an active state to conduct the first channel, and when the first input state is a positive analog voltage, the first control terminal is in an active state to conduct the first channel. A floating detection circuit presents an inactive state to disconnect the first channel; and a second floating detection circuit and a second switch, the second floating detection circuit is powered by the digital supply voltage to detect a second input state of a negative analog voltage input terminal, the second switch has a second control terminal and a second channel, the second control terminal is coupled to the output terminal of the second floating detection circuit, the second channel is coupled between the negative analog voltage input terminal and the reference ground, when the second input state is floating, the second floating detection circuit presents an active state to conduct the second channel, and when the second input state is a negative analog voltage, the second floating detection circuit presents an inactive state to disconnect the second channel. 如請求項5所述之液晶顯示器,其中,該第一浮接偵測電路和該第二浮接偵測電路各係一反相邏輯電路。 A liquid crystal display as described in claim 5, wherein the first floating detection circuit and the second floating detection circuit are each an inverting logic circuit. 如請求項5所述之液晶顯示器,其中,該第一開關係由一NMOS電晶體、一PMOS電晶體和一CMOS電晶體所組成之群組所選擇的一種開關。 A liquid crystal display as described in claim 5, wherein the first switch is a switch selected from a group consisting of an NMOS transistor, a PMOS transistor and a CMOS transistor. 如請求項5所述之液晶顯示器,其中,該第二開關係由一NMOS電晶體、一PMOS電晶體和一CMOS電晶體所組成之群組所選擇的一種開關。 A liquid crystal display as described in claim 5, wherein the second switch is a switch selected from a group consisting of an NMOS transistor, a PMOS transistor and a CMOS transistor. 一種資訊處理裝置,其具有一中央處理單元及如請求項5至8中任一項所述之液晶顯示器,其中,該中央處理單元係用以與所述之液晶顯示器通信。 An information processing device having a central processing unit and a liquid crystal display as described in any one of claims 5 to 8, wherein the central processing unit is used to communicate with the liquid crystal display. 如請求項9所述之資訊處理裝置,其係由個人電腦、攜帶型電腦、車用電腦和智慧型手機所組成的群組所選擇的一種裝置。The information processing device as described in claim 9 is a device selected from the group consisting of a personal computer, a portable computer, a car computer and a smart phone.
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Citations (2)

* Cited by examiner, † Cited by third party
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TW201306011A (en) * 2011-05-24 2013-02-01 Apple Inc Writing data to sub-pixels using different write sequences
TWI647681B (en) * 2015-09-30 2019-01-11 樂金顯示科技股份有限公司 Display device and method for driving the same

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201306011A (en) * 2011-05-24 2013-02-01 Apple Inc Writing data to sub-pixels using different write sequences
TWI647681B (en) * 2015-09-30 2019-01-11 樂金顯示科技股份有限公司 Display device and method for driving the same

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