TWI865254B - Display port linking method for ensuring display data transmission quality, display driver chip, display and information processing device - Google Patents

Abstract

A display port link method for ensuring the transmission quality of display data includes: enabling a source device to initiate a link training, which includes transmitting a data signal to a slot device according to a signal amplitude level and a pre-emphasis level; enabling the slot device to determine whether the received data signal is correct, and if not, returning a signal representing link training failure to the source device; if so, adding 1 to a count value, and determining whether the count value is equal to a preset value. value, if yes, a signal representing the link training success is returned to the source device, if not, a signal representing the link training failure is returned to the source device; and when the source device receives the signal representing the link training failure, it increases the signal amplitude level and/or the pre-emphasis level by one level, and then initiates the link training again; when the source device receives the signal representing the link training success, it starts to send display data.

Description

Display port linking method for ensuring display data transmission quality, display driver chip, display and information processing device

The present invention relates to display data transmission, and more particularly to a display port linking method capable of ensuring the quality of display data transmission.

DP (DisplayPort) is a digital video interface standard developed by the Video Electronics Standards Association (VESA) of the PC and Chip Manufacturers Alliance. It supports high resolution and high refresh rate. In addition to transmitting video signals, DP also supports the transmission of high-definition audio signals.

In detail, DP can support single-channel, unidirectional, and quad-channel connections. Under the latest DP1.4 standard, the maximum transmission rate of a single channel is 8.1Gbps, and the data transmission rate of a quad channel can reach 32.4Gbps, which is sufficient to transmit uncompressed high-resolution, high-refresh-rate video and related audio, and can also support 1Mbps bidirectional secondary channels. In addition, DP1.4 can support 8-bit, 10-bit, and 12-bit color depths.

In addition, when the source device that provides data and the sink device that receives data communicate via a DP link, both must first undergo a link training. Specifically, the source device will first transmit a data signal to the sink device according to a signal amplitude level (swing level) and a pre-emphasis level for link training, wherein pre-emphasis is used to enhance the amplitude of the rising and falling edges of the signal to enhance the high-frequency components of the signal, thereby compensating for the greater attenuation of the high-frequency components in the transmission link. When the slot device confirms that the received data signal is correct, it will return a signal indicating that the link training is successful to the source device; and when the slot device confirms that the received data signal is incorrect, it will return a signal indicating that the link training has failed to the source device. When the source device receives the signal indicating that the link training has failed, it will increase the signal amplitude level and/or pre-emphasis level by one level and then perform link training again.

In detail, assume that the signal amplitude levels are 400mV, 600mV, 800mV, and 1200mV at levels 0 to 3, and the pre-emphasis levels are 0dB, 3dB, 6dB, and 9dB at levels 0 to 3. When the source device transmits a data signal to the slot device for link training with a signal amplitude of level 0 (400mV) and pre-emphasis of level 0 (0dB), and the slot device determines that the received signal is correct, it will send a signal indicating successful link training back to the source device, so that the source device transmits subsequent data with a signal amplitude of 400mV and pre-emphasis of 0dB. signal; and when the slot device confirms that the received data signal is an error, it will send a signal indicating link training failure back to the source device. At this time, the source device will upgrade the signal amplitude and pre-emphasis, so that the source device transmits subsequent data signals with a signal amplitude of 600mV and/or a pre-emphasis of 3dB, and so on, until the slot device determines that the received signal is correct.

However, because the quality of link products may vary, the signal amplitude level and pre-emphasis level set according to the above link training method may affect the reliability of the electronic products shipped out of the factory.

In order to solve the above problems, a novel display port linking method is urgently needed in the art.

The main purpose of the present invention is to provide a display port link method, which can establish a tolerance margin for the signal attenuation deviation of the link by setting the count value to determine the signal amplitude level and/or the number of times the pre-emphasis level is upgraded, so as to effectively avoid errors in the transmission process of display data and affect the display quality without increasing the circuit design cost, thereby improving the yield of the display driver chip.

To achieve the above-mentioned purpose, a display port link method for ensuring the transmission quality of display data is proposed, which includes: A source device initiates a link training, which includes transmitting a data signal to a slot device according to a signal amplitude level and a pre-emphasis level; The slot device determines whether the received data signal is correct. If not, a signal representing link training failure is returned to the source device; if so, a count value is increased by 1, and it is determined whether the count value is equal to a preset value. If so, a signal representing link training success is returned to the source device. If not, a signal representing link training failure is returned to the source device; and When the source device receives the signal representing link training failure, it increases the signal amplitude level and/or the pre-emphasis level by one level, and then initiates the link training again; when the source device receives the signal representing link training success, it starts to transmit display data.

In one embodiment, the source device is located in a timing controller and the sink device is located in a display driver chip.

To achieve the above-mentioned purpose, the present invention further proposes a display driver chip, which has a slot device for performing a communication operation with a source device of a timing controller, and the communication operation includes a display port link procedure, which includes: The source device initiates a link training, which includes transmitting a data signal to the slot device according to a signal amplitude level and a pre-emphasis level; The slot device determines whether the received data signal is correct, if not, a signal representing link training failure is returned to the source device; if so, a count value is added by 1, and it is determined whether the count value is equal to a preset value, if so, a signal representing link training success is returned to the source device, if not, a signal representing link training failure is returned to the source device; and When the source device receives the signal representing link training failure, it increases the signal amplitude level and/or the pre-emphasis level by one level, and then initiates the link training again; when the source device receives the signal representing link training success, it starts to transmit display data.

In one embodiment, the display driver chip is a touch display driver chip.

To achieve the above object, the present invention further provides a display having a pixel array and the display driver chip as described above for driving the pixel array.

In possible embodiments, the display may be a liquid crystal display, a millimeter-light-emitting diode display, a micrometer-light-emitting diode display, a quantum dot-light-emitting diode display or an organic light-emitting diode display.

To achieve the above object, the present invention further provides an information processing device having a central processing unit and the display as described above, wherein the central processing unit is used to communicate with the display.

In a possible embodiment, the information processing device may be a portable computer, a car computer, a smart watch, a smart bracelet or a smart phone.

In order to enable the Review Committee to further understand the structure, features, purpose, and advantages of the present invention, the following are attached with drawings and detailed descriptions of preferred specific embodiments.

Please refer to FIG. 1 , which is a schematic diagram showing a display driver chip 100 of the present invention communicating with a timing controller 110 .

As shown in FIG. 1 , the display driver chip 100 may be a touch display driver chip having a slot device 101 for communicating with a source device 111 of a timing controller 110 to obtain display data, and the source device 111 and the slot device 101 perform a communication operation according to a DP interface. Since the DP interface is a known technology, it is not described in detail here.

Specifically, the communication operation includes a link training procedure, and the link training procedure includes:

(i) The source device 111 initiates a link training, which includes transmitting a data signal to the slot device 101 according to a signal amplitude level and a pre-emphasis level.

(ii) The slot device 101 determines whether the received data signal is correct. If not, a signal indicating link training failure is returned to the source device 111. If so, a count value is increased by 1, and it is determined whether the count value is equal to a preset value. If so, a signal indicating link training success is returned to the source device 111. If not, a signal indicating link training failure is returned to the source device 111. For example, the initial value of the count value is 0 and the preset value is 2. When the slot device 101 first determines that the received data signal is correct, the count value becomes 1. Since the count value has not yet reached 2, it returns a signal indicating link training failure to the source device 111. For another example, let the initial value of the count value be 0 and the default value be 3. Then, when the slot device 101 determines that the received data signal is correct for the first time, the count value will become 1. When the slot device 101 determines that the received data signal is correct for the second time, the count value will become 2. When the slot device 101 determines that the received data signal is correct for the third time, the count value will become 3. Before the count value becomes 3, the slot device 101 will return a signal indicating that the link training has failed to the source device 111. Only when the count value reaches 3 will the slot device 101 return a signal indicating that the link training has succeeded to the source device 111.

(iii) When the source device 111 receives the signal indicating link training failure, it increases the signal amplitude level and/or the pre-emphasis level by one level and then initiates the link training again; when the source device 111 receives the signal indicating link training success, it starts to transmit display data.

Accordingly, the present invention can tolerate the signal attenuation deviation caused by link deviation (including the quality deviation of the connector and the connection line) by setting the count value to determine the signal amplitude level and/or the number of times the pre-emphasis level is upgraded without increasing the circuit design cost, so as to avoid errors in the display data during the transmission process and affect the display quality, thereby improving the yield of the display driver chip 100.

According to the above description, the present invention discloses a display port link method for ensuring the display data transmission quality. Please refer to Figure 2, which shows a flow chart of an embodiment of the display port link method for ensuring the display data transmission quality disclosed in the present invention. As shown in Figure 2, the method includes: enabling a source device to initiate a link training, which includes transmitting a data signal to a slot device according to a signal amplitude level and a pre-emphasis level (step a); enabling the slot device to determine whether the received data signal is correct, and if not, transmitting a signal representing the link training failure back to the source device; if so, adding 1 to a count value, and determining whether the count value is equal to a preset value, and if so, transmitting a signal representing the link training failure back to the source device; A signal indicating successful link training is returned to the source device, if not, a signal indicating failed link training is returned to the source device (step b); and when the source device receives the signal indicating failed link training, it increases the signal amplitude level and/or the pre-emphasis level by one level, and then initiates the link training again; when the source device receives the signal indicating successful link training, it starts to transmit display data (step c).

In the above steps, the source device is located in a timing controller, and the sink device is located in a display driver chip.

According to the above description, the present invention further proposes a display. Please refer to FIG. 3, which is a block diagram of an embodiment of the display of the present invention. As shown in FIG. 3, a display 200, which can be a liquid crystal display, a millimeter diode light-emitting display, a micrometer diode light-emitting display, a quantum dot diode light-emitting display or an organic light-emitting diode display, has a timing controller 210, a display driver chip 220 and a pixel array 230, wherein the timing controller 210 is implemented by the timing controller 110, and the display driver chip 220 is implemented by the display driver chip 100.

In addition, according to the above description, the present invention further proposes an information processing device. Please refer to FIG. 4, which is a block diagram of an embodiment of the information processing device of the present invention. As shown in FIG. 4, an information processing device 300 has a central processing unit 310 and a display 320, wherein the display 320 is implemented by the display 200 and the central processing unit 310 is used to communicate with the display 320.

In addition, the information processing device 300 may be a portable computer, a car computer, a smart watch, a smart bracelet, or a smart phone.

According to the above design, the present invention has the following advantages: The display port link method of the present invention can establish the tolerance margin of the signal attenuation deviation of the link by setting the count value to determine the signal amplitude level and/or the number of times the pre-emphasis level is upgraded, so as to effectively avoid the display data from being incorrectly generated during the transmission process and affecting the display quality without increasing the circuit design cost, thereby improving the yield of the display driver chip.

The invention disclosed in this case is a preferred embodiment. Any partial changes or modifications that are derived from the technical concept of this case and are easily inferred by people familiar with the art do not deviate from the scope of the patent rights of this case.

In summary, this case shows that it is very different from the known technology in terms of purpose, means and effect, and it is the first invention that is practical and indeed meets the patent requirements for invention. We sincerely request the review committee to examine this carefully and grant a patent as soon as possible to benefit the society. This is our utmost prayer.

100: display driver chip 101: slot device 110: timing controller 111: source device 200: display 210: timing controller 220: display driver chip 230: pixel array 300: information processing device 310: central processing unit 320: display Step a: enable a source device to initiate a link training, which includes transmitting a data signal to a slot device according to a signal amplitude level and a pre-emphasis level. Step b: The slot device determines whether the received data signal is correct. If not, a signal indicating link training failure is returned to the source device; if so, a count value is increased by 1, and it is determined whether the count value is equal to a preset value. If so, a signal indicating link training success is returned to the source device; if not, a signal indicating link training failure is returned to the source device. Step c: When the source device receives the signal indicating link training failure, it increases the signal amplitude level and/or the pre-emphasis level by one level, and then initiates the link training again; when the source device receives the signal indicating link training success, it starts to transmit display data.

FIG1 is a schematic diagram of a display driver chip of the present invention communicating with a timing controller; FIG2 is a flow chart of an embodiment of a display port link method for ensuring display data transmission quality disclosed in the present invention; FIG3 is a block diagram of an embodiment of a display of the present invention; and FIG4 is a block diagram of an embodiment of an information processing device of the present invention.

Step a: Enable a source device to initiate a link training, which includes transmitting a data signal to a slot device according to a signal amplitude level and a pre-emphasis level

Step b: The slot device determines whether the received data signal is correct. If not, a signal indicating link training failure is returned to the source device. If yes, a count value is increased by 1, and it is determined whether the count value is equal to a preset value. If yes, a signal indicating successful link training is returned to the source device. If not, a signal indicating link training failure is returned to the source device.

Step c: When the source device receives the signal representing link training failure, it increases the signal amplitude level and/or the pre-emphasis level by one level, and then initiates the link training again; when the source device receives the signal representing link training success, it starts to transmit display data

Claims (9)

A display port link method for ensuring display data transmission quality is used to enable a source device of a timing controller and a slot device of a display driver chip to perform a communication operation, and the method comprises: enabling the source device to initiate a link training, which includes transmitting a data signal to the slot device according to a signal amplitude level and a pre-emphasis level; enabling the slot device to determine whether the received data signal is correct, and if not, transmitting a signal representing link training failure back to the source device; if so, transmitting a counter The value is increased by 1, and it is determined whether the count value is equal to a preset value. If so, a signal representing successful link training is returned to the source device. If not, a signal representing failed link training is returned to the source device. When the source device receives the signal representing failed link training, it increases the signal amplitude level and/or the pre-emphasis level by one level, and then initiates the link training again. When the source device receives the signal representing successful link training, it starts to transmit display data. A display driver chip has a slot device for performing a communication operation with a source device of a timing controller, wherein the communication operation includes a display port link procedure, which includes: enabling the source device to initiate a link training, which includes transmitting a data signal to the slot device according to a signal amplitude level and a pre-emphasis level; enabling the slot device to determine whether the received data signal is correct, and if not, returning a signal representing link training failure to the source device; if so, adding 1 to a count value; , and determines whether the count value is equal to a preset value. If so, a signal representing successful link training is returned to the source device. If not, a signal representing failed link training is returned to the source device; and When the source device receives the signal representing failed link training, it increases the signal amplitude level and/or the pre-emphasis level by one level, and then initiates the link training again; when the source device receives the signal representing successful link training, it starts to transmit display data. The display driver chip as described in claim 2 is a touch display driver chip. A display device has a timing controller, a pixel array and a display driver chip for driving the pixel array. The display driver chip has a slot device for performing a communication operation with a source device of a timing controller. The communication operation includes a display port link procedure, which includes: enabling the source device to initiate a link training, which includes transmitting a data signal to the slot device according to a signal amplitude level and a pre-emphasis level; enabling the slot device to determine whether the received data signal is correct. If not, a signal representing link training failure is sent. The signal is returned to the source device; if so, a count value is increased by 1, and it is determined whether the count value is equal to a preset value. If so, a signal representing successful link training is returned to the source device; if not, a signal representing failed link training is returned to the source device; and when the source device receives the signal representing failed link training, it increases the signal amplitude level and/or the pre-emphasis level by one level, and then initiates the link training again; when the source device receives the signal representing successful link training, it starts to transmit display data. The display as described in claim 4 is selected from the group consisting of a liquid crystal display, a millimeter diode light-emitting display, a micrometer diode light-emitting display, a quantum dot diode light-emitting display and an organic light-emitting diode display. A display as described in claim 4, wherein the display driver chip is a touch display driver chip. An information processing device having a central processing unit and a display as described in claim 4, wherein the central processing unit is used to communicate with the display. An information processing device as described in claim 7, wherein the display is selected from the group consisting of a liquid crystal display, a millimeter diode light-emitting display, a micrometer diode light-emitting display, a quantum dot diode light-emitting display and an organic light-emitting diode display. The information processing device as described in claim 7 is selected from the group consisting of a portable computer, a car computer, a smart watch, a smart bracelet and a smart phone.

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