TWI862745B - Substrate processing device and substrate processing method - Google Patents

Abstract

Provide a technology that can prevent substrates from being held up when being carried in or out of a substrate processing device, thereby increasing the processing capacity of the device.

The substrate processing device is configured by having the following components: a carrier carrying-in port and a carrier carrying-out port, which are used to carry the carrier in and out of the substrate processing device and to carry the carrier; a substrate carrying-out port and a substrate receiving port, which are provided in the carrier block of the substrate processing device and are used to carry the carrier in and out of the substrate from the carrier to the above-mentioned processing block; a carrier transfer mechanism; and a control unit, which outputs a control signal for controlling the operation of the carrier transfer mechanism in accordance with the carrying-out status of the substrate of the carrier from the substrate carrying-out port, the carrying-in status of the substrate of the carrier to the substrate receiving port, or the predetermined transfer of the above-mentioned substrate in the processing block of the substrate processing device provided with a processing module to the downstream side of the transfer path.

Description

Substrate processing device and substrate processing method

The present invention relates to a substrate processing device and a substrate processing method.

In the manufacturing process of semiconductor devices, various processes such as photolithography are performed on semiconductor wafers (hereinafter referred to as wafers) as substrates by substrate processing equipment. Wafers are transported between equipments while being stored in carriers as transport containers.

As an example of the above-mentioned substrate processing device, a coating development device is described in Patent Document 1. The coating development device has a carrier placement portion for placing a carrier in and out of the device, and a carrier temporary placement portion for transporting the carrier between substrate processing devices by a top transport mechanism. Furthermore, the carrier is moved between the carrier placement portion and the carrier temporary placement portion by a carrier moving mechanism provided in the coating development device. [Prior Technical Document] [Patent Document]

[Patent Document 1] Japanese Patent Application Publication No. 2010-171276

[The problem that the invention wants to solve]

This disclosure provides a technology that can prevent substrates from being held up when being carried in or out of a substrate processing device, thereby increasing the processing capacity of the device. [Means for solving the problem]

The substrate processing device disclosed in the present invention comprises: a carrier block configured as a carrier serving as a transport container for storing substrates, and a processing block for receiving and transferring the substrates between the carrier block and the processing module for processing the substrates. The substrate processing device comprises: a carrier carrying-in port and a carrier carrying-out port, which are used to carry the carriers in and out of the substrate processing device and to carry the carriers; a substrate carrying-out port and a substrate receiving port, which are provided in the carrier block and are used to carry the substrates out of the carriers to the processing block and carry the substrates in from the processing block to the carriers; and a substrate carrying-out port and a substrate receiving port, which are provided in the carrier block and are used to carry the substrates in and out of the processing block. A carrier, a carrier temporary placement part, which is used to temporarily place the above-mentioned carrier; a carrier transfer mechanism, which is capable of transferring the above-mentioned carrier between the above-mentioned carrier import port, the above-mentioned carrier export port, the above-mentioned substrate receiving port, the above-mentioned substrate export port, and the above-mentioned carrier temporary placement part; a control part, which outputs a control signal for controlling the operation of the above-mentioned carrier transfer mechanism in a manner that is carried out according to the export status of the substrate of the above-mentioned carrier from the above-mentioned substrate export port, the import status of the substrate of the above-mentioned carrier into the above-mentioned substrate receiving port, or the transport schedule of the above-mentioned substrate to the downstream side of the transport path of the above-mentioned substrate in the above-mentioned processing block. [Effect of the invention]

By using the present disclosure, it is possible to prevent substrates from being delayed when being carried in or out of a substrate processing device, thereby increasing the processing throughput of the device.

The coating and developing device 1 as one embodiment of the substrate processing device disclosed herein will be described with reference to the top view of FIG1 and the longitudinal side view of FIG2. The coating and developing device 1 is composed of a carrier block D1, a processing block D2, and an interface block D3 connected in a horizontal row. The direction along the row is set as the front-rear direction, and the side of the carrier block D1 is set as the front side. The blocks D1 to D3 are divided from each other. An exposure machine D4 is connected to the rear side of the interface block D3.

The carrier block D1 is a block for loading and unloading wafers W into and out of the coating and developing apparatus 1. Wafers W are loaded and unloaded into and out of the carrier block D1 in a state of being stored in a carrier C, for example, called a FOUP (Front Opening Unify Pod). That is, the carrier C is a transport container for transporting wafers W, and the transport container is arranged in the carrier block D1.

FIG3 shows the front of the housing 11 constituting the carrier block D1. On the front of the housing 11, transfer ports 12 for wafers W that constitute loading ports and can be opened and closed are arranged in a matrix shape, for example, and a carrier table is provided on the front side below each transfer port 12. The carrier tables carrying carriers C move between an unloading position on the front side and a loading position on the rear side. At the unloading position, the carrier C is transferred to and from the carrier table. The loading position is a position where wafers W are transferred between the carrier C and the carrier block D1. At the loading position, the cover of the carrier C is also opened and closed by the switch mechanism 13 that opens and closes the transfer port 12.

When viewing the housing 11 of the carrier block D1 from the front, the two carrier stages on the left side are loaded with carriers C storing wafers W, and the wafers W are moved out (delivered) from the carriers C to the device. Therefore, these carrier stages are recorded as transmitter stages 14. Furthermore, there are cases where the upper side of the two transmitter stages 14 serving as substrate removal ports is indicated by 14A and the lower side is indicated by 14B. When viewing the carrier block D1 from the front, the two carrier stages on the right side are loaded with carriers C that have already moved wafers W out to the device, and the carriers C receive wafers W from the device. Therefore, these carrier stages are recorded as receiver stages 15. Furthermore, there are two receiving platforms 15 that serve as substrate receiving ports, with 15A representing the upper side and 15B representing the lower side.

In addition, FIG1 shows the state where the transmitter station 14A and the receiver station 15A are located at the unloading position and the loading position, respectively, and FIG2 shows the state where the transmitter station 14B and the receiver station 15A are located at the unloading position and the loading position, respectively. Furthermore, there is a case where the carrier C placed on the transmitter station 14 is recorded as a transmitter carrier, and the carrier C placed on the receiver station 15 is recorded as a receiver carrier.

A storage 16 as a carrier temporary storage portion is provided at the center of the front of the housing 11, and a plurality of carriers C can be temporarily placed in the storage 16. Furthermore, a shelf 17 is provided at the front side of the housing 11, and a loading table 18 and an unloading table 19 are provided on the shelf 17. The OHT (Overhead Hoist Transfer) as a transfer mechanism provided in the factory where the coating and developing apparatus 1 is installed transfers the carrier C to the loading table 18 and unloads the carrier C from the unloading table 19. That is, the carrier C of the wafer W before being processed in the coating and developing apparatus 1 is placed on the loading table 18, and the carrier C of the wafer W after being processed in the coating and developing apparatus 1 is placed on the unloading table 19. Therefore, the loading platform 18 and the unloading platform 19 are respectively configured as a carrier carrying-in port and a carrier carrying-out port.

Furthermore, a carrier transfer mechanism 21 is provided in the carrier block D1. The carrier transfer mechanism 21 is provided between the housing 11 and the shelf 17 of the carrier block D1, and includes a lifting shaft 23 that is movable along a moving shaft 22 extending in the left and right directions, an articulated arm 24 that is movable along the lifting shaft 23, and two claws 25 provided at the front end of the articulated arm 24. The interval between the two claws 25 can be changed freely so as to hold the holding portion C0 provided at the upper side of the carrier C. The carrier C can be transferred between the transmitter stage 14A, 14B, the receiver stage 15A, 15B, the storage 16, the loading stage 18, and the unloading stage 19 by the carrier transfer mechanism 21. Specifically, the transfer action is performed through a series of actions including the descent of the claw 25 toward the transfer origin, the gripping of the carrier C at the transfer origin by the claw 25, the movement of the carrier C toward the top of the transfer destination, the placement of the carrier C toward the transfer destination due to the descent of the claw 25, and the release of the grip.

A tower portion T1 extending vertically is provided in the center of the left and right sides of the housing 11 of the carrier block D1. Although various modules are provided in the tower portion T1, the illustrations are omitted except for the receiving and sending module TRS and the temperature adjustment module SCPL for adjusting the temperature of the wafer W. In addition, the place where the wafer W is placed is recorded as a module. The module for processing the wafer W, such as the temperature adjustment module SCPL or the development module 32 and the photoresist film forming module described later, is a processing module.

Although described in detail later, the processing block D2 is constructed by stacking unit blocks E1 to E6. In order to be able to carry wafers W into and out of the unit blocks E1 to E6, a plurality of receiving and sending modules TRS are provided for the tower portion T1, and are arranged at heights corresponding to the unit blocks E1 to E6, respectively. For each receiving and sending module TRS, the same number as the corresponding height of the unit blocks E1 to E6 is marked, and represented by TRS1 to TRS6. In addition, in FIG. 2, it is represented in a manner that only two receiving and sending modules TRS are provided for one unit block E. However, as shown in FIG. 4, one receiving and sending module TRS has a plurality of loading parts 20 that are arranged up and down and respectively load wafers W. That is, a plurality of wafers W can be placed at a height corresponding to one unit block E. Furthermore, in the tower portion T1, the temperature control module SCPL is also provided at heights corresponding to the unit blocks E1 to E6, similarly to the transmission and reception module TRS. The temperature control module SCPL is also indicated as SCPL1 to SCPL6 in FIG. 2 by being labeled with the same number as the unit blocks E1 to E6 at the corresponding heights.

Wafer transport mechanisms 27 and 28 are provided on the left and right sides of the tower T1 when viewed from the front. The wafer transport mechanism 27 is a transport mechanism for sending wafers to the processing block D2, and receives and delivers wafers W between each receiving and delivering module TRS of the tower T1 and the carrier C placed on the transmitter stage 14. The wafer transport mechanism 28 is a transport mechanism for receiving wafers from the processing block D2, and receives and delivers wafers W between each receiving and delivering module TRS of the tower T1 and the carrier C placed on the receiver stage 15. As shown in FIG1 , although the wafer transport mechanisms 27 and 28 are provided to hold the tower T1, in FIG2 , for the convenience of illustration, the wafer transport mechanisms 27 and 28 are shown in a manner that they are closer to the front than the tower T1. In addition, the wafer transfer mechanisms 27 and 28 each have two wafer W holding parts, and can receive and deliver two wafers W to the carrier C at one time.

For the carrier block D1, the carrier C from which the wafer W has been removed can be moved from the transmitter stage 14 to other places by the carrier transfer mechanism 21. In this way, the transmitter stage 14 can be prevented from being occupied by the same carrier C for a long time. The transmitter stage 14 sequentially transfers the subsequent carriers C to move the wafer W out of the device. Furthermore, the carrier C that has removed the wafer W is sequentially transferred to the receiver stage 15 by the carrier transfer mechanism 21, and the carrier C that has received the wafer W is transferred from the receiver stage 15 to other places. In this way, the receiver stage 15 can be prevented from being occupied by the same carrier C for a long time, and the wafer W can be sequentially recovered from the device to each carrier C.

Since two transmitter stages 14 are provided, it is possible to remove wafers W from a carrier C placed on one transmitter stage 14 and transfer the carrier C to the other transmitter stage 14 to wait at the loading position. When the carrier C is placed on standby in this way, the wafer transfer mechanism 27 can start removing wafers W from the carrier C of the other transmitter stage 14 without waiting after the removal of the carrier C from one transmitter stage 14 is completed. Furthermore, since two receiver stages 15 are provided, it is possible to store wafers W in the carrier C placed on one receiver stage 15 and transfer the carrier C to the other receiver stage 15 to wait at the loading position. If the carrier C is put on standby in this way, the wafer transfer mechanism 28 does not need to wait after the wafer W is stored in the carrier C of one receiving station 15, and can start storing the wafer W in other receiving stations 15. Although it will be described in detail later, in the carrier block D1, the carrier C is transferred without the standby time of the above-mentioned wafer transfer mechanisms 27 and 28, thereby suppressing the time loss in the transfer of the wafer W.

Next, the structure of the above-mentioned processing block D2 is explained. The processing block D2 is composed of 6 unit blocks E1~E6 that are stacked one after another and are divided and stacked from the bottom in numerical order. In fact, the processing block D2 performs various liquid processes on the wafer W, but in order to avoid complicated descriptions, here, as liquid processing, only the coating and development of the photoresist is performed. In each unit block E (E1~E6), the wafer W is transported and processed in parallel. The unit blocks E1~E3 have the same structure as each other, and the unit blocks E4~E6 have the same structure as each other.

Among the unit blocks E1 to E6, the unit block E6 shown in FIG1 is used as a representative for explanation. In the center of the left and right sides of the unit block E6, a transport path 31 for the wafer W extending in the front-back direction is formed. On one side of the left and right sides of the transport path 31, four developing modules 32 are set. On the other side of the left and right sides of the transport path 31, a heating module 33 for performing PEB (Post Exposure Bake) as a heat treatment before exposure and development is arranged in a front-to-back manner. Furthermore, in the above-mentioned transport path 31, a transport arm F6 for transporting wafers W in the unit block E6 is set.

Regarding unit blocks E1 to E3, when the difference from unit block E6 is explained as the center, unit blocks E1 to E3 have a photoresist film forming module to replace the developing module 32. The photoresist film forming module forms a photoresist film by applying photoresist as a chemical solution on the wafer W. Furthermore, in unit blocks E1 to E3, a heating module for heating the wafer W after the photoresist film is formed is provided to replace the heating modules 33 and 34. In FIG. 2, the transfer arms of each unit block E1 to E5 corresponding to the transfer arm F6 are indicated by F1 to F5.

Next, the interface block D3 is explained. The interface block D3 has towers T2 to T4 extending vertically in a manner spanning the unit blocks E1 to E6. The tower T2 is constructed by stacking a plurality of receiving and transmitting modules TRS. In FIG2 , the receiving and transmitting modules TRS corresponding to the unit blocks E1 to E6 are represented by TRS11 to TRS16. In addition, although the towers T3 and T4 arranged on the left and right of the tower T2 include various modules, they are omitted from illustration and explanation.

Furthermore, the interface block D3 has wafer transfer mechanisms 41 to 43 for transferring wafers W to each tower T2 to T4. The wafer transfer mechanism 41 transfers wafers W to and from the tower T2 and the tower T3. The wafer transfer mechanism 42 transfers wafers W to and from the tower T2 and the tower T4. The wafer transfer mechanism 43 transfers wafers W between the tower T2 and the exposure device D4.

Each carrier C contains wafers W of different batches. In the coating and developing device 1 described above, wafers W are transported in the device according to a transport recipe specified for each batch. That is, wafers W are transported in different transport paths for each batch. Among the transport paths for the wafers W, the first transport path H1 and the second transport path H2 will be described with reference to FIG. 5 showing the outline of these transport paths.

The first transport path H1 is a transport path for the wafer W to pass through any one of the unit blocks E1 to E3 and any one of the unit blocks E4 to E6, and a photoresist pattern is formed on the wafer W. The wafer W is removed from the transmitter carrier C placed on the transmitter stage 14 by the wafer transport mechanism 28 and is distributed to the receiving and receiving modules TRS1 to TRS3 as the substrate loading section for loading into the processing block D2. Furthermore, the wafer W is received by the transport arms F1 to F3 and transported in the order of the temperature adjustment modules SCPL1 to SCPL3 → the photoresist film forming module → the heating module. The wafer W having the photoresist film formed thereon is transported to the receiving and sending modules TRS11 to TRS13, and is transported to the exposure device D4 by the wafer transport mechanisms 41 and 42, where the photoresist film is exposed.

After exposure, the wafer W is taken out of the exposure machine D4 by the wafer transport mechanism 43, and is received by the wafer transport mechanism 42 via the module of the tower part T4. The wafer transport mechanism 42 distributes the wafer W to the receiving and receiving modules TRS14~TRS16. Moreover, the wafer W transported to the receiving and receiving modules TRS14~TRS16 is transported by the transport arms F4~F6 in the order of the heating module 33→temperature adjustment modules SCPL4~SCPL6→development module 32. Accordingly, the photoresist film is developed to form a photoresist pattern on the wafer W. The developed wafer W is transported to the receiving and receiving modules TRS4~TRS6. Moreover, it is transported to the carrier C placed on the receiver table 15 by the wafer transport mechanism 28.

Next, the second transport path H2 is explained. The second transport path H2 is a transport path in which the wafer W passes through only one of the unit blocks E1 to E3 among the unit blocks E1 to E6, and only the photoresist film formation process and the development process are performed on the wafer W. When the explanation is centered on the difference from the first transport path H1, the wafer W is transported from the transmitter carrier C to the receiving and sending modules TRS1 to TRS3, and is moved into the processing block D2. Moreover, the wafer W is transported in the order of temperature adjustment modules SCPL1 to SCPL3 → photoresist film formation module → heating module. Furthermore, the processed wafer W is transported to the receiving and sending modules TRS1 to TRS3 , and is carried out of the processing block D2 by the wafer transport mechanism 26 , and is returned to the carrier C of the receiving station 15 .

When the wafer W is transported by the first transport path H1, the receiving and receiving modules TRS4 to TRS6 serve as substrate loading units for transporting out of the processing block D2. When the wafer W is transported by the second transport path H2, the receiving and receiving modules TRS1 to TRS3 serve as substrate loading units for transporting out of the processing block D2. In addition, although multiple TRS1 to TRS3 are provided as described above, different modules are used for transporting into and out of the processing block D2.

As described above, when wafer W is transported in each transport path, the transport arm F (F1~F6) as the substrate transport mechanism moves cyclically in sequence between the modules accessed by the unit block E (E1~E6). By moving in this way, wafer W is cyclically transported from the upstream module to the downstream module one by one. Therefore, if it is unit block E6, the transport arm F6 moves repeatedly in the transport path 31, and the wafer W is repeatedly transported from the receiving module TRS16 side, which is the module for carrying in to unit block E6, to the receiving module TRS6, which is the module for carrying out. The time it takes for the transport arm F to complete one circle on the transport path 31 is set as the cycle time, and a common cycle time is set for each unit block E.

Moreover, as shown in FIG. 6 , the coating and developing device 1 has a control unit 51 constituted by a computer. The control unit 51 has a wafer processing program 52 and a carrier transfer program 53. The wafer processing program 52 organizes the step groups in a manner of carrying the above-mentioned wafer W and processing the wafer W in each module, and outputs a control signal to each module or each transfer mechanism of the wafer W in such a manner of carrying and processing. The carrier transfer program 53 organizes the step groups in a manner of being able to carry out the transfer of the carrier C described later, and outputs a control signal to the carrier transfer mechanism 21 in such a manner of carrying out the transfer. The wafer processing program 52 and the carrier transfer program 53 are stored in a storage medium such as an optical disk, a hard disk, a DVD, etc., and are installed in the control unit 51.

The wafer processing program 52 and the carrier transfer program 53 cooperate. For example, when a specific instruction is output from the wafer processing program 52, the carrier transfer program 53 organizes the step group in such a way that the carrier transfer mechanism 21 performs the action in response thereto. One of the specific instructions includes a carrier mandatory preparation instruction. The carrier mandatory preparation instruction is issued when the wafer W at the head of the batch being transported in the coating and developing device 1 reaches a specific module in the transport path and the carrier C that should receive the batch is not placed on the receiving station 15. That is, an instruction to promote the transfer of the carrier C to the receiving station 15.

In this way, the carrier mandatory preparation instruction is issued according to the transport status of the wafer W in the coating and developing device 1. As shown in FIG5, since the length of the transport path of each batch is different, it is necessary to transfer so as to produce the situation of carrier C overtaking (carrier C transported from the back to the carrier block D1 is transferred to a platform later than the previously transported carrier C). That is, carrier C does not necessarily have to be transferred in the order of removing wafer W, and there is a situation where such overtaking is performed, for example, there is a situation where the carrier mandatory preparation instruction is issued due to the overtaking.

Furthermore, the control unit 51 has a memory 54 for storing information on the transfer path of the carrier C in the carrier block D1, and a memory 55 for storing the time required for the carrier described later. In addition, the control unit 51 is connected to the upper control unit 56. The upper control unit 56 controls the operation of the above-mentioned OHT. The upper control unit 56 sends the control unit 51 carrier loading information indicating that the carrier C is moved to the loading platform 18 by the OHT, and carrier unloading information indicating that the carrier C is unloaded from the unloading platform 19 by the OHT. In this way, the carrier loading information and the carrier unloading information are information on the configuration status of the carrier C in the carrier block D1.

Furthermore, the upper control unit 56 sends a carrier removal instruction to the control unit 51. The carrier removal instruction is an instruction to allow the carrier C to be transferred to the unloading station 19, and is sent to each carrier C. That is, although the carrier C whose carrier removal instruction has been output among the carriers C that have recovered the wafer W can be transferred to the unloading station 19, the carrier C whose carrier removal instruction has not been output cannot be transferred to the unloading station 19 and is transferred to the storage 16. In this way, the carrier removal instruction is information on whether the carrier C can be removed from the coating and developing device 1.

There are cases where the operation of the carrier transfer mechanism 21 is cancelled by the carrier forced preparation instruction, carrier carry-in information, carrier carry-out information or carrier removal instruction described in FIG. 6, and the operation in response to these instructions or information is performed. Therefore, these instructions and information are information indicating the state of the coating and display device 1, and are also distribution instructions for controlling the operation of the carrier transfer mechanism 21.

In order to clearly show the effects of the carrier block D1 of the coating and developing device 1, the effects of the carrier block D1 of the device for the comparative example are appropriately compared and explained. For the device for the comparative example, it is assumed that the other structures except the coating and developing device 1 and the control unit are the same. In the device for the comparative example, the carrier C is transferred in the order of the loading platform 18 → storage 16 → transmitter platform 14 → storage 16 → receiver platform 15 → storage 16 → unloading platform 19. Therefore, in this transfer path, the carrier C must be transferred to the storage 16 before being transferred from any platform to the next platform. Furthermore, in the device of the comparative example, when the carrier block D1 has a plurality of carriers C that can be transferred, the carrier C to be transferred and the transfer destination are determined based only on information related to the arrangement of the carriers C.

Referring to FIG7 , the determination of the carrier C as the transfer object in the device of the comparative example is described in more detail. The upper side of FIG7 is a schematic diagram of the carrier block D1. For the convenience of explanation, the platforms (transmitter platform 14, receiver platform 15, loading platform 18 and unloading platform 19) and the storage device 16 are represented in a configuration different from the configuration of the previously described figures. The arrows represented in the carrier block D1 in FIG7 represent the transfer of each section in the transfer path of the above-mentioned carrier C. Moreover, the transfer of each section is set with a priority by the control unit. The number surrounded by the circle represented near each arrow represents its priority, and the smaller the number, the higher the priority. In addition, the lower side of FIG7 is a more simplified representation of the transfer path of the carrier C represented on the upper side of FIG7 .

As shown in FIG. 7 , one of the transfer to the transmitter station 14 and the transfer to the receiver station 15 has priority 1 (highest priority), and the other has priority 2. The transfer from the receiver station 15 to the unloading station 19 has priority 3. The transfer from the transmitter station 14 to the storage 16, the transfer from the receiver station 15 to the storage 16, the transfer from the loading station 18 to the storage 16, and the transfer from the storage 16 to the unloading station 19 have priorities 4, 5, 6, and 7, respectively. Which of the transfer to the transmitter station 14 and the transfer to the receiver station 15 has priority (which will be priority 1) is, for example, when any of the two receiver stations 15 is not vacant, the transfer to the transmitter station 14 is prioritized. In other cases, the transfer to the receiver station 15 is prioritized. The control unit determines, in order from the segments with the highest priority, whether the transfer path has a carrier C at the transfer source and a vacant transfer destination (a state where there is no carrier C but the carrier C can be transferred). Then, the carrier C to be transferred and the transfer destination are determined so that the transfer is performed in the segment determined to be in such a state.

FIG8 is a flowchart showing the process performed when a carrier C is transferred once in the apparatus of the comparative example. First, the control unit determines which of the transfer to the transmitter station 14 and the transfer to the receiver station 15 has priority, based on the arrangement of the carrier C in the receiver station 15 as described above (step S11). The transfer to the transmitter station 14 is determined to have priority, based on the priority of each section in the transport path, which determines the transfer to the transmitter station 14 as priority 1 and the transfer to the receiver station 15 as priority 2, and the arrangement of the carrier C. That is, as described above, by determining in order from the high priority section of the transport path whether there is a carrier C at the transfer source and the transfer destination is vacant, the carrier C to be transferred and the transfer destination are determined (step S12).

When it is determined that the transfer to the receiving station 15 has priority, the transfer to the receiving station 15 is determined as priority 1 and the transfer to the transmitter station 14 is determined as priority 2, and the priority of each section in the transport path is determined in the same manner as in step S12, and the arrangement of the carrier C. Then, the carrier C to be transferred and the transfer destination are determined (step S13).

The transfer destination of the carrier C in steps S12 and S13 is determined by referring to the information of the transfer path of the carrier C stored in the memory 54. However, the transfer path is the transfer path of the storage 16 before the transfer to the platform as described in FIG. 7. After the carrier C to be transferred and the transfer destination are determined, the carrier transfer mechanism 21 moves to the top of the carrier C placed on the platform or storage 16 as the transfer source (step S14), receives the carrier C, and transfers it to the transfer destination (step S15). After step S15, the process after step S11 is performed again.

In this way, for the device of the comparative example, it is determined which carrier C is to be transferred with priority according to the presence or absence of the carrier C at the transfer source and the transfer destination. However, due to such determination, a carrier C different from the carrier C that should be transferred with priority may be transferred in order to avoid delaying the removal of the wafer W from the device. Later, in order to describe such a situation in detail, when a simple example is given here, there is a case where the transfer from the loading stage 18 to the transmitter stage 14 is prioritized, but the transfer from the storage 16 to the receiver stage 15 is prioritized. Furthermore, when such inappropriate transfer is performed, the transfer of the carrier C to the transmitter stage 14 is delayed, and as a result, the loading of the wafer W into the device is delayed, and there is a possibility that the processing throughput of the device is reduced. Furthermore, even in a situation where it is not originally necessary, the carrier C is temporarily transferred to the storage device 16 before being transferred to the next stage. Since other carriers C cannot be transferred during this transfer, there is a possibility that the transfer of the carrier C to the transmitter stage 14 and the receiver stage 15 is delayed. Due to this transfer delay, there is a possibility that the processing throughput of the device is reduced.

Next, the outline of the transfer of the carrier C in the coating and developing device 1 is described. In the coating and developing device 1, the required time for the carrier C to be transferred to the transmitter stage 14 and the receiver stage 15 respectively before and after the transfer of the wafer W is calculated. That is, after the transfer of the wafer W from any carrier C is completed, the wafer W is transferred from the subsequent carrier C in a manner that the transfer of the wafer W is not interrupted (without the waiting time of the wafer transfer mechanism 27), and the information of the time required to transfer the subsequent carrier C to the transmitter stage 14 is obtained. Similarly, in order to store the wafer W on the subsequent carrier C without interrupting the storage of the wafer W (without the waiting time of the wafer transfer mechanism 26) after completing the storage of the wafer W on any carrier C, information on when the subsequent carrier C needs to be transferred to the receiving station 15 is obtained.

Since the time required for the carrier is the above-mentioned time, it is determined for the unloading status of the carrier C of the transmitter stage 14 to the device and the loading status of the carrier C of the receiver stage 15 from the device. Specifically, the unloading status of the wafer W to the device and the loading status of the wafer W from the device include the unloading completion time for the transmitter carrier described later and the storage completion time for the receiver carrier. In the coating and developing device 1, in addition to the arrangement of the carrier C and the priority of each section in the transfer path, the carrier C to be transferred and the transfer destination are determined based on the time required for the carrier. That is, the transfer of the carrier C is performed based on the unloading status of the wafer W to the device and the storage status of the wafer W to the carrier C.

FIG9 shows the transfer path of the carrier C in the coating and display device 1. As a difference from the transfer path of the carrier C in the device of the comparative example shown in FIG7, there is a case where the carrier C is transferred from an arbitrary stage to the next stage without passing through the storage 16 (skipping). That is, there is a case where the carrier C is transferred from the loading stage 18 to the transmitter stage 14, the transmitter stage 14 to the receiver stage 15, and the receiver stage 15 to the unloading stage 19. Therefore, the information of the transfer path stored in the memory 54 of the control unit 51 as described in FIG6 is included in the transfer path shown in FIG9, that is, the information of the path out of the storage 16.

The numbers enclosed in circles near the arrows in FIG. 9 indicate the priority of transfers in each section of the transfer path, similar to FIG. 7 . As shown in the figure, transfers from the loading station 18 or the storage 16 → the transmitter station 14 and from the transmitter station 14 or the storage 16 → the receiver station 15 are priority 1 (highest priority). Transfers from the receiver station 15 → the unloading station 19 or the storage 16 and from the transmitter station 14 → the storage 16 are priority 2. However, for transfers from the receiver station 15 → the unloading station 19 or the storage 16, transfers to the unloading station 19 are prioritized over transfers to the storage 16. Therefore, when the carrier C can be transferred from the receiving station 15 to the unloading station 19 and the storage 16, the carrier C is transferred to the unloading station 19. The transfer from the loading station 18 to the storage 16 has a priority of 3, and the transfer from the storage 16 to the unloading station 19 has a priority of 4.

Thus, the priority of transfer to the transmitter stage 14 and the receiver stage 15 and the priority of transfer of the carrier C from the transmitter stage 14 and the receiver stage 15 are relatively high, while the priority of transfer to the storage 16 is relatively low. As will be described later in a specific example, in the coating and display device 1, more operations with relatively high priority are performed, thereby controlling the transfer of the carrier C to the storage 16 in a manner that further suppresses the transfer frequency of the carrier C.

FIG10 is a flow chart of the process performed when a carrier C is transferred in the coating and developing device 1. The required time for each carrier C arranged in the carrier block D1 is calculated by the control unit 51 and stored in the memory 55. By storing the required time for each carrier C in this way, information (information on the required time for carrier transfer) on which carrier C must be transferred and when is stored in the memory 55 (step S1).

The time information stored in the memory 55, the information of the transfer path stored in the memory 54 (information on where to transfer), the priority of each segment of the transfer path described in FIG. 9, and the arrangement of each carrier C are determined for the carrier C of the transfer target and its transfer destination (step S2). When executing this step S2, it is determined that the transfer with a high priority among the transfers that can be performed is performed, but as shown in a specific example later, there is a case where the transfer with a high priority is waited and then performed. Furthermore, as shown in FIG. 9, there are segments with the same priority set in the transfer path of the carrier C. When both transfers with the same priority can be performed, it is decided to perform any transfer in step S2. A specific example will be described later.

In order to receive the carrier C determined as the transfer target, the carrier transfer mechanism 21 moves toward the top of the carrier C (step S3). In this way, after the movement of the carrier transfer mechanism 21, before the carrier transfer mechanism 21 descends and holds the carrier C, the determination performed in step S2 is performed again (step S4). Then, the transfer by the carrier transfer mechanism 21 is performed (step S5). The transfer in step S5 is performed according to the change in the case where the transfer target carrier C and/or the transfer destination are changed based on the determination in step S4. If the carrier C to be transferred and/or the transfer destination are not changed, the carrier C to be transferred determined in step S2 is transported to the transfer destination determined in step S2. After the execution of step S5, step S1 is executed again. The calculation, determination and operation control of the carrier transfer mechanism 21 in the series of steps S1 to S5 are performed by the carrier transfer program 53 described in FIG. 6.

In addition, when the judgment of S2 and S4 is performed, if the aforementioned carrier mandatory preparation instruction is issued, the transfer according to the carrier mandatory preparation instruction is performed with priority. That is, the transfer to the receiver station 15 of the carrier C that is the target of the mandatory preparation instruction, or the transfer of the storage 16 of the carrier C to the receiver station 15 is performed with the highest priority in order to vacate the receiver station 15 before the transfer. Furthermore, when the step S4 is supplemented, the step S4 is performed when the carrier moving information or carrier moving information described in FIG. 6 (that is, the arrangement status of the carrier C is changed) is issued during the movement of the carrier transfer mechanism 21, or when the carrier moving instruction is issued. That is, because these carrier moving-in information, carrier moving-out information, and carrier moving-out instructions may enable a higher priority moving to be performed during the moving of the carrier moving mechanism 21. Also, because there may be a case where a carrier forced preparation instruction is issued during the moving of the carrier moving mechanism 21 as described above, the moving corresponding to this is performed.

However, although a specific example will be described later, when determining the carrier C of the transfer object and the transfer destination, there is a case where the time (transfer time) required for a single transfer process of the carrier transfer mechanism 21 is used. The control unit 51 is configured to obtain the transfer time. With respect to the transfer time, it may be calculated based on, for example, a pre-set algorithm, or it may be stored in a memory constituting the control unit 51 as a constant. For example, since the transfer path length differs depending on the transfer source or the transfer destination, the transfer time differs slightly in each combination of the transfer source and the transfer destination, but regardless of the difference in the transfer source and the transfer destination, a constant value may be used, or a transfer time that differs depending on the transfer source and the transfer destination may be used.

The following will describe in more detail the determination of the carrier C to be transferred and the transfer destination in the above step S2 by showing a specific example. As shown in FIG9 , the transfer from the loading station 18 or the storage 16 to the transmitter station 14 and the transfer from the transmitter station 14 or the storage 16 to the receiver station 15 are both given priority 1. The following will describe the case where both the transfer to the transmitter station 14 and the transfer to the receiver station 15 are possible.

When calculating the required time of the carrier described in the process of FIG. 10, the control unit 51 calculates the following sender carrier removal completion time and receiver carrier storage completion time. According to sender carrier removal completion time = number of wafers W remaining to be removed from the sender carrier C × cycle time receiver carrier storage completion time = number of wafers W remaining to be stored in the receiver carrier C × cycle time, the sender carrier removal completion time is the removal completion time when the predetermined wafer W is removed from the carrier C, and the sender carrier storage completion time is the loading completion time when the predetermined wafer W is loaded into the carrier C. By comparing the lengths of the sender carrier removal end time and the receiver carrier storage end time, if the sender carrier removal end time is short, the transfer to the sender stage 14 is prioritized, and if the receiver carrier storage end time is short, the transfer to the receiver stage 15 is prioritized. That is, when the wafer W is removed from the device or the wafer W is received from the device, the carrier C is moved to the side that ends earlier to prevent the interval between removal and reception from becoming longer.

Furthermore, when the lengths of the transmitter carrier removal completion time and the receiver carrier storage completion time are compared and the time is the same, as shown in the schematic diagram of FIG. 11 , the carrier C is preferentially transferred to the transmitter stage 14. In this way, when the reason for preferential transfer to the transmitter stage 14 is described, in the receiving and receiving module TRS that serves as the exit for transferring the wafer W from the processing block D2, as described in FIG. 4 , a plurality of wafers W can be placed and retained. That is, the wafers W are first retained in the receiving and receiving module TRS, and after the receiver carrier C is placed, the receiver carrier C can be transferred by the wafer transfer mechanism 28. Therefore, the influence on the processing amount of the coating and developing device 1 is suppressed. On the other hand, when the transfer to the transmitter stage 14 is delayed, the removal of the new wafer W to the coating and development device 1 and the processing of the wafer W are delayed, so the processing capacity of the device decreases. Therefore, the transfer to the transmitter stage 14 is prioritized. In this way, in the coating and development device 1, by comparing the transmitter carrier removal completion time and the receiver carrier storage completion time, it is determined whether to transfer the carrier C to the transmitter stage 14 or the receiver stage 15, thereby suppressing the decrease in the processing capacity of the device.

However, in the above example, only when the value set in advance is 0 seconds, the transfer to the transmitter station 14 is prioritized. In this way, the time difference is not limited to the time difference being prioritized to the transmitter station 14 only when the value is set. Even if a range is set in advance, when the time difference is limited to the set range, the transfer to the transmitter station 14 may be prioritized. As the setting range, for example, 0 seconds is included.

Next, referring to FIG. 12 and FIG. 13, the coating and developing apparatus 1 is explained that by determining the priority according to the end time of the carrier removal of the transmitter and the end time of the carrier storage of the receiver as described above, the carrier C transferred under the same condition will be different from the apparatus of the comparative example. FIG. 12 shows the transfer of the carrier C in the apparatus of the comparative example (indicated by 1A), and FIG. 13 shows the transfer of the carrier C in the coating and developing apparatus 1. In both the apparatus 1A of the comparative example and the coating and developing apparatus 1, it is assumed that the carrier C is loaded on the loading table 18, the two transmitter tables 14 are vacant, and the receiver tables 15 and 15B are vacant, and the wafer W is stored in 15A. Furthermore, it is assumed that the carrier C from which the wafer W has been removed is placed in the stocker 16. Therefore, in each device, the carrier C can be transferred to the transmitter stage 14 and the carrier C can be transferred to the receiver stage 15B.

In the device 1A of the comparative example, because the priority is set as described in FIG. 7 , it is determined that the carrier C of the storage device 16 is transferred to the receiver station 15B as shown in FIG. 12 . On the other hand, in the coating and developing device 1 , the transmitter carrier removal completion time and the receiver carrier storage completion time are calculated as described above. Since the wafer W is stored in the receiver carrier C, the number of wafers W stored is more than one, so the receiver carrier storage completion time is greater than 0 seconds. The transmitter carrier removal completion time is 0 seconds because there is no carrier C on the transmitter station 14, so the number of wafers W left to be removed is 0. Therefore, since the transmitter carrier removal completion time is less than the receiver carrier storage completion time, it is determined to be transferred to the transmitter station 14 with priority. By preferentially transferring the wafers W to the transmitter stage 14 in this manner, as described above, it is possible to prevent delays in the loading and processing of the wafers W into the device, thereby ensuring a high throughput.

Next, return to FIG. 9 to explain another example. It is assumed that carriers C are placed on two receiving stations 15, and the storage completion time of these receiving stations is the same. At this time, no carrier removal instruction is issued to the carrier C of one receiving station 15, and the transfer destination is the storage 16. A carrier removal instruction is issued to the carrier C of the other receiving station 15, and the transfer destination is the unloading station 19, and it is assumed that the unloading station 19 is vacant. That is, it is assumed that either the transfer from the receiving station 15 to the unloading station 19 or the transfer to the storage 16 can be performed. In this case, it is determined that the carrier C of the other receiving station 15 is preferentially transferred to the unloading station 19.

This is based on the assumption that when the carrier C of the receiver station 15 of one side is transferred to the storage 16 first, then, one process is required to transfer the carrier C from the storage 16 to the unloading station 19, and one process is required to transfer the carrier C of the receiver station 15B of the other side to the unloading station 19. That is, the number of transfer processes of the carrier transfer mechanism 21 for transferring the two carriers C to the unloading station 19 is three processes. On the other hand, when the carrier C of the receiver station 15 of the other side is transferred to the unloading station 19 first, during the transfer, even for the carrier C of the receiver station 15 of one side, there is a case where a carrier removal instruction is issued and the carrier C can be directly transferred to the unloading station 19. In this case, the number of transfer operations of the carrier transfer mechanism 21 for transferring each carrier C of the two receiving stations 15 to the loading station 18 can be completed in two operations.

In addition, other transfer cases are explained. When step S2 of the process illustrated in FIG. 10 is executed, that is, at the moment of determining the carrier C to be transferred and the transfer destination, there is a case where only the transfer with a low priority is performed. However, there is a case where a transfer with a higher priority can be performed by waiting for a certain period of time for the transfer with a low priority. The control unit 51 determines whether such a transfer with a high priority can be performed based on the time required for the carrier. When it is determined that the transfer can be performed, it decides to wait for the transfer with a low priority, and then performs the transfer with a high priority after waiting.

While comparing such a transfer example more specifically with the transfer in the device 1A of the comparative example, it is explained with reference to Figures 14 to 17. Figure 14 shows the arrangement of the carrier C in the device 1A of the comparative example and the coating and developing device 1, and the carrier C that cannot be transferred is shaded. The two receiving stations 15 are arranged with a carrier C whose wafer W has not been completely stored, and the carrier C cannot be transferred. Moreover, the transmitter station 14 is arranged with a carrier C whose wafer W has not been completely removed, and even the carrier C cannot be transferred. However, for the carrier C of the transmitter station 14A, the removal of the wafer W is about to be completed, and it becomes possible to transfer from the transmitter station 14A (located at the unloading position). Furthermore, the unloading station 18 is in a state where the carrier C is moved in again. For convenience of explanation, the transmitter stage 14A, the transmitter stage 14B, and the carrier C of the loading stage 18 are designated as C1, C2, and C3, respectively. The arrows with dots in FIG. 14 indicate the transfer paths set in the device 1A of the comparative example, and the arrows without dots indicate the transfer paths set in the coating and display device 1. In addition, the numbers indicated near each arrow indicate the order of transfer.

FIG. 15 and FIG. 16 are timing diagrams showing the operation of the carrier transfer mechanism 21, showing how the arrangement of the carriers C1 to C3 is changed for the apparatus 1A of the comparative example and the coating and display apparatus 1, respectively. The state illustrated in FIG. 14 is the state at the moment j1 in the figure, and it is assumed that at the moment j1, the carrier C to be transferred and the destination of transfer are determined. Therefore, in the coating and display apparatus 1, step S2 of the process shown in FIG. 10 is performed, and in the apparatus 1A of the comparative example, the determination of S11 to S13 shown in FIG. 8 is performed. In each timing diagram, although the states of the transmitter stages 14A, 14B and the loading stage 18 are shown, the period during which the carriers C1 to C3 are loaded is indicated by a thick frame for these stages. In addition, within the thick frame, hatching is indicated for the period during which the carrier C cannot be transferred, and dots are indicated for the period during which the carrier C can be transferred. In addition, dots are indicated for the period during which the carrier transfer mechanism 21 is in motion, and no dots are indicated for the period during which the carrier is in standby.

Since the priority is set as described in FIG. 7 for the device 1A of the comparative example, at time j1 in FIG. 15 , it is determined that the carrier C3 with priority 6 is transferred to the storage 16. It is assumed that the transfer of the carrier C3 is started (time j2), and then the period during which the carrier C1 cannot be transferred during the transfer of the carrier C3 ends (time j3). Therefore, it is determined that after the transfer of the carrier C3 ends, the carrier C1 with priority 4 is transferred to the storage 16 (time j4). Furthermore, it is determined that after the transfer of the carrier C1 ends, the carrier C3 with priority 1 is transferred to the vacant transmitter station 14A (time j5), and the transfer is performed.

In this way, in the comparative example apparatus 1A, the carrier C to be transferred and the transfer destination are determined based on the arrangement of the carriers C at a specific moment, so that the transfer of the carrier C1 with a high priority can be performed while the transfer of the carrier C3 with a low priority is being performed. Since the transfer of the carrier C1 is not performed during the transfer of the carrier C3, the transfer of the carrier C1 cannot be performed quickly. Until the transfer of the carrier C1 with a high priority to the transmitter stage 14A is completed, the carrier transfer mechanism 21 needs three steps. As a result, the time to complete the transfer of the carrier C1 to the transmitter stage 14A is delayed.

Next, transfer in the coating and developing apparatus 1 is described using FIGS. 16 and 17. In addition, FIG. 17 schematically shows the determination result of transfer performed at time j1 in the coating and developing apparatus 1 as described later. At time j1, the carrier C3 can be transferred from the loading table 18 to the storage 16. As described in FIG. 9, the transfer has priority 3. However, the control unit 51 of the coating and developing apparatus 1 obtains the carrier removal end time of the transmitter (the number of wafers W remaining to be removed × cycle time) when obtaining the required time of the above-mentioned carrier. Furthermore, the control unit 51 can calculate the times j11 and j12 when the carriers C1 and C2 can be transferred from the transmitter stations 14A and 14B respectively by adding the unloading time of the carrier C (the time of moving from the loading position to the unloading position) to the completion time of the carrier removal of the transmitter.

Furthermore, the control unit 51 can also obtain the transfer time from the loading stage 18 to the storage 16 as described above. Therefore, when the transfer of the carrier C3 to the storage 16 (priority 3) is performed, the control unit 51 can detect that the transfer of the carrier C1 from the transmitter stage 14A to the storage 16 (priority 2) is delayed at time j11 during the transfer.

Therefore, the control unit 51 waits for the transfer of the carrier C3 from the loading stage 18 to the storage 16 as shown in FIG. 17 in step S2 of the flow of FIG. 10 performed at time j1 (that is, the transfer of the carrier C3 performed at time j2 in the comparative example is not performed). And, it is decided to transfer the carrier C1 from the transmitter stage 14A to the storage 16 while waiting for the transfer. And, when it becomes time j11, the transfer of the carrier C1 that has become transferable is performed. In addition, the description is made on the assumption that the change of the carrier C to be transferred and the change of the transfer destination in step S4 are not caused.

After the carrier C1 is transferred in this way, in the next step S2, it is decided to transfer the carrier C3 to the vacant transmitter stage 14A with priority 1. By performing the transfer in this way, the transmitter stage 14A can be quickly vacated, and the transfer to the storage 16 is skipped until the transfer to the transmitter stage 14A of the carrier C3. Thus, the carrier transfer mechanism 21 only needs two steps. Therefore, as shown in FIG. 16, the transfer to the transmitter stage 14A of the carrier C3 is completed earlier than the device 1A of the comparative example.

More specifically, the control unit 51 determines whether to wait for the transfer of the carrier C3 from the above-mentioned loading station 18 to the storage 16 by whether the following two conditions are met. One of the conditions is that the transfer time from the loading station 18 to the storage 16 is greater than the sender carrier removal completion time + the carrier C unloading time, and there is a transfer destination of the sender carrier C that completes the removal of the wafer W. The existence of the transfer destination of the sender carrier C means that the carrier C can be transferred to the storage 16 or the receiving station 15. The examples illustrated in Figures 16 and 17 are examples of situations where it is determined to be a waiting situation by meeting this condition.

The carrier C removal completion time of the transmitter + the unloading time of the carrier C is set as the first possible removal scheduled time of the carrier C. The control unit 51 compares the first possible removal scheduled time with the transfer time from the loading table 18 to the storage 16 to determine whether to transfer the carrier C to the storage. As described above, since the first possible removal scheduled time is based on the carrier removal completion time of the transmitter, it is a time corresponding to the removal status of the wafer W from the carrier C.

Furthermore, another condition is that the time required for transfer from the loading station 18 to the storage 16 is greater than the time to complete storage of the receiver carrier + the time to unload the carrier C, and there is a transfer destination for the receiver carrier C that has completed storage of the wafer W. The existence of the transfer destination for the receiver carrier C means that the carrier C can be transferred to the storage 16 or the unloading station 19. In the case where such a condition is met, when it is set to transfer to the storage 16, the transfer of the receiver carrier C with a higher priority can be performed during the transfer. That is, because the timing of the vacancy of the receiver station 15 is slowed down by performing the transfer to the storage 16, it is decided to wait for the transfer to the storage 16 and perform the transfer of the receiver carrier C.

The receiver carrier storage completion time + the unloading time of the carrier C is set as the second possible carry-out scheduled time of the carrier C. The control unit 51 compares the second possible carry-out scheduled time with the transfer time from the loading stage 18 to the storage unit 16 to determine whether to transfer the carrier C to the storage unit 16. As described above, since the second possible carry-out scheduled time is based on the receiver carrier storage completion time, it is a time corresponding to the transfer status of the wafer W from the carrier C.

However, as described above, in the apparatus 1A of the comparative example, when the carrier C is transferred between the platforms, it passes through the storage 16. In FIG. 18, as in FIG. 14, the transfer example of the carrier C in the apparatus 1A of the comparative example is indicated by a dotted arrow, and the transfer example of the coating display device 1 is indicated by an undotted arrow. As shown in the figure, in the apparatus 1A of the comparative example, the carrier C is transferred in the order of the transmitter stage 14 → storage 16, the receiver stage 15 → storage 16 or the unloading stage 19, storage 16 → receiver stage 15, and the carrier C of the transmitter stage is placed on the receiver stage 15. However, as shown in the figure as an example of transfer of the coating display device 1, if the transfer can be performed in the order of the receiver stage 15 → storage 16 or unloading stage 19, the transmitter stage 14 → receiver stage 15, such transfer is performed. That is, when the carrier C is transferred from the transmitter stage 14 to the receiver stage 15, if there is no problem in skipping the storage 16, such skipping is performed.

However, for the sake of convenience, although it is described that the carrier C to be transferred and the transfer destination of the carrier are determined based on the required time of the carrier C in step S2 of the flow of FIG. 10 , the transfer destination of the carrier C may be determined based on other factors. The following describes an example in which the storage 16 is skipped between the transmitter station 14 and the receiver station 15 based on the required order of the carrier C as the other factor.

When explaining the required sequence of the carrier C, the required sequence is the sequence of the carrier C that is not placed on the receiving station 15 after the device has finished removing the wafer W. The carrier C that needs to be transferred to the receiving station 15 earlier is assigned an earlier sequence. Due to the difference in the length of the transport path of the wafer W shown in FIG. 5 or the failure generated in the device, the time from being transported into the device to being transported to the receiving and receiving module TRS that is the exit of the processing block D2 is different for each wafer W. Therefore, the required sequence of the carrier C may be different from the sequence of the wafer W being removed.

When the required sequence of the carrier C is further described in detail, when the step S2 of the process of FIG. 10 is implemented, for example, the wafer W at the front of the batch (the first wafer W to be transported into the device) is set to the required sequence according to the predetermined time when it is transported into the receiving and receiving module TRS that becomes the exit of the processing block D2 in the transport path of the batch. Therefore, for example, for the batch transported in the first wafer transport path H1 as described in FIG. 5, the required sequence is determined in response to the predetermined time when the front wafer W is transported into the receiving and receiving modules TRS4 to TRS6. For example, for the batch transported in the second wafer transport path H2 as described in FIG. 5, the required sequence is determined in response to the predetermined time when the front wafer W is transported into the receiving and receiving modules TRS1 to TRS3. Therefore, the required sequence of the carrier C corresponds to the predetermined sequence of the transport module TRS to be transported to the exit of the processing block D2 among the wafers W stored in different carriers. In this way, the required sequence is set in accordance with the transport schedule to the downstream side of the transport path of the wafer W in the processing block D2. In addition, as described above, in addition to setting the cycle time, the control unit 51 can obtain the processing time of each module in the device and the processing time of the exposure machine D4, and can calculate the scheduled time of transport to the above-mentioned each TRS from these processing times and cycle times.

Referring to FIG. 19, an example of skipping described above is described. When executing the above step S2, it is assumed that the required sequence of the carrier C on the transmitter stage 14 is ≤ the number of empty receiver stages 15. At this time, it is determined that when the carrier C on the transmitter stage 14 is transferred, it is directly transferred to the receiver stage 15. That is, based on the required sequence of the carrier C and the number of receiver stages 15 without the carrier C, it is determined whether to transfer the carrier C that has completed the transfer (removal) of the wafer W to the substrate receiving port without passing through the storage 16.

In the example of FIG. 19 , the carrier C is placed on the receiver station 15A, and the receiver station 15B is vacant. The required order of the transmitter carrier C to be transferred is 1, which meets the above conditions. Therefore, it is decided that when transferring the transmitter carrier C, it is not the storage 16, but the receiver station 15B. That is, it is decided not to transfer to the storage 16 of priority 2 as shown in FIG. 9, but to transfer to the receiver station 15 of priority 1.

Next, referring to FIG. 20, another example of the determination of transfer according to the required order is described. When executing the above step S2, it is assumed that the required order of the carriers C in the transmitter station 14 is greater than the number of empty receiver stations 15. In this case, depending on other conditions, even if the carriers C of the transmitter station 14 can be transferred to the storage 16, other carriers C are transferred while waiting for the transfer, and there is a case where the transfer of the storage 16 is skipped between the transmitter station 14 and the receiver station 15.

For example, a carrier C of a transmitter station (14B in the example of the figure) completes the removal of wafer W and becomes transferable. Furthermore, it is assumed that a carrier C of another transmitter station (14A in the example of the figure) removes wafer W. Let the removal completion time of the carrier C (the remaining number of wafers W to be removed × cycle time) = time G1. The receiver station 15 is not empty. For the carrier C of the receiver station 15 that first completes the storage of wafers W (in the example of the figure, carrier C of 15B), the time until it becomes transferable is set to G2. The time G2 is the receiver carrier storage completion time + the carrier C unloading time, and as mentioned above, the receiver carrier storage completion time = the remaining number of wafers W to be stored × cycle time.

Furthermore, for the carrier C that has previously completed the storage of the wafer W (in the example of the figure, the carrier C of 15B), the time required for the carrier transfer mechanism 21 to transfer is set to G3. The time G3 is the time required for the carrier removal signal of the carrier C to be sent, and if the loading platform 18 is vacant, to transfer to the loading platform 18, otherwise, to the storage 16. Furthermore, for the carrier C that has become transferable to the above-mentioned one transmitter stage (in the example of the figure, 14B), the time required for transfer to the platform of the carrier C that has previously completed the storage of the wafer W (in the example of the figure, 15B) is set to G4. Furthermore, when the carrier C is placed on the loading stage 18 or the carrier C without removing the wafer W is placed on the storage 16, the time required for the carrier C to be transferred to one transmitter stage + the loading time (the time for moving from the unloading position to the loading position) is set as time G5.

When it is determined that time G1>time G2+time G3+time G4+time G5, the transfer to the storage 16 of one transmitter station (14B in the example of the figure) is waited (priority 3). Furthermore, if the carrier C of one receiver station (15B in the example of the figure) can be transferred, it is decided to transfer the carrier C (priority 2). In this way, in this example, it is decided whether to transfer the carrier C of the transmitter station 14B to the storage 16 based on the unloading status of the wafer W from the carrier C in the transmitter station 14A, the loading status of the wafer W into the carrier C in the receiver station 15B, the required sequence, and the number of empty receiver stations 15.

When the time G1 to G5 is in the above relationship, in order to explain the reason for waiting for transfer to the storage 16, the above example is more specifically shown. When executing step S2, the cycle time is set to 5 seconds, the number of wafers (remaining number) of the carrier C removed from the transmitter stage 14A is 25, and the carrier C of the receiver stage 15B is set to store all wafers W without moving to the unloading position. Furthermore, the time required for one process of the carrier transfer mechanism 21 is set to 25 seconds. Therefore, the time required to transfer the carrier C from the receiver stage 15B and the time required to transfer the carrier C to the transmitter stage 14A are both set to 25 seconds. The loading time and the unloading time are set to 20 seconds and 15 seconds, respectively.

In this case, the removal completion time G1 of the transmitter stage 14A = the number of wafers W remaining to be removed × the cycle time = 25 wafers × 5 seconds = 125 seconds. The time G2 until the carrier C can be transferred to the receiver stage 15B = the receiver carrier storage completion time + the unloading time of the carrier C = 0 wafers × 5 seconds + 15 seconds = 15 seconds. The time required for transferring the receiver carrier C is G3 = 25 seconds. The time G4 required for transferring the carrier C from the transmitter stage 14B to the receiver stage 15B is 25 seconds. The time required for transferring the carrier C to the transmitter stage 14B + the loading time = G5 = 25 seconds + 20 seconds. Therefore, the time G1 = 125 seconds > time G2 + time G3 + time G4 + time G5 = 110 seconds. Therefore, the carrier C of the transmitter station 14B waits for transfer to the storage device 16.

The reason for such waiting is described below. The carrier C of the receiver station 15B is transferred to make the receiver station 15B vacant. Then, the carrier C of the transmitter station 14B is transferred to the vacant receiver station 15B (that is, not transferred to the storage 16). Then, the subsequent carrier C is transferred to the vacant transmitter station 14B, moved to the loading position, and set to a state where the wafer W can be removed from the carrier C. When such a series of transfers are performed, the relationship of time G1>time G2+time G3+time G4+time G5 is formed, that is, when the series of transfers is completed, the wafer W continues to be removed from the carrier C in the transmitter station 14A (not completed).

That is, since the time G1 to G5 are in the above relationship, even if the above series of transfers are performed, the wafer transport mechanism 27 does not wait but transfers the wafer W from the carrier C of the transmitter stage 14B after transferring all the wafers W from the carrier C of the transmitter stage 14A, so the transfer of the wafer W to the device will not be delayed. On the other hand, in the receiver stage 15B, the carrier C placed on the transmitter stage 14B is transferred without passing through the storage 16, so that the wafer W can be stored at an earlier time.

Next, a specific example will be shown and explained for the re-determination step S4 in the process of performing the process of FIG. 10. FIG. 21 and FIG. 22 are timing diagrams showing the state of transfer of an arbitrary carrier C (set as C1) and the operation of the carrier transfer mechanism 21 for each of the device 1A and the coating display device 1 of the comparative example. The timing diagrams of each figure show the transfer state of the carrier C1 in the receiving station 15, the storage 16, and the unloading station 19, and the points are marked during the period of loading the carrier C1. Moreover, similar to the illustrations of FIG. 15 and FIG. 16, for the carrier transfer mechanism 21, the points are marked during the operation period, and the points are not marked during the standby period.

Here, the comparative example apparatus and the coating display apparatus 1 are both assumed to be transferred under the following conditions. The time when the carrier C1 is moved to the unloading position in the receiver station 15 is assumed to be k1. At the time k1, it is assumed that no carrier removal instruction is issued for the carrier C1, and at the time k2 after the time k1, the carrier removal instruction is issued. At the time k2, it is assumed that the carrier C1 is placed on the receiver station 15 as it is.

In the apparatus 1A of the comparative example, when it is determined to transfer the carrier C1 in the judgment of steps S11 to S13 (see FIG. 8 ) performed at time k1, the carrier transfer mechanism 21 moves to the receiver station 15 and receives the carrier C1 (in FIG. 21 , time k3 (a time after time k2)), and the carrier C1 is transferred to the storage 16. In this way, in the apparatus 1A of the comparative example, since the re-judgment equivalent to step S4 of the coating and display apparatus 1 is not performed, even if a carrier removal instruction is issued at time k2, the carrier C1 of the receiver station 15 is temporarily transferred to the storage 16 (time k4). Next, when the determination in steps S11 to S13 is performed, if it is determined to transfer the carrier C1, a carrier removal instruction is issued to transfer the carrier C1 from the storage 16 to the unloading station 19 (time k5).

Next, the transfer in the coating and display device 1 is described. It is assumed that the judgment of step S2 is performed at time k1 (refer to FIG. 10 ), and at this point in time, the transfer from the receiving station 15 to the storage 16 is performed (priority 2-2). Thereafter, a carrier removal instruction is issued at time k2. Furthermore, the carrier transfer mechanism 21 is displaced toward the top of the receiving station 15, and the re-judgment of step S4 is performed (in FIG. 22 , time k13). By issuing a carrier removal instruction, the re-determination is performed in such a manner that the transfer from the receiving station 15 to the unloading station 19 (priority 2-1) is performed, and the carrier C1 is transferred to the unloading station 19 (time k14). Therefore, the coating and developing apparatus 1 requires one less process of the carrier transfer mechanism 21 to transfer the carrier C1 to the unloading stage 19 than the apparatus 1A of the comparative example. In addition, the carrier C1 can be transferred to the unloading stage 19 at an earlier time.

In this way, in the coating and developing apparatus 1, the carrier C is transferred according to the loading and unloading of the wafer W into the coating and developing apparatus 1 and the transfer of the wafer W to the downstream side of the transfer path of the wafer W in the processing block D2. Therefore, the carrier C can be transferred in a manner that the wafer W is not delayed when it is loaded from the carrier C into the apparatus and when it is stored from the apparatus into the carrier C. Therefore, the processing throughput of the coating and developing apparatus 1 can be improved.

Furthermore, when transferring the carrier C, the transfer efficiency of the carrier C can be improved by skipping the storage 16. Therefore, the carrier C can be transferred to each of the transmitter stage 14 and the receiver stage 15 more reliably at the timing required for the wafer W to be transferred in and out of the device without delay. Therefore, the processing capacity of the coating and developing device 1 can be more reliably improved.

Furthermore, after the carrier C to be transferred and the transfer destination are determined, after the carrier C is transferred to the position corresponding to the carrier C transferred by the carrier transfer mechanism 21, whether to carry out the transfer determined in this way is re-determined according to whether there is a condition (interrupt command) set in advance. Since the interrupt command includes commands corresponding to the arrangement status of the carrier C in the carrier block D1, the transportation status of the wafer W in the coating and developing device 1, and whether the carrier C can be moved out of the carrier block D1, the transfer of the carrier C can be carried out quickly in accordance with these conditions.

However, it is also possible to transfer the carrier C according to the end time of the carrier removal of the transmitter and the end time of the carrier removal of the receiver as described in, for example, FIG. 11, or to transfer the carrier C according to the required sequence as described in FIG. 19. That is, the device may be configured to transfer the carrier C according to the state of the wafer W being carried in and out of the coating and developing device 1, or to transfer the carrier C according to the state of the wafer W being carried in the coating and developing device 1.

Furthermore, when the carrier C is transferred according to the loading and unloading status of the wafer W, the carrier C may be transferred according to either the loading and unloading status of the wafer W or the unloading status of the wafer W. For example, according to the carrier unloading completion time in the transmitter stage 14, it is determined whether the carrier C on the loading stage 18 is transferred to the storage 16 or to the transmitter stage 14. According to the carrier storage completion time in the receiver stage 15, it is determined whether the carrier C on the transmitter stage 14 is transferred to the storage 16 or to the receiver stage 15. Even in these two decisions, only one of them may be determined.

Regarding the configuration of the loading platform 18, the unloading platform 19, the transmitter platform 14, the receiver platform 15, and the storage 16 in the carrier block D1, the above configuration is an example, and if the carrier transfer mechanism 21 can access it, it is not limited to the above configuration. Furthermore, even if the above example is an example for the configuration number of each platform and storage, it is not limited to the above example. Furthermore, the receiver platform and the transmitter platform are different bodies in the above configuration example, but it is not limited to different bodies. That is, even if it is set to function as a transmitter platform when the carrier C containing the wafer W is placed, it is also possible to use the carrier platform that functions as a receiver platform when the carrier C is placed to remove the wafer W. Furthermore, in the above example, for the transport mechanism of the wafer W set in the carrier block D1, although the wafer transport mechanism that transports the wafer W to the processing block D2 and the wafer transport mechanism that transports the wafer W to the carrier C are different entities, they may be a common wafer transport mechanism. Furthermore, it is not limited to returning the wafer W to the same carrier C as the carrier C that was removed from the transmitter stage 14. That is, even when setting the above required sequence, the required sequence may be set in such a way that the wafer W is stored in a carrier C different from the carrier C that stores the carrier C.

The first wafer transport path H1 and the second wafer transport path H2 in the above-mentioned processing block D2 are an example. Even if, for example, in order to perform development processing, the wafer W is transported through any transport path among the unit blocks E1 to E6. Furthermore, as a processing block D2, it is also possible to have a configuration with only one unit block. Furthermore, the processing performed in the processing block D2 is not limited to the formation and development of the photoresist film. Even if the formation of an anti-reflection film or an insulating film due to liquid processing is performed, the coating of an adhesive for bonding the wafer W is also possible. Furthermore, the processing also includes photographing the wafer W to inspect the surface condition. Therefore, the substrate processing device is not limited to the coating and developing device 1.

In addition, it should be understood that all the points of the embodiments disclosed this time are illustrative and not limiting. The above embodiments may be omitted, replaced, changed, and combined in various forms without departing from the scope of the patent application and its subject matter of the appendix.

C: Carrier

D1: carrier block

D2: Processing block

W: Wafer

1: Coating display device

14: Transmitter station

15: Receiver station

16: Storage

18: Loading platform

19: Unloading station

21: Carrier transfer mechanism

[FIG. 1] is a cross-sectional top view of a coating and developing device as one embodiment of the present disclosure. [FIG. 2] is a longitudinal side view of the coating and developing device. [FIG. 3] is a front view of a carrier block constituting the coating and developing device. [FIG. 4] is a side view of a receiving and sending module provided in the coating and developing device. [FIG. 5] is an explanatory diagram showing a wafer transport path in the coating and developing device. [FIG. 6] is a configuration diagram showing the configuration of a control unit in the coating and developing device. [FIG. 7] is an explanatory diagram showing a carrier transfer process in a comparative example device. [Figure 8] is a flow chart showing the transfer sequence of the carrier in the device of the above-mentioned comparative example. [Figure 9] is an explanatory diagram showing the transfer process of the carrier in the device of the above-mentioned comparative example. [Figure 10] is a flow chart showing the transfer sequence of the carrier in the above-mentioned coating and developing device. [Figure 11] is an explanatory diagram showing a specific example of the transfer of the carrier in the above-mentioned coating and developing device. [Figure 12] is an explanatory diagram showing a specific example of the transfer of the carrier in the device of the above-mentioned comparative example. [Figure 13] is an explanatory diagram showing a specific example of the transfer of the carrier in the above-mentioned coating and developing device. [Figure 14] is an explanatory diagram showing a specific example of the transfer of the carrier in the above-mentioned coating and developing device and the device of the above-mentioned comparative example. [Figure 15] is a diagram showing a transfer schedule of a carrier in the apparatus of the comparative example. [Figure 16] is a diagram showing a transfer schedule of a carrier in the coating and developing apparatus. [Figure 17] is an explanatory diagram showing a specific example of the transfer of a carrier in the coating and developing apparatus. [Figure 18] is an explanatory diagram showing a specific example of the transfer of a carrier in the coating and developing apparatus and the apparatus of the comparative example. [Figure 19] is an explanatory diagram showing a specific example of the transfer of a carrier in the coating and developing apparatus. [Figure 20] is an explanatory diagram showing a specific example of the transfer of a carrier in the coating and developing apparatus. [Figure 21] is a diagram showing a transfer schedule of a carrier in the apparatus of the comparative example. [Figure 22] is a diagram showing the carrier transfer schedule in the above-mentioned coating and developing device.

14: Transmitter station

15: Receiver station

16: Storage

18: Loading platform

19: Unloading station

Claims (12)

A substrate processing device comprises: a carrier block, which is a carrier configured as a transport container for storing substrates; and a processing block, which is between the carrier block and receives the substrate and is provided with a processing module for processing the substrate. The substrate processing device is characterized in that it comprises: a carrier carrying-in port and a carrier carrying-out port, which are used to carry the carrier in and out of the substrate processing device and to carry the carrier; a substrate carrying-out port and a substrate receiving port, which are provided in the carrier block and are used to carry the carrier in and out of the carrier from the carrier to the processing block and to carry the substrate from the processing block to the carrier; a carrier temporary placement portion, which is used to temporarily carry the carrier; and a carrier transfer mechanism. , which is capable of transferring the carrier among the carrier import port, the carrier export port, the substrate receiving port, the substrate export port, and the carrier temporary storage section; the control section, when transferring the carrier in the order of the carrier import port, the substrate receiving port, the substrate export port, and the carrier export port, outputs the control signal so that the carrier is transferred from the transfer source port to the next transfer destination port without passing through the carrier temporary storage section according to the substrate export status of the carrier from the substrate export port, the substrate import status of the carrier to the substrate receiving port, or the transfer schedule to the downstream side of the transfer path of the substrate in the processing block. As in claim 1, the control unit outputs a control signal to transfer the carrier according to the unloading status of the substrate of the carrier from the substrate unloading port and the loading status of the substrate of the carrier into the substrate receiving port, and determines whether to transfer the carrier to the substrate unloading port or the substrate receiving port first according to the unloading status of the substrate and the loading status of the substrate. The substrate processing device of claim 2, wherein the substrate unloading condition includes the unloading completion time of the predetermined substrate unloading from the carrier placed on the substrate unloading port, and the substrate loading condition includes the loading completion time of the predetermined substrate unloading into the carrier placed on the substrate receiving port, and the control unit determines to transfer the carrier to the substrate unloading port when the difference between the loading completion time and the unloading completion time is within a preset range. The substrate processing device of claim 3 is provided in the processing block: a substrate loading unit for loading the substrate into the processing block; a plurality of substrate unloading units for loading the substrate from the processing block; and a substrate transport mechanism for receiving and delivering the substrate between the substrate loading unit, the processing module, and the substrate unloading unit. A substrate processing device as claimed in any one of claims 1 to 4, wherein the substrate removal status of the carrier in the substrate removal port corresponds to the first possible removal scheduled time at which the carrier placed in the substrate removal port can be removed from the substrate removal port, and the control unit determines whether to transfer the carrier placed in the carrier removal port to the carrier temporary storage unit based on the comparison between the first possible removal scheduled time and the transfer time of the carrier from the carrier removal port to the carrier temporary storage unit when there is no substrate removal port capable of transferring the carrier. A substrate processing device as claimed in any one of claims 1 to 4, wherein the state of the substrate being carried into the carrier in the substrate receiving port corresponds to a second possible carry-out scheduled time at which the carrier placed in the substrate receiving port can be carried out from the substrate receiving port, and the control unit determines whether to transfer the carrier placed in the carrier carrying-in port to the carrier temporary storage unit based on a comparison between the second possible carry-out scheduled time and the carrier transfer time from the substrate receiving port to the carrier temporary storage unit when there is no substrate carrying-out port capable of transferring the carrier. A substrate processing device as claimed in any one of claims 1 to 4, wherein the control unit outputs a control signal in a manner that the carrier transfer mechanism transfers the carrier according to a predetermined transfer to the downstream side of the transfer path of the substrate in the processing block, the predetermined transfer corresponding to a predetermined order for substrates stored in different carriers to be transferred to the transfer-out substrate placement unit for transferring the substrates out of the processing block. As in claim 7, in which when the order of the carriers to which the substrates in the order between the substrates received in the above-mentioned different carriers are returned is set as the required order of the carriers, the control unit determines whether to transport the carriers that have completed the unloading of the substrates placed in the above-mentioned substrate unloading port to the substrate receiving port without passing through the above-mentioned carrier temporary storage unit according to the required order of the above-mentioned carriers that have completed the unloading of the substrates placed in the above-mentioned substrate unloading port and the number of the above-mentioned substrate receiving ports without the above-mentioned carriers placed thereon. In the substrate processing device of claim 7, a plurality of the above-mentioned substrate unloading ports are provided, and when the order of the carriers returning the substrates in the order between the substrates received in the above-mentioned different carriers is set as the required order of the carriers, the above-mentioned control unit determines whether to transfer the carrier that has completed the unloading of the substrates in the above-mentioned one substrate unloading port to the above-mentioned carrier temporary storage unit based on the unloading status of the substrates of the above-mentioned carriers in the above-mentioned other substrate unloading ports, the loading status of the substrates of the above-mentioned carriers into the above-mentioned substrate receiving port, the above-mentioned required order and the number of the above-mentioned substrate receiving ports without carriers. A substrate processing device as recited in any one of claims 1 to 4, wherein the control unit re-determines the carrier to be transferred based on the unloading status of the substrate of the carrier from the substrate unloading port, the loading status of the substrate of the carrier into the substrate receiving port, or the transfer schedule of the substrate to the downstream side of the transfer path of the substrate in the processing block, when the carrier transfer mechanism moves to a position corresponding to the carrier to receive the carrier determined as the transfer target, the control unit re-determines the carrier to be transferred based on the information indicating the status of the substrate processing device. The substrate processing device of claim 10, wherein the information indicating the status of the substrate processing device is the transport status of the substrate in the substrate processing device, the configuration status of the carrier in the carrier block, or information on whether the carrier can be removed from the substrate processing device and set for the carrier. A substrate processing method is a substrate processing method using a substrate processing device, wherein the substrate processing device comprises: a carrier block, which is a carrier configured as a transport container for storing substrates; and a processing block, which receives and delivers the substrates to and from the carrier block and is provided with a processing module for processing the substrates. The substrate processing method is characterized in that the method comprises: a process of placing the carrier on a carrier carrying-in port and a carrier carrying-out port respectively in order to carry the carrier in and out of the substrate processing device; a process of placing the carrier on a substrate carrying-out port and a substrate receiving port respectively provided in the carrier block in order to carry the substrate out of the carrier to the processing block and carry the substrate in from the processing block to the carrier; and a process of temporarily placing the carrier The process of temporarily placing the above-mentioned carrier in the above-mentioned part; and using the carrier transfer mechanism capable of transferring the above-mentioned carrier between the above-mentioned carrier import port, the above-mentioned carrier export port, the above-mentioned substrate receiving port, the above-mentioned substrate export port, and the above-mentioned carrier temporary storage part, when transferring the above-mentioned carrier in the order of the above-mentioned carrier import port, the above-mentioned substrate receiving port, the above-mentioned substrate export port, and the above-mentioned carrier export port, the above-mentioned control signal is outputted so that according to the export status of the substrate of the above-mentioned carrier from the above-mentioned substrate export port, the import status of the above-mentioned carrier into the above-mentioned substrate receiving port, or the transfer schedule to the downstream side of the transfer path of the above-mentioned substrate in the above-mentioned processing block, the above-mentioned carrier is transferred from the port of the transfer source to the port of the next transfer destination without passing through the above-mentioned carrier temporary storage part.

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