TWI860885B - 具有屏內感測功能的顯示裝置 - Google Patents
具有屏內感測功能的顯示裝置 Download PDFInfo
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- TWI860885B TWI860885B TW112142321A TW112142321A TWI860885B TW I860885 B TWI860885 B TW I860885B TW 112142321 A TW112142321 A TW 112142321A TW 112142321 A TW112142321 A TW 112142321A TW I860885 B TWI860885 B TW I860885B
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Abstract
本發明提出一種顯示裝置,包括:複數個子像素區域,各包括一子像素電路,每個子像素電路包括:一二極體,在該子像素電路的一顯示階段中被配置為一順向偏壓狀態,以用於發光,以及在該子像素電路的一感測階段中被配置為一逆向偏壓狀態,以用於感測光;一驅動電晶體,用於在該顯示階段中驅動該二極體;第一至第六電晶體,該第一至第六電晶體的閘極被施加閘極控制訊號,以使該子像素電路在該顯示階段以及該感測階段之間切換;以及一電容器,用於在該顯示階段中儲存要寫入該二極體的一資料電壓,其中,該二極體在該感測階段中產生一光電流,輸入至一運算放大器,以使該運算放大器輸出一光電流輸出訊號。
Description
本發明係關於一種顯示裝置,特別是一種能夠在同一個子像素電路中同時實現顯示與感測兩種功能以具有屏內感測功能的顯示裝置。
一般來說,顯示裝置僅具備顯示功能。有些顯示裝置同時具有顯示和觸控功能。然而,當需要進行感測時,例如,當需要使用光學指紋感測器(Optical Fingerprint Sensor, OFPS)進行感測時,光學指紋感測器會需要以另一個獨立的裝置實施。此外,當在顯示裝置下方貼合光學式感測模組時,會產生額外的成本、額外的厚度、以及貼合時的額外良率風險。
此外,由於感測的面積取決於感測器的面積,因此,感測的面積會遠小於整個面板的面積。另,由於光學式感測模組係貼合於顯示裝置的下方,被感測物件與感測器之間的元件會導致光被遮擋。
因此,需要提供一種能將感測功能以及顯示功能整合在同一個子像素電路的顯示裝置,以克服上述問題。
為達到有效解決上述問題之目的,本發明提出一種顯示裝置,包括:複數個子像素區域,各包括一子像素電路,每個子像素電路包括:一二極體,在該子像素電路的一顯示階段中被配置為一順向偏壓狀態,以用於發光,以及在該子像素電路的一感測階段中被配置為一逆向偏壓狀態,以用於感測光;一驅動電晶體,用於在該顯示階段中驅動該二極體;第一至第六電晶體,該第一至第六電晶體的閘極被施加閘極控制訊號,以使該子像素電路在該顯示階段以及該感測階段之間切換;以及一電容器,用於在該顯示階段中儲存要寫入該二極體的一資料電壓,其中,該二極體在該感測階段中產生一光電流,輸入至一運算放大器,以使該運算放大器輸出一光電流輸出訊號。
較佳地,該運算放大器包括:一第一輸入端,連接至該第五節點;一第二輸入端,被施加一參考電壓;以及一輸出端,在該感測階段中輸出該光電流輸出訊號,其中,一反饋電容器連接至該第一輸入端和該輸出端,以及其中,一開關連接至該第一輸入端和該輸出端。
較佳地,在每個該子像素電路中:該第一電晶體的一第一電極連接至一第一節點,該第一電晶體的一第二電極接至一第五節點,一初始化電壓施加至該第五節點,該第二電晶體的一第一電極接至該第五節點,該第二電晶體的一第二電極連接至一第二節點,該第三電晶體的一第一電極連接至該第一節點,該第三電晶體的一第二電極連接至一第三節點,該第四電晶體的一第一電極被施加一資料電壓,該第四電晶體的一第二電極連接至一第四節點,該第五電晶體的一第一電極連接至該第三節點,該第五電晶體的一第二電極連接至該第二節點,該第六電晶體的一第一電極連被施加一驅動電壓,該第六電晶體的一第二電極連接至該第四節點,該驅動電晶體的一閘極連接至該第一節點,該驅動電晶體的一第一電極連接至該第四節點,該驅動電晶體的一第二電極連接至該第三節點,該電容器的一第一電極連接至一第一節點,該電容器的一第二電極連接至該第六電晶體的該第一電極,以及該二極體的一第一電極連接至該第二節點,以及該二極體的一第二電極被施加一共用電壓。
較佳地,在該感測階段中,該第一至第二電晶體為導通,以及該第三至第六電晶體為關斷。
較佳地,該感測階段包括:一第一感測階段,該開關為短路;以及一第二感測階段,該開關為斷路,其中,在該第一感測階段中,該初始化電壓等於該參考電壓。
較佳地,所述的顯示裝置,進一步包括:一第一電路,用於施加該等閘極控制訊號至每個子像素電路,以使每個子像素電路分別在該顯示階段以及該感測階段之間切換;以及一第二電路,用於施加該初始化電壓、該資料電壓、該驅動電壓、以及該共用電壓,而且該第二電路包括一讀出部,該讀出部包括該運算放大器。
較佳地,該等閘極控制訊號包括:一第一閘極控制訊號,控制該第一電晶體和該第二電晶體;一第二閘極控制訊號,控制該第三電晶體和該第四電晶體;以及一第三閘極控制訊號,控制該第五電晶體和該第六電晶體。
較佳地,該二極體包括微發光二極體、次毫米發光二極體、以及有機發光二極體其中之一。
較佳地,該驅動電晶體以及該第一至第六電晶體包括P型金氧半場效電晶體、N型金氧半場效電晶體、薄膜電晶體、低溫多晶矽薄膜電晶體、以及低溫多晶氧化物薄膜電晶體其中之一或其組合。
爲使熟悉該項技藝人士瞭解本發明之目的、特徵及功效,茲藉由下述具體實施例,並配合所附之圖式,對本發明詳加說明如下。
現在將參考其中示出本發明概念的示例性實施例的附圖在下文中更充分地闡述本發明概念。以下藉由參考附圖更詳細地闡述的示例性實施例,本發明概念的優點及特徵以及其達成方法將顯而易見。然而,應注意,本發明概念並非僅限於以下示例性實施例,而是可實施為各種形式。因此,提供示例性實施例僅是為了揭露本發明概念並使熟習此項技術者瞭解本發明概念的類別。在圖式中,本發明概念的示例性實施例並非僅限於本文所提供的特定實例且為清晰起見而進行誇大。
本文所用術語僅用於闡述特定實施例,而並非旨在限制本發明。除非上下文中清楚地另外指明,否則本文所用的單數形式的用語「一」及「該」旨在亦包括複數形式。本文所用的用語「及/或」包括相關所列項其中一或多者的任意及所有組合。應理解,當稱元件「連接」或「耦合」至另一元件時,所述元件可直接連接或耦合至所述另一元件或可存在中間元件。
相似地,應理解,當稱一個元件(例如層、區或基板)位於另一元件「上」時,所述元件可直接位於所述另一元件上,或可存在中間元件。相比之下,用語「直接」意指不存在中間元件。更應理解,當在本文中使用用語「包括」、「包含」時,是表明所陳述的特徵、整數、步驟、操作、元件、及/或組件的存在,但不排除一或多個其他特徵、整數、步驟、操作、元件、組件、及/或其群組的存在或添加。
此外,將藉由作為本發明概念的理想化示例性圖的剖視圖來闡述詳細說明中的示例性實施例。相應地,可根據製造技術及/或可容許的誤差來修改示例性圖的形狀。因此,本發明概念的示例性實施例並非僅限於示例性圖中所示出的特定形狀,而是可包括可根據製造製程而產生的其他形狀。圖式中所例示的區域具有一般特性,且用於說明元件的特定形狀。因此,此不應被視為僅限於本發明概念的範圍。
亦應理解,儘管本文中可能使用用語「第一」、「第二」、「第三」等來闡述各種元件,然而該些元件不應受限於該些用語。該些用語僅用於區分各個元件。因此,某些實施例中的第一元件可在其他實施例中被稱為第二元件,而此並不背離本發明的教示內容。本文中所闡釋及說明的本發明概念的態樣的示例性實施例包括其互補對應物。本說明書通篇中,相同的元件編號或相同的指示物表示相同的元件。
此外,本文中參考剖視圖及/或平面圖來闡述示例性實施例,其中所述剖視圖及/或平面圖是理想化示例性說明圖。因此,預期存在由例如製造技術及/或容差所造成的相對於圖示形狀的偏離。因此,示例性實施例不應被視作僅限於本文中所示區的形狀,而是欲包括由例如製造所導致的形狀偏差。因此,圖中所示的區為示意性的,且其形狀並非旨在說明裝置的區的實際形狀、亦並非旨在限制示例性實施例的範圍。
需要說明的是,本發明的子像素電路可實施在紅色子像素、藍色子像素、綠色子像素、白色子像素等任意子像素中,但本發明不限於此。
請參考圖1A,圖1A為僅具顯示功能的顯示裝置的操作時序圖。如圖1A所示,僅具顯示功能的顯示裝置係以逐列的方式顯示,從左上角至右下角,最後組成一個圖框。一個圖框時間Tf包括:第一顯示階段D1,用於初始化電路;第二顯示階段D2,用於寫入資料;第三顯示階段D3,用於發光以顯示資料。由於顯示裝置僅有顯示功能,因此,一個圖框時間Tf等於第一顯示階段D1至第三顯示階段D3的總和。
應理解的是,在電路實際運作時,各階段之間會有切換的時間,而為了便於理解,在本說明書中,各階段的時長包括實際執行對應的動作以及切換至下一個階段的時間,例如,第二顯示階段D2包括寫入資料以及切換至第三顯示階段D3的時間。
接下來,請參考圖1B,圖1B為本發明的顯示裝置的操作時序圖。由於本發明將感測功能以及顯示功能整合至顯示裝置中的同一個子像素電路中,因此,本發明的圖框時間Tf進一步包括用於感測資料的感測階段S。因此,藉由閘極控制訊號的控制,本發明的顯示裝置的操作時序被調整為包括感測階段S以及包括第一顯示階段D1至第三顯示階段D3的顯示階段。
可理解的是,根據使用者的設定,在同一時間點,顯示裝置中的子像素電路可處於不同的階段,例如,不同列的子像素電路處於不同的階段。此外,由於本發明的感測階段S以及顯示階段D1~D3係藉由閘極控制訊號GCS的控制以調整操作時序而達成,因此,根據使用者的設定以及需求,可隨時開啟或關閉顯示裝置的感測階段S。
請參考圖2,圖2為本發明的顯示裝置1的結構圖。
參考圖2,本發明的顯示裝置1包括:複數個子像素區域SP,各包括子像素電路10;第一電路20,藉由施加閘極控制訊號GCS至每個子像素電路10,以使每個子像素電路10分別在顯示階段D1~D3以及感測階段S之間切換,例如,第一電路20可為列電路(row circuit);以及第二電路30,用於施加初始化電壓Vinit及資料電壓Vdata且包括讀出部,該讀出部用於在子像素電路10的感測階段S中將二極體LED所感測的光讀出,例如,第二電路30可為行電路(column circuit)。讀出部包括複數個讀出電路40,以使每一行的複數個子像素電路10皆有各自對應的讀出電路40,以用於在子像素電路10的感測階段S中將子像素電路10中的二極體LED所感測的光讀出。
請參考圖3至圖6,圖3為依據本發明的第一實施例的子像素電路10的電路圖;圖4為說明依據本發明的第一實施例的子像素電路10的感測階段S的時序操作圖;圖5為依據本發明的第一實施例的子像素電路10的第一感測階段S1的等效電路圖;以及圖6為依據本發明的第一實施例的子像素電路10的第二感測階段S2的等效電路圖。
參考圖3,本發明的子像素電路10包括:第一電晶體至第六電晶體T1至T6;驅動電晶體T7;二極體LED;以及電容器Cst。閘極控制訊號GCS包括第一閘極控制訊號Sn-1、第二閘極控制訊號Sn、以及第三閘極控制訊號EM。第一電晶體T1係由第一閘極控制訊號Sn-1所控制、第二電晶體T2係由第一閘極控制訊號Sn-1所控制、第三電晶體T3係由第二閘極控制訊號Sn所控制、第四電晶體T4係由第二閘極控制訊號Sn所控制、第五電晶體T5係由第三閘極控制訊號EM所控制、第六電晶體T6係由第三閘極控制訊號EM所控制。此外,資料電壓Vdata、初始化電壓Vinit、驅動電壓ELVDD、以及共用電壓ELVSS被施加至子像素電路10。
參考圖3及5~6,本發明的子像素電路10還包括:運算放大器OP,可用於接收二極體LED產生的光電流I
PH,從而產生光電流輸出訊號op_out。在另一實施例中,運算放大器OP可設置在子像素電路10外,例如,運算放大器OP可設置在第二電路30的讀出部中,又例如,運算放大器OP可設置在讀出電路40中,但不限於此。舉例而言,當運算放大器OP設置在讀出電路40中時,一行(column)中的所有二極體LED共用一個運算放大器OP,該行的所有二極體LED透過該行所對應的運算放大器OP分時輸出訊號。
參考圖3,在子像素電路10中,第一電晶體T1的第一電極連接至第一節點N1,第一電晶體T1的第二電極接至第五節點N5,初始化電壓Vinit施加至第五節點N5;第二電晶體T2的第一電極連接至第五節點N5,第二電晶體T2的第二電極連接至第二節點N2;第三電晶體T3的第一電極連接至第一節點N1,第三電晶體T3的第二電極連接至第三節點N3;第四電晶體T4的第一電極被施加資料電壓Vdata,第四電晶體T4的第二電極連接至第四節點N4;第五電晶體T5的第一電極連接至第三節點N3,第五電晶體T5的第二電極連接至第二節點N2;第六電晶體T6的第一電極連接至驅動電壓ELVDD,第六電晶體T6的第二電極連接至第四節點N4;驅動電晶體T7的閘極連接至第一節點N1,驅動電晶體T7的第一電極連接至第四節點N4,驅動電晶體的第二電極連接至第三節點N3;電容器Cst的第一電極連接至第一節點N1,電容器Cst的第二電極連接至第六電晶體T6的第一電極;以及二極體LED的第一電極連接至第二節點N2,二極體LED的第二電極被施加共用電壓ELVSS。
同樣參考圖3,在子像素電路10中,運算放大器OP可包括:第一輸入端,連接至第五節點N5,可用於接收二極體LED發出的光電流I
PH;第二輸入端,被施加參考電壓Vref;以及輸出端,在感測階段中輸出光電流輸出訊號op_out。第一輸入端可為負極輸入端,而第二輸入端可為正極輸入端,但不限於此。另外,運算放大器OP的第一輸入端和輸出端可連接開關SW,開關SW被施加開關控制訊號op_rst而成為短路或斷路,用於重置電路或初始化電路。再者,運算放大器OP的第一輸入端和輸出端可連接反饋電容C
F,使運算放大器OP作用為積分器,積分處理輸入的光電流I
PH。
需要說明的是,本發明的顯示裝置藉由閘極控制訊號GCS的施加將子像素電路10分為感測階段S以及顯示階段D1~D3。在感測階段S中,二極體LED係處於逆向偏壓,以作為光電二極體感測光,產生光電流I
PH,接著,運算放大器OP接收光電流I
PH,並產生光電流輸出訊號op_out。在顯示階段D1~D3中,二極體LED係處於順向偏壓,以作為發光二極體發光,以根據資料電壓Vdata顯示資料。可理解的是,本發明的二極體LED包括但不限於包括微發光二極體(micro-LED)、次毫米發光二極體(mini-LED)、以及有機發光二極體(OLED)。
以下將參考圖3~6說明依據本發明的第一實施例的子像素電路10的感測階段S的電路運作。
參考圖4,本發明的感測階段S包括:第一感測階段S1,用於初始化二極體LED,以使二極體LED處於逆向偏壓,以作為光電二極體感測光,產生光電流I
PH;以及第二感測階段S2,運算放大器OP接收光電流I
PH,進行積分運算,產生光電流輸出訊號op_out。
應理解的是,本發明的第一實施例使用的是P型金氧半場效電晶體(PMOS)作為子像素電路10中的示例性電晶體,所以施加高電壓至其閘極會使其關斷,而施加低電壓至其閘極會使其導通。然而,本發明不限於此。本發明的子像素電路所使用的電晶體可任意地根據需求實施為PMOS、N型金氧半場效電晶體(NMOS)、薄膜電晶體(TFT)、低溫多晶矽(LTPS)TFT、低溫多晶氧化物(LTPO)TFT等等。此外,電晶體亦可任意地組合形成本發明的子像素電路。例如,某些電晶體實施為PMOS,其他電晶體實施為NMOS。
具體地,參考圖3~5,在第一感測階段S1中,根據第一閘極控制訊號Sn-1、第二閘極控制訊號Sn、以及第三閘極控制訊號EM等閘極控制訊號GCS的控制,第一電晶體T1和第二電晶體T2為導通,而第三電晶體T3、第四電晶體T4、第五電晶體T5、和第六電晶體T6為關斷;以及根據開關控制訊號op_rst,開關SW為短路,使得初始化電壓Vinit等於輸入至運算放大器OP的第二輸入端的參考電壓Vref。因此,可用初始化電壓Vinit使二極體LED處於逆向偏壓狀態,以作為光電二極體感測光,產生光電流I
PH。本發明的開關設計為其控制端被施加高電壓時為短路,而其控制端被施加低電壓時為斷路。
具體地,參考圖3、4、6,在第二感測階段S2中,根據第一閘極控制訊號Sn-1、第二閘極控制訊號Sn、以及第三閘極控制訊號EM等閘極控制訊號GCS的控制,第一電晶體T1和第二電晶體T2為保持導通,而第三電晶體T3、第四電晶體T4、第五電晶體T5、和第六電晶體T6保持關斷;以及根據開關控制訊號op_rst,開關SW切換為斷路。此時,運算放大器OP搭配連接至其第一輸入端和輸出端的反饋電容器C
F作用為積分器,將輸入至其第一輸入端的光電流I
PH做積分運算,從而在其輸出端輸出光電流輸出訊號op_out。在一實施例中,從運算放大器OP的輸出端輸出的光電流輸出訊號op_out可輸入類比數位轉換器(ADC)(圖中未示),執行類比數位訊號轉換,以利後續訊號處理和分析。該類比數位轉換器可設置在讀出電路40中,但不限於此。舉例而言,當類比數位轉換器設置在讀出電路40中時,每一行(column)的運算放大器OP對應一個類比數位轉換器,該行的運算放大器OP的光電流輸出訊號op_out輸入至該行所對應的類比數位轉換器,執行類比數位訊號轉換。
以下將參考圖3和7~10說明依據本發明的第一實施例的子像素電路10的顯示階段D1~D3的電路運作。圖7為說明依據本發明的第一實施例的子像素電路10的顯示階段D1~D3的時序操作圖;圖8為依據本發明的第一實施例的子像素電路10的第一顯示階段D1的等效電路圖;圖9為依據本發明的第一實施例的子像素電路10的第二顯示階段D2的等效電路圖;以及圖10為依據本發明的第一實施例的子像素電路10的第三顯示階段D3的等效電路圖。
參考圖7,本發明的顯示階段D1~D3包括:第一顯示階段D1,以初始化電壓Vinit初始化二極體LED以及第二節點N2;第二顯示階段D2,將資料電壓Vdata寫入電容器Cst;以及第三顯示階段D3,以儲存於電容器Cst的電壓驅動驅動電極體T7,以使驅動電流由驅動電壓ELVDD流向共用電壓ELVSS,以使二極體LED發光。
具體地,參考圖3、7、和8,在第一顯示階段D1中,根據第一閘極控制訊號Sn-1、第二閘極控制訊號Sn、以及第三閘極控制訊號EM等閘極控制訊號GCS的控制,第一電晶體T1以及第二電晶體T2為導通,第三電晶體T3、第四電晶體T4、第五電晶體T5、以及第六電晶體T6為關斷;以及根據開關控制訊號op_rst,開關SW為短路,使得初始化電壓Vinit等於輸入至運算放大器OP的第二輸入端的參考電壓Vref。因此,可用初始化電壓Vinit初始化二極體LED以及第二節點N2。
具體地,參考圖3、7、和9,在第二顯示階段D2中,根據第一閘極控制訊號Sn-1、第二閘極控制訊號Sn、以及第三閘極控制訊號EM等閘極控制訊號的控制,第三電晶體T3以及第四電晶體T4切換為導通,第一電晶體T1、第二電晶體T2、第五電晶體T5、以及第六電晶體T6為關斷;以及根據開關控制訊號op_rst,開關SW切換為斷路。因此,資料電壓Vdata藉由驅動電晶體T7儲存至第一節點N1,以資料電壓Vdata減去閥值電壓Vth的方式寫入至電容器Cst。
具體地,參考圖3、7、和10,在第三顯示階段D3中,根據第一閘極控制訊號Sn-1、第二閘極控制訊號Sn、以及第三閘極控制訊號EM等閘極控制訊號的控制,第五電晶體T5以及第六電晶體T6切換為導通,第一電晶體T1、第二電晶體T2、第三電晶體T3、以及第四電晶體T4為關斷;以及根據開關控制訊號op_rst,開關SW保持斷路。因此,在第三顯示階段D3中,寫入至電容器Cst的資料電壓Vdata減去閥值電壓Vth會做為驅動電晶體T7的閘極電壓,且由於此電路設計,驅動電晶體T7的過驅電壓會是(ELVDD – Vdata+Vth)電壓再減去閥值電壓Vth,因此,流經二極體LED的電流僅會被(ELVDD – Vdata)所控制,而不會被驅動電晶體T7的個別閥值電壓Vth所影響。此時,二極體LED受(ELVDD – Vdata)電壓差驅動為順向偏壓狀態而發光。
參考圖11,圖11為依據本發明的第二實施例的子像素電路10a的電路圖。子像素電路10a與子像素電路10的不同之處在於子像素電路10a使用的是NMOS而非PMOS做為第一電晶體至第六電晶體T1至T6以及驅動電晶體T7。與子像素電路10相同的其他元件在此不一一贅述。
因此,可理解的是,子像素電路10a的第一電晶體至第六電晶體T1至T6、驅動電晶體T7、以及開關SW亦以與子像素電路10相同的方式驅動。亦即,在第一感測階段S1中,第一電晶體T1和第二電晶體T2為導通,第三電晶體T3、第四電晶體T4、第五電晶體T5、以及第六電晶體T6為關斷,而且開關SW為短路。在第二感測階段S2中,第一電晶體T1和第二電晶體T2保持導通,第三電晶體T3、第四電晶體T4、第五電晶體T5以及第六電晶體T6保持關斷,而且開關SW切換為斷路。在第一顯示階段D1中,第一電晶體T1以及第二電晶體T2為導通,第三電晶體T3、第四電晶體T4、第五電晶體T5、以及第六電晶體T6為關斷,而且開關SW為短路。在第二顯示階段D2中,第三電晶體T3以及第四電晶體T4切換為導通,第一電晶體T1、第二電晶體T2、第五電晶體T5、以及第六電晶體T6為關斷,而且開關SW切換為斷路。在第三顯示階段D3中,第五電晶體T5以及第六電晶體T6切換為導通,第一電晶體T1、第二電晶體T2、第三電晶體T3、以及第四電晶體T4為關斷,而且開關SW保持斷路。
藉此,子像素電路10a亦可實現:在感測階段S中,使二極體LED處於逆向偏壓,以作為光電二極體感測光,產生光電流I
PH,接著,運算放大器OP接收光電流I
PH,並產生光電流輸出訊號op_out。在顯示階段D1~D3中,二極體LED係處於順向偏壓,以作為發光二極體發光,以根據資料電壓Vdata顯示資料,確定發光強度。
因此,熟悉本領域的技術人員可輕易地了解本發明的發明概念可應用至使用各類型的電晶體的子像素電路,而不受電晶體的特性的限制。
最後,再將本發明的技術特徵及其可達成之技術功效彙整如下:
其一,本發明之顯示裝置能夠在同一個子像素電路中同時實現顯示與感測兩種功能以具有屏內感測功能。
其二,由於本發明之顯示裝置係使用同一個子像素電路同時實現顯示與感測兩種功能,因此,被感測物件與感測器之間沒有會導致光被遮擋或削減的元件,因此,能實現更準確的感測。
其三,由於本發明之顯示裝置係使用同一個子像素電路同時實現顯示與感測兩種功能,因此,螢幕總厚度較薄、無須多餘製程、且減少額外貼合導致的良率風險。
其四,以三種閘極驅動訊號驅動六個電晶體,能降低電路複雜度,從而降低成本、提升電路製作良率。
以上係藉由特定的具體實施例說明本發明之實施方式,所屬技術領域具有通常知識者可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。
以上所述僅為本發明之較佳實施例,並非用以限定本發明之範圍;凡其它未脫離本發明所揭示之精神下所完成之等效改變或修飾,均應包含在下述之專利範圍內。
1:顯示裝置
10:子像素電路
10a:子像素電路
20:第一電路
30:第二電路
40:讀出電路
C
F:反饋電容器
Cst:電容器
D1:第一顯示階段
D2:第二顯示階段
D3:第三顯示階段
ELVDD:驅動電壓
ELVSS:共用電壓
EM:第三閘極控制訊號
GCS:閘極控制訊號
I
PH:光電流
LED:二極體
N1:第一節點
N2:第二節點
N3:第三節點
N4:第四節點
N5:第五節點
OP:運算放大器
op_out:光電流輸出訊號
op_rst:開關控制訊號
S:感測階段
S1:第一感測階段
S2:第二感測階段
Sn:第二閘極控制訊號
Sn-1:第一閘極控制訊號
SP:子像素區域
SW:開關
T1:第一電晶體
T2:第二電晶體
T3:第三電晶體
T4:第四電晶體
T5:第五電晶體
T6:第六電晶體
T7:驅動電晶體
Tf:圖框時間
Vdata:資料電壓
Vinit:初始化電壓
Vref:參考電壓
Vth:閥值電壓
圖1A為僅具顯示功能的顯示裝置的操作時序圖;
圖1B為本發明的顯示裝置的操作時序圖;
圖2為依據本發明的第一實施例的顯示裝置的結構圖;
圖3為依據本發明的第一實施例的子像素電路的電路圖;
圖4為說明依據本發明的第一實施例的子像素電路的感測階段的時序操作圖;
圖5為依據本發明的第一實施例的子像素電路的第一感測階段的等效電路圖;
圖6為依據本發明的第一實施例的子像素電路的第二感測階段的等效電路圖;
圖7為說明依據本發明的第一實施例的子像素電路的顯示階段的時序操作圖;
圖8為依據本發明的第一實施例的子像素電路的第一顯示階段的等效電路圖;
圖9為依據本發明的第一實施例的子像素電路的第二顯示階段的等效電路圖;
圖10為依據本發明的第一實施例的子像素電路的第三顯示階段的等效電路圖;以及
圖11為依據本發明的第二實施例的子像素電路的電路圖。
1:顯示裝置
10:子像素電路
20:第一電路
30:第二電路
40:讀出電路
GCS:閘極控制訊號
SP:子像素區域
Vdata:資料電壓
Vinit:初始化電壓
Claims (11)
- 一種顯示裝置,包括:複數個子像素區域,各包括一子像素電路,每個子像素電路包括:一二極體,在該子像素電路的一顯示階段中被配置為一順向偏壓狀態,以用於發光,以及在該子像素電路的一感測階段中被配置為一逆向偏壓狀態,以用於感測光;一驅動電晶體,用於在該顯示階段中驅動該二極體;第一至第六電晶體,該第一至第六電晶體的閘極被施加閘極控制訊號,以使該子像素電路在該顯示階段以及該感測階段之間切換;以及一電容器,用於在該顯示階段中儲存要寫入該二極體的一資料電壓,其中,該二極體在該感測階段中產生一光電流,輸入至一運算放大器,以使該運算放大器輸出一光電流輸出訊號,以及其中,在每個該子像素電路中:該第一電晶體的一第一電極連接至一第一節點,該第一電晶體的一第二電極接至一第五節點,一初始化電壓施加至該第五節點,該第二電晶體的一第一電極接至該第五節點,該第二電晶體的一第二電極連接至一第二節點,該第三電晶體的一第一電極連接至該第一節點,該第三電晶體的一第二電極連接至一第三節點,該第四電晶體的一第一電極被施加一資料電壓,該第四電晶體的一第二電極連接至一第四節點,該第五電晶體的一第一電極連接至該第三節點,該第五電晶體的一第二電極連接至該第二節點,該第六電晶體的一第一電極連被施加一驅動電壓,該第六電晶體的一第二電極連接至該第四節點,該驅動電晶體的一閘極連接至該第一節點,該驅動電晶體的一第一電極連接至該第四節點,該驅動電晶體的一第二電極連接至該第三節點,該電容器的一第一電極連接至一第一節點,該電容器的一第二電極連接至該第六電晶體的該第一電極,以及 該二極體的一第一電極連接至該第二節點,該二極體的一第二電極被施加一共用電壓。
- 如請求項1所述的顯示裝置,其中,該運算放大器包括:一第一輸入端,連接至該第五節點;一第二輸入端,被施加一參考電壓;以及一輸出端,在該感測階段中輸出該光電流輸出訊號,其中,一反饋電容器連接至該第一輸入端和該輸出端,以及其中,一開關連接至該第一輸入端和該輸出端。
- 如請求項2所述的顯示裝置,其中,在該感測階段中,該第一至第二電晶體為導通,以及該第三至第六電晶體為關斷。
- 如請求項3所述的顯示裝置,其中,該感測階段包括:一第一感測階段,該開關為短路;以及一第二感測階段,該開關為斷路,其中,在該第一感測階段中,該初始化電壓等於該參考電壓。
- 如請求項1所述的顯示裝置,進一步包括:一第一電路,用於施加該等閘極控制訊號至每個子像素電路,以使每個子像素電路分別在該顯示階段以及該感測階段之間切換;以及一第二電路,用於施加該初始化電壓、該資料電壓、該驅動電壓、以及該共用電壓,而且該第二電路包括一讀出部,該讀出部包括該運算放大器,其中,該等閘極控制訊號包括:一第一閘極控制訊號,控制該第一電晶體和該第二電晶體;一第二閘極控制訊號,控制該第三電晶體和該第四電晶體;以及一第三閘極控制訊號,控制該第五電晶體和該第六電晶體。
- 如請求項5所述的顯示裝置,其中,該運算放大器包括:一第一輸入端,連接至該第五節點;一第二輸入端,被施加一參考電壓;以及一輸出端,在該感測階段中輸出該光電流輸出訊號, 其中,一反饋電容器連接至該第一輸入端和該輸出端,以及其中,一開關連接至該第一輸入端和該輸出端。
- 如請求項6所述的顯示裝置,其中,在該感測階段中,該第一至第二電晶體為導通,以及該第三至第六電晶體為關斷。
- 如請求項7所述的顯示裝置,其中,該感測階段包括:一第一感測階段,該開關為短路;以及一第二感測階段,該開關為斷路,其中,在該第一感測階段中,該初始化電壓等於該參考電壓。
- 如請求項8所述的顯示裝置,其中,該讀出部進一步包括一類比數位轉換器,用於執行類比數位轉換。
- 如請求項1所述的顯示裝置,其中,該二極體包括微發光二極體、次毫米發光二極體、以及有機發光二極體其中之一。
- 如請求項1所述的顯示裝置,其中,該驅動電晶體以及該第一至第六電晶體包括P型金氧半場效電晶體、N型金氧半場效電晶體、薄膜電晶體、低溫多晶矽薄膜電晶體、以及低溫多晶氧化物薄膜電晶體其中之一或其組合。
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