TWI860660B - A production method of a silicon carbide compound - Google Patents
A production method of a silicon carbide compound Download PDFInfo
- Publication number
- TWI860660B TWI860660B TW112111353A TW112111353A TWI860660B TW I860660 B TWI860660 B TW I860660B TW 112111353 A TW112111353 A TW 112111353A TW 112111353 A TW112111353 A TW 112111353A TW I860660 B TWI860660 B TW I860660B
- Authority
- TW
- Taiwan
- Prior art keywords
- silicon
- carbon
- silicon compound
- plasma
- preparing
- Prior art date
Links
Landscapes
- Physical Vapour Deposition (AREA)
- Carbon And Carbon Compounds (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
一種碳矽化合物製備方法,特別是一種將碳矽化合物以薄膜形態形成於基材表面的製備方法。A method for preparing a carbon silicon compound, in particular, a method for forming the carbon silicon compound in the form of a thin film on the surface of a substrate.
在半導體製程之電漿蝕刻製程中,電漿氣氛不僅對矽晶圓進行蝕刻反應以進行線路之圖案化外,亦會對機台內之真空管路、氣流噴嘴、真空腔體及零配件等進行侵蝕而產生粉塵或微粒,造成真空腔體汙染、零組件使用壽命降低,更甚者將使矽晶圓受到汙染,進而影響蝕刻效率、晶圓特性及其良率。In the plasma etching process of semiconductor manufacturing, the plasma atmosphere not only etches the silicon wafer to pattern the circuit, but also corrodes the vacuum pipeline, airflow nozzle, vacuum chamber and parts in the machine to generate dust or particles, causing vacuum chamber pollution and reducing the service life of parts. In worse cases, the silicon wafer will be contaminated, thereby affecting the etching efficiency, wafer characteristics and yield.
電漿蝕刻製程主要在低壓環境下,藉由電磁場使反應氣體進行電漿活化,這些電漿活化之氣體離子遂會與材料產生化學反應或是物理性轟擊,以進行材料的選擇性去除。由於乾式電漿蝕刻技術具有異向性蝕刻、高選擇性、蝕刻深度解析度可達奈米等級及無化學溶液汙染等問題之優勢,加上其可與半導體真空製程相匹配,因此蔚為半導體蝕刻技術之主流。當含氟,甚至含氯之氣體通入反應腔體進行電漿蝕刻反應時,雖然於製程中可藉由電漿條件(頻率及功率)、偏壓、電漿氣氛及電極機構之調整,以控制晶圓之蝕刻速率。但在反應過程中,腔體中之電漿蝕刻行為乃無所不在,除了要蝕刻目標矽晶圓外,整個電漿蝕刻機台內的真空管路、氣流噴嘴、真空腔體及零配件等亦會長時間暴露於電漿蝕刻氣氛中。因此這些零組件容易會因電漿之侵蝕而產生剝落現象,其剝落之粉塵或微粒將會汙染真空腔體,使得真空腔體、機具、腔體內零件的使用壽命受到影響。此外,亦會使矽晶圓受到汙染,進而影響蝕刻效率、晶圓特性及其良率。Plasma etching process mainly uses electromagnetic field to activate reactive gas in low pressure environment. These plasma activated gas ions will then react chemically or physically with the material to selectively remove the material. Dry plasma etching technology has the advantages of anisotropic etching, high selectivity, etching depth resolution up to nanometer level and no chemical solution contamination, and it can match the semiconductor vacuum process, so it has become the mainstream of semiconductor etching technology. When fluorine- or even chlorine-containing gases are introduced into the reaction chamber for plasma etching, the etching rate of the wafer can be controlled by adjusting the plasma conditions (frequency and power), bias voltage, plasma atmosphere, and electrode mechanism during the process. However, during the reaction process, the plasma etching behavior in the chamber is omnipresent. In addition to etching the target silicon wafer, the vacuum pipeline, gas flow nozzle, vacuum chamber, and spare parts in the entire plasma etching machine are also exposed to the plasma etching atmosphere for a long time. Therefore, these components are prone to peeling due to plasma erosion, and the peeled dust or particles will contaminate the vacuum chamber, affecting the service life of the vacuum chamber, equipment, and parts in the chamber. In addition, it will also contaminate the silicon wafer, thereby affecting the etching efficiency, wafer characteristics and yield.
電漿蝕刻技術的進步為反應半導體製程發展之重要關鍵,因此發展抗電漿蝕刻鍍膜應用於半導體電漿蝕刻設備中乃為刻不容緩之議題。The advancement of plasma etching technology is an important key to the development of reactive semiconductor processes. Therefore, the development of plasma-resistant coatings for use in semiconductor plasma etching equipment is an urgent issue.
有鑑於現行慣用之抗電漿蝕刻材料仍有不足之處,為此,本發明提供一種具抗電漿蝕刻之碳矽化合物鍍膜材料及其製程技術之開發:利用氣流濺鍍技術發展高速生長具抗電漿蝕刻特性之碳矽化合物薄膜,其將可應用於電漿蝕刻設備內部各式零組件之表面改質,以增加該零組件之使用壽命、避免腔體汙染,以及提高晶圓特性及其良率之功效。In view of the fact that the currently used plasma etching resistant materials still have some shortcomings, the present invention provides a plasma etching resistant carbon silicon compound coating material and its process technology development: using gas flow sputtering technology to develop a high-speed growth of plasma etching resistant carbon silicon compound film, which can be applied to the surface modification of various components inside plasma etching equipment to increase the service life of the components, avoid chamber contamination, and improve wafer characteristics and yield.
一種碳矽化合物製備方法,其步驟包含: 提供一中空陰極單元,其包含二矽靶材平行置放於一遮罩內,並於二矽靶材間形成一狹縫,包含一狹縫入口與一狹縫出口; 於一減壓環境下,施予一電漿電源功率於二該矽靶材,以激發出一中空陰極放電矽電漿; 將一濺射氣體經由該狹縫入口通入,吹出該中空陰極放電矽電漿至該狹縫出口,以及將一碳氫氣體經由該狹縫出口附近通入; 反應之該中空陰極放電矽電漿與該碳氫氣體將反應生成一碳矽化合物薄膜,被吹出於一基材之至少部分或全部表面進行被覆。 A method for preparing a carbon-silicon compound, the steps of which include: Providing a hollow cathode unit, which includes two silicon targets placed in parallel in a mask, and forming a slit between the two silicon targets, including a slit inlet and a slit outlet; Applying a plasma power to the two silicon targets in a reduced pressure environment to excite a hollow cathode discharge silicon plasma; Passing a sputtering gas through the slit inlet to blow the hollow cathode discharge silicon plasma to the slit outlet, and passing a carbon hydride gas through the vicinity of the slit outlet; The reacting hollow cathode discharge silicon plasma and the hydrocarbon gas will react to form a carbon silicon compound film, which is blown onto at least part or all of the surface of a substrate for coating.
其中,該矽靶材包含單晶矽、多晶矽、非晶矽或前述之組合。The silicon target material includes single crystal silicon, polycrystalline silicon, amorphous silicon or a combination thereof.
其中,該濺射氣體包含惰性氣體,例如氦氣、氬氣及氪氣。The sputtering gas includes an inert gas, such as helium, argon and krypton.
其中,該碳氫氣體包含甲烷、乙烷、乙烯、丙烯或乙炔。Wherein, the hydrocarbon gas includes methane, ethane, ethylene, propylene or acetylene.
其中,該基材包含金屬或非金屬基材,例如陶瓷或高分子。The substrate includes a metal or non-metal substrate, such as ceramic or polymer.
其中,該碳矽化合物薄膜為矽與碳反應生成之化合物,分子式包含Si xC y,其中:x、y為任意常數,x/y莫爾比包含任意常數。 The carbon silicon compound film is a compound generated by the reaction of silicon and carbon, and the molecular formula includes SixCy , wherein: x and y are arbitrary constants, and the x/y molar ratio includes an arbitrary constant.
其中,該碳矽化合物薄膜之薄膜生長速度5 μm/h以上。The carbon silicon compound film has a film growth rate of more than 5 μm/h.
藉由上述說明可知,本發明具有以下有益功效與優點:From the above description, it can be seen that the present invention has the following beneficial effects and advantages:
1. 本發明利用氣流濺鍍技術發展高速生長且具抗電漿蝕刻特性之碳矽化合物薄膜,其將可應用於電漿蝕刻設備內部各式零組件之表面改質,以增加該零組件之使用壽命、避免腔體汙染,以及提高晶圓特性及其良率之功效。1. The present invention utilizes gas flow sputtering technology to develop a carbon silicon compound film that grows at a high speed and has plasma etching resistance. The film can be applied to the surface modification of various components inside plasma etching equipment to increase the service life of the components, avoid chamber contamination, and improve wafer characteristics and yield.
2. 本發明氣流濺鍍生長碳矽化合物薄膜,具有矽/碳成分可控、高速生長及具電漿抗蝕刻能力,而可應用於電漿蝕刻設備內部各式零組件之表面改質,以增加其使用壽命、避免腔體汙染,以及提高晶圓特性及其良率之功效。2. The carbon-silicon compound film grown by gas flow sputtering deposition of the present invention has the advantages of controllable silicon/carbon composition, high-speed growth and plasma etching resistance, and can be applied to the surface modification of various components inside plasma etching equipment to increase its service life, avoid chamber contamination, and improve wafer characteristics and yield.
本發明以下將以數個較佳實施例進行技術詳細的說明與描述,所附圖示僅僅是本發明的一些示例性代表或實施例,對於本發明所屬領域具有通常知識者來講,在不付出進步性勞動的前提下,還可以根據這些附圖將本發明應用於其它類似情形。The present invention will be technically illustrated and described in detail with several preferred embodiments below. The attached drawings are merely some exemplary representatives or embodiments of the present invention. For those with ordinary knowledge in the field to which the present invention belongs, the present invention can also be applied to other similar situations based on these drawings without making any progressive efforts.
以下本發明使用的“系統”、“裝置”、“單元”和/或“模組”是用於區分不同級別的不同組件、元件、部件、部分或裝配的一種方法。然而,如果其他詞語可實現相同的目的,則可通過其他表達來替換所述詞語。如本發明中所示,除非上下文明確提示例外情形,“一”、“一個”、“一種”和/或“該”等詞並非特指單數,也可包括複數。一般說來,術語“包括”與“包含”僅提示包括已明確標識的步驟和元素,而這些步驟和元素不構成一個排它性的羅列,方法或者設備也可能包含其它的步驟或元素。The "system", "device", "unit" and/or "module" used in the present invention below are a method for distinguishing different components, elements, parts, parts or assemblies at different levels. However, if other words can achieve the same purpose, the words can be replaced by other expressions. As shown in the present invention, unless the context clearly indicates an exception, the words "a", "an", "a kind" and/or "the" do not specifically refer to the singular, but may also include the plural. In general, the terms "including" and "comprising" only indicate that the steps and elements that have been clearly identified are included, and these steps and elements do not constitute an exclusive list, and the method or device may also include other steps or elements.
本發明中使用了流程圖用來說明根據本發明的實施例的系統所執行的操作。應當理解的是,前面或後面操作不一定按照順序來精確地執行。相反,可以按照倒序或同時處理各個步驟。同時,也可以將其他操作添加到這些過程中,或從這些過程移除某一步或數步操作。Flowcharts are used in the present invention to illustrate the operations performed by the system according to the embodiments of the present invention. It should be understood that the preceding or succeeding operations are not necessarily performed in exact order. Instead, the steps may be processed in reverse order or simultaneously. At the same time, other operations may be added to these processes, or one or more operations may be removed from these processes.
<實施例1><Example 1>
請參考圖1,其為本發明一種碳矽化合物製備方法的較佳實施例流程示意圖,其步驟包含:Please refer to FIG. 1, which is a schematic diagram of a preferred embodiment of a method for preparing a carbon silicon compound of the present invention, wherein the steps include:
步驟S1) 提供一中空陰極單元10,其包含二矽靶材11平行置放於一遮罩12內,並於二矽靶材11間形成一狹縫111,包含一狹縫入口111A與一狹縫出口111B;Step S1) providing a hollow cathode unit 10, which comprises two silicon targets 11 placed in parallel in a mask 12, and forming a slit 111 between the two silicon targets 11, including a slit inlet 111A and a slit outlet 111B;
步驟S2)於一減壓環境下,施予一電漿電源功率於二該矽靶材11,以激發出一中空陰極放電矽電漿13;Step S2) applying a plasma power to the two silicon targets 11 in a reduced pressure environment to generate a hollow cathode discharge silicon plasma 13;
步驟S3)將一濺射氣體14經由該狹縫入口111A通入,吹出該中空陰極放電矽電漿13,以及將一碳氫氣體15由該狹縫出口111B附近通入;Step S3) a sputtering gas 14 is introduced through the slit inlet 111A to blow out the hollow cathode discharge silicon plasma 13, and a carbon hydride gas 15 is introduced from the vicinity of the slit outlet 111B;
步驟S4)反應之該中空陰極放電矽電漿13與該碳氫氣體15生成一碳矽化合物薄膜16,自該狹縫出口111B被吹出於一基材20之至少部分或全部表面進行被覆。In step S4), the hollow cathode discharge silicon plasma 13 reacts with the carbon-hydrogen gas 15 to generate a carbon-silicon compound film 16, which is blown out from the slit outlet 111B to coat at least a portion or all of a surface of a substrate 20.
前述步驟S3中,該濺射氣體14及/或該碳氫氣體15的流量可由一質量流量計進行控制。In the aforementioned step S3, the flow rate of the sputtering gas 14 and/or the hydrocarbon gas 15 can be controlled by a mass flow meter.
其中,該矽靶材11包含單晶矽、多晶矽、非晶矽或前述之組合,較佳為單晶矽。該濺射氣體14較佳包含惰性氣體,例如氦氣、氬氣及氪氣,本發明所提供的較佳實施例為氬氣;該碳氫氣體15包含甲烷、乙烷、乙烯、丙烯、乙炔等含有碳及氫之氣體。該基材20包含金屬或非金屬基材表面,其中非金屬包含陶瓷或高分子。The silicon target 11 comprises single crystal silicon, polycrystalline silicon, amorphous silicon or a combination thereof, preferably single crystal silicon. The sputtering gas 14 preferably comprises an inert gas, such as helium, argon and krypton, and the preferred embodiment provided by the present invention is argon; the carbon-hydrogen gas 15 comprises methane, ethane, ethylene, propylene, acetylene and other gases containing carbon and hydrogen. The substrate 20 comprises a metal or non-metal substrate surface, wherein the non-metal comprises ceramic or polymer.
前述之該碳矽化合物薄膜16乃由矽與碳反應生成之化合物,其分子式可以表示為Si xC y,x及y分別為矽及碳之莫爾數,並可為任意數。其中,當x/y莫爾比等於1時,為化學劑量比的碳化矽;當x/y莫爾比小於1時,其為非化學劑量比且富碳的碳矽化合物;當x/y莫爾比大於1時,其為非化學劑量比且富矽的碳矽化合物。 The aforementioned carbon silicon compound film 16 is a compound generated by the reaction of silicon and carbon , and its molecular formula can be expressed as SixCy , where x and y are the molar numbers of silicon and carbon, respectively, and can be any number. When the x/y molar ratio is equal to 1, it is a stoichiometric silicon carbide; when the x/y molar ratio is less than 1, it is a non-stoichiometric and carbon-rich carbon silicon compound; when the x/y molar ratio is greater than 1, it is a non-stoichiometric and silicon-rich carbon silicon compound.
<確效性測試><Validity test>
請參考圖2a~2c,本發明利用前述製造方法,以多晶矽為該矽靶材11、以氬氣為該濺射氣體14及以該碳氫氣體15為乙炔為實施例下,於不同乙炔流量(a) 20 sccm、(b) 30 sccm及(c)50 sccm下,所得該碳矽化合物薄膜16之截面微觀形貌及其成分分布圖。於乙炔流量由20 sccm增加至50 sccm時,所得碳矽化合物薄膜成分之矽/碳莫爾比從60/40、50/50增加至25/75。Please refer to Figures 2a to 2c. The present invention uses the above-mentioned manufacturing method, with polycrystalline silicon as the silicon target 11, argon as the sputtering gas 14, and acetylene as the hydrocarbon gas 15 as an embodiment, and the cross-sectional microstructure and component distribution diagram of the carbon silicon compound film 16 obtained at different acetylene flow rates of (a) 20 sccm, (b) 30 sccm, and (c) 50 sccm. When the acetylene flow rate increases from 20 sccm to 50 sccm, the silicon/carbon molar ratio of the obtained carbon silicon compound film increases from 60/40, 50/50 to 25/75.
請參考圖3,本發明利用前述製造方法,以單晶矽為該矽靶材11、以氬氣為該濺射氣體14及以該碳氫氣體15為乙炔為實施例下,於製程時間16小時下,所得該碳矽化合物薄膜16之截面微觀形貌及其成分分布圖。此實施例於製程時間達16小時後,所得該碳矽化合物薄膜16成分之矽/碳莫爾比為50/50,且其薄膜厚度可達160 μm。Please refer to FIG3 , the present invention uses the above-mentioned manufacturing method, with single crystal silicon as the silicon target 11, argon as the sputtering gas 14 and acetylene as the hydrocarbon gas 15, and the cross-sectional microstructure and component distribution diagram of the obtained carbon silicon compound film 16 under the process time of 16 hours. After the process time reaches 16 hours, the silicon/carbon molar ratio of the obtained carbon silicon compound film 16 is 50/50, and the film thickness can reach 160 μm.
由前述圖2a~3可知,該碳矽化合物薄膜16之矽/碳莫爾比,可以由該碳氫氣體15流量以控制矽之莫爾數,亦可由該碳氫氣體15之流量以控制碳之莫爾數。同時,藉由製程參數的調整,本發明所製得的該碳矽化合物薄膜16之薄膜生長速度可達5 μm/h以上,更佳者可達10 μm/h以上。該碳矽化合物薄膜16厚度可達150 μm以上,視反應時間而定。As shown in Figs. 2a-3, the silicon/carbon molar ratio of the carbon-silicon compound film 16 can be controlled by the flow rate of the carbon-hydrogen gas 15 to control the molar number of silicon, and the molar number of carbon can also be controlled by the flow rate of the carbon-hydrogen gas 15. At the same time, by adjusting the process parameters, the film growth rate of the carbon-silicon compound film 16 produced by the present invention can reach 5 μm/h or more, and more preferably 10 μm/h or more. The thickness of the carbon-silicon compound film 16 can reach 150 μm or more, depending on the reaction time.
接著請參考圖4a、4b,圖4a為裸矽晶圓之對比例,圖4b為本發明利用前述製造方法所製之該碳矽化合物薄膜16。此測試為將裸矽晶圓之對比例以及本發明實施例於SiF 6氣氛下,進行電漿蝕刻200秒後之截面微觀形貌。圖4a、4b中顯示,裸矽晶圓之蝕刻深度為1.15 μm,本發明蝕刻深度僅0.37 μm。本發明具有相比於裸矽晶圓電漿蝕刻速度低3.1倍的能力。 Next, please refer to Figures 4a and 4b. Figure 4a is a comparative example of a bare silicon wafer, and Figure 4b is the carbon silicon compound film 16 produced by the present invention using the aforementioned manufacturing method. This test is a cross-sectional microscopic morphology of the comparative example of a bare silicon wafer and the embodiment of the present invention after plasma etching for 200 seconds in a SiF 6 atmosphere. Figures 4a and 4b show that the etching depth of the bare silicon wafer is 1.15 μm, while the etching depth of the present invention is only 0.37 μm. The present invention has the ability to reduce the plasma etching speed by 3.1 times compared to the bare silicon wafer.
進一步地,圖5a為裸矽晶圓之對比例,圖5b為本發明利用前述製造方法所製之該碳矽化合物薄膜16。此測試為將裸矽晶圓之對比例以及本發明實施例於SiF 6與Cl 2氣氛下,進行電漿蝕刻200秒後之截面微觀形貌。圖5a、5b中顯示,矽晶圓對比例之蝕刻深度為11.85 μm,本發明實施例蝕刻深度僅0.61 μm。本發明具有相比於裸矽晶圓電漿蝕刻速度低19.4倍的能力。 Further, FIG. 5a is a comparative example of a bare silicon wafer, and FIG. 5b is a carbon silicon compound film 16 made by the above-mentioned manufacturing method of the present invention. This test is to perform plasma etching for 200 seconds on the comparative example of a bare silicon wafer and the embodiment of the present invention in an atmosphere of SiF 6 and Cl 2 , and then obtain the cross-sectional microscopic morphology. As shown in FIG. 5a and FIG. 5b, the etching depth of the comparative example of the silicon wafer is 11.85 μm, and the etching depth of the embodiment of the present invention is only 0.61 μm. The present invention has the ability to reduce the plasma etching speed by 19.4 times compared to the bare silicon wafer.
由圖4a~5b可知,本發明所製得的該碳矽化合物薄膜16於含有氟或含有氟及氯之電漿蝕刻氣氛下,其電漿蝕刻速度比矽晶圓低10倍,而具有抗電漿蝕刻能力。因此,該碳矽化合物薄膜16具有應用於電漿蝕刻設備內部各式零組件之表面改質,以增加其使用壽命、避免腔體汙染,以及提高晶圓特性及其良率之功效。As shown in Figures 4a to 5b, the carbon silicon compound film 16 produced by the present invention has a plasma etching rate 10 times lower than that of a silicon wafer in a plasma etching atmosphere containing fluorine or fluorine and chlorine, and has the ability to resist plasma etching. Therefore, the carbon silicon compound film 16 has the effect of being applied to the surface modification of various components inside plasma etching equipment to increase its service life, avoid chamber contamination, and improve wafer characteristics and yield.
一些實施例中使用了描述成分、屬性數量的數字,應當理解的是,此類用於實施例描述的數字,在一些示例中使用了修飾詞“大約”、“近似”或“大體上”來修飾。除非另外說明,“大約”、“近似”或“大體上”表明所述數字允許有±20%的變化。相應地,在一些實施例中,說明書和請求項中使用的數值參數均為近似值,該近似值根據個別實施例所需特點可以發生改變。在一些實施例中,數值參數應考慮規定的有效數位並採用一般位數保留的方法。儘管本發明一些實施例中用於確認其範圍廣度的數值域和參數為近似值,在具體實施例中,此類數值的設定在可行範圍內盡可能精確。In some embodiments, numbers describing the quantity of components and attributes are used. It should be understood that such numbers used in the description of the embodiments are modified by the modifiers "approximately", "approximately" or "substantially" in some examples. Unless otherwise specified, "approximately", "approximately" or "substantially" indicate that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in the specification and the claims are approximate values, which may change according to the required features of the individual embodiments. In some embodiments, the numerical parameters should consider the specified significant digits and adopt the general digit retention method. Although the numerical domains and parameters used to confirm the breadth of the scope in some embodiments of the present invention are approximate values, in specific embodiments, the settings of such numerical values are as accurate as possible within the feasible range.
最後,應當理解的是,本發明中所述實施例僅用以說明本發明實施例的原則。其他的變形也可能屬本發明的範圍。因此,作為示例而非限制,本發明實施例的替代配置可視為與本發明的教導一致。相應地,本發明的實施例不僅限於本發明明確介紹和描述的實施例。Finally, it should be understood that the embodiments described in the present invention are only intended to illustrate the principles of the embodiments of the present invention. Other variations may also fall within the scope of the present invention. Therefore, as an example and not a limitation, alternative configurations of the embodiments of the present invention may be considered consistent with the teachings of the present invention. Accordingly, the embodiments of the present invention are not limited to the embodiments explicitly introduced and described herein.
10 中空陰極單元 11 矽靶材 111 狹縫 111A 狹縫入口 111B 狹縫出口 12 遮罩 13 中空陰極放電矽電漿 14 濺射氣體 15 碳氫氣體 16 碳矽化合物薄膜 20 基材 10 Hollow cathode unit 11 Silicon target 111 Slit 111A Slit inlet 111B Slit outlet 12 Mask 13 Hollow cathode discharge silicon plasma 14 Sputtering gas 15 Carbon hydrogen gas 16 Carbon silicon compound film 20 Substrate
為了更清楚地說明本發明實施例的技術方案,下面將對實施例描述中所需要使用的附圖作簡單的介紹。顯而易見地,下面描述中的附圖僅僅是本發明的一些示例或實施例,並非絕對用以限定本發明的技術範圍。除非從前後文顯而易見或另做說明,圖中相同標號代表相同結構或操作。其中: 圖1為本發明一種碳矽化合物製備方法的較佳實施例流程示意圖。 圖2a~2c為本發明較佳實施例於不同乙炔流量(a) 20 sccm、(b) 30 sccm及(c)50 sccm下,所得該碳矽化合物薄膜之截面微觀形貌及其成分分布圖。 圖3為本發明較佳實施例於製程時間16小時下,所得該碳矽化合物薄膜之截面微觀形貌及其成分分布圖。 圖4a為裸矽晶圓對比例於SiF 6氣氛下,進行電漿蝕刻200秒後之截面微觀形貌。 圖4b為本發明較佳實施例於SiF 6氣氛下,進行電漿蝕刻200秒後之截面微觀形貌。 圖5a為裸矽晶圓對比例於SiF 6與Cl 2氣氛下,進行電漿蝕刻200秒後之截面微觀形貌。 圖5b為本發明較佳實施例於SiF 6與Cl 2氣氛下,進行電漿蝕刻200秒後之截面微觀形貌。 In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some examples or embodiments of the present invention, and are not absolutely used to limit the technical scope of the present invention. Unless it is obvious from the preceding and following texts or otherwise explained, the same reference numerals in the figures represent the same structure or operation. Among them: Figure 1 is a schematic flow chart of a preferred embodiment of a method for preparing a carbon silicon compound of the present invention. Figures 2a~2c are cross-sectional micromorphologies and component distribution diagrams of the carbon silicon compound film obtained in the preferred embodiment of the present invention at different acetylene flow rates of (a) 20 sccm, (b) 30 sccm and (c) 50 sccm. FIG3 is a cross-sectional micromorphology and component distribution diagram of the carbon silicon compound film obtained in the preferred embodiment of the present invention with a process time of 16 hours. FIG4a is a cross-sectional micromorphology of a bare silicon wafer comparative example after plasma etching for 200 seconds in SiF 6 atmosphere. FIG4b is a cross-sectional micromorphology of a preferred embodiment of the present invention after plasma etching for 200 seconds in SiF 6 atmosphere. FIG5a is a cross-sectional micromorphology of a bare silicon wafer comparative example after plasma etching for 200 seconds in SiF 6 and Cl 2 atmosphere. FIG5b is a cross-sectional micromorphology of a preferred embodiment of the present invention after plasma etching for 200 seconds in SiF 6 and Cl 2 atmosphere.
10 中空陰極單元 11 矽靶材 111 狹縫 111A 狹縫入口 111B 狹縫出口 12 遮罩 13 中空陰極放電矽電漿 14 濺射氣體 15 碳氫氣體 16 碳矽化合物薄膜 20 基材 10 Hollow cathode unit 11 Silicon target 111 Slit 111A Slit inlet 111B Slit outlet 12 Mask 13 Hollow cathode discharge silicon plasma 14 Sputtering gas 15 Carbon hydrogen gas 16 Carbon silicon compound film 20 Substrate
Claims (9)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW112111353A TWI860660B (en) | 2023-03-25 | 2023-03-25 | A production method of a silicon carbide compound |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW112111353A TWI860660B (en) | 2023-03-25 | 2023-03-25 | A production method of a silicon carbide compound |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW202438693A TW202438693A (en) | 2024-10-01 |
| TWI860660B true TWI860660B (en) | 2024-11-01 |
Family
ID=94081543
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW112111353A TWI860660B (en) | 2023-03-25 | 2023-03-25 | A production method of a silicon carbide compound |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI860660B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050011757A1 (en) * | 2003-07-16 | 2005-01-20 | Toshinari Noda | Sputtering apparatus |
| TW201814074A (en) * | 2016-09-26 | 2018-04-16 | 斯庫林集團股份有限公司 | Film forming method and film forming apparatus |
| TW202310127A (en) * | 2021-08-30 | 2023-03-01 | 友達晶材股份有限公司 | Semiconductor processing equipment part and method for making the same |
-
2023
- 2023-03-25 TW TW112111353A patent/TWI860660B/en active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050011757A1 (en) * | 2003-07-16 | 2005-01-20 | Toshinari Noda | Sputtering apparatus |
| TW201814074A (en) * | 2016-09-26 | 2018-04-16 | 斯庫林集團股份有限公司 | Film forming method and film forming apparatus |
| TW202310127A (en) * | 2021-08-30 | 2023-03-01 | 友達晶材股份有限公司 | Semiconductor processing equipment part and method for making the same |
Also Published As
| Publication number | Publication date |
|---|---|
| TW202438693A (en) | 2024-10-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6699798B2 (en) | Promoting adhesion of fluoropolymer films to semiconductor substrates | |
| KR20070103686A (en) | Self-cleaning method of carbon-based thin film | |
| TW201837233A (en) | Semiconductor manufacturing component, semiconductor manufacturing component including composite coating, and method of manufacturing the same | |
| KR20220008393A (en) | Chemical vapor deposition silicon carbide bulk with enhanced etching properties | |
| JPH03146672A (en) | Susceptor for cvd | |
| KR101178184B1 (en) | Focus-ring for plasma etcher and manufacturing method thereof | |
| US20240229231A1 (en) | In situ nucleation for nanocrystalline diamond film deposition | |
| JP2017172021A (en) | Substrate with membrane, component for plasma etching device, and their manufacturing method | |
| TWI860660B (en) | A production method of a silicon carbide compound | |
| CN114864442A (en) | Semiconductor processing equipment and processing method thereof | |
| CN113621926A (en) | Low-stress diamond-like wear-resistant coating and preparation method thereof | |
| KR100885690B1 (en) | Diamond Film Manufacturing Method and Diamond Film | |
| JP7667262B2 (en) | Carbon-doped yttrium oxyfluoride (C:Y-O-F) layers as protective layers in fluorine plasma etching processes | |
| TWI551717B (en) | Method for manufacturing diamond-like carbon film | |
| US20240420951A1 (en) | Semiconductor processing equipment part and method for making the same | |
| CN117737695B (en) | Cleaning method | |
| CN113584420A (en) | Amorphous Y2SiO5Method for producing a coating | |
| US5175019A (en) | Method for depositing a thin film | |
| TW202240647A (en) | Processing method, component, gas shower head, and plasma processing apparatus for improving plasma etching rate | |
| JP2022039956A (en) | Member for manufacturing semiconductor and manufacturing method for the same | |
| JPS6134931A (en) | Silicon film manufacturing method | |
| CN113584417A (en) | Rare earth metal salt ceramic composite coating and preparation method and application thereof | |
| TWI873380B (en) | Semiconductor manufacturing component and manufacturing method thereof | |
| JPS62218577A (en) | Electrode for vapor phase reactor | |
| US20240352621A1 (en) | Nanocrystalline diamond with amorphous interfacial layer |