TWI859847B - Device structure for sensing infrared light and method of sensing infrared light - Google Patents

Abstract

The present disclosure relates to a device structure for sensing infrared light. The device structure includes a substrate, a first metal electrode, a second metal electrode, and a semiconductor layer. The first metal electrode and the second metal electrode are located on the substrate. The semiconductor layer is located on the substrate, in which the semiconductor layer is located between the first metal electrode and the second metal electrode and above the first metal electrode and the second metal electrode. The semiconductor layer directly contacts the first metal electrode and the second metal electrode.

Description

Component structure for sensing infrared rays and method for sensing infrared rays

The present disclosure relates to an infrared sensing device structure and an infrared sensing method.

Infrared sensing has many uses, such as fingerprint recognition on display panels, biomedical sensors for heart rate sensing, thermal sensors, etc. A good infrared sensing device must have high photosensitivity, such as high external quantum efficiency (EQE). However, traditional photosensitive elements, such as photodiodes, are limited by the fact that one photon excites one electron to generate a set of electron-hole pairs, so the external quantum efficiency cannot exceed 100% and has an upper limit. In addition, traditional photodiodes, such as PIN photodiodes, include two electrodes located at the top and bottom, sandwiching a sensing layer in the middle, so the process changes little and may be incompatible with most semiconductor processes, such as glass panels, flexible panels, etc. Therefore, a new infrared sensing device structure and a method for sensing infrared using the new infrared device structure are needed, so that the infrared sensing device structure has higher external quantum efficiency, can sense weak infrared signals, and has more process changes to facilitate higher process compatibility with current semiconductor processes.

The present disclosure is about a device structure for sensing infrared rays. The device structure includes a substrate, a first metal electrode, a second metal electrode and a semiconductor layer. The first metal electrode and the second metal electrode are located on the substrate. The semiconductor layer is located on the substrate, wherein the semiconductor layer is located between and above the first metal electrode and the second metal electrode, and the semiconductor layer directly contacts the first metal electrode and the second metal electrode. The first metal electrode and the second metal electrode independently include aluminum, nickel, titanium, molybdenum, chromium, gold, silver, copper or a combination thereof, and the semiconductor layer includes InSb, InAs, HgCdTe, PbS, PbSe, Ge, Si, GaSb, InGaAs, InTlAs, InAsSb, GaAsSb, InAsP, InGaAsP, GaInSb, AlGaAsSb, AlInSb, GaAsP, AlGaAs, AlAsSb, pentacene, anthracene, tetracene, perylene, tetrahydroanthracene, tetrahydro-2,3-naphthodihydro-1,4-diazopyridine, benzodiazopyridine, poly(3-hexylthiophene), phenyl-C ₆₁ -butyric acid methyl ester, poly [[4,8-bis [(2-ethylhexyl) oxy] benzo [1,2-b: 4,5-b'] dithiophene-2,6-diyl] [3-fluoro-2- [(2-ethylhexyl) carbonyl] thieno [3,4-b] thiophene diyl]], poly [2-methoxy-5- (2'-ethylhexyloxy) -1,4-styrene], poly (3,4-ethylenedioxythiophene) polystyrene sulfonate, poly [N-9'-heptadecanyl-2,7-carbazole-5,5- (4',7'-di-2-thienyl-2',1',3'-benzothiadiazole)], CuInSe ₂ , CuInS ₂ , CuGaSe ₂ , CuGaS ₂ , Cu ₂ ZnSnS ₄ , Cu ₂ ZnSnSe ₄ , Bi ₂ Te ₃ , Sb ₂ Te ₃ , ZnO, ZnTe, CdTe, CdSe, CdS, SnS, SnSe, TiO ₂ , CsPbBr ₃ , CsPbI ₃ , AgGaSe ₂ , AgGaS ₂ , molybdenum disulfide two-dimensional materials, carbon nanotubes, mercury telluride or a combination thereof.

In some embodiments, the substrate is formed by a process having a process temperature less than 600°C, and the substrate includes quartz, plastic, stainless steel, silicon crystal, sapphire, gallium nitride, or a combination thereof.

In some embodiments, the device structure further includes a third metal electrode and an insulating layer. The third metal electrode is located on the substrate. The insulating layer is located on the substrate. The third metal electrode is separated from the first metal electrode and the second metal electrode by the insulating layer. The semiconductor layer projection of the semiconductor layer on the substrate has a middle portion between the first metal electrode projection of the first metal electrode on the substrate and the second metal electrode projection of the second metal electrode on the substrate. The third metal electrode has a third metal electrode projection on the substrate. All of the middle portion overlaps with the third metal electrode projection.

In some embodiments, the device structure further includes at least one third metal electrode and an insulating layer. The at least one third metal electrode is located on the substrate, wherein the semiconductor layer has a middle portion located between the first metal electrode and the second metal electrode, the middle portion includes at least one first portion and at least one second portion, the projection of the at least one first portion on the substrate does not overlap with the projection of the at least one third metal electrode on the substrate, and the projection of the at least one second portion on the substrate overlaps with the projection of the third metal electrode. The insulating layer is located on the substrate, wherein the at least one third metal electrode is separated from the first metal electrode and the second metal electrode by the insulating layer.

In some embodiments, a projected area of each of the at least one first portion on the substrate is less than 100 μm ² .

The present disclosure also relates to a method for sensing infrared rays. The method includes the following operations. The above-mentioned element structure is illuminated with a light source, wherein when the substrate includes an opaque substrate, the light source is incident on a side of the semiconductor layer that is opposite to the substrate, and when the substrate includes a transparent substrate, the light source is incident on the side of the semiconductor layer that is opposite to the substrate, the side that faces the substrate, or a combination thereof. The first intensity of the light source is adjusted to a second intensity to adjust the first energy barrier on the contact surface between the semiconductor layer and the first metal electrode and the second metal electrode to a second energy barrier, wherein the second intensity is greater than the first intensity, and the second energy barrier is less than the first energy barrier.

The present disclosure also relates to a method for sensing infrared rays. The method includes the following operations. Irradiating the above-mentioned component structure with a light source. Applying a positive bias or a negative bias to the third metal electrode. Adjusting the first intensity of the light source to a second intensity to adjust the first energy barrier on the contact surface between the semiconductor layer and the first metal electrode and the second metal electrode to a second energy barrier, wherein the second intensity is greater than the first intensity, and the second energy barrier is less than the first energy barrier.

In some implementations, the forward bias voltage is +0.5V to +25V, and the negative bias voltage is -0.5V to -5V.

The present disclosure also relates to a method for sensing infrared rays. The method includes the following operations. Irradiating the above-mentioned component structure with a light source. Applying a positive bias or a negative bias to at least one third metal electrode. Adjusting the first intensity of the light source to a second intensity to adjust the first energy barrier on the contact surface between the semiconductor layer and the first metal electrode and the second metal electrode to a second energy barrier, and adjusting the third energy barrier on the contact surface between at least one first part and at least one second part to a fourth energy barrier, wherein the second intensity is greater than the first intensity, the second energy barrier is less than the first energy barrier, and the fourth energy barrier is less than the third energy barrier.

The present disclosure also relates to a device structure for sensing infrared rays. The device structure includes a transparent substrate, a first metal electrode, a second metal electrode and a semiconductor layer. The first metal electrode and the second metal electrode are located on the transparent substrate. The semiconductor layer is located on the transparent substrate, wherein the semiconductor layer is located below the first metal electrode and the second metal electrode, and the semiconductor layer directly contacts the first metal electrode and the second metal electrode. The first metal electrode and the second metal electrode independently include aluminum, nickel, titanium, molybdenum, chromium, gold, silver, copper or a combination thereof, and the semiconductor layer includes InSb, InAs, HgCdTe, PbS, PbSe, Ge, Si, GaSb, InGaAs, InTlAs, InAsSb, GaAsSb, InAsP, InGaAsP, GaInSb, AlGaAsSb, AlInSb, GaAsP, AlGaAs, AlAsSb, pentacene, anthracene, tetracene, perylene, tetrahydroanthracene, tetrahydro-2,3-naphthodihydro-1,4-diazopyridine, benzodiazopyridine, poly(3-hexylthiophene), phenyl-C ₆₁ -butyric acid methyl ester, poly [[4,8-bis [(2-ethylhexyl) oxy] benzo [1,2-b: 4,5-b'] dithiophene-2,6-diyl] [3-fluoro-2- [(2-ethylhexyl) carbonyl] thieno [3,4-b] thiophene diyl]], poly [2-methoxy-5- (2'-ethylhexyloxy) -1,4-styrene], poly (3,4-ethylenedioxythiophene) polystyrene sulfonate, poly [N-9'-heptadecanyl-2,7-carbazole-5,5- (4',7'-di-2-thienyl-2',1',3'-benzothiadiazole)], CuInSe ₂ , CuInS ₂ , CuGaSe ₂ , CuGaS ₂ , Cu ₂ ZnSnS ₄ , Cu ₂ ZnSnSe ₄ , Bi ₂ Te ₃ , Sb ₂ Te ₃ , ZnO, ZnTe, CdTe, CdSe, CdS, SnS, SnSe, TiO ₂ , CsPbBr ₃ , CsPbI ₃ , AgGaSe ₂ , AgGaS ₂ , molybdenum disulfide two-dimensional materials, carbon nanotubes, mercury telluride or a combination thereof.

In some embodiments, the device structure further includes a third metal electrode and an insulating layer. The third metal electrode is located on the transparent substrate. The insulating layer is located on the transparent substrate. The third metal electrode is separated from the first metal electrode and the second metal electrode by the insulating layer. The semiconductor layer projection of the semiconductor layer on the transparent substrate has a middle portion between the first metal electrode projection of the first metal electrode on the transparent substrate and the second metal electrode projection of the second metal electrode on the transparent substrate. The third metal electrode has a third metal electrode projection on the transparent substrate. All of the middle portion overlaps with the third metal electrode projection.

In some embodiments, the device structure further includes at least one third metal electrode and an insulating layer. The at least one third metal electrode is located on a transparent substrate, wherein the semiconductor layer has a middle portion located between the first metal electrode and the second metal electrode, the middle portion includes at least one first portion and at least one second portion, the projection of the at least one first portion on the transparent substrate does not overlap with the projection of the at least one third metal electrode on the transparent substrate, and the projection of the at least one second portion on the transparent substrate overlaps with the projection of the third metal electrode. The insulating layer is located on the transparent substrate, wherein the at least one third metal electrode is separated from the first metal electrode and the second metal electrode by the insulating layer.

The present disclosure also relates to a method for sensing infrared rays. The method includes the following operations. Irradiating the above-mentioned element structure with a light source, wherein the light source is incident on a side of the semiconductor layer facing the transparent substrate. Adjusting the first intensity of the light source to a second intensity to adjust the first energy barrier on the contact surface between the semiconductor layer and the first metal electrode and the second metal electrode to a second energy barrier, wherein the second intensity is greater than the first intensity, and the second energy barrier is less than the first energy barrier.

The present disclosure also relates to a method for sensing infrared rays. The method includes the following operations. Irradiating the above-mentioned component structure with a light source. Applying a positive bias or a negative bias to at least one third metal electrode. Adjusting the first intensity of the light source to a second intensity to adjust the first energy barrier on the contact surface between the semiconductor layer and the first metal electrode and the second metal electrode to a second energy barrier, and adjusting the third energy barrier on the contact surface between at least one first part and at least one second part to a fourth energy barrier, wherein the second intensity is greater than the first intensity, the second energy barrier is less than the first energy barrier, and the fourth energy barrier is less than the third energy barrier.

The implementation methods, features and advantages of the present disclosure can be better understood by referring to the following description and the attached patent scope.

It should be understood that the general description above and the specific description below are exemplary and explanatory and are intended to provide further explanation of the present disclosure.

In order to make the description of the present disclosure more detailed and complete, the following is an illustrative description of the implementation mode and specific implementation mode. This does not limit the implementation mode of the present disclosure to a single form. The implementation modes of the present disclosure can be combined or replaced with each other in beneficial situations, and other implementation modes can be added without further description or explanation.

In addition, spatially relative terms, such as below and above, may be used in this disclosure to describe the relationship of one element or feature to another element or feature in the figure. Spatially relative terms are intended to cover different orientations of the device when in use or operation, in addition to the orientation described in the figure. For example, the device may be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and the spatially relative terms of this disclosure may be interpreted accordingly. In this disclosure, unless otherwise specified, the same element number in different figures refers to the same or similar elements formed by the same or similar materials and by the same or similar methods.

In addition, considering the errors caused by measurement or the errors caused by actual operation, the "about", "approximately", "substantially" or "substantially" in the present disclosure include the values or features and the values or features within the deviation range acceptable to the ordinary skilled person in the art. For example, the values within the deviation range of ±15%, ±10% or ±5%. The acceptable deviation range can be selected according to the measurement properties or other properties affecting the operation.

The present disclosure is about a device structure for sensing infrared rays. The device structure includes a substrate, a first metal electrode, a second metal electrode and a semiconductor layer. The first metal electrode and the second metal electrode are located on the substrate. The semiconductor layer is located on the substrate, wherein the semiconductor layer is located between and above the first metal electrode and the second metal electrode, and the semiconductor layer directly contacts the first metal electrode and the second metal electrode. The first metal electrode and the second metal electrode independently include aluminum, nickel, titanium, molybdenum, chromium, gold, silver, copper or a combination thereof, and the semiconductor layer includes InSb, InAs, HgCdTe, PbS, PbSe, Ge, Si, GaSb, InGaAs, InTlAs, InAsS b, GaAsSb, InAsP, InGaAsP, GaInSb, AlGaAsSb, AlInSb, GaAsP, AlGaAs, AlAsSb, Pentacene, Anthracene, Tetracene, Perylene, Tetrahydroanthracene, Tetrahydro-2,3-naphthodihydro-1,4-diazopyridine, Benzodiazopyridine, Poly(3-hexylthiophene) （Poly(3-hexylthiophene), P3HT）、Phenyl-C _{61 -Butyric} Acid Methyl Ester（PCBM）、Poly[[4,8-bis[(2-ethylhexyl)oxy]benzo[1,2-b:4,5-b']dithiophene-2,6-diyl][3-fluoro-2-[(2-ethylhexyl)carbonyl]thieno[3,4-b]thiophenediyl]], PTB7), Poly[2-methoxy-5-(2'-ethylhexyloxy)- 1,4-phenylenevinylene] (MEH-PPV), Poly(3,4-ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS), Poly[N-9'-heptadecanyl-2,7-carbazole-alt-5,5-(4',7'-di-2-thienyl-2',1',3'-benzothiadiazole)], PCDTBT), CuInSe ₂ , CuInS ₂ , CuGaSe ₂ , CuGaS ₂ , Cu ₂ ZnSnS ₄ , Cu ₂ ZnSnSe ₄ , Bi ₂ Te ₃ , Sb ₂ Te ₃ , ZnO, ZnTe, CdTe, CdSe, CdS, SnS, SnSe, TiO _{2 , CsPbBr 3 , CsPbI 3 , AgGaSe 2} , AgGaS ₂ , molybdenum disulfide two-dimensional material, carbon nanotubes, mercury telluride or a combination thereof. Next, the device structure is described in detail according to some embodiments.

FIG. 1 is a cross-sectional view of the above-mentioned device structure according to some embodiments of the present disclosure. In FIG. 1, the device structure includes a substrate 101, a first metal electrode M1, a second metal electrode M2, and a semiconductor layer 103, wherein the lower surface of the first metal electrode M1, the lower surface of the second metal electrode M2, and the lower surface of the semiconductor layer 103 are located on the same plane. FIG. 2 is a schematic diagram of the energy level between the semiconductor layer 103 and the first metal electrode M1 or the second metal electrode M2 according to some embodiments of the present disclosure. Next, the device structure is described in detail with reference to FIG. 1 to FIG. 2.

First, the substrate 101 is described. In some embodiments, the substrate 101 is formed by a process with a process temperature less than 600 ° C, such as less than 550 ° C, less than 500 ° C, or less than 450 ° C. Since the process temperature does not need to be too high, the process cost is saved. In some embodiments, the substrate 101 includes a transparent substrate or an opaque substrate. In some embodiments, the substrate 101 includes quartz (or glass), plastic (such as polyimide, etc.), stainless steel, silicon crystal, sapphire, gallium nitride or a combination thereof. In some embodiments, the substrate 101 further includes an active element (such as a diode or a transistor, etc.), a passive element (such as a resistor, a capacitor or an inductor, etc.), a conductive structure (such as a wire, etc.) or a combination thereof.

Next, the semiconductor layer 103 is described. The semiconductor layer 103 is located on the substrate 101 and between and above the first metal electrode M1 and the second metal electrode M2. Since the entire semiconductor layer 103 is exposed from the first metal electrode M1 and the second metal electrode M2, the material of the semiconductor layer 103 can be easily replaced at any time according to needs without removing the first metal electrode M1 and the second metal electrode M2. The semiconductor layer 103 has an energy gap of about 0.1 eV to about 3 eV, such as 3.0 eV, 2.5 eV, 2.0 eV, 1.5 eV, 1.2 eV, 1.0 eV, 0.8 eV, 0.6 eV, 0.4 eV, 0.2 eV or 0.1 eV, so as to absorb wavelengths of about 400 nm to about 12400 nm including infrared rays.

Next, the first metal electrode M1 and the second metal electrode M2 are described. The first metal electrode M1 and the second metal electrode M2 are located on the substrate 101 and directly contact the semiconductor layer 103. In some embodiments, the first metal electrode M1 is separated from the second metal electrode M2. In some embodiments, the material of the first metal electrode M1 is the same as or different from the material of the second metal electrode M2. When the material of the first metal electrode M1 is the same as the material of the second metal electrode M2, the method of forming the device structure may include forming the first metal electrode M1 and the second metal electrode M2 at the same time to simplify the process and save costs.

Next, referring to FIG. 2, the energy level appearance of the contact surface C between the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2 when the semiconductor layer 103 in FIG. 1 is in direct contact with the first metal electrode M1 and the second metal electrode M2 is described. In FIG. 2, E _SC is the conduction band energy level of the semiconductor layer 103, E _SV is the valence band energy level of the semiconductor layer 103, E _SF is the Fermi energy level of the semiconductor layer 103, E _MF,1 is the Fermi energy level of the first metal electrode M1, and E _MF,2 is the Fermi energy level of the second metal electrode M2. When the semiconductor layer 103 directly contacts the first metal electrode M1 and the second metal electrode M2, in order to achieve equilibrium with the Fermi energy level E _SF of the semiconductor layer 103 and the Fermi energy level E _MF,1 of the first metal electrode M1 and the Fermi energy level E _MF,2 of the second metal electrode M2 (equivalent to making E _SF substantially equal to E _MF,1 and E _MF,2 ), the energy level of the semiconductor layer 103 on the contact surface C will bend and deform, forming an energy barrier A as shown in FIG. 2 .

The energy barrier A is described in detail. The energy barrier A is a high land portion protruding from the energy level surface on the bent and deformed conduction band energy level E _SC and valence band energy level E _SV of the semiconductor layer 103. The high land portion blocks the migration of electrons and/or holes between the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2. However, irradiating the device structure with infrared rays can reduce the energy barrier A, that is, the high land portion protruding from the energy level surface is reduced, so as to help the migration of electrons and/or holes between the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2. Moreover, the energy barrier A decreases as the illumination increases (e.g., the illumination, intensity, or power increases), so the photocurrent between the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2 increases as the illumination increases. Specifically, when photons excite electrons to the conduction band energy level E _SC and form holes on the valence band energy level E _SV , as the illumination increases, more and more holes gather at the energy barrier A and the energy barrier A gradually decreases, so that the number of electrons that can cross the energy barrier A also gradually increases, that is, the photocurrent increases as the illumination increases. By lowering the energy barrier A by illuminating to sense infrared light, the device structure can have good photoelectric conversion efficiency, such as an external quantum efficiency greater than 100%, and can generate photocurrent in a weak light environment, such as an environment where the light illumination, intensity or power is substantially equal to zero.

The device structure is described below. In some embodiments, the device structure may be repeatedly arranged on a plane parallel to the substrate 101 to form a repeated array such as a matrix. In some embodiments, a collimator (not shown separately), a lens (not shown separately) or a combination thereof may be disposed above the device structure to improve the accuracy of infrared sensing or to focus the incident light source on the device structure to improve the sensing intensity.

Next, the first embodiment of the device structure shown in FIG. 1 is described with reference to FIG. 3 and FIG. 4, wherein the device structure of the first embodiment further includes a third metal electrode M3 and an insulating layer 102 located on the substrate 101. The difference between FIG. 3 and FIG. 4 is that the third metal electrode M3 and the insulating layer 102 are located at different relative positions to the first metal electrode M1, the second metal electrode M2 and the semiconductor layer 103 on the substrate 101 (details will be described later). Regardless of the type of device structure, it can sense infrared rays well as described above, so that the method of forming the device structure has multiple options, and the device structure with multiple types can be applied to multiple different processes.

The third metal electrode M3 of the first embodiment is described with reference to FIGS. 3 to 4. The method of sensing infrared rays using the component structure of the first embodiment includes applying voltage to the third metal electrode M3 or not applying voltage when sensing infrared rays. When voltage is applied, the current between the first metal electrode M1, the second metal electrode M2 and the semiconductor layer 103 is enhanced. However, regardless of whether voltage is applied, the energy barrier A between the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2 can be reduced by illumination to increase the photocurrent. In addition, the third metal electrode M3 can also block light from the opposite direction of the light source to be measured to avoid sensing errors caused by light from the opposite direction of the light source to be measured, thereby improving the accuracy of the component structure in sensing infrared rays. In some embodiments, the third metal electrode M3 includes aluminum, nickel, titanium, molybdenum, chromium, gold, silver, copper or a combination thereof.

The insulating layer 102 of the first embodiment is described with reference to FIGS. 3 to 4. The insulating layer 102 separates the third metal electrode M3 from the first metal electrode M1 and the second metal electrode M2, so that the third metal electrode M3 is electrically insulated from the first metal electrode M1 and the second metal electrode M2. In some embodiments, the insulating layer 102 includes one or more low-k dielectric layers, and each low-k dielectric layer independently includes silicon dioxide, tetraethoxysilane, silicon nitride, borophosphosilicate glass, the like, or a combination thereof. In some implementations, the preferred insulating layer 102 includes a silicon dioxide layer 102A and a silicon nitride layer 102B.

The first embodiment is described with reference to FIGS. 3 to 4. In the first embodiment, the semiconductor layer projection of the semiconductor layer 103 on the substrate 101 (corresponding to the double arrow 103' in the figure) has a middle portion (corresponding to the double arrow 103") between the first metal electrode projection of the first metal electrode M1 on the substrate 101 (corresponding to the double arrow M1' in the figure) and the second metal electrode projection of the second metal electrode M2 on the substrate 101 (corresponding to the double arrow M2' in the figure), and the third metal electrode M3 has a third metal electrode projection on the substrate 101 (corresponding to the double arrow M3' in the figure). In the first embodiment, In the embodiment, the entire middle portion overlaps with the projection of the third metal electrode, that is, in the direction perpendicular to the substrate 101, the projection of the third metal electrode M3 completely covers the projection of the semiconductor layer 103 between the first metal electrode M1 and the second metal electrode M2. For clarity of description, the first metal electrode projection, the second metal electrode projection, the third metal electrode projection, the semiconductor layer projection and the middle portion are indicated in the figure by double arrows M1', M2', M3', 103' and 103" to indicate relative positions and sizes.

One aspect of the first embodiment is described in detail with reference to FIG. 3 . In FIG. 3 , the first metal electrode M1, the second metal electrode M2, and the semiconductor layer 103 are located above the third metal electrode M3 and the insulating layer 102. Specifically, the third metal electrode M3 is located on the substrate 101; the insulating layer 102 covers the third metal electrode M3; and the first metal electrode M1, the second metal electrode M2, and the semiconductor layer 103 are located above the insulating layer 102.

Another aspect of the first embodiment is described in detail with reference to FIG. 4. In FIG. 4, the first metal electrode M1, the second metal electrode M2, and the semiconductor layer 103 are located below the third metal electrode M3 and the insulating layer 102. Specifically, the first metal electrode M1, the second metal electrode M2, and the semiconductor layer 103 are located on the substrate 101; the insulating layer 102 is located above the first metal electrode M1, the second metal electrode M2, and the semiconductor layer 103; and the third metal electrode M3 is located on the insulating layer 102.

Next, a second embodiment of the device structure shown in FIG. 1 is described with reference to FIGS. 5A to 6C, wherein the device structure of the second embodiment further includes at least one third metal electrode M3 and an insulating layer 102 located on the substrate 101. The difference between the second embodiment and the first embodiment is that, in a direction perpendicular to the substrate 101, the projection of the third metal electrode M3 of the second embodiment does not completely cover the projection of the semiconductor layer 103 between the first metal electrode M1 and the second metal electrode M2, i.e., there is a gap between the projections (details will be described later). Therefore, the semiconductor layer 103 of the second embodiment has an energy barrier A between the first metal electrode M1 and the second metal electrode M2 as shown in FIG. 2 and also has an energy barrier B corresponding to the gap position (refer to FIG. 7 described later for details). In addition, in the second embodiment, the difference between FIG. 5A to FIG. 5C and FIG. 6A to FIG. 6C is that the relative positions of the third metal electrode M3 and the insulating layer 102 and the first metal electrode M1, the second metal electrode M2 and the semiconductor layer 103 on the substrate 101 are different (details will be described later). Regardless of the type of device structure, infrared rays can be well sensed as described above, so that there are multiple options for the method of forming the device structure, and the device structure with multiple types can be applied to a variety of different processes.

The third metal electrode M3 of the second embodiment is described with reference to FIGS. 5A to 6C. The method of sensing infrared rays using the element structure of the second embodiment includes applying a voltage to the third metal electrode M3 or not applying a voltage when sensing infrared rays. Regardless of whether a voltage is applied, the energy barrier A between the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2 can be reduced by illumination to increase the photocurrent. However, when a voltage is applied to the third metal electrode M3 of the second embodiment, the energy barrier B between the first part and the second part of the semiconductor layer 103 can also be reduced by illumination to increase the photocurrent (details will be described later, and refer to the method for sensing infrared rays below). In addition, the third metal electrode M3 can also block light from the opposite direction of the light source to be measured to avoid sensing errors caused by the light from the opposite direction of the light source to be measured, thereby improving the accuracy of the device structure in sensing infrared rays. In some embodiments, the third metal electrode M3 includes any suitable metal.

The insulating layer 102 of the second embodiment is described with reference to FIGS. 5A to 6C. The insulating layer 102 separates the third metal electrode M3 from the first metal electrode M1 and the second metal electrode M2, so that the third metal electrode M3 is electrically insulated from the first metal electrode M1 and the second metal electrode M2. In some embodiments, the insulating layer 102 includes one or more low-k dielectric layers, and each low-k dielectric layer independently includes silicon dioxide, tetraethoxysilane, silicon nitride, borophosphosilicate glass, the like, or a combination thereof. In some implementations, the preferred insulating layer 102 includes a silicon dioxide layer 102A and a silicon nitride layer 102B.

In the second embodiment, when the at least one third metal electrode M3 is a third metal electrode M3, as shown in FIGS. 5A to 5B and FIGS. 6A to 6B, the third metal electrode projection of the third metal electrode M3 on the substrate 101 (corresponding to the double arrow M3' in the figure) is separated from the first metal electrode projection of the first metal electrode M1 on the substrate 101 (corresponding to the double arrow M1' in the figure); the third metal electrode projection of the third metal electrode M3 on the substrate 101 (corresponding to the double arrow M1' in the figure) is separated from the first metal electrode projection of the first metal electrode M1 on the substrate 101. The projection of the third metal electrode M3 on the substrate 101 (corresponding to the double arrow M3' in the figure) is separated from the second metal electrode projection of the second metal electrode M2 on the substrate 101 (corresponding to the double arrow M2' in the figure); or the projection of the third metal electrode M3 on the substrate 101 (corresponding to the double arrow M3' in the figure) is separated from the first metal electrode projection (corresponding to the double arrow M1' in the figure) and the second metal electrode projection (corresponding to the double arrow M2' in the figure) of the first metal electrode M1 and the second metal electrode M2 on the substrate 101. That is, in the direction perpendicular to the substrate 101, the projection of the third metal electrode M3 does not completely cover the projection of the semiconductor layer 103 between the first metal electrode M1 and the second metal electrode M2. Therefore, the semiconductor layer 103 between the first metal electrode M1 and the second metal electrode M2 includes at least one first portion G and at least one second portion O (the positions are marked with dashed boxes in the figure), wherein the first portion G is the portion where the projection of the semiconductor layer 103 and the projection of the third metal electrode M3 do not overlap, and the second portion O is the portion where the projection of the semiconductor layer 103 and the projection of the third metal electrode M3 overlap. For clarity of explanation, the first metal electrode projection, the second metal electrode projection, and the third metal electrode projection are indicated in the figure by double arrows M1', M2', and M3' to indicate relative positions and sizes. In addition, although not shown separately, the positions of the first metal electrode M1 and the second metal electrode M2 shown in FIG. 5A and FIG. 6A can be swapped so that the third metal electrode projection of the third metal electrode M3 on the substrate 101 is separated from the second metal electrode projection of the second metal electrode M2 on the substrate 101.

In the second embodiment, when at least one third metal electrode M3 is a plurality of third metal electrodes M3, as shown in FIG. 5C and FIG. 6C, these third metal electrodes M3 are separated from each other. That is, in the direction perpendicular to the substrate 101, the projection of the third metal electrode M3 does not completely cover the projection of the semiconductor layer 103 between the first metal electrode M1 and the second metal electrode M2. Therefore, the semiconductor layer 103 between the first metal electrode M1 and the second metal electrode M2 includes at least one first portion G and at least one second portion O (the positions are marked with dashed boxes in the figure respectively), wherein the first portion G is the portion where the projection of the semiconductor layer 103 and the projection of the third metal electrode M3 do not overlap, and the second portion O is the portion where the projection of the semiconductor layer 103 and the projection of the third metal electrode M3 overlap. In addition, although not shown separately, the number of the third metal electrodes M3 is not limited to the number shown in the figure.

The second embodiment is described with reference to FIGS. 5A to 6C and FIG. 7. FIG. 7 is a schematic diagram of the energy levels of the contact surface between the first portion G and the second portion O (the relative positions are indicated by double arrows G' and O' in the figure, respectively) of the semiconductor layer 103 in the second embodiment. In FIG. 7, E _SC is the conduction band energy level of the semiconductor layer 103, and E _SV is the valence band energy level of the semiconductor layer 103. When a voltage is applied to the third metal electrode M3 (refer to the infrared sensing method below for details), the conduction band energy level E _SC and the valence band energy level E _SV of the second portion O are tilted by the voltage, and the conduction band energy level E _SC and the valence band energy level E _SV of the first portion G are tilted, thereby generating an energy barrier B at the place where the energy barrier B is connected to the second portion O. The characteristics of the energy barrier B are substantially the same as those of the energy barrier A described above, so the characteristics of the energy barrier B can be referred to above and will not be elaborated here. That is, the photocurrent flowing through the semiconductor layer 103 increases with the increase of light illumination, and sensing infrared rays by lowering the energy barrier B by illumination can make the device structure have good photoelectric conversion efficiency, such as an external quantum efficiency greater than 100%, and can also generate photocurrent in a weak light environment, such as an environment where the light illumination, intensity or power is substantially equal to zero. In some embodiments, the projection area of each first portion G in the semiconductor layer 103 on the substrate 101 is preferably less than 100 μm ² and greater than 0 μm ² , such as 10 μm ² , 20 μm ² , 30 μm ² , 40 μm ² , 50 μm ² , 60 μm ² , 70 μm ² , 80 μm ² or 90 μm ² . If the projection area of the first part G is too large, the resistance may increase and the current may be reduced. If the projection area of the first part G is too small, the energy barrier B may not be generated.

The present disclosure also relates to a method for sensing infrared rays. The method includes the following operations. A light source (e.g., a light source including infrared rays) is used to illuminate the device structure shown in FIG. 1, wherein when the substrate 101 includes an opaque substrate, the light source is incident on a side of the semiconductor layer 103 that faces away from the substrate 101, and when the substrate 101 includes a transparent substrate, the light source is incident on the side of the semiconductor layer 103 that faces away from the substrate 101, the side that faces the substrate 101, or a combination thereof. The first intensity of the light source is adjusted (for example, through a lens, a collimator or any feasible method) to a second intensity, so as to adjust the first energy barrier on the contact surface C between the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2 to a second energy barrier, wherein the second intensity is greater than the first intensity, and the second energy barrier is less than the first energy barrier (here, the first energy barrier and the second energy barrier correspond to the energy barrier A mentioned above, but the height of the second energy barrier is less than the height of the first energy barrier).

The present disclosure also relates to a method for sensing infrared rays. The method includes the following operations. Irradiate the component structure shown in Figures 3 to 4 of the above-mentioned first embodiment with a light source (e.g., a light source containing infrared rays). Apply a positive bias or a negative bias to the third metal electrode M3. Adjust the first intensity of the light source (e.g., through a lens, a collimator, or any feasible method, etc.) to a second intensity to adjust the first energy barrier on the contact surface C between the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2 to a second energy barrier, wherein the second intensity is greater than the first intensity, and the second energy barrier is less than the first energy barrier (here, the first energy barrier and the second energy barrier correspond to the energy barrier A above, but the height of the second energy barrier is less than the height of the first energy barrier). In some embodiments, the preferred forward bias voltage range is +0.5V to +25V, such as +0.5V, +1V, +5V, +10V, +15V, +20V or +25V, to obtain a larger photocurrent signal. In some embodiments, the preferred negative bias voltage range is -0.5V to -5V, such as -0.5V, -1V, -2V, -3V, -4V or -5V, to obtain a larger photocurrent signal.

The present disclosure also relates to a method for sensing infrared rays. The method includes the following operations: irradiating the device structure shown in FIGS. 5A to 6C in the second embodiment with a light source (e.g., a light source including infrared rays). Applying a positive bias or a negative bias to at least one third metal electrode M3. The first intensity of the light source is adjusted (for example, through a lens, a collimator or any feasible method) to a second intensity so as to adjust the first energy barrier on the contact surface C between the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2 to a second energy barrier, and to adjust the third energy barrier on the contact surface between at least one first part G and at least one second part O to a fourth energy barrier, wherein the second intensity is greater than the first intensity, the second energy barrier is less than the first energy barrier, and the fourth energy barrier is less than the third energy barrier (here the first energy barrier and the second energy barrier correspond to the above energy barrier A, and the third energy barrier and the fourth energy barrier correspond to the above energy barrier B, but the height of the second energy barrier is less than the height of the first energy barrier, and the height of the fourth energy barrier is less than the height of the third energy barrier). In some embodiments, the preferred forward bias voltage range is +0.5V to +25V, such as +0.5V, +1V, +5V, +10V, +15V, +20V or +25V, to obtain a larger photocurrent signal. In some embodiments, the preferred negative bias voltage range is -0.5V to -5V, such as -0.5V, -1V, -2V, -3V, -4V or -5V, to obtain a larger photocurrent signal.

The present disclosure also relates to a device structure for sensing infrared rays. The device structure includes a transparent substrate, a first metal electrode, a second metal electrode and a semiconductor layer. The first metal electrode and the second metal electrode are located on the transparent substrate. The semiconductor layer is located on the transparent substrate, wherein the semiconductor layer is located below the first metal electrode and the second metal electrode, and the semiconductor layer directly contacts the first metal electrode and the second metal electrode. The first metal electrode and the second metal electrode independently include aluminum, nickel, titanium, molybdenum, chromium, gold, silver, copper or a combination thereof, and the semiconductor layer includes InSb, InAs, HgCdTe, PbS, PbSe, Ge, Si, GaSb, InGaAs, InTlAs, InAsSb, GaAsSb, InAsP, InGaAsP, GaInSb, AlGaAsSb, AlInSb, GaAsP, AlGaAs, AlAsSb, pentacene, anthracene, tetracene, perylene, tetrahydroanthracene, tetrahydro-2,3-naphthodihydro-1,4-diazopyridine, benzodiazopyridine, poly(3-hexylthiophene), phenyl-C ₆₁ -butyric acid methyl ester, poly [[4,8-bis [(2-ethylhexyl) oxy] benzo [1,2-b: 4,5-b'] dithiophene-2,6-diyl] [3-fluoro-2- [(2-ethylhexyl) carbonyl] thieno [3,4-b] thiophene diyl]], poly [2-methoxy-5- (2'-ethylhexyloxy) -1,4-styrene], poly (3,4-ethylenedioxythiophene) polystyrene sulfonate, poly [N-9'-heptadecanyl-2,7-carbazole-5,5- (4',7'-di-2-thienyl-2',1',3'-benzothiadiazole)], CuInSe ₂ , CuInS ₂ , CuGaSe ₂ , CuGaS ₂ , Cu ₂ ZnSnS ₄ , Cu ₂ ZnSnSe ₄ , Bi ₂ Te ₃ , Sb ₂ Te ₃ , ZnO, ZnTe, CdTe, CdSe, CdS, SnS, SnSe, TiO ₂ , CsPbBr ₃ , CsPbI ₃ , AgGaSe ₂ , AgGaS ₂ , two-dimensional molybdenum disulfide materials, carbon nanotubes, mercury telluride or a combination thereof. The difference between this device structure (refer to FIG. 8 ) and the device structure of FIG. 1 described above is that the substrate may be different and the relative positions of the semiconductor layer and the first metal electrode and the second metal electrode are different. The remaining features are substantially the same as those of the device structure of FIG. 1 , so the details can be referred to above and may not be repeated below. Next, this device structure is described in detail according to some implementation methods.

FIG. 8 is a cross-sectional view of the above-mentioned device structure according to some embodiments of the present disclosure. In FIG. 8, the device structure includes a transparent substrate 104, a first metal electrode M1, a second metal electrode M2 and a semiconductor layer 103, wherein the lower surface of the first metal electrode M1 and the lower surface of the second metal electrode M2 are located on the upper surface of the semiconductor layer 103. The energy level diagram of FIG. 2 is also applicable to the device structure of FIG. 8. Therefore, the device structure is described in detail with reference to FIG. 8 and FIG. 2.

First, the transparent substrate 104 is described. In some embodiments, the transparent substrate 104 is formed by a process less than 600°C, such as less than 550°C, less than 500°C, or less than 450°C. Since the process temperature does not need to be too high, the process cost is saved. In some embodiments, the transparent substrate 104 includes quartz (or glass), sapphire, gallium nitride, and combinations thereof. In some embodiments, the transparent substrate 104 further includes an active element (such as a diode or a transistor), a passive element (such as a resistor, a capacitor, or an inductor), a conductive structure (such as a wire), or a combination thereof.

The characteristics of the energy gap size of the semiconductor layer 103 in this device structure are basically the same as above, so they will not be elaborated here.

The features such as the relative positions of the first metal electrode M1 and the second metal electrode M2 in this device structure are basically the same as those described above, and thus will not be elaborated here.

Next, the energy level appearance of the contact surface C between the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2 when the semiconductor layer 103 in FIG. 8 is in direct contact with the first metal electrode M1 and the second metal electrode M2 will be described with reference to FIG. 2. The characteristics of this energy level appearance (such as the energy barrier A, etc.) are basically the same as above, so they will not be repeated here. That is, the photocurrent between the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2 increases with the increase of light illumination, and sensing infrared rays by lowering the energy barrier A by illumination can make the component structure have good photoelectric conversion efficiency, such as an external quantum efficiency greater than 100%, and photocurrent can also be generated in a weak light environment, such as an environment where the illumination, intensity or power is essentially zero.

The device structure is described below. In some embodiments, the device structure may be repeatedly arranged on a plane parallel to the transparent substrate 104 to form a repeated array such as a matrix. In some embodiments, a collimator (not shown separately), a lens (not shown separately) or a combination thereof may be disposed above the device structure to improve the accuracy of infrared sensing or to focus the incident light source on the device structure to improve the sensing intensity.

Next, the third embodiment of the device structure shown in FIG. 8 is described with reference to FIGS. 9 to 10, wherein the device structure of the third embodiment further includes a third metal electrode M3 and an insulating layer 102 located on a transparent substrate 104. The device structure of the third embodiment differs from the device structure of the first embodiment described above with reference to FIGS. 3 to 4 in that the substrate may be different and the relative positions of the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2 are different. The remaining features are substantially the same as those of the device structure of the first embodiment, so the details may be referred to above, and may not be described in detail below. In addition, the difference between FIG. 9 and FIG. 10 in the third embodiment is the same as the difference between FIG. 3 and FIG. 4 in the first embodiment, that is, the relative positions of the third metal electrode M3 and the insulating layer 102 and the first metal electrode M1, the second metal electrode M2 and the semiconductor layer 103 on the substrate 101/transparent substrate 104 are different. Regardless of the type of device structure, infrared rays can be well sensed as described above, so that the method of forming the device structure has multiple options, and the device structure with multiple types can be applied to multiple different processes.

The descriptions about the material of the third metal electrode M3 of the third embodiment in FIGS. 9 to 10 , whether voltage can be applied to the third metal electrode M3 to sense infrared rays, and whether the third metal electrode M3 can block light from the opposite direction of the light source to be measured are basically the same as the description of the first embodiment above, and therefore will not be repeated here.

The description of the materials of the insulating layer 102 of the third embodiment in FIGS. 9 to 10 is basically the same as the description of the first embodiment above, and thus will not be repeated here.

The third embodiment is described with reference to FIGS. 9 to 10. In the third embodiment, the semiconductor layer projection of the semiconductor layer 103 on the transparent substrate 104 (corresponding to the double arrow 103' in the figure) has a middle portion (corresponding to the double arrow 103" in the figure) between the first metal electrode projection of the first metal electrode M1 on the transparent substrate 104 (corresponding to the double arrow M1' in the figure) and the second metal electrode projection of the second metal electrode M2 on the transparent substrate 104 (corresponding to the double arrow M2' in the figure), and the third metal electrode M3 has a third metal electrode projection on the transparent substrate 104 (corresponding to the double arrow M3' in the figure). It is basically the same as the third embodiment described above. In one embodiment, in the third embodiment, the entire middle portion also overlaps with the projection of the third metal electrode, that is, in the direction perpendicular to the transparent substrate 104, the projection of the third metal electrode M3 completely covers the projection of the semiconductor layer 103 between the first metal electrode M1 and the second metal electrode M2. For clarity of description, the first metal electrode projection, the second metal electrode projection, the third metal electrode projection, the semiconductor layer projection and the middle portion are respectively indicated in the figure by double arrows M1', double arrows M2', double arrows M3', double arrows 103' and double arrows 103" to indicate relative positions and sizes.

One aspect of the third embodiment is described in detail with reference to FIG. 9. In FIG. 9, the first metal electrode M1, the second metal electrode M2, and the semiconductor layer 103 are located above the third metal electrode M3 and the insulating layer 102. Specifically, the third metal electrode M3 is located on the transparent substrate 104; the insulating layer 102 covers the third metal electrode M3; and the first metal electrode M1, the second metal electrode M2, and the semiconductor layer 103 are located above the insulating layer 102.

Another aspect of the third embodiment is described in detail with reference to FIG. 10. In FIG. 10, the first metal electrode M1, the second metal electrode M2, and the semiconductor layer 103 are located below the third metal electrode M3 and the insulating layer 102. Specifically, the first metal electrode M1, the second metal electrode M2, and the semiconductor layer 103 are located on the transparent substrate 104; the insulating layer 102 is located above the first metal electrode M1, the second metal electrode M2, and the semiconductor layer 103; and the third metal electrode M3 is located on the insulating layer 102.

Next, the fourth embodiment of the device structure shown in FIG. 8 is described with reference to FIGS. 11A to 12C, wherein the device structure of the fourth embodiment further includes at least one third metal electrode M3 and an insulating layer 102 located on a transparent substrate 104. The device structure of the fourth embodiment differs from the device structure of the second embodiment described above with reference to FIGS. 5A to 6C in that the substrate may be different and the relative positions of the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2 are different. The remaining features are substantially the same as those of the device structure of the second embodiment, so the details may be referred to above, and may not be repeated below. In addition, the difference between the fourth embodiment and the second embodiment is the same as the difference between the second embodiment and the first embodiment, that is, in the direction perpendicular to the transparent substrate 104, the projection of the third metal electrode M3 of the fourth embodiment does not completely cover the projection of the semiconductor layer 103 between the first metal electrode M1 and the second metal electrode M2, that is, there is a gap between the projections. Therefore, in addition to the energy barrier A between the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2 as shown in FIG. 2, the semiconductor layer 103 of the fourth embodiment also has an energy barrier B corresponding to the position of the gap (see FIG. 7 for details). In addition, in the fourth embodiment, the difference between FIGS. 11A to 11C and FIGS. 12A to 12C is the same as the difference between FIGS. 5A to 5C and FIGS. 6A to 6C in the second embodiment, that is, the relative positions of the third metal electrode M3 and the insulating layer 102 and the first metal electrode M1, the second metal electrode M2 and the semiconductor layer 103 on the substrate 101/transparent substrate 104 are different. Regardless of the type of device structure, infrared rays can be well sensed as described above, so that the method of forming the device structure has multiple options, and the device structure with multiple types can be applied to multiple different processes.

The descriptions about the material of the third metal electrode M3 of the fourth embodiment in Figures 11A to 12C, whether voltage can be applied to the third metal electrode M3 to sense infrared rays (however, applying voltage can reduce the energy barrier B between the first part and the second part in the semiconductor layer 103 by illumination to increase the photocurrent), and whether the third metal electrode M3 can block light from the opposite direction of the light source to be measured are basically the same as the description of the second embodiment above, and therefore will not be repeated here.

The description of the materials of the insulating layer 102 of the fourth embodiment in FIGS. 11A to 12C is basically the same as the description of the second embodiment above, and thus will not be repeated here.

Basically the same as the second embodiment described above, in the fourth embodiment, when the at least one third metal electrode M3 is a third metal electrode M3, as shown in FIGS. 11A to 11B and FIGS. 12A to 12B, the third metal electrode projection of the third metal electrode M3 on the transparent substrate 104 (corresponding to the double arrow M3' in the figure) is separated from the first metal electrode projection of the first metal electrode M1 on the transparent substrate 104 (corresponding to the double arrow M1' in the figure); the third metal electrode M3 on the transparent substrate 104 The third metal electrode projection (corresponding to the double arrow M3' in the figure) is separated from the second metal electrode projection (corresponding to the double arrow M2' in the figure) of the second metal electrode M2 on the transparent substrate 104; or the third metal electrode projection (corresponding to the double arrow M3' in the figure) of the third metal electrode M3 on the transparent substrate 104 is separated from the first metal electrode projection (corresponding to the double arrow M1' in the figure) and the second metal electrode projection (corresponding to the double arrow M2' in the figure) of the first metal electrode M1 and the second metal electrode M2 on the transparent substrate 104. That is, in the direction perpendicular to the transparent substrate 104, the projection of the third metal electrode M3 does not completely cover the projection of the semiconductor layer 103 between the first metal electrode M1 and the second metal electrode M2. Therefore, the semiconductor layer 103 between the first metal electrode M1 and the second metal electrode M2 includes at least one first portion G and at least one second portion O (the positions are marked with dashed boxes in the figure), wherein the first portion G is the portion where the projection of the semiconductor layer 103 and the projection of the third metal electrode M3 do not overlap, and the second portion O is the portion where the projection of the semiconductor layer 103 and the projection of the third metal electrode M3 overlap. For clarity of explanation, the first metal electrode projection, the second metal electrode projection, and the third metal electrode projection are indicated in the figure by double arrows M1', M2', and M3' to indicate relative positions and sizes. Although not shown separately, the positions of the first metal electrode M1 and the second metal electrode M2 shown in FIG. 11A and FIG. 12A can be swapped so that the third metal electrode projection of the third metal electrode M3 on the transparent substrate 104 is separated from the first metal electrode projection of the first metal electrode M1 on the transparent substrate 104 .

Basically the same as the second embodiment described above, in the fourth embodiment, when at least one third metal electrode M3 is a plurality of third metal electrodes M3, as shown in FIG. 11C and FIG. 12C, these third metal electrodes M3 are separated from each other. That is, in the direction perpendicular to the transparent substrate 104, the projection of the third metal electrode M3 does not completely cover the projection of the semiconductor layer 103 between the first metal electrode M1 and the second metal electrode M2. Therefore, the semiconductor layer 103 between the first metal electrode M1 and the second metal electrode M2 includes at least one first portion G and at least one second portion O (the positions are marked with dashed boxes in the figure respectively), wherein the first portion G is the portion where the projection of the semiconductor layer 103 and the projection of the third metal electrode M3 do not overlap, and the second portion O is the portion where the projection of the semiconductor layer 103 and the projection of the third metal electrode M3 overlap. In addition, although not shown separately, the number of the third metal electrodes M3 is not limited to the number shown in the figure.

The fourth embodiment is described with reference to FIGS. 11A to 12C and FIG. 7. FIG. 7 is also a schematic diagram of the energy levels of the contact surface between the first portion G and the second portion O of the semiconductor layer 103 in the fourth embodiment (refer to the above for details, which will not be repeated here). Therefore, when a voltage is applied to the third metal electrode M3 of the fourth embodiment (refer to the method for sensing infrared rays below for details), the conduction band energy level E _SC and the valence band energy level E _SV of the first portion G will also generate an energy barrier B at the place where it contacts the second portion O. That is, the photocurrent flowing through the semiconductor layer 103 increases with the increase of light illumination, and sensing infrared rays by lowering the energy barrier B by illumination can make the device structure have good photoelectric conversion efficiency, such as an external quantum efficiency greater than 100%, and can also generate photocurrent in a weak light environment, such as an environment where the light illumination, intensity or power is substantially equal to zero. In some embodiments, the projection area of each first portion G in the semiconductor layer 103 on the transparent substrate 104 is preferably less than 100 μm ² and greater than 0 μm ² , such as 10 μm ² , 20 μm ² , 30 μm ² , 40 μm ² , 50 μm ² , 60 μm ² , 70 μm ² , 80 μm ² or 90 μm ² . If the area of the first part G is too large, the resistance may increase and the current may be reduced. If the projected area of the first part G is too small, the energy barrier B may not be generated.

The present disclosure also relates to a method for sensing infrared rays. The method includes the following operations. A light source (e.g., a light source containing infrared rays) is used to illuminate the above-mentioned device structure shown in FIG. 8, wherein the light source is incident on the side of the semiconductor layer 103 facing the transparent substrate 104. The first intensity of the light source is adjusted (e.g., through a lens, a collimator, or any feasible method, etc.) to a second intensity, so as to adjust the first energy barrier on the contact surface C between the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2 to a second energy barrier, wherein the second intensity is greater than the first intensity, and the second energy barrier is less than the first energy barrier (here, the first energy barrier and the second energy barrier correspond to the energy barrier A above, but the height of the second energy barrier is less than the height of the first energy barrier).

The present disclosure also relates to a method for sensing infrared rays. The method includes the following operations. Irradiate the component structure shown in Figures 9 to 10 in the third embodiment described above with a light source (e.g., a light source containing infrared rays). Apply a positive bias or a negative bias to the third metal electrode M3. Adjust the first intensity of the light source (e.g., through a lens, a collimator, or any feasible method, etc.) to a second intensity to adjust the first energy barrier on the contact surface C between the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2 to a second energy barrier, wherein the second intensity is greater than the first intensity, and the second energy barrier is less than the first energy barrier (here, the first energy barrier and the second energy barrier correspond to the energy barrier A above, but the height of the second energy barrier is less than the height of the first energy barrier). In some embodiments, the preferred forward bias voltage range is +0.5V to +25V, such as +0.5V, +1V, +5V, +10V, +15V, +20V or +25V, to obtain a larger photocurrent signal. In some embodiments, the preferred negative bias voltage range is -0.5V to -5V, such as -0.5V, -1V, -2V, -3V, -4V or -5V, to obtain a larger photocurrent signal.

The present disclosure also relates to a method for sensing infrared rays. The method includes the following operations: irradiating the device structure shown in FIGS. 11A to 12C in the fourth embodiment with a light source (e.g., a light source including infrared rays). Applying a positive bias or a negative bias to at least one third metal electrode M3. The first intensity of the light source is adjusted (for example, through a lens, a collimator or any feasible method) to a second intensity so as to adjust the first energy barrier on the contact surface C between the semiconductor layer 103 and the first metal electrode M1 and the second metal electrode M2 to a second energy barrier, and to adjust the third energy barrier on the contact surface between at least one first part G and at least one second part O to a fourth energy barrier, wherein the second intensity is greater than the first intensity, the second energy barrier is less than the first energy barrier, and the fourth energy barrier is less than the third energy barrier (here the first energy barrier and the second energy barrier correspond to the above energy barrier A, and the third energy barrier and the fourth energy barrier correspond to the above energy barrier B, but the height of the second energy barrier is less than the height of the first energy barrier, and the height of the fourth energy barrier is less than the height of the third energy barrier). In some embodiments, the preferred forward bias voltage range is +0.5V to +25V, such as +0.5V, +1V, +5V, +10V, +15V, +20V or +25V, to obtain a larger photocurrent signal. In some embodiments, the preferred negative bias voltage range is -0.5V to -5V, such as -0.5V, -1V, -2V, -3V, -4V or -5V, to obtain a larger photocurrent signal.

Next, only some embodiments are used to illustrate the component structures of the present disclosure. As long as the component structures have the features described above, they have the effects shown below. Therefore, the details of the embodiments should not limit the scope of the present disclosure.

In the embodiment 1 of FIG. 13A, FIG. 13B and FIG. 13C, the device structure has the structure of the first embodiment (refer to FIG. 3 to FIG. 4) or the third embodiment (FIG. 9 to FIG. 10) as described above. The first metal electrode M1 and the second metal electrode M2 each include molybdenum. The semiconductor layer 103 includes lead sulfide quantum dots. In Figures 13A, 13B and 13C, curves C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11 and C12 correspond to the changes in voltage and current when the intensity of infrared light is ~0W/m ² , 0.01W/m ² , 0.03W/m ² , 0.05W/m ^{2, 0.07W/m 2 ,} 0.09W/m ² , 0.1W/m ² , 0.3W/m ² , 0.5W/m ² , 0.7W/m ² , 0.9W/m ² and 1W/m ^2, respectively. Regardless of whether a positive bias, a negative bias, or a zero bias is applied to the third metal electrode M3, the current of the device structure increases as the intensity of the infrared ray increases. Moreover, when the intensity of the infrared ray is very small, it can be sensed that the current increases as the intensity increases.

In the embodiment 2 of FIG. 14A and FIG. 14B, the device structure has the structure of the second embodiment (refer to FIG. 5A to FIG. 6C) or the fourth embodiment (FIG. 11A to FIG. 12C) as described above. The first metal electrode M1 and the second metal electrode M2 each include molybdenum. The semiconductor layer 103 includes lead sulfide quantum dots. In FIG. 14A and FIG. 14B , curves C13 , C14 , C15 , C16 , C17 , C18 , C19 and C20 respectively correspond to the changes in voltage and current when the intensity of infrared light is ~0 W/m ² , 0.01 W/m ² , 0.03 W/m ² , 0.05 W/m ² , 0.1 W/m ² , 0.3 W/m ² , 0.5 W/m ² and 0.7 W/m ² . As can be seen from the figure, no matter whether a positive bias, a negative bias or a zero bias is applied to the third metal electrode M3, the current of the device structure increases with the increase of the intensity of the infrared ray, and when the intensity of the infrared ray is very small, it can be sensed that the current increases with the increase of the intensity.

In FIG. 15 , curve C21 corresponds to the change of unit area current and infrared intensity when the device structure has 100% external quantum efficiency, and curve C22 corresponds to the change of unit area current and infrared intensity of Example 2. As can be seen from the figure, due to the reduction of energy barrier caused by the above-mentioned illumination, the device structure of the present disclosure has an external quantum efficiency greater than 100%.

For the sake of simplicity, it is not shown in the present disclosure. However, different combinations of the semiconductor layer 103, the first metal electrode M1 and the second metal electrode M2 of the present disclosure can achieve the effects shown in the above embodiments, but the wavelengths of infrared rays absorbed may be different. For example, in an embodiment where the semiconductor layer 103 includes InSb, InAs, HgCdTe, PbS, PbSe, Ge, Si, GaSb, InGaAs, InTlAs, InAsSb, GaAsSb, InAsP, InGaAsP, GaInSb, AlGaAsSb, AlInSb, GaAsP, AlGaAs, AlAsSb or an organic material (such as P3HT, PCBM, PTB7, MEH-PPV, PEDOT:PSS or PCDTBT, etc.), the device structure senses energies of approximately 0.17 eV, 0.36 eV, 0.1 eV to 0.8 eV, 0.37 eV, 0.27 eV, 0.67 eV, 1.12 eV, 0.73 eV, 0.35 eV to 1.42 eV, 0.15 eV to 0.5 eV, 0.17 eV to 0.73 eV, 0.36 eV to 1.43 eV, 0.36 eV to 1.35 eV, 0.35 eV to 1.42 eV, 0.17 eV to 0.73 eV, 0.73 eV to 2.16 eV, 0.17 eV to 2.39 eV, 1.42 eV to 1.93 eV, 1.42 eV to 2.16 eV, 0.73 eV to 2.39 eV, or 1 eV to 3 eV and including wavelengths of infrared.

The device structure disclosed herein can well sense infrared rays, for example, the photocurrent increases significantly with the increase of the illumination, intensity or power of the light, and can sense infrared rays even under weak light sources. The device structure disclosed herein also has good photoelectric conversion efficiency, for example, an external quantum efficiency greater than 100%. In addition, the device structure disclosed herein has various forms for application in various semiconductor manufacturing processes.

The present disclosure is described in considerable detail in some embodiments, but other embodiments may also be possible, and thus the description of the embodiments contained in the present disclosure should not limit the scope and spirit of the appended patent applications.

For those with ordinary knowledge in the art, modifications and changes may be made to the present disclosure without departing from the scope and spirit of the present disclosure. As long as the above modifications and changes fall within the scope and spirit of the attached patent application, the present disclosure covers these modifications and changes.

101 : substrate 102 : insulating layer 102A : silicon dioxide layer 102B : silicon nitride layer 103 : semiconductor layer 103' : double arrow 103" : double arrow 104 : transparent substrate A : energy barrier B : energy barrier C : contact surface C1～C22 : curve E _MF,1 : Fermi level E _MF,2 : Fermi level E _SC : conduction band energy level E _SF : Fermi level E _SV : valence band energy level G : first part G' : double arrow M1 : first metal electrode M1' : double arrow M2 : second metal electrode M2' : Double arrow M3: Third metal electrode M3': Double arrow O: Second part O': Double arrow

When reading the drawings of the present disclosure, it is recommended to understand the various aspects of the present disclosure from the following description. It should be noted that, in accordance with standard industry practices, various feature sizes may not be drawn to scale. In order to make the discussion clear, the various feature sizes may be increased or decreased at will. In addition, in order to simplify the drawings, conventional structures and components will be shown in a simple schematic manner in the drawings. Figure 1 is a cross-sectional view of the infrared sensing component structure according to some embodiments of the present disclosure. Figure 2 is a schematic diagram of the energy level between the semiconductor layer and the first metal electrode or the second metal electrode in the infrared sensing component structure according to some embodiments of the present disclosure. Figures 3 to 4 are cross-sectional views of the infrared sensing component structure according to the first embodiment of the present disclosure. Figures 5A to 6C are cross-sectional views of the infrared sensing device structure according to the second embodiment of the present disclosure. Figure 7 is a schematic diagram of the energy level of the semiconductor layer in the infrared sensing device structure according to some embodiments of the present disclosure. Figure 8 is a cross-sectional view of the infrared sensing device structure according to some embodiments of the present disclosure. Figures 9 to 10 are cross-sectional views of the infrared sensing device structure according to the third embodiment of the present disclosure. Figures 11A to 12C are cross-sectional views of the infrared sensing device structure according to the fourth embodiment of the present disclosure. Figures 13A to 14B are curves of the changes in voltage and current of the infrared sensing device structure according to some embodiments of the present disclosure, as the illumination, intensity or power changes. Figure 15 is a graph showing the structure of an infrared sensing element according to some implementation methods of the present disclosure, where the current per unit area varies with intensity.

Domestic storage information (please note in the order of storage institution, date, and number) None Foreign storage information (please note in the order of storage country, institution, date, and number) None

101: Substrate 103: Semiconductor layer M1: First metal electrode M2: Second metal electrode C: Contact surface

Claims (11)

A device structure for sensing infrared rays includes: a substrate; a first metal electrode and a second metal electrode located on the substrate; a semiconductor layer located on the substrate, wherein the semiconductor layer is located between and above the first metal electrode and the second metal electrode, the semiconductor layer directly contacts the first metal electrode and the second metal electrode, the first metal electrode and the second metal electrode independently include aluminum, nickel, titanium, molybdenum, chromium, gold, silver, copper or a combination thereof, and the semiconductor layer includes InSb, InAs, HgCdTe, PbS, PbSe, Ge, Si, GaSb, InGaAs, InTlAs, InAsSb, GaAsSb, InAsP, InGaAsP, GaInSb, AlGaAsSb, AlInSb, GaAsP, AlGaAs, AlAsSb, pentacene, anthracene, tetracene, perylene, tetrahydroanthracene, tetrahydro-2,3-naphthodihydro-1,4-diazopyridine, benzodiazopyridine, poly(3-hexylthiophene), phenyl-C ₆₁ -butyric acid methyl ester, poly [[4,8-bis [(2-ethylhexyl) oxy] benzo [1,2-b: 4,5-b'] dithiophene-2,6-diyl] [3-fluoro-2- [(2-ethylhexyl) carbonyl] thieno [3,4-b] thiophene diyl]], poly [2-methoxy-5- (2'-ethylhexyloxy) -1,4-phenylene], poly (3,4-ethylenedioxythiophene) polystyrene sulfonate, poly [N-9'-heptadecanyl-2,7-carbazole-5,5- (4',7'-di-2-thienyl-2',1',3'-benzothiadiazole)], CuInSe ₂ , CuInS ₂ , CuGaSe ₂ , CuGaS ₂ , Cu ₂ ZnSnS ₄ , Cu ₂ ZnSnSe ₄ , Bi ₂ Te ₃ , Sb ₂ Te ₃ , ZnO, ZnTe, CdTe, CdSe, CdS, SnS, SnSe, TiO ₂ , CsPbBr ₃ , CsPbI ₃ , AgGaSe ₂ , AgGaS ₂ , molybdenum disulfide two-dimensional material, carbon nanotubes, mercury telluride or a combination thereof; at least one third metal electrode is located on the substrate, wherein the semiconductor layer has a middle portion located between the first metal electrode and the second metal electrode, the middle portion includes at least one first portion and at least one second portion, a projection of the at least one first portion on the substrate does not overlap with a projection of the at least one third metal electrode on the substrate, and a projection of the at least one second portion on the substrate overlaps with the projection of the third metal electrode; and an insulating layer is located on the substrate, wherein the at least one third metal electrode is separated from the first metal electrode and the second metal electrode by the insulating layer. The device structure as described in claim 1, wherein the substrate is formed by a process with a process temperature less than 600°C, and the substrate includes quartz, plastic, stainless steel, silicon crystal, sapphire, gallium nitride or a combination thereof. The device structure as described in claim 1, wherein a projection area of each of the at least one first portion on the substrate is less than 100um ² . A method for sensing infrared rays, comprising: irradiating a device structure as described in any one of claim 1 or 3 with a light source; applying a positive bias or a negative bias to the at least one third metal electrode; and adjusting a first intensity of the light source to a second intensity to adjust a first energy barrier on a contact surface between the semiconductor layer and the first metal electrode and the second metal electrode to a second energy barrier, and adjusting a third energy barrier on a contact surface between the at least one first part and the at least one second part to a fourth energy barrier, wherein the second intensity is greater than the first intensity, the second energy barrier is less than the first energy barrier, and the fourth energy barrier is less than the third energy barrier. A method for sensing infrared rays, comprising: irradiating a component structure for sensing infrared rays with a light source, wherein: the component structure comprises: a substrate; a first metal electrode and a second metal electrode are located on the substrate; and a semiconductor layer is located on the substrate, wherein the semiconductor layer is located between and above the first metal electrode and the second metal electrode, the semiconductor layer directly contacts the first metal electrode and the second metal electrode, the first metal electrode and the second metal electrode are independently composed of aluminum, nickel, titanium, molybdenum, chromium, gold, silver, copper or a combination thereof, and the semiconductor layer is located between and above the first metal electrode and the second metal electrode, and the semiconductor layer is located between and above the first metal electrode and the second metal electrode, and the semiconductor layer directly contacts the first metal electrode and the second metal electrode, and the first metal electrode and the second metal electrode are independently composed of aluminum, nickel, titanium, molybdenum, chromium, gold, silver, copper or a combination thereof, and the semiconductor layer is located between and above the first metal electrode and the second metal electrode ... The bulk layer includes InSb, InAs, HgCdTe, PbS, PbSe, Ge, Si, GaSb, InGaAs, InTlAs, InAsSb, GaAsSb, InAsP, InGaAsP, GaInSb, AlGaAsSb, AlInSb, GaAsP, AlGaAs, AlAsSb, pentacene, anthracene, tetracene, perylene, tetrahydroanthracene, tetrahydro-2,3-naphthodihydro-1,4-diazopyridine, benzodiazine, poly(3-hexylthiophene), phenyl-C ₆₁ -butyric acid methyl ester, poly [[4,8-bis [(2-ethylhexyl) oxy] benzo [1,2-b: 4,5-b'] dithiophene-2,6-diyl] [3-fluoro-2- [(2-ethylhexyl) carbonyl] thieno [3,4-b] thiophene diyl]], poly [2-methoxy-5- (2'-ethylhexyloxy) -1,4-phenylene], poly (3,4-ethylenedioxythiophene) polystyrene sulfonate, poly [N-9'-heptadecanyl-2,7-carbazole-5,5- (4',7'-di-2-thienyl-2',1',3'-benzothiadiazole)], CuInSe ₂ , CuInS ₂ , CuGaSe ₂ , CuGaS ₂ , Cu ₂ ZnSnS ₄ , Cu ₂ ZnSnSe ₄ , Bi ₂ Te ₃ , Sb ₂ Te ₃ , ZnO, ZnTe, CdTe, CdSe, CdS, SnS, SnSe, TiO ₂ , CsPbBr ₃ , CsPbI ₃ , AgGaSe ₂ , AgGaS ₂ , molybdenum disulfide two-dimensional material, carbon nanotubes, mercury telluride or a combination thereof; and when the substrate includes an opaque substrate, the light source is incident on a side of the semiconductor layer facing away from the substrate, and when the substrate includes a transparent substrate, the light source is incident on the side of the semiconductor layer facing away from the substrate, a side facing the substrate or a combination thereof; and a first intensity of the light source is adjusted to a second intensity to adjust a first energy barrier on a contact surface between the semiconductor layer and the first metal electrode and the second metal electrode to a second energy barrier, wherein the second intensity is greater than the first intensity, and the second energy barrier is less than the first energy barrier. A method for sensing infrared rays, comprising: irradiating an infrared ray sensing device structure with a light source, wherein the device structure comprises: a substrate; a first metal electrode and a second metal electrode located on the substrate; a semiconductor layer located on the substrate, wherein the semiconductor layer is located between and above the first metal electrode and the second metal electrode, the semiconductor layer directly contacts the first metal electrode and the second metal electrode, the first metal electrode and the second metal electrode independently comprise aluminum, nickel, titanium, molybdenum, chromium, gold, silver, copper or a combination thereof, and the semiconductor layer comprises InSb, InAs, HgCdTe, PbS, PbSe, Ge, Si 、GaSb、InGaAs、InTlAs、InAsSb、GaAsSb、InAsP、InGaAsP、GaInSb、AlGaAsSb、AlInSb、GaAsP、AlGaAs、AlAsSb、pentaphenyl、Anthracene、tetraphenyl、perylene、tetrahydroanthracene、tetrahydro-2,3-naphthodihydro-1,4-diazopyridine、benzodiazopyridine、poly(3-hexylthiophene),phenyl-C ₆₁ -butyric acid methyl ester, poly [[4,8-bis [(2-ethylhexyl) oxy] benzo [1,2-b: 4,5-b'] dithiophene-2,6-diyl] [3-fluoro-2- [(2-ethylhexyl) carbonyl] thieno [3,4-b] thiophene diyl]], poly [2-methoxy-5- (2'-ethylhexyloxy) -1,4-phenylene], poly (3,4-ethylenedioxythiophene) polystyrene sulfonate, poly [N-9'-heptadecanyl-2,7-carbazole-5,5- (4',7'-di-2-thienyl-2',1',3'-benzothiadiazole)], CuInSe ₂ , CuInS ₂ , CuGaSe ₂ , CuGaS ₂ , Cu ₂ ZnSnS ₄ , Cu ₂ ZnSnSe ₄ , Bi ₂ Te ₃ , Sb ₂ Te ₃ , ZnO, ZnTe, CdTe, CdSe, CdS, SnS, SnSe, TiO ₂ , CsPbBr ₃ , CsPbI ₃ , AgGaSe ₂ , AgGaS ₂ , molybdenum disulfide two-dimensional material, carbon nanotubes, mercury telluride or a combination thereof; a third metal electrode is located on the substrate; and an insulating layer is located on the substrate, wherein the third metal electrode is separated from the first metal electrode and the second metal electrode by the insulating layer, and the semiconductor layer projection on the substrate has a middle portion between a first metal electrode projection of the first metal electrode on the substrate and a second metal electrode projection of the second metal electrode on the substrate, and the third metal electrode is located on the substrate. The three metal electrodes have a third metal electrode projection on the substrate, and the entire middle part overlaps with the third metal electrode projection; a positive bias or a negative bias is applied to the third metal electrode; and a first intensity of the light source is adjusted to a second intensity to adjust a first energy barrier on a contact surface between the semiconductor layer and the first metal electrode and the second metal electrode to a second energy barrier, wherein the second intensity is greater than the first intensity, and the second energy barrier is less than the first energy barrier. The method as claimed in claim 6, wherein the positive bias voltage is from +0.5V to +25V, and the negative bias voltage is from -0.5V to -5V. A device structure for sensing infrared rays includes: a transparent substrate; a first metal electrode and a second metal electrode located on the transparent substrate; a semiconductor layer located on the transparent substrate, wherein the semiconductor layer is located below the first metal electrode and the second metal electrode, the semiconductor layer directly contacts the first metal electrode and the second metal electrode, the first metal electrode and the second metal electrode independently include aluminum, nickel, titanium, molybdenum, chromium, gold, silver, copper or a combination thereof, and the semiconductor layer includes InSb, InAs, HgCdTe, PbS, PbSe, Ge, Si, GaSb, InGaAs, InTlAs, InAsSb, GaAsSb, InAsP, InGaAsP, GaInSb, AlGaAsSb, AlInSb, GaAsP, AlGaAs, AlAsSb, pentacene, anthracene, tetracene, perylene, tetrahydroanthracene, tetrahydro-2,3-naphthodihydro-1,4-diazolide, benzodiazolide, poly(3-hexylthiophene), phenyl-C ₆₁ -methyl butyrate, poly[[4,8-bis[(2-ethylhexyl)oxy]benzo[1,2-b:4,5-b']dithiophene-2,6-diyl][3-fluoro-2-[(2-ethylhexyl)carbonyl]thieno[3,4-b]thiophenediyl]], poly[2-methoxy-5-(2'-ethylhexyloxy)-1,4-styrene], poly(3,4-ethylenedioxythiophene) polystyrene sulfonate, poly[N-9'-heptadecanyl-2,7-carbazole-5,5-(4',7'-di-2-thienyl-2',1',3'-benzothiadiazole)], CuInSe ₂ , CuInS ₂ , CuGaSe ₂ , CuGaS ₂ , Cu ₂ ZnSnS ₄ , Cu ₂ ZnSnSe ₄ , Bi ₂ Te _3. Sb ₂ Te ₃ , ZnO, ZnTe, CdTe, CdSe, CdS, SnS, SnSe, TiO ₂ , CsPbBr ₃ , CsPbI ₃ , AgGaSe ₂ , AgGaS ₂ , molybdenum disulfide two-dimensional material, carbon nanotubes, mercury telluride or a combination thereof; at least one third metal electrode is located on the transparent substrate, wherein the semiconductor layer has a middle portion located between the first metal electrode and the second metal electrode, the middle portion includes at least one first portion and at least one second portion, a projection of the at least one first portion on the transparent substrate does not overlap with a projection of the at least one third metal electrode on the transparent substrate, and a projection of the at least one second portion on the transparent substrate overlaps with the projection of the third metal electrode; and an insulating layer is located on the transparent substrate, wherein the at least one third metal electrode is separated from the first metal electrode and the second metal electrode by the insulating layer. A method for sensing infrared rays, comprising: irradiating the device structure as described in claim 8 with a light source; applying a positive bias or a negative bias to the at least one third metal electrode; and adjusting a first intensity of the light source to a second intensity, so as to adjust a first energy barrier on a contact surface between the semiconductor layer and the first metal electrode and the second metal electrode to a second energy barrier, and adjusting a third energy barrier on a contact surface between the at least one first part and the at least one second part to a fourth energy barrier, wherein the second intensity is greater than the first intensity, the second energy barrier is less than the first energy barrier, and the fourth energy barrier is less than the third energy barrier. A method for sensing infrared rays, comprising: irradiating an infrared ray sensing element structure with a light source, wherein: the element structure comprises: a transparent substrate; a first metal electrode and a second metal electrode are located on the transparent substrate; and a semiconductor layer is located on the transparent substrate, wherein the semiconductor layer is located below the first metal electrode and the second metal electrode, the semiconductor layer directly contacts the first metal electrode and the second metal electrode, the first metal electrode and the second metal electrode independently comprise aluminum, nickel, titanium, molybdenum, chromium, gold, silver, copper or a combination thereof, and the semiconductor layer comprises InSb, InAs, HgCdTe, PbS, PbSe, Ge, Si, GaSb, InGaAs, InTlAs, InAsSb, GaAsSb, InAsP, InGaAsP, GaInSb, AlGaAsSb, AlInSb, GaAsP, AlGaAs, AlAsSb, pentacene, anthracene, tetracene, perylene, tetrahydroanthracene, tetrahydro-2,3-naphthodihydro-1,4-diazopyridine, benzodiazopyridine, poly(3-hexylthiophene), phenyl-C ₆₁ -methyl butyrate, poly[[4,8-bis[(2-ethylhexyl)oxy]benzo[1,2-b:4,5-b']dithiophene-2,6-diyl][3-fluoro-2-[(2-ethylhexyl)carbonyl]thieno[3,4-b]thiophenediyl]], poly[2-methoxy-5-(2'-ethylhexyloxy)-1,4-styrene], poly(3,4-ethylenedioxythiophene) polystyrene sulfonate, poly[N-9'-heptadecanyl-2,7-carbazole-5,5-(4',7'-di-2-thienyl-2',1',3'-benzothiadiazole)], CuInSe ₂ , CuInS ₂ , CuGaSe ₂ , CuGaS ₂ , Cu ₂ ZnSnS ₄ , Cu ₂ ZnSnSe ₄ , Bi ₂ Te ₃ , _Sb2Te3 , ZnO, ZnTe, CdTe, CdSe, CdS, SnS, SnSe, _TiO2 , _CsPbBr3 , _CsPbI3 , _AgGaSe2 , _AgGaS2 , molybdenum disulfide two-dimensional material, carbon nanotubes, mercury telluride or a combination thereof; _and the light source is incident toward a side of the semiconductor layer facing the transparent substrate; and a first intensity of the light source is adjusted to a second intensity to adjust a first energy barrier on a contact surface between the semiconductor layer and the first metal electrode and the second metal electrode to a second energy barrier, wherein the second intensity is greater than the first intensity, and the second energy barrier is less than the first energy barrier. A method for sensing infrared rays comprises: irradiating an infrared ray sensing component structure with a light source, wherein the component structure comprises: a transparent substrate; a first metal electrode and a second metal electrode are located on the transparent substrate; a semiconductor layer is located on the transparent substrate, wherein the semiconductor layer is located below the first metal electrode and the second metal electrode, the semiconductor layer directly contacts the first metal electrode and the second metal electrode, the first metal electrode and the second metal electrode independently comprise aluminum, nickel, titanium, molybdenum, chromium, gold, silver, copper or a combination thereof, and the semiconductor layer is located below the first metal electrode and the second metal electrode, and the semiconductor layer directly contacts the first metal electrode and the second metal electrode, wherein the first metal electrode and the second metal electrode independently comprise aluminum, nickel, titanium, molybdenum, chromium, gold, silver, copper or a combination thereof, and the semiconductor layer is located below the first metal electrode and the second metal electrode ... The bulk layer includes InSb, InAs, HgCdTe, PbS, PbSe, Ge, Si, GaSb, InGaAs, InTlAs, InAsSb, GaAsSb, InAsP, InGaAsP, GaInSb, AlGaAsSb, AlInSb, GaAsP, AlGaAs, AlAsSb, pentacene, anthracene, tetracene, perylene, tetrahydroanthracene, tetrahydro-2,3-naphthodihydro-1,4-diazopyridine, benzodiazine, poly(3-hexylthiophene), phenyl-C ₆₁ -butyric acid methyl ester, poly [[4,8-bis [(2-ethylhexyl) oxy] benzo [1,2-b: 4,5-b'] dithiophene-2,6-diyl] [3-fluoro-2- [(2-ethylhexyl) carbonyl] thieno [3,4-b] thiophene diyl]], poly [2-methoxy-5- (2'-ethylhexyloxy) -1,4-phenylene], poly (3,4-ethylenedioxythiophene) polystyrene sulfonate, poly [N-9'-heptadecanyl-2,7-carbazole-5,5- (4',7'-di-2-thienyl-2',1',3'-benzothiadiazole)], CuInSe ₂ , CuInS ₂ , CuGaSe ₂ , CuGaS ₂ , Cu ₂ ZnSnS ₄ , Cu ₂ ZnSnSe ₄ , Bi ₂ Te ₃ , Sb ₂ Te ₃ , ZnO, ZnTe, CdTe, CdSe, CdS, SnS, SnSe, TiO ₂ , CsPbBr ₃ , CsPbI ₃ , AgGaSe ₂ , AgGaS ₂ , molybdenum disulfide two-dimensional material, carbon nanotubes, mercury telluride or a combination thereof; a third metal electrode is located on the transparent substrate; and an insulating layer is located on the transparent substrate, wherein the third metal electrode is separated from the first metal electrode and the second metal electrode by the insulating layer, and the semiconductor layer projection on the transparent substrate has a middle portion between a first metal electrode projection of the first metal electrode on the transparent substrate and a second metal electrode projection of the second metal electrode on the transparent substrate. The third metal electrode has a third metal electrode projection on the transparent substrate, and the entire middle portion overlaps with the third metal electrode projection; a positive bias voltage or a negative bias voltage is applied to the third metal electrode; and a first intensity of the light source is adjusted to a second intensity to adjust a first energy barrier on a contact surface between the semiconductor layer and the first metal electrode and the second metal electrode to a second energy barrier, wherein the second intensity is greater than the first intensity, and the second energy barrier is less than the first energy barrier.

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