TWI858538B - Mounting structure for semiconductor element, and combination of semiconductor element and substrate - Google Patents

Abstract

A mounting structure for a semiconductor element, in which a semiconductor element having an element electrode, and a substrate having a substrate electrode provided at a position opposed to the element electrode on a surface of the substrate facing the semiconductor element, are connected via the element electrode and the substrate electrode, and in which one of the element electrode or the substrate electrode is a first protruding electrode having a solder layer on a tip portion, the other of the element electrode or the substrate electrode is a first electrode pad having one or more metal protrusions on a surface of the electrode pad, the metal protrusion of the first electrode pad penetrates into the solder layer of the first protruding electrode, and a bottom area of the metal protrusion of the first electrode pad is less than 70% of an area of the first electrode pad, or less than 75% of a maximum cross-sectional area of the solder layer of the first protruding electrode having the solder layer on the tip portion.

Description

Semiconductor device mounting structure and combination of semiconductor device and substrate

The present invention relates to a semiconductor element mounting structure and a combination of the semiconductor element and a substrate.

Previously, as a method of mounting semiconductor components on a substrate, a wire bonding connection method using a fine metal wire such as a gold wire is known. On the other hand, in order to meet the requirements for miniaturization, thinness, high functionality, high integration, and high speed of semiconductor devices, a flip chip connection method (FC (Flip Chip) connection method) is being promoted, which connects semiconductor components to substrates via conductive protrusions called bumps. In order to connect semiconductor components to substrates, the FC connection method is being actively used in ball grid arrays (BGA), chip size packages (CSP), etc. The chip on board (COB) type connection method is also equivalent to the FC connection method. In addition, the FC connection method is also widely used in a chip on chip (COC) type connection method for connecting semiconductor devices (for example, refer to patent document 1).

In order to meet the requirements for further miniaturization, thinning and high functionality of semiconductor devices, chip stacking and layered packaging (Package On Package, POP) using the above-mentioned connection method are becoming popular. In addition, the through-silicon via (TSV) method is also beginning to become widely popular. This type of stacking and multi-segmentation technology can reduce the packaging area compared to the method of arranging semiconductor components in two dimensions because semiconductor components are arranged in three dimensions. In particular, TSV technology is also effective in improving semiconductor performance, reducing noise, reducing mounting area and saving power, and has attracted attention as the next generation of semiconductor wiring technology.

Conductive materials are used in the connection parts including bumps or wiring. Specific examples of conductive materials include solder, tin, gold, silver, copper, nickel, and metal materials containing multiple types of these materials. If an oxide film is generated on the surface of the metal constituting the connection part, or impurities such as oxides are attached, there is a concern that the connectivity and insulation reliability between the circuit components to be connected will be reduced, and the advantages of adopting the above connection method will be impaired. As a method for suppressing such undesirable conditions, there is a method of applying a pre-solder (Preflux) or a rust-proof treatment agent used in the organic solderability preservatives (OSP) treatment to at least one of the substrate surface and the surface of the semiconductor element for pre-treatment before connection. However, there is a case where the pre-solder, anti-rust treatment agent, etc. remain in the connection portion after the pre-treatment, and the remaining pre-solder, anti-rust treatment agent, etc. deteriorate, thereby reducing the connection reliability of the connection portion.

On the other hand, by using a semiconductor adhesive to seal the connection between a semiconductor element and a substrate, electrical connection between circuit components and sealing of the connection can be performed at the same time. Therefore, oxidation of the metal used in the connection, adhesion of impurities to the connection, etc. can be suppressed, and the connection can be protected from the influence of the external environment. Therefore, connectivity, insulation reliability, workability, productivity, etc. can be effectively improved.

In addition, when a semiconductor device is manufactured using the FC connection method, the difference in thermal expansion coefficients between the semiconductor element and the substrate, or the difference in thermal expansion coefficients between the semiconductor elements, may cause thermal stress to concentrate on the connection portion, resulting in poor connection. In order to prevent poor connection caused by the difference in thermal expansion coefficients, it is effective to seal the gap between two adjacent circuit components (semiconductor element, substrate, etc.) using an adhesive composition. In particular, there are many cases where components with different thermal expansion coefficients are used in the semiconductor element and the substrate, so it is required to seal the semiconductor device using an adhesive composition to improve heat shock resistance.

The FC connection method using adhesive composition can be roughly divided into a capillary flow method and a pre-applied method (for example, refer to patent document 2 to patent document 6). The capillary flow method is a method of injecting a liquid adhesive composition into the gap between the semiconductor element and the substrate by the capillary phenomenon after the semiconductor element and the substrate are connected. The pre-applied method is a method of supplying a paste or film adhesive composition to the semiconductor element or the substrate before the semiconductor element and the substrate are connected.

In addition, the following semiconductor element mounting structure has been disclosed, which, in order to improve the bonding strength between the protruding electrode of the semiconductor element and the electrode pad of the mounting wiring substrate and improve the mounting reliability, is a semiconductor element having a protruding electrode formed on the element surface and a wiring substrate having an electrode pad provided with a metal protrusion formed on the upper surface of an insulating substrate facing the protruding electrode, so that the protruding electrode and the metal protrusion are aligned. The structure is characterized in that the top of the metal protrusion is sunken into the protruding electrode, and the angle formed by the side surface of the metal protrusion and the upper surface of the electrode pad, and the angle formed by the side surface of the metal protrusion and the side surface of the protruding electrode in the joint portion is 90° or more (for example, refer to Patent Document 7). [Prior art literature] [Patent literature]

[Patent Document 1] Japanese Patent Publication No. 2008-294382 [Patent Document 2] Japanese Patent Publication No. 2001-223227 [Patent Document 3] Japanese Patent Publication No. 2002-283098 [Patent Document 4] Japanese Patent Publication No. 2005-272547 [Patent Document 5] Japanese Patent Publication No. 2006-169407 [Patent Document 6] Japanese Patent Publication No. 2006-188573 [Patent Document 7] Japanese Patent Publication No. 2003-45911

[Problem to be solved by the invention] Generally, in the manufacture of semiconductor devices in the pre-coating method using an adhesive composition (underfill material), the underfill material is applied between the semiconductor element and the substrate and the underfill material is heated and cured. Currently, in this method, the underfill material is applied between the semiconductor element and the substrate and the underfill material is heated and cured for each semiconductor device. Therefore, the production efficiency of the manufacture of semiconductor devices using underfill material in the existing pre-coating method is poor, and improving the production efficiency has become an important issue.

In addition, as a method of FC connection that can achieve low cost, there is a method using conductive paste. This method is a method of transferring the conductive paste to the tip of the protruding electrode after forming the protruding electrode in the semiconductor element, and making the protruding electrode contact the substrate electrode to obtain electrical conduction. The connection resistance in this method depends on the thickness of the conductive paste, the filling rate of the conductive particles, etc., and generally, the problem is that the connection resistance becomes higher than that of soldering.

To solve the above situation, the following method can be considered: after temporarily mounting the semiconductor element on the substrate without an adhesive composition, soldering is performed by reflow, and the bottom filler is applied by capillary flow and the bottom filler is hardened by heating. However, with the development of miniaturization of semiconductor devices in recent years, the connection parts including bumps or wiring of semiconductor elements represented by memory and logic elements are also becoming narrower in pitch. Therefore, if the semiconductor element is temporarily mounted on the substrate without an adhesive composition and soldering is performed by reflow, there is a possibility that vibration occurs during reflow as a heating step, and the position of the connection part is shifted during the operation of the substrate. In addition, the semiconductor components are very unstable after being temporarily mounted by TSV, so for the same reason, if they are soldered together by reflow, there is a possibility that the connection part will be offset. The connection part will deteriorate due to the positional offset, which will lead to the connection accuracy between the semiconductor component and the substrate.

One form of the present invention is made in view of the above-mentioned previous situation, and its purpose is to provide a semiconductor element mounting structure with excellent connection accuracy between the semiconductor element and the substrate. In addition, another form of the present invention aims to provide a combination of a semiconductor element and a substrate in which positional deviation in the connection portion between the semiconductor element and the substrate is difficult to occur. [Means for solving the problem]

The specific means for achieving the above-mentioned subject are as follows. ＜1＞ A mounting structure for a semiconductor element, wherein a semiconductor element having an element electrode and a substrate having a substrate electrode are connected via the element electrode and the substrate electrode, wherein the substrate electrode is disposed on a surface facing the semiconductor element at a position facing the element electrode, one of the element electrode and the substrate electrode is a first protruding electrode having a solder layer at a front end, the other of the element electrode and the substrate electrode is a first electrode pad having one or more metal protrusions on a surface, the metal protrusion of the first electrode pad penetrates into the solder layer of the first protruding electrode, and The bottom area of the metal protrusion of the first electrode pad is less than 75% of the maximum cross-sectional area of the solder layer of the first protruding electrode having the solder layer at the front end. <2> A semiconductor element mounting structure as described in <1>, wherein one or more other semiconductor elements are stacked on the side of the semiconductor element opposite to the side facing the substrate, with the semiconductor elements connected to each other via element electrodes. Among the two semiconductor elements in a connected relationship, one of the element electrodes of one semiconductor element and the element electrodes of the other semiconductor element is a second protruding electrode having a solder layer at the front end. The other of the element electrodes of one semiconductor element and the element electrodes of the other semiconductor element is a second electrode pad having one or more metal protrusions on the surface. The metal protrusion of the second electrode pad penetrates the solder layer of the second protruding electrode, and the bottom area of the metal protrusion of the second electrode pad is 75% or less relative to the maximum cross-sectional area of the solder layer of the second protruding electrode having the solder layer at the front end. <3> A semiconductor element mounting structure as described in <1> or <2>, wherein the metal protrusion is in the shape of a cylinder or a rectangular parallelepiped. <4> A semiconductor element mounting structure as described in any one of <1> to <3>, wherein the metal protrusion is in the shape of at least two cylinders or rectangular parallelepipeds overlapping in the height direction. <5> A semiconductor element mounting structure as described in any one of <1> to <4>, wherein the metal protrusion is formed by photolithography. <6> A semiconductor element mounting structure as described in any one of <1> to <5>, wherein the semiconductor element and the substrate are temporarily fixed by applying pressure so that at least a portion of the metal protrusion of the first electrode pad penetrates into the solder layer of the first protruding electrode, and the element electrode and the substrate electrode are connected by heating to melt the solder layer of the first protruding electrode. <7> A combination of a semiconductor element and a substrate, comprising: a semiconductor element having an element electrode; and a substrate having a substrate electrode disposed on a surface on a side facing the semiconductor element and facing the element electrode; One of the element electrode and the substrate electrode is a protruding electrode having a solder layer at a front end portion, The other of the element electrode and the substrate electrode is an electrode pad having one or more metal protrusions on a surface, and The bottom area of the metal protrusion is 75% or less relative to the maximum cross-sectional area of the solder layer of the protruding electrode having the solder layer at the front end portion. <8> A mounting structure for a semiconductor element, wherein a semiconductor element having an element electrode and a substrate having a substrate electrode are connected via the element electrode and the substrate electrode, wherein the substrate electrode is disposed on a surface facing the semiconductor element at a position facing the element electrode, one of the element electrode and the substrate electrode is a first protruding electrode having a solder layer at a front end, the other of the element electrode and the substrate electrode is a first electrode pad having one or more metal protrusions on a surface, the metal protrusion of the first electrode pad penetrates into the solder layer of the first protruding electrode, and Relative to the area of the first electrode pad, the bottom area of the metal protrusion of the first electrode pad is less than 70%. <9> A semiconductor element mounting structure as described in <8>, wherein one or more other semiconductor elements are stacked on the side of the semiconductor element opposite to the side facing the substrate, with the semiconductor elements connected to each other via element electrodes. Among the two semiconductor elements in a connected relationship, one of the element electrodes of one semiconductor element and the element electrodes of the other semiconductor element is a second protruding electrode having a solder layer at the front end. The other of the element electrodes of one semiconductor element and the element electrodes of the other semiconductor element is a second electrode pad having one or more metal protrusions on the surface. The metal protrusion of the second electrode pad penetrates the solder layer of the second protruding electrode, and the bottom area of the metal protrusion of the second electrode pad is less than 70% relative to the area of the second electrode pad. <10> A semiconductor element mounting structure as described in <8> or <9>, wherein the metal protrusion is in the shape of a cylinder or a rectangular parallelepiped. <11> A semiconductor element mounting structure as described in any one of <8> to <10>, wherein the metal protrusion is a shape in which at least two cylinders or rectangular parallelepipeds are overlapped in the height direction. <12> A semiconductor element mounting structure as described in any one of <8> to <11>, wherein the metal protrusion is formed by photolithography. <13> A semiconductor element mounting structure as described in any one of <8> to <12>, wherein the semiconductor element and the substrate are temporarily fixed by applying pressure so that at least a portion of the metal protrusion of the first electrode pad penetrates into the solder layer of the first protruding electrode, and the element electrode and the substrate electrode are connected by heating to melt the solder layer of the first protruding electrode. <14> A combination of a semiconductor element and a substrate, comprising: a semiconductor element having an element electrode; and a substrate having a substrate electrode disposed on a surface on a side facing the semiconductor element and facing the element electrode; One of the element electrode and the substrate electrode is a protruding electrode having a solder layer at a front end, The other of the element electrode and the substrate electrode is an electrode pad having one or more metal protrusions on the surface, and The bottom area of the metal protrusion is less than 70% relative to the area of the electrode pad. [Effect of the invention]

According to one aspect of the present invention, a semiconductor element mounting structure having excellent connection accuracy between the semiconductor element and the substrate can be provided. In addition, according to another aspect of the present invention, a combination of a semiconductor element and a substrate in which positional deviation in the connection portion between the semiconductor element and the substrate is unlikely to occur can be provided.

Hereinafter, an example of a mounting structure of a semiconductor element and a combination of a semiconductor element and a substrate to which the present invention is applied will be described in detail with reference to the drawings. However, the present invention is not limited to the following disclosure. In the following disclosure, except for the cases specifically indicated, the components (including component steps, etc.) are not required. The same is true for numerical values and their ranges, and they do not limit the present invention. In addition, the size of the components in each figure is a conceptual size, and the relative relationship between the sizes of the components is not limited to this.

In this specification, the term "step" includes steps that are independent of other steps, even if they cannot be clearly distinguished from other steps, as long as the purpose of the step is achieved. In this specification, the numerical values recorded before and after "~" in the numerical range expressed by "~" are included as the minimum value and the maximum value, respectively. In the numerical range recorded in stages in this disclosure, the upper limit or lower limit recorded in a numerical range can be replaced by the upper limit or lower limit of another numerical range recorded in stages. In addition, in the numerical range recorded in this disclosure, the upper limit or lower limit of the numerical range can be replaced by the value shown in the embodiment. In this disclosure, each component can also include multiple substances that meet the requirements. In this disclosure, the term "layer" or "film" includes not only the case where the layer or film is formed in the entire region, but also the case where the layer or film is formed in only a part of the region when observing the region where the layer or film exists. In this disclosure, the term "layering" means stacking layers, which may be two or more layers combined, or two or more layers can be loaded and unloaded.

<Semiconductor element mounting structure> The first semiconductor element mounting structure disclosed in the present invention is as follows: a semiconductor element having an element electrode and a substrate having a substrate electrode are connected via the element electrode and the substrate electrode, the substrate electrode is arranged at a position facing the element electrode on a surface facing the semiconductor element, one of the element electrode and the substrate electrode is a first protrusion electrode having a solder layer at the front end, and the element electrode and the substrate electrode are connected to each other via the element electrode and the substrate electrode. The other of the substrate electrodes is a first electrode pad having one or more metal protrusions on the surface, the metal protrusions of the first electrode pad penetrate into the solder layer of the first protruding electrode, and the bottom area of the metal protrusions of the first electrode pad is set to be less than 75% relative to the maximum cross-sectional area of the solder layer of the first protruding electrode having the solder layer at the front end. In addition, the second semiconductor element mounting structure disclosed in the present invention is as follows: a semiconductor element having an element electrode and a substrate having a substrate electrode are connected via the element electrode and the substrate electrode, the substrate electrode is arranged at a position facing the element electrode on a surface on a side facing the semiconductor element, and one of the element electrode and the substrate electrode is a first electrode having a solder layer at a front end. A protruding electrode, the other of the element electrode and the substrate electrode is a first electrode pad having one or more metal protrusions on the surface, the metal protrusions of the first electrode pad penetrate into the solder layer of the first protruding electrode, and the bottom area of the metal protrusions of the first electrode pad is set to be less than 70% relative to the area of the first electrode pad. In the present disclosure, the first semiconductor element mounting structure and the second semiconductor element mounting structure are sometimes combined and referred to as "semiconductor element mounting structure". In the present disclosure, the first protruding electrode and the first electrode pad are element electrodes or substrate electrodes that contribute to the connection between the semiconductor element and the substrate. In addition, the second protruding electrode and the second electrode pad described later constitute the element electrode that helps connect the semiconductor elements to each other. Hereinafter, in this disclosure, the first protruding electrode and the second protruding electrode are sometimes combined and referred to as the protruding electrode. In addition, the first electrode pad and the second electrode pad are sometimes combined and referred to as the electrode pad.

According to the mounting structure of the semiconductor element disclosed in the present invention, a mounting structure of the semiconductor element with excellent connection accuracy between the semiconductor element and the substrate can be obtained. Although the reason is not clear, it is speculated as follows. In the mounting structure of the semiconductor element disclosed in the present invention, the semiconductor element and the substrate are connected via the element electrode and the substrate electrode. Here, one of the element electrode and the substrate electrode is a protruding electrode having a solder layer at the front end, and the other of the element electrode and the substrate electrode is an electrode pad having one or more metal protrusions on the surface. When connecting the semiconductor element to the substrate, the semiconductor element is temporarily mounted on the substrate and then provided in a heating step such as reflow. When a semiconductor element is temporarily mounted on a substrate, the metal protrusion is pressed toward the solder layer, so that at least a portion of the front end of the metal protrusion is in a state of being penetrated into the solder layer. Compared with other metal materials, the melting temperature of solder is low and the hardness is also low, so at least a portion of the front end of the metal protrusion is easy to penetrate into the solder layer. By having at least a portion of the front end of the metal protrusion penetrate into the solder layer, the semiconductor element temporarily mounted on the substrate is easily temporarily fixed to the substrate. Therefore, when the substrate on which the semiconductor element is temporarily mounted is operated, the temporarily mounted semiconductor element is unlikely to fall off the substrate due to vibrations during a heating step such as reflow, and the positional displacement of the semiconductor element is unlikely to occur. Therefore, it is inferred that the semiconductor element mounting structure disclosed herein has excellent connection accuracy between the semiconductor element and the substrate. The semiconductor element mounting structure disclosed herein is particularly effective in the semiconductor element mounting structure having a narrow pitch connection portion.

Furthermore, in the present disclosure, the so-called "connection" refers to the physical connection between the semiconductor element and the substrate, or the semiconductor elements via electrodes (i.e., element electrodes or substrate electrodes). There is no particular limitation on the method of connecting the semiconductor element to the substrate. From the perspective of production efficiency, the following method can be cited: the semiconductor element and the substrate are temporarily fixed in a state where at least a portion of the metal protrusion of the first electrode pad is penetrated into the solder layer of the first protruding electrode by applying pressure, and the element electrode is connected to the substrate electrode by melting the solder layer of the first protruding electrode by applying heat. More specifically, the protruding electrode and the electrode pad are aligned, and pressure is applied while the solder layer at the front end of the protruding electrode and one or more metal protrusions on the surface of the electrode pad are in contact. As a result, the top of the metal protrusion of the electrode pad penetrates into the solder layer of the protruding electrode and the semiconductor element is temporarily mounted on the substrate. Afterwards, a heating device such as a reflow furnace can be used to melt the solder constituting the solder layer to weld the protruding electrode and the electrode pad.

When the semiconductor element is temporarily mounted on the substrate, in order to improve the wettability of the solder and ensure the connection, flux may be applied to at least one of the protruding electrode and the electrode pad.

The magnitude of the pressure applied when the solder layer and the metal protrusion are in contact is not particularly limited. As in the usual flip chip mounting steps, the pressure can be set by considering the number of protruding electrodes, the deviation in the height of the protruding electrodes, the deformation of the protruding electrodes or the wiring on the substrate caused by the pressure, etc. Specifically, for example, it is preferably set in a manner such that the load borne by each protruding electrode becomes about 1 gf (0.0098 N) to 20 gf (0.196 N). In addition, for example, it is preferably set in a manner such that the load applied to a semiconductor element becomes about 5 N to 200 N. If the load borne by each protruding electrode is 0.0098 N or more, or the load applied to the semiconductor element is 5 N or more, the temporary fixing force of the semiconductor element becomes sufficient, and the positional displacement of the semiconductor element is difficult to occur in the subsequent steps. If the load borne by each protruding electrode is 0.196 N or less, or the load applied to the semiconductor element is 200 N or less, the damage to the semiconductor element caused by excessive load tends to be suppressed.

When the solder layer and the metal protrusion are in contact with each other, at least one of the substrate and the semiconductor element may be heated. From the perspective of productivity and handling when the semiconductor element is transported by a transport device, the heating is preferably performed at a temperature at which the solder does not melt, preferably at a temperature below 210°C, and more preferably at a temperature below 200°C.

There is no particular limitation on the type of semiconductor element, and the following can be used: element semiconductors containing the same type of elements such as silicon and germanium, compound semiconductors such as gallium arsenide and indium phosphide, etc. Other examples include: a chip (bare die) itself that is not packaged with a resin, etc., and a semiconductor package called CSP, BGA (Ball Grid Array), etc. that is packaged with a resin, etc. In addition, the semiconductor element can also be a structure in which multiple semiconductor elements are arranged in at least one of the height direction and the plane direction. When multiple semiconductor elements are arranged in the height direction, the multiple semiconductor elements can also be connected by TSV.

As a protruding electrode, there is no particular limitation as long as it has a solder layer at the front end. As a protruding electrode, it can also be a combination of a metal column and a solder layer provided at the front end of the metal column. The material of the protruding electrode having a solder layer is not particularly limited except that it has solder, and can be selected from commonly used materials. The interval between the protruding electrodes is preferably 1 μm to 100 μm, more preferably 10 μm to 70 μm, and further preferably 30 μm to 50 μm. The thickness of the solder layer is preferably 0.1 μm to 50 μm, more preferably 1 μm to 30 μm, and further preferably 5 μm to 20 μm. If the thickness of the solder layer is 0.1 μm or more, the penetration amount of the metal protrusion into the solder layer can be sufficiently ensured, and the temporary fixing force is unlikely to decrease, so there is a tendency for positional deviation to occur in subsequent steps. If the thickness of the solder layer is 50 μm or less, there is a tendency for the processing time for melting the solder layer to connect the component electrode to the substrate electrode to be difficult to become long. In addition, there is a tendency for electrical short circuits between adjacent electrodes to occur when connecting the component electrode to the substrate electrode. When the protruding electrode has a structure having a metal column and a solder layer disposed at the front end of the metal column, the metal column having a metal layer with gold, silver, copper, tin, nickel, etc. as the main component can also be formed by electroplating, for example. The metal layer constituting the metal column can be a single component or a plurality of components. In addition, the metal layer can be a single layer structure or a multilayer structure in which a plurality of metal layers are stacked. Copper can be preferably used as the material of the metal column because it has a small resistance and a relatively high corrosion resistance. As the solder material of the solder layer, tin-silver solder, tin-lead solder, tin-bismuth solder, tin-copper solder, gold-copper solder, tin-silver-copper solder, etc. can be used. From the perspective of environmental issues and safety, lead-free solders such as gold-copper solder, tin-copper solder, tin-bismuth solder, tin-silver solder, and tin-silver-copper solder can be preferably used. When forming a solder layer on a copper metal column, a nickel layer can be formed between the copper metal column and the solder layer in order to suppress diffusion between metal components from the perspective of improving connection reliability. In addition, in order to make it easier for the metal protrusion of the electrode pad to penetrate into the solder layer, the solder layer may not be subjected to heat treatment after being formed in the protruding electrode by electroplating, printing, etc.

There is no particular restriction on the type of substrate, and examples thereof include: organic substrates containing fiber substrates such as FR4 and FR5, build-up type organic substrates without fiber substrates, wiring boards formed by forming conductive wiring including connecting electrodes in organic films such as polyimide and polyester, and substrates containing inorganic materials such as alumina, glass, and silicon. Circuits, substrate electrodes, etc. can also be formed in the substrate by semi-additive, subtractive, and other methods. The substrate can also be silicon (Si). There is no restriction on the size and thickness of the silicon (Si) substrate. As a silicon (Si) substrate, a wafer having conductive wiring including connecting electrodes formed on the surface can be listed. In addition, wiring, transistors, other electronic components, through-hole terminals (TSV), etc. can also be formed in silicon (Si) substrates.

The metal protrusion can also be formed by photolithography. When the metal protrusion is formed on the surface of the electrode pad by photolithography, it can be formed by the following process: a photosensitive photoresist is applied to the electrode pad surface with a seed layer remaining thereon, exposure, development, electroplating are performed, the photoresist is stripped, and then the seed layer is etched. The method of forming the metal protrusion is not limited to the above method. As a method of forming a metal protrusion, in addition to the method of forming by photolithography, the following methods can also be used: a method of welding a metal wire such as gold or copper to an electrode pad using a ball bonder to form a columnar shape and then cutting it at a specific length; a method of forming by a three-dimensional (3D) printer; a method of forming by cutting.

The material of the metal protrusion is not particularly limited, and various metals such as copper and nickel can be used. When copper is used as the material of the metal protrusion, a mounting structure of a semiconductor element including a connection portion having a heat dissipation effect and low connection resistance can be obtained. In addition, in order to ensure the connection between electrodes, the surface of the metal protrusion can be subjected to gold plating, nickel/gold plating, OSP (Organic Solderability Preservatives) treatment, etc. As commercially available OSP products, there are heat-resistant water-soluble presolder "Toughace" F2 (LX) PK of Shikoku Chemical Industries Co., Ltd.

The shape of the metal protrusion is not particularly limited. Examples of the shape of the metal protrusion include a cylinder, a rectangular parallelepiped, a triangular prism, etc. When the shape of the metal protrusion is set to a cylinder or a rectangular parallelepiped, the top of the metal protrusion and the solder layer of the front end of the protruding electrode that is penetrated by the top and plastically deformed are well engaged with each other. Therefore, sufficient strength can be obtained for the external force during the reflow process, and the tendency to further suppress the positional deviation of the connection portion can be further suppressed.

In addition, the metal protrusion can also be set to a shape in which at least two cylinders, rectangular parallelepipeds, triangular prisms, etc. are overlapped in the height direction. In this case, it is preferred that the bottom area of the cylinder, rectangular parallelepiped, triangular prism, etc. set at the uppermost section relative to the surface of the electrode pad is smaller than the bottom area of the cylinder, rectangular parallelepiped, triangular prism, etc. set at the lowermost section relative to the surface of the electrode pad. Thereby, there is a tendency that the top of the metal protrusion easily penetrates into the solder layer of the protruding electrode, the bite between the metal protrusion and the solder layer of the protruding electrode becomes better, the strength of the external force during the reflow process becomes higher, and it is more difficult to produce positional displacement. In terms of ease of penetration into the solder layer, the shape of the metal protrusion is preferably a cylinder or a rectangular parallelepiped. In addition, the metal protrusion may be a shape in which at least two cylinders or rectangular parallelepipeds are overlapped in the height direction.

In addition, the electrode pad may also have two or more metal protrusions on the surface. When there are two or more metal protrusions on the surface, the shapes of the metal protrusions may be the same or different.

Ideally, the height of the metal protrusion in the electrode pad is less than the thickness of the solder layer of the protruding electrode. By setting the height of the metal protrusion to be less than the thickness of the solder layer, the metal protrusion can easily penetrate into the solder layer. There is a tendency that the metal protrusion can be penetrated as deeply as possible into the solder layer to increase strength and suppress positional deviation of the connection portion. The height of the metal protrusion is not particularly limited, but from the viewpoint of increasing the amount of penetration of the metal protrusion into the solder layer and from the viewpoint of industrial productivity, it is preferably 0.1 μm to 50 μm, more preferably 0.5 μm to 30 μm, and even more preferably 1 μm to 10 μm. In order to improve the wettability of the solder when the metal bump and the protruding electrode are connected by melting the solder, a gold-containing layer containing gold as the main component may be formed on the outermost surface of the metal bump. The method for forming the gold-containing layer is not particularly limited, and electroplating, sputtering, etc. can be used.

In the first semiconductor element mounting structure disclosed herein, in order to allow the metal protrusion of the electrode pad to penetrate into the solder layer of the protruding electrode, the bottom area of the metal protrusion is set to be less than 75%, preferably less than 70%, more preferably less than 50%, and further preferably less than 40% relative to the maximum cross-sectional area of the solder layer of the protruding electrode. If the bottom area of the metal protrusion is less than 75% relative to the maximum cross-sectional area of the solder layer of the protruding electrode, the metal protrusion can easily penetrate into the solder layer of the protruding electrode, and the positional deviation of the connection portion is suppressed. In addition, from the viewpoint of preventing the metal protrusion from bending or collapsing when the metal protrusion penetrates into the solder layer of the protruding electrode, the bottom area of the metal protrusion is preferably 5% or more, and more preferably 10% or more, relative to the maximum cross-sectional area of the solder layer of the protruding electrode. In the present disclosure, the maximum cross-sectional area of the solder layer refers to the area of the solder layer when the protruding electrode is observed from the height direction. In addition, in the second semiconductor element mounting structure of the present disclosure, in order to make the metal protrusion of the electrode pad penetrate into the solder layer of the protruding electrode, the bottom area of the metal protrusion is set to less than 70%, preferably less than 50%, and more preferably less than 40% relative to the area of the electrode pad. If the bottom area of the metal protrusion is less than 70% relative to the area of the electrode pad, the metal protrusion can easily penetrate into the solder layer of the protruding electrode, and the positional deviation of the connection part can be suppressed. In addition, the bottom area of the metal protrusion can be more than 5% or more than 10% relative to the area of the electrode pad.

The bottom area of a metal protrusion refers to the area occupied by the metal protrusion when the metal protrusion is observed from the height direction. In addition, when the metal protrusion is a shape in which a cylinder, a rectangular parallelepiped, a triangular prism, etc. are overlapped in the height direction, the bottom area of the metal protrusion refers to the bottom area of the cylinder, rectangular parallelepiped, triangular prism, etc. located at the bottom. In addition, when the electrode pad has two or more metal protrusions on the surface, the bottom area of the metal protrusion refers to the sum of the bottom areas of the metal protrusions.

In the second semiconductor element mounting structure disclosed in the present invention, the bottom area of the metal protrusion relative to the area of the solder layer when the protruding electrode is observed from the height direction (the maximum cross-sectional area of the solder layer) may be 75% or less, 70% or less, 50% or less, or 40% or less. In addition, the bottom area of the metal protrusion relative to the area of the solder layer when the protruding electrode is observed from the height direction may be 5% or more, 10% or more, or 15% or more.

In the mounting structure of the semiconductor element disclosed in the present invention, one or more other semiconductor elements may be stacked on the side of the semiconductor element opposite to the side facing the substrate, with the semiconductor elements being connected to each other via element electrodes. When stacking a plurality of semiconductor elements, one of the element electrodes of one semiconductor element and the element electrodes of the other semiconductor element in the two semiconductor elements in a connected relationship is a second protruding electrode having a solder layer at the front end, and the other of the element electrodes of one semiconductor element and the element electrodes of the other semiconductor element is a second protruding electrode having a solder layer at the front end. The second electrode pad of the convex portion, the metal convex portion of the second electrode pad penetrates into the solder layer of the second protruding electrode, and the bottom area of the metal convex portion of the second electrode pad is 75% or less relative to the maximum cross-sectional area of the solder layer of the second protruding electrode having the solder layer at the front end, or the bottom area of the metal convex portion of the second electrode pad may be 70% or less relative to the area of the second electrode pad. The bottom area of the metal convex portion of the second electrode pad may be 70% or less, 50% or less, or 40% or less relative to the maximum cross-sectional area of the solder layer of the second protruding electrode having the solder layer at the front end. On the other hand, the bottom area of the metal protrusion of the second electrode pad may be 5% or more, 10% or more, or 15% or more relative to the maximum cross-sectional area of the solder layer of the second protruding electrode having the solder layer at the front end. In addition, the bottom area of the metal protrusion of the second electrode pad may be 50% or less, or 40% or less relative to the area of the second electrode pad. On the other hand, the bottom area of the metal protrusion of the second electrode pad may be 5% or more, 10% or more, or 15% or more relative to the area of the second electrode pad. The details of the protruding electrodes and electrode pads when stacking multiple semiconductor elements, and the details of the method for connecting the protruding electrodes and electrode pads are as described above.

Next, the mounting structure of the semiconductor element disclosed in the present invention and its manufacturing method are described with reference to the drawings. However, the present invention is not limited to these aspects. Furthermore, in each drawing, the main part near the connection part of the protruding electrode and the metal protrusion of the electrode pad is shown.

FIG. 1A is a cross-sectional view of the main part showing the state before the semiconductor element and the substrate are connected, FIG. 1B is a plan view showing the state of the substrate before the semiconductor element and the substrate are connected, and FIG. 2 is a cross-sectional view of the main part showing the state where the semiconductor element is temporarily mounted on the substrate. FIG. 3 is a cross-sectional view of the main part showing the state after the semiconductor element and the substrate are connected. Furthermore, in the following figures, the structure in which the element electrode is a protruding electrode and the substrate electrode is an electrode pad is described, but the present disclosure is not limited to this, and the structure in which the element electrode is an electrode pad and the substrate electrode is a protruding electrode may also be used. In FIG. 1A, FIG. 1B, FIG. 2, and FIG. 3, symbol 1 indicates a semiconductor element including an electrode pad not shown in the figure, symbol 2 indicates a metal post (pillar) including a metal such as copper formed on an electrode pad on the element surface of the semiconductor element 1, and symbol 3 indicates a solder layer provided at the front end of the metal post 2. In FIG. 1A, a protruding electrode is formed by the metal post 2 and the solder layer 3. In addition, symbol 6 indicates a substrate, symbol 4 indicates an electrode pad formed on the surface of the substrate 6 at a position facing the protruding electrode, and symbol 5 indicates a metal protrusion provided on the surface of the electrode pad 4. The protruding electrode is formed on the element surface of the semiconductor element, and the electrode pad 4 is formed on the surface of the substrate 6 at a position facing the protruding electrode.

First, as shown in Fig. 1A, the protruding electrode of the semiconductor element 1 is aligned with the metal protrusion 5 provided on the electrode pad 4 facing the protruding electrode. Then, as shown in Fig. 2, the protruding electrode and the electrode pad 4 having the metal protrusion 5 are pressed in a state facing each other, so that the metal protrusion 5 of the electrode pad 4 penetrates into the solder layer 3 of the protruding electrode and is temporarily mounted.

Afterwards, with the semiconductor element 1 temporarily mounted on the substrate 6, the solder layer 3 is melted by a heating device represented by a reflow furnace, and the protruding electrode (element electrode) of the semiconductor element 1 is welded to the electrode pad 4 (substrate electrode) having the metal protrusion 5 of the substrate 6. By going through the above steps, a semiconductor element mounting structure in which the metal protrusion 5 penetrates the solder layer 3 as shown in FIG. 3 is manufactured. After welding is completed, the semiconductor element and the substrate can also be sealed by filling with a resin material. By using an appropriate sealing resin material that matches the structure of the product, the use environment, etc., the reliability of the operation of the product in the use environment can sometimes be improved. There is no limitation on the method of resin sealing. The following methods can be used: capillary flow underfill method in which liquid resin material flows between the semiconductor element and the substrate, mold underfill method in which liquid resin or melted granular resin is flowed in the molding step, etc. It is also possible to use a method in which particles of inorganic materials such as silicon dioxide, aluminum oxide, silicon nitride, and boron nitride, and organic materials are added to the liquid resin. If particles of aluminum oxide, silicon nitride, and boron nitride are used, the thermal conductivity of the resin material can be increased. When using semiconductor elements with high heat generation, there is a tendency to improve the heat dissipation characteristics and the stability of the semiconductor's operation.

<Combination of semiconductor element and substrate> The first combination of semiconductor element and substrate disclosed herein is as follows: comprising a semiconductor element having an element electrode, and a substrate having a substrate electrode disposed on a surface facing the semiconductor element and facing the element electrode, one of the element electrode and the substrate electrode being a protruding electrode having a solder layer at the front end, and the other of the element electrode and the substrate electrode being an electrode pad having one or more metal protrusions on the surface, and the bottom area of the metal protrusion is set to be less than 75% relative to the maximum cross-sectional area of the solder layer of the protruding electrode having the solder layer at the front end. In addition, the second semiconductor element and substrate combination disclosed in the present invention is as follows: including a semiconductor element having an element electrode, and a substrate having a substrate electrode disposed on a surface facing the semiconductor element at a position facing the element electrode, one of the element electrode and the substrate electrode is a protruding electrode having a solder layer at the front end, and the other of the element electrode and the substrate electrode is an electrode pad having one or more metal protrusions on the surface, and the bottom area of the metal protrusion is set to be less than 70% relative to the area of the electrode pad. In the present disclosure, the first semiconductor element and substrate combination and the second semiconductor element and substrate combination are sometimes combined and referred to as "a semiconductor element and substrate combination". By using the combination of the semiconductor element and the substrate disclosed in the present invention, the mounting structure of the semiconductor element disclosed in the present invention can also be manufactured. The details of the semiconductor element, substrate, electrode pad, protruding electrode, etc. included in the combination of the semiconductor element and the substrate disclosed in the present invention are the same as those of the mounting structure of the semiconductor element disclosed in the present invention.

Furthermore, the above is always an example of the implementation of the present disclosure, and the present disclosure is not limited to these implementations. Various changes and improvements made within the scope of the present disclosure will not have any impact. [Implementation Examples]

The present invention is described in detail below by using embodiments, but the present invention is not limited to these embodiments.

[Example 1] A silicon wafer with an aluminum wiring size of 10 mm × 8 mm and a thickness of 725 μm (Walts Co., Ltd., trade name "WALTS-TEG WM40-0102JY", protruding electrode (bump): Sn-Ag solder, bump solder thickness: 8 μm, bump interval: 40 μm, copper column height: 15 μm, bump size: φ20 μm) was prepared as a semiconductor element.

On a silicon wafer, a semi-additive method is used to form an electrode pad at a position opposite to the bump position of "WALTS-TEG WM40-0102JY" using copper plating with a diameter of 26 μm and a thickness of 2 μm. At this time, the seed layer is not etched. Then, on the surface of the produced electrode pad, a metal protrusion with a length of 20 μm, a width of 3 μm, and a height of 5 μm is produced using the semi-additive method. Finally, the seed layer of the electrode pad is etched to produce an electrode pad with a metal protrusion. It is cut into 10 mm×8 mm to produce a substrate, and the substrate is used for evaluation.

Next, the bump-bearing surface of the silicon wafer is directed toward the substrate side, and a pressurizing member is used to pressurize the silicon wafer from above with a load of 100 N so that the bump contacts the substrate, and the metal protrusion of the substrate penetrates into the solder layer of the bump. At this time, flux is applied to the bump of the silicon wafer and then pressurized. In this way, a substrate temporarily loaded with a silicon wafer (semiconductor element) is manufactured.

The substrate with the silicon chip temporarily mounted thereon was passed through an infrared (IR) reflow furnace (Tamura Corporation, trade name "TNP225-337EM") to melt the solder and solder the bumps of the silicon chip to the substrate. The temperature profile was set so that the maximum heating temperature in the IR reflow furnace was 260°C.

[Example 2] On a silicon wafer, a semi-additive method is used to form an electrode pad at a position opposite to the bump position of "WALTS-TEG WM40-0102JY" using copper plating with a diameter of 26 μm and a thickness of 2 μm. At this time, the seed layer is not etched. Then, on the surface of the prepared electrode pad, two metal bumps with a length of 20 μm, a width of 3 μm, and a height of 5 μm are made on the electrode pad using the semi-additive method. Finally, the seed layer of the electrode pad is etched to produce an electrode pad with a metal bump. It is cut into 10 mm×8 mm for evaluation, and is the same as Example 1 except for this.

[Example 3] On a silicon wafer, a semi-additive method is used to form an electrode pad at a position opposite to the bump position of "WALTS-TEG WM40-0102JY" using copper plating with a diameter of 26 μm and a thickness of 2 μm. At this time, the seed layer is not etched. Then, on the surface of the prepared electrode pad, a metal protrusion with a length of 10 μm, a width of 10 μm, and a height of 5 μm is formed on the electrode pad using the semi-additive method. Finally, the seed layer of the electrode pad is etched to produce an electrode pad with a metal protrusion. It is cut into 10 mm×8 mm for evaluation, and is the same as Example 1 except for this.

[Example 4] On a silicon wafer, a semi-additive method is used to form an electrode pad at a position opposite to the bump position of "WALTS-TEG WM40-0102JY" using copper plating with a diameter of 26 μm and a thickness of 2 μm. At this time, the seed layer is not etched. Then, on the surface of the prepared electrode pad, a metal protrusion with a diameter of 16 μm and a height of 5 μm is made on the electrode pad using the semi-additive method, and finally the seed layer of the electrode pad is etched to produce an electrode pad with a metal protrusion. It is cut into 10 mm×8 mm for evaluation, and is the same as Example 1 except for this.

[Example 5] On a silicon wafer, a semi-additive method is used to form an electrode pad at a position opposite to the bump position of "WALTS-TEG WM40-0102JY" using copper plating with a diameter of 26 μm and a thickness of 2 μm. At this time, the seed layer is not etched. Then, on the surface of the produced electrode pad, a metal protrusion with a diameter of 16 μm and a height of 2 μm is produced on the electrode pad using the semi-additive method. On the upper surface of the produced cylindrical metal protrusion, a metal protrusion with a diameter of 8 μm and a height of 3 μm is produced using the semi-additive method. Finally, the seed layer of the electrode pad is etched to produce an electrode pad with a metal protrusion. It was cut into 10 mm × 8 mm for evaluation, and other than that, it was the same as Example 1.

[Comparative Example 1] Example 1 is the same as Example 1 except that no metal protrusions are formed on the surface of the electrode pad.

[Comparative Example 2] On a silicon wafer, a copper plating with a diameter of 26 μm and a thickness of 2 μm is used to form an electrode pad at a position opposite to the bump position of "WALTS-TEG WM40-0102JY" using a semi-additive method. At this time, the seed layer is not etched. Then, on the surface of the prepared electrode pad, a metal bump with a diameter of 24 μm and a height of 5 μm is made on the electrode pad using the semi-additive method, and finally the seed layer of the electrode pad is etched to produce an electrode pad with a metal bump. It is cut into 10 mm×8 mm for evaluation, and is the same as Example 1 except for this.

[Comparative Example 3] On a silicon wafer, a copper plating with a diameter of 26 μm and a thickness of 2 μm is used to form an electrode pad at a position opposite to the bump position of "WALTS-TEG WM40-0102JY" using a semi-additive method. At this time, the seed layer is not etched. Then, on the surface of the prepared electrode pad, a metal bump with a diameter of 22 μm and a height of 5 μm is made on the electrode pad using the semi-additive method, and finally the seed layer of the electrode pad is etched to produce an electrode pad with a metal bump. It is cut into 10 mm×8 mm for evaluation, and is the same as Example 1 except for this.

The semiconductor device mounting structure obtained in the above manner was checked for positional deviation after mounting in the following manner. The evaluation results are shown in Table 1.

<Confirmation of positional offset between silicon chip and substrate> The positional offset is confirmed by using an X-ray observation device (Nordson Advanced Technology Co., Ltd., product name "XD-7600NT100-CT") to confirm the positional offset between the solder bump of the silicon chip and the electrode pad of the substrate in a semiconductor device mounting structure in which the metal protrusion of the substrate is inserted into the solder bump of the silicon chip, and the silicon chip is temporarily mounted on the substrate and soldered by heat treatment. The positional offset is evaluated according to the following evaluation criteria. In addition, the positional offset is measured at five locations and the arithmetic average is calculated.

-Evaluation Criteria- A: The average positional offset between the bump of the silicon chip and the electrode pad of the substrate is less than 10 μm. B: The average positional offset between the bump of the silicon chip and the electrode pad of the substrate is more than 10 μm and less than 15 μm. C: The average positional offset between the bump of the silicon chip and the electrode pad of the substrate is more than 15 μm.

[Table 1] Embodiment 1 Embodiment 2 Embodiment 3 Embodiment 4 Embodiment 5 Comparison Example 1 Comparison Example 2 Comparison Example 3 Metal protrusion shape Cuboid Rectangle ×2 Cuboid Cylinder Two sections of cylinder - Cylinder Cylinder Metal protrusion bottom area (μm ² ) 60 120 100 201 201 - 452 380 Electrode pad area (μm ² ) 531 531 531 531 531 531 531 531 Metal protrusion/electrode pad area ratio (%) 11 twenty three 19 38 38 - 85 72 Position offset confirmation result A A A A A C C B

[Example 6] A silicon wafer (Waltz Co., Ltd., trade name "WALTS-TEG WM40-0101JY", protruding electrode (bump): Sn-Ag solder, bump solder thickness: 8 μm, bump interval: 40 μm, copper column height: 15 μm, bump size: φ20 μm, electrode pad: pad size: φ26 μm, pad height: 6 μm) having an electrode pad at the same position on the opposite side of the protruding electrode and having aluminum wiring that can be stacked was prepared as a semiconductor element. The evaluation was conducted by making a metal bump with a length of 20 μm, a width of 3 μm, and a height of 5 μm on the electrode pad of the "WALTS-TEG WM40-0101JY" in the same manner as in Example 1. Then, the surface of the silicon wafer with the bump was oriented toward the substrate side, and the bump was contacted with the substrate. A pressurizing member was used to apply pressure with a load of 100 N from above the silicon wafer, so that the metal bump of the substrate penetrated into the solder layer of the bump. At this time, the bump of the silicon wafer was pressurized after applying flux. Similarly, four identical silicon wafers are stacked under the same conditions to produce a substrate temporarily carrying four silicon wafers (semiconductor elements). Other than this, the process is the same as Example 1.

[Example 7] In Example 1, the substrate temporarily loaded with a silicon chip was passed through an IR reflow furnace, and a liquid sealing material: CEL-C-3730 of Hitachi Chemical Co., Ltd. was applied to the soldered substrate using a spray dispenser (Musashi Engineering Co., Ltd., trade name "FAD2500") and cured at 165°C for 2 hours. The same procedures were followed as in Example 1.

[Example 8] On a silicon wafer, a semi-additive method is used to form an electrode pad at a position opposite to the bump position of "WALTS-TEG WM40-0102JY" by copper plating with a diameter of 26 μm and a thickness of 2 μm. At this time, the seed layer is not etched. Then, on the surface of the prepared electrode pad, a metal protrusion with a diameter of 16.4 μm and a height of 5 μm is formed on the electrode pad using the semi-additive method. Finally, the seed layer of the electrode pad is etched to produce an electrode pad with a metal protrusion. It is cut into 10 mm×8 mm for evaluation, and is the same as Example 1 except for this.

[Example 9] On a silicon wafer, a semi-additive method is used to form an electrode pad at a position opposite to the bump position of "WALTS-TEG WM40-0102JY" using copper plating with a diameter of 26 μm and a thickness of 2 μm. At this time, the seed layer is not etched. Then, on the surface of the prepared electrode pad, a metal protrusion with a diameter of 15 μm and a height of 5 μm is made on the electrode pad using the semi-additive method. Finally, the seed layer of the electrode pad is etched to produce an electrode pad with a metal protrusion. It is cut into 10 mm×8 mm for evaluation, and is the same as Example 1 except for this.

[Example 10] On a silicon wafer, a semi-additive method is used to form an electrode pad at a position opposite to the bump position of "WALTS-TEG WM40-0102JY" using copper plating with a diameter of 26 μm and a thickness of 2 μm. At this time, the seed layer is not etched. Then, on the surface of the prepared electrode pad, a metal protrusion with a diameter of 14 μm and a height of 5 μm is made on the electrode pad using the semi-additive method. Finally, the seed layer of the electrode pad is etched to produce an electrode pad with a metal protrusion. It is cut into 10 mm×8 mm for evaluation, and is the same as Example 1 except for this.

[Example 11] On a silicon wafer, a semi-additive method is used to form an electrode pad at a position opposite to the bump position of "WALTS-TEG WM40-0102JY" using copper plating with a diameter of 26 μm and a thickness of 2 μm. At this time, the seed layer is not etched. Then, on the surface of the prepared electrode pad, a metal protrusion with a diameter of 17 μm and a height of 5 μm is made on the electrode pad using the semi-additive method, and finally the seed layer of the electrode pad is etched to produce an electrode pad with a metal protrusion. It is cut into 10 mm×8 mm for evaluation, and is the same as Example 1 except for this.

The semiconductor device mounting structures of Examples 6 to 11 obtained in the above manner were checked for positional deviation after mounting as follows. The semiconductor device mounting structures of Examples 1 to 5 and Comparative Examples 1 to 3 were also evaluated in the same manner. The evaluation results are shown in Tables 2 and 3.

<Confirmation of positional misalignment between silicon chip and substrate> The positional misalignment was confirmed by using an X-ray observation device (Nordson Technologies Co., Ltd., product name "XD-7600NT100-CT") to confirm the positional misalignment between the solder bump of the silicon chip and the electrode pad of the substrate in a semiconductor device mounting structure in which the metal protrusion of the substrate is inserted into the solder bump of the silicon chip and the silicon chip is temporarily mounted on the substrate and soldered by heat treatment. The positional misalignment was measured at 20 locations, and the proportion (percentage) of the locations where the positional misalignment between the bump of the silicon chip and the electrode pad of the substrate was less than 10 μm was calculated.

[Table 2] Embodiment 1 Embodiment 2 Embodiment 3 Embodiment 4 Embodiment 5 Embodiment 6 Embodiment 7 Embodiment 8 Embodiment 9 Embodiment 10 Embodiment 11 Metal protrusion shape Cuboid Rectangle ×2 Cuboid Cylinder Two sections of cylinder Cuboid Cuboid Cylinder Cylinder Cylinder Cylinder Metal protrusion bottom area (μm ² ) 60 120 100 201 201 60 60 211 177 154 227 Maximum cross-sectional area of solder layer (μm ² ) 314 314 314 314 314 314 314 314 314 314 314 Ratio of metal bump bottom area to solder layer maximum cross-sectional area (%) 19 38 32 64 64 19 19 67 56 49 72 Position deviation confirmation result (%) 100 100 95 80 85 95 100 80 90 95 30 Remarks - - - - - Chip stacking Bottom filling - - - -

[Table 3] Comparison Example 1 Comparison Example 2 Comparison Example 3 Metal protrusion shape - Cylinder Cylinder Metal protrusion bottom area (μm ² ) - 452 380 Maximum cross-sectional area of solder layer (μm ² ) 314 314 314 Ratio of metal bump bottom area to solder layer maximum cross-sectional area (%) - 144 121 Position deviation confirmation result (%) 0 10 15 Remarks - - -

As shown in Tables 1 to 3, it can be seen that the mounting structure of the semiconductor element disclosed in the present invention is unlikely to cause positional deviation and has excellent connection accuracy.

The disclosure of Japanese Patent Application No. 2017-177487 filed on September 15, 2017 is incorporated in its entirety into this specification by reference. In addition, all documents, patent applications, and technical specifications described in this specification are incorporated in this specification by reference to the same extent as the following cases, which are cases where each document, patent application, and technical specification is specifically and individually described as being incorporated by reference.

1: Semiconductor element 2: Metal pillar 3: Solder layer 4: Electrode pad 5: Metal bump 6: Substrate

FIG. 1A is a cross-sectional view of the main part showing the state before the semiconductor element and the substrate are connected. FIG. 1B is a plan view showing the state before the semiconductor element and the substrate are connected. FIG. 2 is a cross-sectional view of the main part showing the state where the semiconductor element is temporarily mounted on the substrate. FIG. 3 is a cross-sectional view of the main part showing the state after the semiconductor element and the substrate are connected.

1:Semiconductor components

2:Metal column

3: Solder layer

4: Electrode pad

5: Metal protrusion

6: Substrate

Claims (9)

A semiconductor element mounting structure, wherein a semiconductor element having an element electrode and a substrate having a substrate electrode are connected via the element electrode and the substrate electrode, wherein the substrate electrode is disposed on a surface on a side opposite to the semiconductor element and at a position opposite to the element electrode, wherein one of the element electrode and the substrate electrode is a first protruding electrode having a solder layer at a front end, and the other of the element electrode and the substrate electrode is A first electrode pad having one or more metal protrusions on the surface, wherein the metal protrusions of the first electrode pad penetrate into the solder layer of the first protruding electrode, and the bottom area of the metal protrusions of the first electrode pad is 19% to 70% relative to the maximum cross-sectional area of the solder layer of the first protruding electrode having the solder layer at the front end, and the shape of the metal protrusions is a cylinder or a cuboid. A semiconductor element mounting structure as described in claim 1, wherein on the side of the semiconductor element opposite to the side facing the substrate, one or more other semiconductor elements are stacked in a state where the semiconductor elements are connected to each other via element electrodes, and in two semiconductor elements in a connected relationship, one of the element electrodes of one semiconductor element and one of the element electrodes of the other semiconductor element is a second protruding electrode having a solder layer at the front end, and one of the element electrodes of one semiconductor element is a second protruding electrode having a solder layer at the front end. The other of the element electrodes of the semiconductor device and the element electrodes of another semiconductor device is a second electrode pad having one or more metal protrusions on the surface, the metal protrusions of the second electrode pad penetrate into the solder layer of the second protruding electrode, and the bottom area of the metal protrusions of the second electrode pad is 19% to 70% relative to the maximum cross-sectional area of the solder layer of the second protruding electrode having the solder layer at the front end. A semiconductor element mounting structure as described in claim 1 or claim 2, wherein the metal protrusion is configured to have a shape in which at least two cylinders or cuboids overlap in the height direction. A combination of a semiconductor element and a substrate, comprising: a semiconductor element having an element electrode; and a substrate having a substrate electrode disposed on a surface facing the semiconductor element and facing the element electrode; one of the element electrode and the substrate electrode is a protruding electrode having a solder layer at the front end, and the other of the element electrode and the substrate electrode is an electrode pad having one or more metal protrusions on the surface, and the bottom area of the metal protrusion is 19% to 70% relative to the maximum cross-sectional area of the solder layer of the protruding electrode having the solder layer at the front end, and the shape of the metal protrusion is a cylinder or a cuboid. A semiconductor element mounting structure, wherein a semiconductor element having an element electrode and a substrate having a substrate electrode are connected via the element electrode and the substrate electrode, wherein the substrate electrode is disposed at a position facing the element electrode on a surface facing the semiconductor element, wherein one of the element electrode and the substrate electrode is a first protruding electrode having a solder layer at a front end portion, and wherein the element electrode and the substrate electrode are connected to each other via the element electrode and the substrate electrode. The other of the substrate electrodes is a first electrode pad having one or more metal protrusions on the surface, the metal protrusions of the first electrode pad penetrate into the solder layer of the first protruding electrode, and the bottom area of the metal protrusions of the first electrode pad is 19% to 70% relative to the area of the first electrode pad, and the shape of the metal protrusions is a cylinder or a cuboid. A semiconductor element mounting structure as described in claim 5, wherein on the side of the semiconductor element opposite to the side facing the substrate, one or more other semiconductor elements are stacked in a state where the semiconductor elements are connected to each other via element electrodes, and in the two semiconductor elements in a connected relationship, the element electrode of one semiconductor element and one of the element electrodes of the other semiconductor element are second bumps having a solder layer at the front end. The element electrode of one semiconductor element and the other element electrode of another semiconductor element are second electrode pads having one or more metal protrusions on the surface, the metal protrusions of the second electrode pads penetrate into the solder layer of the second protruding electrode, and the bottom area of the metal protrusions of the second electrode pads is 19% to 70% relative to the area of the second electrode pads. The semiconductor element mounting structure as described in claim 5, wherein the metal protrusion is in the shape of a cylinder or a cuboid. A semiconductor element mounting structure as described in any one of claims 5 to 7, wherein the metal protrusion is configured to have a shape in which at least two cylinders or cuboids overlap in the height direction. A combination of a semiconductor element and a substrate, comprising: a semiconductor element having an element electrode; and a substrate having a substrate electrode disposed on a surface facing the semiconductor element and facing the element electrode; one of the element electrode and the substrate electrode is a protruding electrode having a solder layer at the front end, and the other of the element electrode and the substrate electrode is an electrode pad having one or more metal protrusions on the surface, and the bottom area of the metal protrusion is 19% to 70% relative to the area of the electrode pad, and the shape of the metal protrusion is a cylinder or a cuboid.