TWI855277B - Active pixel sensor - Google Patents
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Abstract
Description
本發明是有關於一種主動畫素感測電路。 The present invention relates to a main motion pixel sensing circuit.
主動畫素感測電路(active pixel sensor(APS))常用於互補式金氧半導體光感測器(CMOS Sensor)中,做為光感測器(Photo Detector,PD)的驅動電路。APS主要作用是將光感測器所偵測到的光強度轉換為電壓值。APS有增加解析度與降低外來雜訊的優點。 Active pixel sensor (APS) is commonly used in complementary metal oxide semiconductor photo sensors (CMOS sensors) as the driving circuit of photo detectors (PD). The main function of APS is to convert the light intensity detected by the photo sensor into a voltage value. APS has the advantages of increasing resolution and reducing external noise.
然而,對現有的APS而言,當受到X光照射時,APS的內部電晶體的臨界電壓容易有變動,導致APS的輸出電流與輸出電壓隨之變動。連帶使得APS的準確性與穩定性受到影響。 However, for existing APS, when exposed to X-rays, the critical voltage of the APS's internal transistors is prone to change, causing the APS's output current and output voltage to change accordingly. This in turn affects the accuracy and stability of the APS.
故而,如何設計新的APS電路,即便是受到X光照射,APS的輸出電流與輸出電壓仍不會隨之變動,提高APS準確性與穩定性。 Therefore, how to design a new APS circuit so that even if it is exposed to X-rays, the output current and output voltage of the APS will not change, thus improving the accuracy and stability of the APS.
本發明係有關於一種主動畫素感測電路,包括:一光感應器,當X光照射時,該光感應器為導通;一驅動補償電路,連接至該光感應器,用以驅動該光感應器,該驅動補償電路與該光感應器連接至一第一節點,其中,於照射X光前,該驅動補償電路補償一第二節點 的一電壓,該第二節點位於該驅動補償電路內;一讀取電路,連接至該驅動補償電路,該讀取電路讀取流經該驅動補償電路之一讀取電流;以及一電流電壓轉換電路,連接至該讀取電路,該電流電壓轉換電路用以將該讀取電路所讀取之該讀取電流轉換成一輸出電壓。 The present invention relates to a main motion pixel sensing circuit, comprising: a photo sensor, which is turned on when X-rays are irradiated; a drive compensation circuit connected to the photo sensor for driving the photo sensor, the drive compensation circuit and the photo sensor are connected to a first node, wherein before X-rays are irradiated, the drive compensation circuit compensates a second node A voltage of the drive compensation circuit is sensed, and the second node is located in the drive compensation circuit; a read circuit is connected to the drive compensation circuit, and the read circuit reads a read current flowing through the drive compensation circuit; and a current-voltage conversion circuit is connected to the read circuit, and the current-voltage conversion circuit is used to convert the read current read by the read circuit into an output voltage.
為了對本發明之上述及其他方面有更佳的瞭解,下文特舉實施例,並配合所附圖式詳細說明如下: In order to better understand the above and other aspects of the present invention, the following is a specific example and a detailed description with the attached drawings as follows:
100、400:主動畫素感測電路 100, 400: Main pixel sensing circuit
110、410:驅動補償電路 110, 410: drive compensation circuit
120、420:光感應器 120, 420: Light sensor
130、430:讀取電路 130, 430: Reading circuit
140、440:電流電壓轉換電路 140, 440: Current-voltage conversion circuit
150、450:重設電路 150, 450: Reset circuit
T11~T25:電晶體 T11~T25: Transistor
D1、D2:光二極體 D1, D2: Photodiodes
CPIN1、CPIN2:輸入電容 CPIN1, CPIN2: input capacitor
141、441:操作放大器 141, 441: Operational amplifier
C1、C2:電容 C1, C2: capacitors
S1、S2:開關 S1, S2: switch
S、B、A:節點 S, B, A: nodes
P1~P4:階段 P1~P4: Stage
L31、L32:曲線 L31, L32: Curve
I:讀取電流 I: Read current
第1圖顯示根據本案第一實施例的主動畫素感測電路(active pixel sensor(APS))的電路圖。 Figure 1 shows a circuit diagram of an active pixel sensor (APS) according to the first embodiment of the present invention.
第2A圖至第2D圖顯示根據本案第一實施例的主動畫素感測電路的操作示意圖。 Figures 2A to 2D show the operation schematic diagram of the main dynamic pixel sensing circuit according to the first embodiment of the present invention.
第3圖顯示根據本案第一實施例的轉換曲線(transfer curve)圖。 Figure 3 shows the transfer curve according to the first embodiment of the present invention.
第4圖顯示根據本案第二實施例的主動畫素感測電路的電路圖。 Figure 4 shows the circuit diagram of the main motion pixel sensing circuit according to the second embodiment of the present invention.
第5A圖至第5D圖顯示根據本案第二實施例的主動畫素感測電路的操作示意圖。 Figures 5A to 5D show the operation schematic diagram of the main dynamic pixel sensing circuit according to the second embodiment of the present invention.
本說明書的技術用語係參照本技術領域之習慣用語,如本說明書對部分用語有加以說明或定義,該部分用語之解釋係以本說明書之說明或定義為準。本揭露之各個實施例分別具有一 或多個技術特徵。在可能實施的前提下,本技術領域具有通常知識者可選擇性地實施任一實施例中部分或全部的技術特徵,或者選擇性地將這些實施例中部分或全部的技術特徵加以組合。 The technical terms in this manual refer to the customary terms in this technical field. If this manual explains or defines some terms, the interpretation of these terms shall be based on the explanation or definition in this manual. Each embodiment disclosed in this disclosure has one or more technical features. Under the premise of possible implementation, a person with ordinary knowledge in this technical field can selectively implement some or all of the technical features in any embodiment, or selectively combine some or all of the technical features in these embodiments.
第一實施例 First embodiment
第1圖顯示根據本案第一實施例的主動畫素感測電路(active pixel sensor(APS))的電路圖。如第1圖所示,根據本案第一實施例的主動畫素感測電路100包括:驅動補償電路110、光感應器(photo sensor)120、讀取電路130、電流電壓轉換電路140與重設電路150。
FIG. 1 shows a circuit diagram of an active pixel sensor (APS) according to the first embodiment of the present invention. As shown in FIG. 1, the active
驅動補償電路110包括第一電晶體T11、第二電晶體T12與儲存電容CST。
The
第一電晶體T11是雙閘極電晶體(dual gate transistor),包括:一第一閘極(例如是頂閘極(top gate)),連接至第一節點S;一第二閘極(例如是底閘極(bottom gate)),連接至第二節點B;一汲極,連接至第三節點A;以及,一源極,連接至偏壓源VSS(亦稱為第一偏壓源)。驅動補償電路110可以驅動光感應器120,並補償第二節點B的電壓。
The first transistor T11 is a dual gate transistor, including: a first gate (e.g., a top gate) connected to the first node S; a second gate (e.g., a bottom gate) connected to the second node B; a drain connected to the third node A; and a source connected to the bias source VSS (also referred to as the first bias source). The
第二電晶體T12包括:一閘極,接收第二掃描信號SCAN2;一汲極,連接至第二節點B;以及,一源極,連接至第三節點A。 The second transistor T12 includes: a gate receiving the second scanning signal SCAN2; a drain connected to the second node B; and a source connected to the third node A.
儲存電容CST連接於第三偏壓源VCOM2與第二節點B之間。 The storage capacitor CST is connected between the third bias source VCOM2 and the second node B.
光感應器120連接至驅動補償電路110。光感應器120包括並聯的光二極體D1與輸入電容CPIN1。光二極體D1與輸入電容CPIN1連接於偏壓源VCOM(亦稱為第二偏壓源)與第一節點S之間。當X光照射時,光二極體D1(光感應器120)為導通。在此以光二極體為例做說明,但在本案其他實施例中,也可以其他光電轉換元件來取代。
The
讀取電路130連接至驅動補償電路110。讀取電路130讀取流經驅動補償電路110之一讀取電流。讀取電路130包括,例如但不受限於,第三電晶體T13。第三電晶體T13包括:一閘極,接收讀取信號READ;一汲極,連接至電流電壓轉換電路140;以及,一源極,連接至第三節點A。
The
電流電壓轉換電路140連接至讀取電路130。電流電壓轉換電路140用以將讀取電路130所讀取之該讀取電流轉換成一輸出電壓VO。電流電壓轉換電路140包括:操作放大器141、電容C1與開關S1。操作放大器141包括:一正輸入端,連接至第二參考電壓VREF2;一負輸入端,連接至第三電晶體T13之汲極;一輸出端,產生輸出電壓VO。電容C1並聯於開關S1。電容C1與開關S1連接於操作放大器141之負輸入端與輸出端之間。開關S1受控於控制信號CLR。
The current-
重設電路150連接至驅動補償電路110。重設電路150對該第一節點S重設。重設電路150包括,例如但不受限於,第四電晶體T14。第四電晶體T14包括:一閘極,接收一第一掃
描信號SCAN1;一汲極,連接至第一節點S;以及,一源極,連接至第一參考電壓VREF1。
The
第2A圖至第2D圖顯示根據本案第一實施例的主動畫素感測電路100的操作示意圖。第2A圖顯示於初始階段P1的操作示意圖。第2B圖顯示於補償階段P2的操作示意圖。第2C圖顯示於照光階段P3的操作示意圖。第2D圖顯示於讀取階段P4的操作示意圖。
Figures 2A to 2D show the operation schematic diagrams of the main dynamic
如第2A圖所示,於初始階段P1內,第一掃描信號SCAN1、第二掃描信號SCAN2與讀取信號READ使得第二電晶體T12、第三電晶體T13與第四電晶體T14為導通。由於第二電晶體T12與第三電晶體T13為導通,第二節點B與第三節點A之電位等於第二參考電壓VREF2;以及,由於第四電晶體T14為導通,第一節點S之電位等於第一參考電壓VREF1。由於第一節點S之電位等於第一參考電壓VREF1,所以,第一節點S之電位將第一電晶體T11導通。也就是說,在初始階段P1內,第一節點S之電位重設至第一參考電壓VREF1。 As shown in Figure 2A, in the initial stage P1, the first scan signal SCAN1, the second scan signal SCAN2 and the read signal READ make the second transistor T12, the third transistor T13 and the fourth transistor T14 conductive. Since the second transistor T12 and the third transistor T13 are conductive, the potential of the second node B and the third node A is equal to the second reference voltage VREF2; and, since the fourth transistor T14 is conductive, the potential of the first node S is equal to the first reference voltage VREF1. Since the potential of the first node S is equal to the first reference voltage VREF1, the potential of the first node S turns on the first transistor T11. That is, in the initial stage P1, the potential of the first node S is reset to the first reference voltage VREF1.
如第2B圖所示,於補償階段P2內,第一節點S之電位控制第一電晶體T11為導通,第二掃描信號SCAN2控制第二電晶體T12仍導通,但讀取信號READ控制第三電晶體T13為關閉,第一掃描信號SCAN1控制第四電晶體T14為關閉。第二節點B的電壓透過第二電晶體T12與第一電晶體T11而放電至偏壓源VSS,直到第一電晶體T11關閉為止。當第一電晶體T11 關閉時,第三節點A的電壓等於f(VTH)而第二節點B的電壓等於f(VTH),其中,VTH代表第一電晶體T11的臨界電壓。f(VTH)代表以臨界電壓VTH為變數的函數。 As shown in Figure 2B, in the compensation phase P2, the potential of the first node S controls the first transistor T11 to be turned on, the second scan signal SCAN2 controls the second transistor T12 to remain turned on, but the read signal READ controls the third transistor T13 to be turned off, and the first scan signal SCAN1 controls the fourth transistor T14 to be turned off. The voltage of the second node B is discharged to the bias source VSS through the second transistor T12 and the first transistor T11 until the first transistor T11 is turned off. When the first transistor T11 is turned off, the voltage of the third node A is equal to f(VTH) and the voltage of the second node B is equal to f(VTH), where VTH represents the critical voltage of the first transistor T11. f(VTH) represents a function with critical voltage VTH as a variable.
第3圖顯示根據本案第一實施例的轉移曲線。於本案第一實施例中,未照光前,轉移曲線是L32(代表VTH尚未變動);於照光後,轉移曲線變為是L31。以臨界電壓VTH變動量是-4V為例做說明,但當知本案並未受限於此。如果因為照光導致的臨界電壓VTH變動量是-4V,在本案第一實施例中,於光照後,讓第一電晶體T11的第二閘極電極等於-4V(亦即,f(VTH)=-4V),則轉移曲線可以由L31變為L32。亦即,經過補償後,無論照射時轉移曲線變成哪一條,都可以補回至在相同T11_VGS(第一電晶體T11的閘極-源極電壓差)下,第一電晶體視為無臨界電壓變動的那條轉移曲線(亦即L32)。 FIG. 3 shows the transfer curve according to the first embodiment of the present invention. In the first embodiment of the present invention, before illumination, the transfer curve is L32 (representing that VTH has not changed); after illumination, the transfer curve changes to L31. The critical voltage VTH change is -4V as an example for explanation, but it should be known that the present invention is not limited to this. If the critical voltage VTH change caused by illumination is -4V, in the first embodiment of the present invention, after illumination, the second gate electrode of the first transistor T11 is made equal to -4V (that is, f(VTH)=-4V), then the transfer curve can be changed from L31 to L32. That is, after compensation, no matter which transfer curve is changed during irradiation, it can be compensated back to the transfer curve (i.e. L32) where the first transistor is considered to have no critical voltage change under the same T11_VGS (gate-source voltage difference of the first transistor T11).
如第2C圖,於照光階段P3內,主動畫素感測電路100受到X光照射。當被X光照射時,第一節點S的電壓將透過光二極體D1而放電至偏壓源VCOM。假設照光階段P3結束後,第一節點S的電壓下降變化量為△V,則照光階段P3結束後,第一節點S的電壓可表示為:S=VREF1-△V。
As shown in Figure 2C, in the illumination stage P3, the main dynamic
如第2D圖,於讀取階段P4內,讀取電流I的方向如第2D圖所示。讀取電流I由操作放大器141透過第三電晶體T13、第一電晶體T11而流向偏壓源VSS。
As shown in Figure 2D, in the reading phase P4, the direction of the reading current I is shown in Figure 2D. The reading current I flows from the
讀取電流I乃是第一電晶體T11的導通電流。在本
案第一實施例中,於補償階段時,已將轉移曲線補償至無臨界電壓變動的轉移曲線。所以,即便是因為受到X光照射使得第一電晶體T11的本身臨界電壓有所變動,此臨界電壓變動將無法影響到第一電晶體T11的導通電流,亦即無法影響到讀取電流I。所以,當電流電壓轉換電路140將讀取電流轉換成輸出電壓VO時,輸出電壓VO也不受第一電晶體T11的本身臨界電壓的變動。
The read current I is the conduction current of the first transistor T11. In the first embodiment of the present case, the transfer curve has been compensated to a transfer curve without critical voltage change during the compensation stage. Therefore, even if the critical voltage of the first transistor T11 changes due to X-ray irradiation, this critical voltage change will not affect the conduction current of the first transistor T11, that is, it will not affect the read current I. Therefore, when the current-
在本案第一實施例中,電晶體T11~T13可為NMOS電晶體或PMOS電晶體,皆在本案範圍內。此外,第一電晶體T11不論是增強型或是空乏型元件皆具有臨界電壓補償功能。 In the first embodiment of the present case, transistors T11~T13 can be NMOS transistors or PMOS transistors, both of which are within the scope of the present case. In addition, the first transistor T11 has a critical voltage compensation function regardless of whether it is an enhancement type or a depletion type element.
由上述可知,在本案第一實施例中,透過補償,可使得輸出電壓VO不受到雙閘極電晶體臨界電壓變動的影響(由X光照射所導致),故而,本案第一實施例的主動畫素感測電路100具有較佳的準確性與穩定度。
From the above, it can be seen that in the first embodiment of the present case, through compensation, the output voltage VO can be made not affected by the change of the critical voltage of the bipolar gate transistor (caused by X-ray irradiation). Therefore, the main dynamic
第二實施例 Second embodiment
第4圖顯示根據本案第二實施例的主動畫素感測電路的電路圖。如第4圖所示,根據本案第二實施例的主動畫素感測電路400包括:驅動補償電路410、光感應器420、讀取電路430、電流電壓轉換電路440與重設電路450。
FIG. 4 shows a circuit diagram of a main dynamic pixel sensing circuit according to the second embodiment of the present invention. As shown in FIG. 4, the main dynamic
驅動補償電路410包括第一電晶體T21、第二電晶體T22、第三電晶體T23與儲存電容CST。
The
第一電晶體T21是雙閘極電晶體,包括:一第一閘極(例如是頂閘極(top gate)),連接至第一節點S;一第二閘極(例
如是底閘極(bottom gate)),連接至第二節點B;一汲極,連接至第三節點A;以及,一源極,連接至偏壓源VSS。驅動補償電路410可以驅動光感應器420,並補償第二節點B的電壓。
The first transistor T21 is a double gate transistor, including: a first gate (e.g., a top gate), connected to the first node S; a second gate (e.g., a bottom gate), connected to the second node B; a drain, connected to the third node A; and a source, connected to the bias source VSS. The
第二電晶體T22包括:一閘極,接收第二掃描信號SCAN2;一汲極,連接至第二節點B;以及,一源極,連接至第三節點A。 The second transistor T22 includes: a gate, receiving the second scanning signal SCAN2; a drain, connected to the second node B; and a source, connected to the third node A.
第三電晶體T23包括:一閘極,接收第三掃描信號SCAN3;一汲極,連接至本身閘極;以及,一源極,連接至第三節點A。在本案第二實施例中,透過第三電晶體T23與第三掃描信號SCAN3可以增加臨界電壓補償範圍(亦即可以容忍更大的臨界電壓變動範圍),其理由將於底下描述之。 The third transistor T23 includes: a gate receiving the third scanning signal SCAN3; a drain connected to its own gate; and a source connected to the third node A. In the second embodiment of the present case, the critical voltage compensation range can be increased (that is, a larger critical voltage variation range can be tolerated) through the third transistor T23 and the third scanning signal SCAN3, and the reason will be described below.
儲存電容CST連接於第三偏壓源VCOM2與第二節點B之間。 The storage capacitor CST is connected between the third bias source VCOM2 and the second node B.
光感應器420連接至驅動補償電路110。光感應器420包括並聯的光二極體D2與輸入電容CPIN2。光二極體D2與輸入電容CPIN2連接於偏壓源VCOM與第一節點S之間。當X光照射時,光二極體D2(光感應器420)為導通。在此以光二極體為例做說明,但在本案其他實施例中,也可以其他光電轉換元件來取代。
The
讀取電路430連接至驅動補償電路410。讀取電路430讀取流經驅動補償電路410之一讀取電流。讀取電路430包括,例如但不受限於,第四電晶體T24。第四電晶體T24包括:
一閘極,接收讀取信號READ;一汲極,連接至電流電壓轉換電路440;以及,一源極,連接至第三節點A。
The
電流電壓轉換電路440連接至讀取電路430。電流電壓轉換電路440用以將讀取電路430所讀取之該讀取電流轉換成一輸出電壓VO。電流電壓轉換電路440包括:操作放大器441、電容C2與開關S2。操作放大器441包括:一正輸入端,連接至第二參考電壓VREF2;一負輸入端,連接至第四電晶體T24之汲極;一輸出端,產生輸出電壓VO。電容C2並聯於開關S2。電容C2與開關S2連接於操作放大器441之負輸入端與輸出端之間。開關S2受控於控制信號CLR。
The current-voltage conversion circuit 440 is connected to the
重設電路450連接至驅動補償電路410。重設電路450對該第一節點S重設。重設電路450包括,例如但不受限於,第五電晶體T25。第五電晶體T25包括:一閘極,接收一第一掃描信號SCAN1;一汲極,連接至第一節點S;以及,一源極,連接至第一參考電壓VREF1。
The
第5A圖至第5D圖顯示根據本案第二實施例的主動畫素感測電路400的操作示意圖。第5A圖顯示於初始階段P1的操作示意圖。第5B圖顯示於補償階段P2的操作示意圖。第5C圖顯示於照光階段P3的操作示意圖。第5D圖顯示於讀取階段P4的操作示意圖。
Figures 5A to 5D show the operation schematic diagrams of the main dynamic
如第5A圖所示,於初始階段P1內,第一掃描信號SCAN1、第二掃描信號SCAN2與第三掃描信號SCAN3使得第 二電晶體T22、第三電晶體T23與第五電晶體T25為導通。由於第二電晶體T22與第三電晶體T23為導通,第二節點B與第三節點A之電位等於電位VGH(其代表第三掃描信號SCAN3的邏輯高位準);以及,由於第五電晶體T25為導通,第一節點S之電位等於第一參考電壓VREF1。由於第一節點S之電位等於第一參考電壓VREF1,所以,第一節點S之電位將第一電晶體T21導通。也就是說,在初始階段P1內,第一節點S之電位重設至第一參考電壓VREF1。 As shown in FIG. 5A, in the initial stage P1, the first scanning signal SCAN1, the second scanning signal SCAN2 and the third scanning signal SCAN3 make the second transistor T22, the third transistor T23 and the fifth transistor T25 conductive. Since the second transistor T22 and the third transistor T23 are conductive, the potentials of the second node B and the third node A are equal to the potential VGH (which represents the logical high level of the third scanning signal SCAN3); and, since the fifth transistor T25 is conductive, the potential of the first node S is equal to the first reference voltage VREF1. Since the potential of the first node S is equal to the first reference voltage VREF1, the potential of the first node S turns on the first transistor T21. That is to say, in the initial stage P1, the potential of the first node S is reset to the first reference voltage VREF1.
在本案第二實施例中,於初始階段P1內,將第二節點B與第三節點A之電位等於電位VGH(其代表第三掃描信號SCAN3的邏輯高位準),故而,透過調整電位VGH(其代表第三掃描信號SCAN3的邏輯高位準)即可以任意調整第二節點B與第三節點A之電位,藉此可以得到較大的補償範圍。 In the second embodiment of the present case, in the initial stage P1, the potentials of the second node B and the third node A are equal to the potential VGH (which represents the logical high level of the third scanning signal SCAN3). Therefore, by adjusting the potential VGH (which represents the logical high level of the third scanning signal SCAN3), the potentials of the second node B and the third node A can be adjusted arbitrarily, thereby obtaining a larger compensation range.
如第5B圖所示,於補償階段P2內,第一節點S之電位控制第一電晶體T21為導通,第二掃描信號SCAN2控制第二電晶體T22為導通,第三掃描信號SCAN3控制第三電晶體T23為關閉,讀取信號READ控制第四電晶體T24為關閉,與第一掃描信號SCAN1控制第五電晶體T25為關閉。第二節點B的電壓透過第二電晶體T22與第一電晶體T21而放電至偏壓源VSS,直到第一電晶體T21關閉為止。當第一電晶體T21關閉時,第三節點A的電壓等於f(VTH)而第二節點B的電壓等於f(VTH),其中,VTH代表第一電晶體T21的臨界電壓。f(VTH)代表以臨 界電壓VTH為變數的函數。 As shown in FIG. 5B , in the compensation phase P2, the potential of the first node S controls the first transistor T21 to be turned on, the second scan signal SCAN2 controls the second transistor T22 to be turned on, the third scan signal SCAN3 controls the third transistor T23 to be turned off, the read signal READ controls the fourth transistor T24 to be turned off, and the first scan signal SCAN1 controls the fifth transistor T25 to be turned off. The voltage of the second node B is discharged to the bias source VSS through the second transistor T22 and the first transistor T21 until the first transistor T21 is turned off. When the first transistor T21 is turned off, the voltage of the third node A is equal to f(VTH) and the voltage of the second node B is equal to f(VTH), where VTH represents the critical voltage of the first transistor T21. f(VTH) represents a function with the critical voltage VTH as a variable.
第3圖亦可適用於第二實施例。類似於第一實施例中,於本案第二實施例中,未照光前,轉移曲線是L32(代表VTH尚未變動);於照光後,轉移曲線變為是L31。以臨界電壓VTH變動量是-4V為例做說明,但當知本案並未受限於此。如果臨界電壓VTH變動量是-4V,在本案第二實施例中,於光照後,讓第一電晶體T21的第二閘極電壓等於-4V,則轉移曲線可以由L31變為L32。亦即,經過補償後,無論照射時轉移曲線變成哪一條,都可以補回至在相同T21_VGS(第一電晶體T21的閘極-源極電壓差)下,第一電晶體視為無臨界電壓變動的那條轉移曲線(亦即L32)。 FIG. 3 is also applicable to the second embodiment. Similar to the first embodiment, in the second embodiment of the present invention, before illumination, the transfer curve is L32 (representing that VTH has not changed); after illumination, the transfer curve changes to L31. The critical voltage VTH change is -4V as an example for explanation, but it should be known that the present invention is not limited to this. If the critical voltage VTH change is -4V, in the second embodiment of the present invention, after illumination, the second gate voltage of the first transistor T21 is made equal to -4V, then the transfer curve can change from L31 to L32. That is, after compensation, no matter which transfer curve is changed during irradiation, it can be compensated back to the transfer curve (i.e. L32) where the first transistor is considered to have no critical voltage change under the same T21_VGS (gate-source voltage difference of the first transistor T21).
如第5C圖,於照光階段P3內,主動畫素感測電路400受到X光照射。當被X光照射時,第一節點S的電壓將透過光二極體D2而放電至偏壓源VCOM。假設照光階段P3結束後,第一節點S的電壓下降變化量為△V,則照光階段P3結束後,第一節點S的電壓可表示為:S=VREF1-△V。
As shown in Figure 5C, in the illumination stage P3, the main dynamic
如第5D圖,於讀取階段P4內,讀取電流I的方向如第5D圖所示。讀取電流I由操作放大器441透過第四電晶體T24、第一電晶體T21而流向偏壓源VSS。
As shown in Figure 5D, in the read phase P4, the direction of the read current I is as shown in Figure 5D. The read current I flows from the
讀取電流I乃是第一電晶體T21的導通電流。在本案第二實施例中,於補償階段時,已將轉移曲線補償至無臨界電壓變動的轉移曲線。所以,即便是因為受到X光照射使得第一電 晶體T21的本身臨界電壓有所變動,此臨界電壓變動將無法影響到第一電晶體T21的導通電流,亦即無法影響到讀取電流I。所以,當電流電壓轉換電路440將讀取電流轉換成輸出電壓VO時,輸出電壓VO也不受第一電晶體T21的本身臨界電壓的變動。 The read current I is the conduction current of the first transistor T21. In the second embodiment of the present case, the transfer curve has been compensated to a transfer curve without critical voltage change during the compensation stage. Therefore, even if the critical voltage of the first transistor T21 changes due to X-ray irradiation, this critical voltage change will not affect the conduction current of the first transistor T21, that is, it will not affect the read current I. Therefore, when the current-voltage conversion circuit 440 converts the read current into the output voltage VO, the output voltage VO is not affected by the change of the critical voltage of the first transistor T21.
在本案第二實施例中,電晶體T21~T25可為NMOS電晶體或PMOS電晶體,皆在本案範圍內。此外,第一電晶體T21不論是增強型或是空乏型元件皆具有臨界電壓補償功能。 In the second embodiment of the present case, transistors T21~T25 can be NMOS transistors or PMOS transistors, both of which are within the scope of the present case. In addition, the first transistor T21 has a critical voltage compensation function regardless of whether it is an enhancement type or a depletion type device.
由上述可知,在本案第二實施例中,透過補償,可使得輸出電壓VO不受到雙閘極電晶體臨界電壓變動的影響(由X光照射所導致),故而,本案第二實施例的主動畫素感測電路100具有較佳的準確性與穩定度。
From the above, it can be seen that in the second embodiment of the present case, through compensation, the output voltage VO can be made not affected by the change of the critical voltage of the bipolar gate transistor (caused by X-ray irradiation). Therefore, the main dynamic
綜上所述,雖然本發明已以實施例揭露如上,然其並非用以限定本發明。本發明所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾。因此,本發明之保護範圍當視後附之申請專利範圍所界定者為準。 In summary, although the present invention has been disclosed as above by the embodiments, it is not intended to limit the present invention. Those with common knowledge in the technical field to which the present invention belongs can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope defined in the attached patent application.
100:主動畫素感測電路 100: Main pixel sensing circuit
110:驅動補償電路 110: Drive compensation circuit
120:光感應器 120: Light sensor
130:讀取電路 130: Reading circuit
140:電流電壓轉換電路 140: Current-voltage conversion circuit
150:重設電路 150: Reset circuit
T11~T14:電晶體 T11~T14: Transistor
D1:光二極體 D1: Photodiode
CPIN1:輸入電容 CPIN1: Input capacitor
141:操作放大器 141: Operational amplifier
C1:電容 C1: Capacitor
S1:開關 S1: switch
S、B、A:節點 S, B, A: nodes
Claims (6)
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