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TWI851659B - Voltage detector - Google Patents

Voltage detector Download PDF

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TWI851659B
TWI851659B TW109104248A TW109104248A TWI851659B TW I851659 B TWI851659 B TW I851659B TW 109104248 A TW109104248 A TW 109104248A TW 109104248 A TW109104248 A TW 109104248A TW I851659 B TWI851659 B TW I851659B
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voltage
transistor
current
output
gate
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TW202131003A (en
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丁建裕
林佑達
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大陸商杭州中天微系統有限公司
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Abstract

本發明揭露一種電壓偵測器,用以比較輸入電壓與參考電壓以產生一輸出電壓於輸出端,該電壓偵測器包括:第一電晶體,用以將該輸入電壓與該參考電壓間的電壓差轉換為第一電流;以及與該第一電晶體串聯之第二電晶體,該第二電晶體具有相互耦接的閘極與源極,以輸出一固定之第二電流,當該第一電流的電流值大於該第二電流的電流值時,該輸出電壓為第一位準電壓,且當該第一電流的電流值小於該第二電流的電流值時,該輸出電壓為第二位準電壓。本發明提供的電壓偵測器具備低功耗特性,能夠實現降低功耗的系統。The present invention discloses a voltage detector for comparing an input voltage with a reference voltage to generate an output voltage at an output end. The voltage detector includes: a first transistor for converting the voltage difference between the input voltage and the reference voltage into a first current; and a second transistor connected in series with the first transistor, the second transistor having a gate and a source coupled to each other to output a fixed second current. When the current value of the first current is greater than the current value of the second current, the output voltage is a first level voltage, and when the current value of the first current is less than the current value of the second current, the output voltage is a second level voltage. The voltage detector provided by the present invention has a low power consumption characteristic and can realize a system with reduced power consumption.

Description

電壓偵測器Voltage detector

本揭示係關於電壓偵測器,尤其是關於一種操作於次臨限區的電壓偵測器。 The present disclosure relates to a voltage detector, and more particularly to a voltage detector operating in a sub-critical region.

近年來,物聯網(Internet of Thing,IoT)及物聯網裝置的發展相當快速,在物聯網應用中最為重要的考量之一為低功耗,以達成更長的電池壽命。對於一些基本區塊(如能階參考(bandgap reference)、低電壓誤動作防止(under voltage lock out,UVLO)電路)而言,應該一直保持在清醒狀態以維持最基本的功能,實際上,保持設備處於啟動和偵測狀態所需的能量可能遠超出正常工作的能量。在這些情況下,降低甚至消除偵測功耗顯得特別重要,如此才能延長電池壽命,實現降低功耗的系統。 In recent years, the Internet of Things (IoT) and IoT devices have developed rapidly. One of the most important considerations in IoT applications is low power consumption to achieve longer battery life. For some basic blocks (such as bandgap reference and under voltage lock out (UVLO) circuits), they should always remain awake to maintain the most basic functions. In fact, the energy required to keep the device in the startup and detection state may far exceed the energy for normal operation. In these cases, it is particularly important to reduce or even eliminate the detection power consumption, so as to extend the battery life and realize a system with reduced power consumption.

以UVLO為例,現有的解決方案包括以下兩種:(1)以比較器為基礎(comparator-based)的UVLO以及(2)以延遲為基(delay-based)的UVLO。然而,上述二種UVLO分別 具有以下缺點:(1)對於comparator-based的UVLO而言,雖然可精確地判斷UVLO臨限電壓,然而,其將會消耗更多電流才能達成目的;(2)對於delay-based的UVLO而言,雖然消耗零靜態電流,然而,其無法保證UVLO臨限電壓的絕對值。因此,習知技術實有改進之必要。 Taking UVLO as an example, existing solutions include the following two types: (1) comparator-based UVLO and (2) delay-based UVLO. However, the above two types of UVLO have the following disadvantages: (1) For comparator-based UVLO, although the UVLO threshold voltage can be accurately determined, it will consume more current to achieve the purpose; (2) For delay-based UVLO, although zero static current is consumed, it cannot guarantee the absolute value of the UVLO threshold voltage. Therefore, the known technology really needs to be improved.

有鑑於此,如何提供一種適於操作於次臨限區且具備低功耗特性的電壓偵測器,實為有待解決的問題。 In view of this, how to provide a voltage detector suitable for operating in the subcritical region and having low power consumption characteristics is a problem to be solved.

本發明揭露一種電壓偵測器,用以比較輸入電壓與參考電壓以產生一輸出電壓於輸出端,該電壓偵測器包括:第一電晶體,用以將該輸入電壓與該參考電壓間的電壓差轉換為第一電流;及與該第一電晶體串聯之第二電晶體,該第二電晶體具有相互耦接的閘極與源極,以輸出一固定之第二電流,當該第一電流的電流值大於該第二電流的電流值時,該輸出電壓為第一位準電壓,且當該第一電流的電流值小於該第二電流的電流值時,該輸出電壓為第二位準電壓。 The present invention discloses a voltage detector for comparing an input voltage with a reference voltage to generate an output voltage at an output end. The voltage detector includes: a first transistor for converting the voltage difference between the input voltage and the reference voltage into a first current; and a second transistor connected in series with the first transistor, the second transistor having a gate and a source coupled to each other to output a fixed second current. When the current value of the first current is greater than the current value of the second current, the output voltage is a first level voltage, and when the current value of the first current is less than the current value of the second current, the output voltage is a second level voltage.

在本發明的一個實施例中,該第一電晶體具有接收該參考電壓之閘極、接收該輸入電壓之源極、及耦接至該輸出端之汲極;及其中,該第二電晶體具有閘極、耦接至該輸出端之源極、及耦接至接地端子之汲極。在本發明的一個實施例中,該第一位準電壓為該輸入電壓,且該第二位準電壓為接地電壓。 In one embodiment of the present invention, the first transistor has a gate receiving the reference voltage, a source receiving the input voltage, and a drain coupled to the output terminal; and wherein the second transistor has a gate, a source coupled to the output terminal, and a drain coupled to a ground terminal. In one embodiment of the present invention, the first level voltage is the input voltage, and the second level voltage is a ground voltage.

在本發明的一個實施例中,該第一電晶體與該第二電晶體為P型金屬氧化物半導體場效電晶體(PMOSFET)。 In one embodiment of the present invention, the first transistor and the second transistor are P-type metal oxide semiconductor field effect transistors (PMOSFET).

在本發明的一個實施例中,該第一電晶體具有接收該參考電壓之閘極、接收該輸入電壓之源極、及耦接至該輸出端之汲極;及其中,該第二電晶體具有閘極、耦接至接地端子之源極、及耦接至該輸出端之汲極。 In one embodiment of the present invention, the first transistor has a gate receiving the reference voltage, a source receiving the input voltage, and a drain coupled to the output terminal; and wherein the second transistor has a gate, a source coupled to a ground terminal, and a drain coupled to the output terminal.

在本發明的一個實施例中,該第一位準電壓為該輸入電壓,且該第二位準電壓為接地電壓。 In one embodiment of the present invention, the first level voltage is the input voltage, and the second level voltage is the ground voltage.

在本發明的一個實施例中,該第一電晶體為P型金屬氧化物半導體場效電晶體,且該第二電晶體為N型金屬氧化物半導體場效電晶體(NMOSFET)。 In one embodiment of the present invention, the first transistor is a P-type metal oxide semiconductor field effect transistor, and the second transistor is an N-type metal oxide semiconductor field effect transistor (NMOSFET).

在本發明的一個實施例中,該第一電晶體具有接收該輸入電壓之閘極、耦接至該輸出端之汲極、及接收該參考電壓之源極,其中,該第二電晶體具有閘極、耦接至該輸出端之源極、及耦接至電源電壓之汲極。 In one embodiment of the present invention, the first transistor has a gate receiving the input voltage, a drain coupled to the output terminal, and a source receiving the reference voltage, wherein the second transistor has a gate, a source coupled to the output terminal, and a drain coupled to the power voltage.

在本發明的一個實施例中,該第一位準電壓為該參考電壓,且該第二位準電壓為該電源電壓。 In one embodiment of the present invention, the first level voltage is the reference voltage, and the second level voltage is the power supply voltage.

在本發明的一個實施例中,該第一電晶體與該第二電晶體為N型金屬氧化物半導體場效電晶體。 In one embodiment of the present invention, the first transistor and the second transistor are N-type metal oxide semiconductor field effect transistors.

在本發明的一個實施例中,該第一電晶體具有接收該輸入電壓之閘極、耦接至該輸出端之汲極、及接收該參考電壓之源極,其中,該第二電晶體具有閘極、耦接至該電源電壓之源極、及耦接至該輸出端之汲極。 In one embodiment of the present invention, the first transistor has a gate receiving the input voltage, a drain coupled to the output terminal, and a source receiving the reference voltage, wherein the second transistor has a gate, a source coupled to the power voltage, and a drain coupled to the output terminal.

在本發明的一個實施例中,該第一位準電壓為該參考 電壓,且該第二位準電壓為該電源電壓。 In one embodiment of the present invention, the first level voltage is the reference voltage, and the second level voltage is the power supply voltage.

在本發明的一個實施例中,該第一電晶體為N型金屬氧化物半導體場效電晶體,該第二電晶體為P型金屬氧化物半導體場效電晶體。 In one embodiment of the present invention, the first transistor is an N-type metal oxide semiconductor field effect transistor, and the second transistor is a P-type metal oxide semiconductor field effect transistor.

本發明的電壓偵測器利用以比較器為基礎之架構,透過使用操作於次臨限區而作為微小理想電流源之閘極與源極耦接的MOS電晶體,使整個比較器具有極低的靜態電流,進而達成大幅降低功耗的目的。 The voltage detector of the present invention utilizes a comparator-based structure, and uses a MOS transistor that operates in a sub-threshold region and is coupled to the gate and source as a tiny ideal current source, so that the entire comparator has an extremely low quiescent current, thereby achieving the purpose of significantly reducing power consumption.

S101:步驟 S101: Step

S102:步驟 S102: Step

S103:步驟 S103: Step

200:電壓偵測器 200: Voltage detector

201:電晶體 201: Transistor

203:電晶體 203: Transistor

205:電晶體 205: Transistor

207:電晶體 207: Transistor

210:電壓偵測器 210: Voltage detector

300:電壓偵測器 300: Voltage detector

301:電晶體 301: Transistor

303:電晶體 303: Transistor

305:電晶體 305: Transistor

307:電晶體 307: Transistor

310:電壓偵測器 310: Voltage detector

400:物聯網元件 400: Internet of Things components

401:穩壓器電路 401: Voltage regulator circuit

403:電壓偵測器 403: Voltage detector

405:內部主電路 405: Internal main circuit

500:物聯網元件 500: Internet of Things components

501:電池 501:Battery

503:電壓偵測器 503: Voltage detector

505:內部主電路 505: Internal main circuit

VIN:輸入電壓 VIN: Input voltage

VREF:參考電壓 VREF: reference voltage

VDD:電源電壓 VDD: power supply voltage

VOUT:輸出電壓 VOUT: output voltage

在圖式中:[圖1]為本發明一個實施方式提供的電壓偵測方法的流程圖;[圖2A]與[圖2B]為本發明一個實施方式提供的電壓偵測器的電路圖;[圖3A]與[圖3B]為本發明一個實施方式提供的電壓偵測器的電路圖;[圖4]為應用本發明之一實施例的電壓偵測器的物聯網元件方塊圖;[圖5]為應用本發明之另一實施例的電壓偵測器的物聯網元件方塊圖。 In the figures: [Figure 1] is a flow chart of a voltage detection method provided by an embodiment of the present invention; [Figure 2A] and [Figure 2B] are circuit diagrams of a voltage detector provided by an embodiment of the present invention; [Figure 3A] and [Figure 3B] are circuit diagrams of a voltage detector provided by an embodiment of the present invention; [Figure 4] is a block diagram of an Internet of Things component of a voltage detector using one embodiment of the present invention; [Figure 5] is a block diagram of an Internet of Things component of a voltage detector using another embodiment of the present invention.

以下參照圖式對實施方式進行詳細的說明。注意,本 發明不侷限於以下說明,所屬技術領域的具有通常知識者人員可以很容易地理解一個事實就是其方式及詳細內容在不脫離本發明的精神及其範圍的情況下可以被變換成各種各樣的形式。因此,本發明不應被解釋為僅侷限於以下所示的實施方式所記載的內容中。 The following is a detailed description of the implementation method with reference to the drawings. Note that the present invention is not limited to the following description, and a person with ordinary knowledge in the relevant technical field can easily understand the fact that its method and detailed content can be transformed into various forms without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the content recorded in the implementation method shown below.

在本說明書等中使用的“第一”、“第二”等序數詞是為了避免組件的混淆而附記的,而不是為了在數目方面上進行限定的。 The ordinal numbers such as "first" and "second" used in this manual are added to avoid confusion between components, not to limit the number.

電晶體是半導體元件的一種,可以進行電流或電壓的放大、控制導通或非導通的切換工作等。本說明書中的電晶體包括金屬氧化物半導體場效電晶體(MOSFET)。 A transistor is a type of semiconductor element that can amplify current or voltage, control conduction or non-conduction switching, etc. The transistors in this manual include metal oxide semiconductor field effect transistors (MOSFET).

首先,請參閱圖1,圖1示出本發明的一個實施方式的電壓偵測方法的流程圖,包括如下步驟: First, please refer to Figure 1, which shows a flow chart of a voltage detection method of an embodiment of the present invention, including the following steps:

步驟S101:將輸入電壓與參考電壓間的電壓差轉換為電流信號A。 Step S101: Convert the voltage difference between the input voltage and the reference voltage into a current signal A.

步驟S102:將電流信號A與另一固定電流信號B作比較。 Step S102: Compare the current signal A with another fixed current signal B.

其中,電流信號A係根據一電晶體所接收之輸入電壓與參考電壓間的電壓差所產生,電流信號B係藉由一閘極與源極相互耦接的另一電晶體所產生,而電流信號A與電流信號B間的比較可透過例如一安培計來執行。 Among them, the current signal A is generated according to the voltage difference between the input voltage received by a transistor and the reference voltage, and the current signal B is generated by another transistor with a gate and a source coupled to each other. The comparison between the current signal A and the current signal B can be performed by, for example, an ammeter.

步驟S103:判斷A是否大於B。 Step S103: Determine whether A is greater than B.

若A大於B,則輸出電壓信號VOUT等於1(表示輸入電壓大於參考電壓),若A小於B,則輸出電壓信號VOUT等 於0(表示輸入電壓小於參考電壓)。 If A is greater than B, the output voltage signal VOUT is equal to 1 (indicating that the input voltage is greater than the reference voltage); if A is less than B, the output voltage signal VOUT is equal to 0 (indicating that the input voltage is less than the reference voltage).

藉此,本發明透過上述電壓偵測方法,能將輸入電壓與參考電壓相比較,以判定輸入電壓與參考電壓何者具有較高的電位。 Thus, the present invention can compare the input voltage with the reference voltage through the above voltage detection method to determine which of the input voltage and the reference voltage has a higher potential.

實施方式1 Implementation method 1

在本實施方式中,參照圖式對本發明的一個實施方式的電壓偵測器進行說明。 In this embodiment, a voltage detector of an embodiment of the present invention is described with reference to the drawings.

圖2A和圖2B示出本發明的一個實施方式的電壓偵測器的結構實例。請參見圖2A,電壓偵測器200包括電晶體201以及電晶體203,用以比較輸入電壓VIN與參考電壓VREF,而產生一相應於比較結果的輸出電壓VOUT於輸出端,輸入電壓VIN例如可以是電池電壓。 FIG. 2A and FIG. 2B show an example of the structure of a voltage detector of an embodiment of the present invention. Referring to FIG. 2A , the voltage detector 200 includes a transistor 201 and a transistor 203 for comparing an input voltage VIN with a reference voltage VREF, and generating an output voltage VOUT corresponding to the comparison result at the output end. The input voltage VIN can be, for example, a battery voltage.

電晶體201具有一接收參考電壓VREF的閘極、接收輸入電壓VIN的源極、及耦接至輸出端的汲極,電晶體201用以將輸入電壓VIN與參考電壓VREF間的電壓差轉換為電流IAThe transistor 201 has a gate receiving the reference voltage VREF, a source receiving the input voltage VIN, and a drain coupled to the output terminal. The transistor 201 is used to convert the voltage difference between the input voltage VIN and the reference voltage VREF into a current IA .

電晶體203係與電晶體201串聯,其具有閘極、耦接至輸出端之源極、及耦接至接地端子之汲極,值得注意的是,電晶體203之閘極與源極為相互耦接,致使電晶體203操作於次臨限區(sub-threshold region),進而輸出一固定之電流IB而可作為定電流源。 Transistor 203 is connected in series with transistor 201, and has a gate, a source coupled to the output terminal, and a drain coupled to the ground terminal. It is worth noting that the gate and source of transistor 203 are coupled to each other, so that transistor 203 operates in a sub-threshold region, thereby outputting a fixed current I B and can serve as a constant current source.

當電流IA的電流值大於電流IB的電流值時,輸出端輸出為輸入電壓(高位準電壓),當電流IA的電流值小於電流 IB的電流值時,輸出端輸出接地電壓(低位準電壓)。 When the current value of current IA is greater than the current value of current IB , the output terminal outputs the input voltage (high-level voltage). When the current value of current IA is less than the current value of current IB , the output terminal outputs the ground voltage (low-level voltage).

亦即,當輸出電壓VOUT為高位準時,表示輸入電壓VIN大於參考電壓VREF,反之,當輸出電壓VOUT為低位準時,表示輸入電壓VIN小於參考電壓VREF,藉此,可透過相應於輸入電壓VIN與參考電壓VREF比較結果的輸出電壓,判斷出輸入電壓VIN與參考電壓VREF之間的高低關係。 That is, when the output voltage VOUT is high, it means that the input voltage VIN is greater than the reference voltage VREF. Conversely, when the output voltage VOUT is low, it means that the input voltage VIN is less than the reference voltage VREF. In this way, the high-low relationship between the input voltage VIN and the reference voltage VREF can be determined through the output voltage corresponding to the comparison result of the input voltage VIN and the reference voltage VREF.

於圖2A之比較器架構中,電晶體201與電晶體203皆為P型金屬氧化物半導體場效電晶體(PMOSFET),值得注意的是,可將閘極與源極相互耦接的電晶體203視為一電流源,所產生的電流IB極為微小,例如,係界於100pA至10nA的範圍內,由於整個比較器的靜態電流係由此電流源(約在100pA至10nA區間)所決定,藉此,可達成消耗電力降低的效果。 In the comparator architecture of FIG. 2A , transistor 201 and transistor 203 are both P-type metal oxide semiconductor field effect transistors (PMOSFET). It is worth noting that transistor 203 with a gate and a source coupled to each other can be regarded as a current source, and the current I B generated is extremely small, for example, in the range of 100pA to 10nA. Since the quiescent current of the entire comparator is determined by this current source (approximately in the range of 100pA to 10nA), the power consumption can be reduced.

此外,圖2B所示的電壓偵測器210架構與圖2A所示的電壓偵測器200類似,電壓偵測器210包括電晶體205以及電晶體207,圖2B與圖2A之差異在於圖2B中的電晶體207係使用N型金屬氧化物半導體場效電晶體(NMOSFET),其餘概念與原理皆與圖2A類似,故在此不再贅述。 In addition, the structure of the voltage detector 210 shown in FIG. 2B is similar to that of the voltage detector 200 shown in FIG. 2A . The voltage detector 210 includes a transistor 205 and a transistor 207 . The difference between FIG. 2B and FIG. 2A is that the transistor 207 in FIG. 2B uses an N-type metal oxide semiconductor field effect transistor (NMOSFET). The rest of the concepts and principles are similar to those in FIG. 2A , so they will not be described here in detail.

實施方式2 Implementation method 2

在本實施方式中,參照圖式圖3A和圖3B對本發明的另一個實施方式的電壓偵測器進行說明。 In this embodiment, a voltage detector of another embodiment of the present invention is described with reference to Figures 3A and 3B.

圖3A和圖3B示出本發明的另一個實施方式的電壓偵 測器的結構實例。請參見圖3A,電壓偵測器300包括電晶體301以及電晶體303,用以比較輸入電壓VIN與參考電壓VREF以產生一相應於比較結果的輸出電壓VOUT於輸出端。 FIG. 3A and FIG. 3B show a structural example of a voltage detector of another embodiment of the present invention. Referring to FIG. 3A , the voltage detector 300 includes a transistor 301 and a transistor 303 for comparing an input voltage VIN with a reference voltage VREF to generate an output voltage VOUT corresponding to the comparison result at an output terminal.

電晶體301具有閘極、接收電源電壓VDD的汲極、及耦接至輸出端的源極,值得注意的是,電晶體301之閘極與源極係為相互耦接,此使得電晶體301操作於次臨限區而可作為定電流源,輸出固定之電流ICThe transistor 301 has a gate, a drain receiving a power voltage VDD, and a source coupled to the output terminal. It is worth noting that the gate and source of the transistor 301 are coupled to each other, which enables the transistor 301 to operate in the sub-threshold region and act as a constant current source to output a fixed current I C .

電晶體303與電晶體301串聯,其具有接收輸入電壓VIN的閘極、耦接至輸出端之汲極、及接收參考電壓VREF的源極,電晶體303用以將輸入電壓VIN與參考電壓VREF之間的電壓差轉換為電流IDThe transistor 303 is connected in series with the transistor 301 and has a gate receiving the input voltage VIN, a drain coupled to the output terminal, and a source receiving the reference voltage VREF. The transistor 303 is used to convert the voltage difference between the input voltage VIN and the reference voltage VREF into a current ID .

當電流IC的電流值大於電流ID的電流值時,則使得輸出電壓VOUT等於電源電壓VDD,當電流IC的電流值小於電流ID的電流值時,輸出電壓VOUT等於參考電壓VREF。 When the current value of current IC is greater than the current value of current ID , the output voltage VOUT is equal to the power supply voltage VDD. When the current value of current IC is less than the current value of current ID , the output voltage VOUT is equal to the reference voltage VREF.

於圖3A中,電晶體301與電晶體303皆為NMOS電晶體,閘極與源極相互耦接的電晶體301所輸出之電流IC非常微小(例如,界於100pA至10nA的範圍內),由於整個比較器的靜態電流係由約在100pA至10nA區間的電流源所決定,藉此,可達成功耗降低之目的。 In FIG. 3A , transistor 301 and transistor 303 are both NMOS transistors. The current IC output by transistor 301 with its gate and source coupled to each other is very small (e.g., in the range of 100pA to 10nA). Since the quiescent current of the entire comparator is determined by a current source in the range of approximately 100pA to 10nA, the purpose of reducing power consumption can be achieved.

此外,圖3B所示的電壓偵測器310結構與圖3A所示的電壓偵測器300類似,電壓偵測器310包括電晶體305以及電晶體307,與圖3A不同之處在於電晶體305是使用PMOS電晶體,其餘操作原理與圖3A類似,故在此不再贅述。 In addition, the structure of the voltage detector 310 shown in FIG. 3B is similar to the voltage detector 300 shown in FIG. 3A . The voltage detector 310 includes a transistor 305 and a transistor 307 . The difference from FIG. 3A is that the transistor 305 uses a PMOS transistor. The rest of the operating principle is similar to that of FIG. 3A , so it will not be described here.

圖4為應用本發明之一實施例的電壓偵測器的物聯網元件方塊圖。請參見圖4,物聯網元件400中包括穩壓器401、電壓偵測器403及內部主電路405。穩壓器電路401接收電源(或電池)之電壓並輸出一電壓至電壓偵測器403,該輸出電壓係由低而逐漸升高,當電壓偵測器403偵測到穩壓器電路401所輸出電壓超過一特定值時,表示輸出之電壓已到達內部電路可正常運作的範圍,此時電壓偵測器403傳送啟動控制訊號至內部主電路405開始進行工作。 FIG4 is a block diagram of an IoT component using a voltage detector according to an embodiment of the present invention. Referring to FIG4 , the IoT component 400 includes a voltage regulator 401 , a voltage detector 403 , and an internal main circuit 405 . The voltage regulator circuit 401 receives the voltage of the power source (or battery) and outputs a voltage to the voltage detector 403. The output voltage gradually increases from low. When the voltage detector 403 detects that the output voltage of the voltage regulator circuit 401 exceeds a specific value, it means that the output voltage has reached the range where the internal circuit can operate normally. At this time, the voltage detector 403 transmits a start control signal to the internal main circuit 405 to start working.

圖5為應用本發明之另一實施例的電壓偵測器的物聯網元件方塊圖。如圖5所示,物聯網元件500中包括電池501、電壓偵測器503及內部主電路505。電壓偵測器503用以偵測電池501(如太陽能電池、溫差電池或其他種類電源)之電壓,當偵測到電池電壓的電壓值低於一預定值時(電壓過低),傳送一低電壓警告訊號至內部主電路505,同時,可透過網路等通訊方式發出警示至遠端控制系統,警示電池電量不足需更換電池,或是預告物聯網元件500即將離線等;若是電壓偵測器503偵測到電池電壓的電壓值高於一預定值時(電壓過高),傳送一過電壓警告訊號至內部主電路505,並可發出警示提醒系統出現異常。 FIG5 is a block diagram of an IoT device using a voltage detector according to another embodiment of the present invention. As shown in FIG5 , the IoT device 500 includes a battery 501 , a voltage detector 503 , and an internal main circuit 505 . The voltage detector 503 is used to detect the voltage of the battery 501 (such as a solar cell, a thermoelectric cell or other type of power source). When the voltage value of the battery is detected to be lower than a predetermined value (the voltage is too low), a low voltage warning signal is transmitted to the internal main circuit 505. At the same time, a warning can be issued to the remote control system through a communication method such as the network, warning that the battery power is insufficient and the battery needs to be replaced, or warning that the IoT component 500 is about to go offline, etc.; if the voltage detector 503 detects that the voltage value of the battery is higher than a predetermined value (the voltage is too high), an overvoltage warning signal is transmitted to the internal main circuit 505, and a warning can be issued to remind the system of abnormality.

由於本發明之電壓偵測器平時可以保持很低的偵測功耗,因此,即使是應用在需長期保持啟動狀態的物聯網裝置(如:需長時間待機的防盜警報器、活動監視器等)情形下,長時間累計所消耗功率仍非常低,對於物聯網裝置本身而言,更能降低整體的功耗,以達成具備低功耗的物聯 網裝置,實現低功耗的系統。 Since the voltage detector of the present invention can maintain very low detection power consumption at ordinary times, even when it is applied to an IoT device that needs to remain activated for a long time (such as a burglar alarm or activity monitor that needs to be in standby mode for a long time), the power consumption accumulated over a long period of time is still very low. For the IoT device itself, it can also reduce the overall power consumption, so as to achieve an IoT device with low power consumption and realize a low power consumption system.

綜上所述,本發明提供了一種以比較器為基礎的電壓偵測器,用以比較輸入電壓與參考電壓並判斷何者具有較高電位。由於在比較器結構中使用了操作於次臨限區而可作為定電流源之閘極與源極相耦接的電晶體,藉此使比較器整體的靜態電流極低,而達成實現低靜態電流耗損及低功率消耗之目的。 In summary, the present invention provides a voltage detector based on a comparator, which is used to compare an input voltage with a reference voltage and determine which one has a higher potential. Since a transistor operating in a sub-critical region and coupled to a gate and a source as a constant current source is used in the comparator structure, the static current of the comparator as a whole is extremely low, thereby achieving the purpose of low static current loss and low power consumption.

以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。 The above is only the preferred embodiment of the present invention. All equivalent changes and modifications made according to the scope of the patent application of the present invention shall fall within the scope of the present invention.

200:電壓偵測器200: Voltage detector

201:電晶體201: Transistor

203:電晶體203: Transistor

IA :電流I A : Current

IB :電流I B : Current

VIN:輸入電壓VIN: Input voltage

VREF:參考電壓VREF: Reference voltage

VOUT:輸出電壓VOUT: output voltage

Claims (12)

一種電壓偵測器,用以比較輸入電壓與參考電壓以產生一輸出電壓於輸出端,該電壓偵測器包含:第一電晶體,用以將該輸入電壓與該參考電壓間的電壓差轉換為第一電流;及與該第一電晶體串聯之第二電晶體,該第二電晶體具有相互耦接的閘極與源極,以輸出一固定之第二電流,其中,當該第一電流的電流值大於該第二電流的電流值時,該輸出電壓為第一位準電壓,其中,當該第一電流的電流值小於該第二電流的電流值時,該輸出電壓為第二位準電壓,其中,該第一電晶體具有一接收該參考電壓之閘極、一接收該輸入電壓之源極、及一耦接至該輸出端之汲極;及其中,該第二電晶體具有一閘極、一耦接至該輸出端之源極、及一耦接至接地端子之汲極。 A voltage detector is used to compare an input voltage with a reference voltage to generate an output voltage at an output terminal. The voltage detector comprises: a first transistor, used to convert the voltage difference between the input voltage and the reference voltage into a first current; and a second transistor connected in series with the first transistor, the second transistor having a gate and a source coupled to each other to output a fixed second current, wherein when the current value of the first current is greater than the current value of the second current, the output voltage is output. When the current value of the first current is less than the current value of the second current, the output voltage is the second level voltage, wherein the first transistor has a gate receiving the reference voltage, a source receiving the input voltage, and a drain coupled to the output terminal; and wherein the second transistor has a gate, a source coupled to the output terminal, and a drain coupled to the ground terminal. 如申請專利範圍第1項之電壓偵測器,其中,該第一位準電壓為該輸入電壓,且該第二位準電壓為接地電壓。 For example, in the voltage detector of item 1 of the patent application scope, the first level voltage is the input voltage, and the second level voltage is the ground voltage. 如申請專利範圍第1項之電壓偵測器,其中,該第一電晶體與該第二電晶體為P型金屬氧化物半導體場效電晶體(PMOSFET)。 For example, in the voltage detector of item 1 of the patent application, the first transistor and the second transistor are P-type metal oxide semiconductor field effect transistors (PMOSFET). 一種電壓偵測器,用以比較輸入電壓與參考電壓以產生一輸出電壓於輸出端,該電壓偵測器包含:第一電晶體,用以將該輸入電壓與該參考電壓間的電壓差轉換為第一電流;及與該第一電晶體串聯之第二電晶體,該第二電晶體具有相互耦接的閘極與源極,以輸出一固定之第二電流,其中,當該第一電流的電流值大於該第二電流的電流值時,該輸出電壓為第一位準電壓,其中,當該第一電流的電流值小於該第二電流的電流值時,該輸出電壓為第二位準電壓,其中,該第一電晶體具有一接收該參考電壓之閘極、一接收該輸入電壓之源極、及一耦接至該輸出端之汲極;及其中,該第二電晶體具有一閘極、一耦接至接地端子之源極、及一耦接至該輸出端之汲極。 A voltage detector is used to compare an input voltage with a reference voltage to generate an output voltage at an output terminal. The voltage detector comprises: a first transistor, used to convert the voltage difference between the input voltage and the reference voltage into a first current; and a second transistor connected in series with the first transistor, the second transistor having a gate and a source coupled to each other to output a fixed second current, wherein when the current value of the first current is greater than the current value of the second current, the output voltage is output. When the current value of the first current is less than the current value of the second current, the output voltage is the second level voltage, wherein the first transistor has a gate receiving the reference voltage, a source receiving the input voltage, and a drain coupled to the output terminal; and wherein the second transistor has a gate, a source coupled to the ground terminal, and a drain coupled to the output terminal. 如申請專利範圍第4項之電壓偵測器,其中,該第一位準電壓為該輸入電壓,且該第二位準電壓為接地電壓。 For example, in the voltage detector of item 4 of the patent application scope, the first level voltage is the input voltage, and the second level voltage is the ground voltage. 如申請專利範圍第4項之電壓偵測器,其中,該第一電晶體為PMOSFET,且該第二電晶體為N型金屬氧化物半導體場效電晶體(NMOSFET)。 For example, in the voltage detector of item 4 of the patent application, the first transistor is a PMOSFET, and the second transistor is an N-type metal oxide semiconductor field effect transistor (NMOSFET). 一種電壓偵測器,用以比較輸入電壓與參考電壓以產生一輸出電壓於輸出端,該電壓偵測器包含: 第一電晶體,用以將該輸入電壓與該參考電壓間的電壓差轉換為第一電流;及與該第一電晶體串聯之第二電晶體,該第二電晶體具有相互耦接的閘極與源極,以輸出一固定之第二電流,其中,當該第一電流的電流值大於該第二電流的電流值時,該輸出電壓為第一位準電壓,其中,當該第一電流的電流值小於該第二電流的電流值時,該輸出電壓為第二位準電壓,其中,該第一電晶體具有一接收該輸入電壓之閘極、一耦接至該輸出端之汲極、及一接收該參考電壓之源極,及其中,該第二電晶體具有一閘極、一耦接至該輸出端之源極、及一耦接至電源電壓之汲極。 A voltage detector is used to compare an input voltage with a reference voltage to generate an output voltage at an output terminal. The voltage detector comprises: a first transistor for converting the voltage difference between the input voltage and the reference voltage into a first current; and a second transistor connected in series with the first transistor, the second transistor having a gate and a source coupled to each other to output a fixed second current, wherein when the current value of the first current is greater than the second current When the current value of the first current is less than the current value of the second current, the output voltage is the second level voltage, wherein the first transistor has a gate receiving the input voltage, a drain coupled to the output terminal, and a source receiving the reference voltage, and wherein the second transistor has a gate, a source coupled to the output terminal, and a drain coupled to the power voltage. 如申請專利範圍第7項之電壓偵測器,其中,該第一位準電壓為該參考電壓,且該第二位準電壓為該電源電壓。 For example, the voltage detector of item 7 of the patent application scope, wherein the first level voltage is the reference voltage, and the second level voltage is the power supply voltage. 如申請專利範圍第7項之電壓偵測器,其中,該第一電晶體與該第二電晶體為NMOSFET。 For example, in the voltage detector of item 7 of the patent application, the first transistor and the second transistor are NMOSFETs. 一種電壓偵測器,用以比較輸入電壓與參考電壓以產生一輸出電壓於輸出端,該電壓偵測器包含:第一電晶體,用以將該輸入電壓與該參考電壓間的電壓差轉換為第一電流;及 與該第一電晶體串聯之第二電晶體,該第二電晶體具有相互耦接的閘極與源極,以輸出一固定之第二電流,其中,當該第一電流的電流值大於該第二電流的電流值時,該輸出電壓為第一位準電壓,其中,當該第一電流的電流值小於該第二電流的電流值時,該輸出電壓為第二位準電壓,其中,該第一電晶體具有一接收該輸入電壓之閘極、一耦接至該輸出端之汲極、及一接收該參考電壓之源極,及其中,該第二電晶體具有一閘極、一耦接至電源電壓之源極、及一耦接至該輸出端之汲極。 A voltage detector is used to compare an input voltage with a reference voltage to generate an output voltage at an output terminal. The voltage detector comprises: a first transistor for converting the voltage difference between the input voltage and the reference voltage into a first current; and a second transistor connected in series with the first transistor, the second transistor having a gate and a source coupled to each other to output a fixed second current, wherein when the current value of the first current is greater than the second current When the current value of the first current is less than the current value of the second current, the output voltage is the second level voltage, wherein the first transistor has a gate receiving the input voltage, a drain coupled to the output terminal, and a source receiving the reference voltage, and wherein the second transistor has a gate, a source coupled to the power voltage, and a drain coupled to the output terminal. 如申請專利範圍第10項之電壓偵測器,其中,該第一位準電壓為該參考電壓,且該第二位準電壓為該電源電壓。 For example, the voltage detector of item 10 of the patent application scope, wherein the first level voltage is the reference voltage, and the second level voltage is the power supply voltage. 如申請專利範圍第10項之電壓偵測器,其中,該第一電晶體為NMOSFET,該第二電晶體為PMOSFET。 For example, in the voltage detector of item 10 of the patent application, the first transistor is an NMOSFET and the second transistor is a PMOSFET.
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TW201307854A (en) * 2011-02-18 2013-02-16 Semiconductor Tech Acad Res Ct Voltage detection circuit
TW201602593A (en) * 2014-07-11 2016-01-16 茂達電子股份有限公司 Voltage detection circuit
US20180191318A1 (en) * 2016-12-29 2018-07-05 STMicroelectronics (Alps) SAS Voltage Detector Circuit
US20190187218A1 (en) * 2016-12-29 2019-06-20 STMicroelectronics (Alps) SAS Voltage detector circuit

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