TWI844422B - Package structure and manufacturing method of package structure - Google Patents
Package structure and manufacturing method of package structure Download PDFInfo
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- TWI844422B TWI844422B TW112126192A TW112126192A TWI844422B TW I844422 B TWI844422 B TW I844422B TW 112126192 A TW112126192 A TW 112126192A TW 112126192 A TW112126192 A TW 112126192A TW I844422 B TWI844422 B TW I844422B
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本發明是有關於一種封裝結構及封裝結構的製造方法,且特別是有關於一種可快速且直觀地判斷間距尺寸的封裝結構及封裝結構的製造方法。 The present invention relates to a packaging structure and a method for manufacturing the packaging structure, and in particular to a packaging structure and a method for manufacturing the packaging structure that can quickly and intuitively determine the spacing size.
在特定封裝結構中,例如指紋辨識器的產品特性與封裝結構的晶片及封裝層的表面之間的間距有關。現今確認封裝結構的間距的方法例如是,切割封裝結構以獲得封裝結構的切面以量測間距。此量測方法會破壞封裝結構,而導致檢測成本增加且耗時。 In a specific package structure, such as a fingerprint reader, the product characteristics are related to the distance between the chip of the package structure and the surface of the package layer. The current method of confirming the distance of the package structure is, for example, cutting the package structure to obtain a cross section of the package structure to measure the distance. This measurement method will destroy the package structure, resulting in increased testing costs and time-consuming.
本發明提供一種封裝結構及封裝結構的製造方法,無需破壞封裝結構即可快速且直觀地判斷封裝結構的產品特性(例如是特定尺寸)。 The present invention provides a packaging structure and a method for manufacturing the packaging structure, which can quickly and intuitively determine the product characteristics (such as a specific size) of the packaging structure without destroying the packaging structure.
本發明的封裝結構,包括一單元基板、一量測件、一晶片 及一封裝層。量測件設置於單元基板,量測件的一截面寬度隨量測件的一高度而改變。晶片包括一上表面及一下表面,下表面連接於單元基板。封裝層,設置於單元基板且包覆晶片及量測件。量測件的一頂面外露於封裝層,上表面與封裝層的一表面間隔一距離,距離對應於量測件的頂面的截面寬度。 The packaging structure of the present invention includes a unit substrate, a measuring device, a chip and a packaging layer. The measuring device is arranged on the unit substrate, and a cross-sectional width of the measuring device changes with a height of the measuring device. The chip includes an upper surface and a lower surface, and the lower surface is connected to the unit substrate. The packaging layer is arranged on the unit substrate and covers the chip and the measuring device. A top surface of the measuring device is exposed to the packaging layer, and a distance is spaced between the upper surface and a surface of the packaging layer, and the distance corresponds to the cross-sectional width of the top surface of the measuring device.
本發明的封裝結構的製造方法包括以下步驟。設置一基板。設置至少一突出件,至少一突出件設置於基板,各至少一突出件的一截面寬度隨各至少一突出件的一高度而改變。設置至少一晶片,各至少一晶片包括一上表面及一下表面,下表面連接於基板。設置一封裝層,封裝層包覆至少一晶片及至少一突出件。研磨封裝層及至少一突出件,各至少一晶片的上表面與研磨後的封裝層的一表面間隔一距離,至少一突出件被研磨而形成至少一量測件,各至少一量測件的一頂面外露於研磨後的封裝層,距離對應於各至少一量測件的頂面的截面寬度。切割基板及封裝層以形成一封裝結構,基板被切割而形成至少一單元基板。 The manufacturing method of the packaging structure of the present invention includes the following steps. A substrate is provided. At least one protrusion is provided, and the at least one protrusion is provided on the substrate, and a cross-sectional width of each at least one protrusion changes with a height of each at least one protrusion. At least one chip is provided, and each at least one chip includes an upper surface and a lower surface, and the lower surface is connected to the substrate. A packaging layer is provided, and the packaging layer covers at least one chip and at least one protrusion. The packaging layer and the at least one protrusion are ground, and the upper surface of each at least one chip is spaced a distance from a surface of the ground packaging layer, and the at least one protrusion is ground to form at least one measuring piece, and a top surface of each at least one measuring piece is exposed on the ground packaging layer, and the distance corresponds to the cross-sectional width of the top surface of each at least one measuring piece. The substrate and the packaging layer are cut to form a packaging structure, and the substrate is cut to form at least one unit substrate.
基於上述,本發明的封裝結構的量測件的頂部外露於封裝層,且頂部的截面寬度對應於晶片的上表面與封裝層的表面的距離,使用者可直接地量測外露的頂部的截面寬度,並對應得知晶片的上表面與封裝層的表面的距離。藉此,使用者可直觀且快速地判斷封裝結構的產品特性,以提升封裝結構的使用便利性、降低檢測成本及檢測時間。 Based on the above, the top of the measuring part of the package structure of the present invention is exposed on the package layer, and the cross-sectional width of the top corresponds to the distance between the upper surface of the chip and the surface of the package layer. The user can directly measure the cross-sectional width of the exposed top and know the distance between the upper surface of the chip and the surface of the package layer. In this way, the user can intuitively and quickly judge the product characteristics of the package structure, so as to improve the convenience of the package structure and reduce the detection cost and time.
為了讓本發明的上述特徵及優點能夠更明顯易懂,下文 特舉實施例,並配合所附圖式詳細說明如下。 In order to make the above features and advantages of the present invention more clearly understood, the following is a detailed description of the embodiments with the accompanying drawings.
A:虛線 A: Dashed line
β1、β2:角度 β1, β2: angle
C:切割線 C: Cutting line
D1、D3:距離 D1, D3: distance
D2:厚度 D2: Thickness
H:高度 H: Height
H1、H2、H3:總高度 H1, H2, H3: Total height
W1、W2、W3、W4、W5:截面寬度 W1, W2, W3, W4, W5: Cross-sectional width
S:臨時支撐載體 S: Temporary support carrier
S1:斜面 S1: Inclined surface
S2:底面 S2: Bottom surface
100a、100b:封裝結構 100a, 100b: packaging structure
110a:基板 110a: Substrate
110b:單元基板 110b: unit substrate
112:防銲層 112: Anti-welding layer
120a、120b:突出件 120a, 120b: protruding parts
130a、130b:量測件 130a, 130b: measuring parts
132:頂面 132: Top
140:晶片 140: Chip
142:上表面 142: Upper surface
144:下表面 144: Lower surface
150a、150b:封裝層 150a, 150b: packaging layer
152:表面 152: Surface
160:銲線 160:Welding wire
170:電子元件 170: Electronic components
180:膜層 180: Membrane layer
圖1至圖6是根據本發明的一實施例的封裝結構的製造方法的局部剖面示意圖。 Figures 1 to 6 are partial cross-sectional schematic diagrams of a method for manufacturing a packaging structure according to an embodiment of the present invention.
圖7是圖6的基板的上視圖。 FIG. 7 is a top view of the substrate of FIG. 6 .
圖8是圖6的封裝結構的剖面示意圖。 FIG8 is a schematic cross-sectional view of the packaging structure of FIG6.
圖9是圖6的封裝結構的製造方法的局部剖面示意圖。 FIG9 is a partial cross-sectional schematic diagram of the manufacturing method of the packaging structure of FIG6.
圖10是切割量測件後形成的封裝結構的示意圖。 Figure 10 is a schematic diagram of the package structure formed after cutting the measuring piece.
圖11是根據本發明的另一實施例的突出件與基板的示意圖。 Figure 11 is a schematic diagram of a protrusion and a substrate according to another embodiment of the present invention.
圖12是圖11的量測件與基板的示意圖。 FIG12 is a schematic diagram of the measuring device and substrate of FIG11 .
圖1至圖6是根據本發明的一實施例的封裝結構的製造方法的局部剖面示意圖。圖7是圖6的基板的上視圖。圖8是圖6的封裝結構的剖面示意圖。請同時參閱圖1至圖8,關於本實施例的封裝結構的製造方法,首先,如圖1所示,設置一臨時支撐載體S及一基板110a。臨時支撐載體S用以支撐基板110a,基板110a可設置於臨時支撐載體S上,臨時支撐載體S可為板體、貼膜或專用於機器設備上之治、夾具。但不限於此。在未繪示的一實施例中,可直接設置基板110a於機台設備上而無需使用臨時支撐
載體S。
Fig. 1 to Fig. 6 are partial cross-sectional schematic diagrams of a method for manufacturing a package structure according to an embodiment of the present invention. Fig. 7 is a top view of the substrate of Fig. 6. Fig. 8 is a cross-sectional schematic diagram of the package structure of Fig. 6. Please refer to Fig. 1 to Fig. 8 for the manufacturing method of the package structure of this embodiment. First, as shown in Fig. 1, a temporary support carrier S and a
接著,如圖2所示,在基板110a上設置至少一突出件120a。本實施例的突出件120a的材質與基板110a的一防銲層112的絕緣性材質相同,但不限於此。具體來說,防銲層112與突出件120a可為一體。設置突出件120a的方法例如是在基板110a上設置防銲層112的同時,一併形成突出件120a。
Next, as shown in FIG. 2 , at least one
突出件120a的一截面寬度W1隨突出件120a的一高度H而改變。意即,突出件120a上的任一點的高度對應於一個特定的截面寬度。突出件120a的高度H與截面寬度W1呈反比,但不限於此。突出件120a的一斜面S1與一底面S2之間具有一夾角β1,夾角β1對應於突出件120a的一總高度H1。
A cross-sectional width W1 of the
突出件120a的截面形狀例如是一三角形。本實施例的突出件120a的截面形狀為直角三角形,但不限於此。突出件120a的截面形狀可以是等腰三角形、正三角形等任意的三角形。夾角β1例如是30度,但不限於此。在未繪示的一實施例中,夾角β1例如是45度、60度等易於加工的角度。在未繪示的另一實施例中,夾角β1可以是任意的角度。
The cross-sectional shape of the
如圖3所示,在突出件120a設置完畢後,在基板110a上設置至少一晶片140。晶片140包括一上表面142及一下表面144,下表面144例如可透過黏晶膠固定於基板110a。上表面142相對於下表面144。突出件120a的總高度H1大於晶片140的上表面142至基板110a的表面的距離D3。在晶片140設置完畢後,如圖
4所示,設置一銲線160及一電子元件170。晶片140的上表面142透過銲線160而與基板110a電性連接。電子元件170設置於晶片140旁,電子元件170例如是一被動元件,但不限於此。
As shown in FIG3, after the
在晶片140、銲線160及電子元件170設置完畢後,如圖5所示,設置一封裝層150a。封裝層150a完全地包覆晶片140、銲線160、電子元件170及突出件120a。在封裝層150a設置完畢後,研磨封裝層150a及突出件120a。圖5以虛線A示意性地繪示研磨後的封裝層150b的一表面152(圖6)的位置,且繪示研磨後的封裝層150b的一厚度D2(即,虛線A至基板110a的表面的距離)。突出件120a突出於虛線A,突出件120a的總高度H1大於厚度D2。
After the
如圖6所示,在研磨封裝層150a及突出件120a後,晶片140的上表面142與研磨後的封裝層150b的表面152間隔一距離D1,突出件120a被研磨而形成量測件130a。量測件130a的一截面寬度W2隨量測件130a的一高度H而改變。量測件130a研磨後的形狀為一梯形。由於突出件120a突出於虛線A且封裝層150a完全地包覆突出件120a(圖5),在研磨完畢後,量測件130a的一頂面132外露於研磨後的封裝層150b的表面152,而可從外部直接看到量測件130a的頂面132。量測件130a的一總高度H2等於研磨後的封裝層150b的厚度D2,總高度H2等於研磨後的封裝層150b的厚度D2。
As shown in FIG. 6 , after the
如圖7所示,本實施例的設置於基板110a上的晶片140
的數量例如是25個,但不限於此。量測件130a(突出件120a)位於基板110a的邊緣,量測件130a(突出件120a)的數量例如是兩個,但不限於此。在不影響封裝結構的製程的情況下,量測件130a(突出件120a)的數量可為任意數量,且可設置於基板110a的任意位置。例如,在未繪示的一實施例中,量測件130a(突出件120a)的數量可為四個,且可設置於基板110a的四邊。在未繪示的另一實施例中,量測件130a(突出件120a)可位於相鄰的兩晶片140之間。基板110a的形狀不以本實施例為限。
As shown in FIG. 7 , the number of
在封裝層150a及突出件120a研磨完畢後,移除臨時支撐載體S,且在研磨後的封裝層150b的表面152進行鍍膜。一膜層180形成於封裝層150b的表面152上(圖8)。在鍍膜完畢後,切割封裝層150b及基板110a以形成如圖8所示的一封裝結構100a。基板110a被切割而形成一單元基板110b。
After the
封裝結構100a包括單元基板110b、晶片140、量測件130a、銲線160、電子元件170、膜層180及封裝層150b。晶片140的下表面144連接於單元基板110b,量測件130a及封裝層150b設置於單元基板110b。晶片140的數量為一個,但不限於此。本實施例的封裝結構100a可用於指紋辨識器產品,但不限於此。
The
封裝結構100a例如是指紋辨識器的產品特性和晶片140與膜層180(封裝層150b)之間的間距有關。間距即為晶片140的上表面142與封裝層150b的表面152之間的距離D1。間距(距離D1)過大或過小都會影響晶片140的感應的靈敏度。
The
習知的量測方法還包括,切割封裝結構以獲得封裝結構的切面,藉此量測間距(距離D1)。此量測方法會破壞封裝結構,而導致檢測成本增加且耗時。 The known measurement method also includes cutting the package structure to obtain a cross section of the package structure to measure the spacing (distance D1). This measurement method will destroy the package structure, resulting in increased testing costs and time-consuming.
如圖5及圖6所示,研磨後的封裝層150b的厚度D2等於距離D3及間距(距離D1)的和。厚度D2等於量測件130a的總高度H2。突出件120a的總高度H1及角度β1為已知的數值。量測件130a的頂面132的截面寬度W3可由量測得到,而為已知的數值。根據三角函數公式,量測件130a的總高度H2(即,封裝層150b的厚度D2)可由方程式(1)得到。
As shown in FIG. 5 and FIG. 6 , the thickness D2 of the
H2=H1-W3*tan(β1) (1) H2=H1-W3*tan(β1) (1)
量測件130a的總高度H2對應於截面寬度W3。在晶片140設置完畢且在設置封裝層150a之前(圖4),可量測距離D3,故距離D3為已知的數值。根據方程式(1)及總高度H2與距離D1、D3的關係,距離D1可由方程式(2)得到。
The total height H2 of the
D1=H1-(W3*(tanβ1))-D3 (2) D1=H1-(W3*(tanβ1))-D3 (2)
由此可知,距離D1對應於量測件130a的頂面132的截面寬度W3。使用者可透過量測突出件120a(量測件130a)的頂面132的截面寬度W3,直接且直觀地得到距離D1的值。藉此,使用者可快速地判斷封裝結構100a的產品特性,以提升封裝結構100a的使用便利性、降低檢測成本及檢測時間。
It can be seen that the distance D1 corresponds to the cross-sectional width W3 of the
圖9是圖6的封裝結構的製造方法的局部剖面示意圖。圖10是切割量測件後形成的封裝結構的示意圖。請同時參閱圖9
及圖10,在研磨封裝層150a及突出件120a之後且在形成封裝結構之前,更可包括切除量測件130a的步驟。使用者可在切除量測件130a之前,量測量測件130a的頂面132的截面寬度W3,以得到距離D1的值之後,再切除量測件130a。一切割線C位於晶片140及量測件130a之間。在切除量測件130a後形成的封裝結構100b包括單元基板110b、晶片140、銲線160、電子元件170、膜層180及封裝層150b。
FIG9 is a partial cross-sectional schematic diagram of the manufacturing method of the package structure of FIG6. FIG10 is a schematic diagram of the package structure formed after cutting the measuring piece. Please refer to FIG9 and FIG10 at the same time. After grinding the
圖11是根據本發明的另一實施例的突出件與基板的示意圖。圖12是圖11的量測件與基板的示意圖。請同時參閱圖5、圖11及圖12,本實施例的突出件120b與前述實施例相似,兩者的差異在於,本實施例的突出件120b的截面形狀為一梯形,且突出件120b的材質與防銲層112的材質相異。具體來說,突出件120b的截面形狀為一等腰梯形,但不限於此。突出件120b為一獨立的元件。突出件120b例如是一獨立的絕緣壓條,突出件120b的材質例如是FR4之類的絕緣材質,但不限於此。突出件120b可透過黏膠預先設置於基板110a上。
FIG11 is a schematic diagram of a protrusion and a substrate according to another embodiment of the present invention. FIG12 is a schematic diagram of the measuring piece and the substrate of FIG11. Please refer to FIG5, FIG11 and FIG12 simultaneously. The
如圖12所示,量測件130b的角度β2及底面的截面寬度W5為已知的數值,量測件130b的頂面132的截面寬度W4可被量測而為已知的數值。根據梯形公式及量測件130b的總高度H3(封裝層150b的厚度D2)與距離D1、D3的關係,距離D1可以由方程式(3)得到。
As shown in FIG. 12 , the angle β2 and the cross-sectional width W5 of the bottom surface of the measuring
D1=((W5-W4)/2)*tan(β2)-D3 (3) D1=((W5-W4)/2)*tan(β2)-D3 (3)
藉此,使用者可透過量測量測件130b的頂面132的截面寬度W4,無需破壞原有封裝結構即可直接且直觀地得到距離D1的值,量測的方式例如是配合工具顯微鏡或其它類似量測功能之量測儀器進行量測。本實施例的突出件120b及量測件130b與前述實施例具有相同的功效。使用者可根據其需求設置突出件120a、120b。
Thus, the user can directly and intuitively obtain the value of the distance D1 by measuring the cross-sectional width W4 of the
綜上所述,本發明的封裝結構的量測件的頂部外露於封裝層,且頂部的截面寬度對應於晶片的上表面與封裝層的表面的距離,使用者可直接地量測外露的頂部的截面寬度,並對應得知晶片的上表面與封裝層的表面的距離。藉此,使用者可直觀且快速地判斷封裝結構的產品特性,無需進行破壞原有封裝結構,節省量測手續,如此一來,可有效提升封裝結構的使用便利性、降低檢測成本及檢測時間。 In summary, the top of the measuring part of the packaging structure of the present invention is exposed on the packaging layer, and the cross-sectional width of the top corresponds to the distance between the upper surface of the chip and the surface of the packaging layer. The user can directly measure the cross-sectional width of the exposed top and know the distance between the upper surface of the chip and the surface of the packaging layer. In this way, the user can intuitively and quickly judge the product characteristics of the packaging structure without destroying the original packaging structure, saving measurement procedures, thus effectively improving the convenience of the packaging structure and reducing the detection cost and time.
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。 Although the present invention has been disclosed as above by the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the relevant technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the attached patent application.
D1:距離 D1: Distance
D2:厚度 D2: Thickness
100a:封裝結構 100a:Packaging structure
110b:單元基板 110b: unit substrate
112:防銲層 112: Anti-welding layer
130a:量測件 130a: Measuring parts
132:頂面 132: Top
140:晶片 140: Chip
142:上表面 142: Upper surface
144:下表面 144: Lower surface
150b:封裝層 150b: Packaging layer
152:表面 152: Surface
160:銲線 160:Welding wire
170:電子元件 170: Electronic components
180:膜層 180: Membrane layer
Claims (10)
Priority Applications (2)
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|---|---|---|---|
| TW112126192A TWI844422B (en) | 2023-07-13 | 2023-07-13 | Package structure and manufacturing method of package structure |
| CN202311242492.0A CN119314954A (en) | 2023-07-13 | 2023-09-25 | Packaging structure and manufacturing method of packaging structure |
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| TW112126192A TWI844422B (en) | 2023-07-13 | 2023-07-13 | Package structure and manufacturing method of package structure |
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| TW202504005A TW202504005A (en) | 2025-01-16 |
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Citations (6)
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|---|---|---|---|---|
| TW201112454A (en) * | 2009-01-22 | 2011-04-01 | Intematix Corp | Light emitting devices with phosphor wavelength conversion and methods of manufacture thereof |
| CN102623441A (en) * | 2011-01-28 | 2012-08-01 | 三星电子株式会社 | Semiconductor device and method of fabricating the same |
| WO2012151002A1 (en) * | 2011-05-03 | 2012-11-08 | Tessera, Inc. | Package-on-package assembly with wire bonds to encapsulation surface |
| TW202005124A (en) * | 2018-05-24 | 2020-01-16 | 大陸商光寶光電(常州)有限公司 | Light-emitting device and method for manufacturing the same |
| TW202023068A (en) * | 2018-12-14 | 2020-06-16 | 大陸商泉州三安半導體科技有限公司 | LED package components |
| US20220059505A1 (en) * | 2020-08-20 | 2022-02-24 | Samsung Electronics Co., Ltd. | Semiconductor package and method of manufacturing the same |
-
2023
- 2023-07-13 TW TW112126192A patent/TWI844422B/en active
- 2023-09-25 CN CN202311242492.0A patent/CN119314954A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201112454A (en) * | 2009-01-22 | 2011-04-01 | Intematix Corp | Light emitting devices with phosphor wavelength conversion and methods of manufacture thereof |
| CN102623441A (en) * | 2011-01-28 | 2012-08-01 | 三星电子株式会社 | Semiconductor device and method of fabricating the same |
| WO2012151002A1 (en) * | 2011-05-03 | 2012-11-08 | Tessera, Inc. | Package-on-package assembly with wire bonds to encapsulation surface |
| TW202005124A (en) * | 2018-05-24 | 2020-01-16 | 大陸商光寶光電(常州)有限公司 | Light-emitting device and method for manufacturing the same |
| TW202023068A (en) * | 2018-12-14 | 2020-06-16 | 大陸商泉州三安半導體科技有限公司 | LED package components |
| US20220059505A1 (en) * | 2020-08-20 | 2022-02-24 | Samsung Electronics Co., Ltd. | Semiconductor package and method of manufacturing the same |
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| CN119314954A (en) | 2025-01-14 |
| TW202504005A (en) | 2025-01-16 |
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