TWI842605B - Radio frequency amplifier and bias circuit - Google Patents

Abstract

A bias circuit of an radio frequency (RF) amplifier is provided. The bias circuit includes a resistor, a second transistor and a third transistor. A first terminal of the resistor is coupled to a system voltage. A first terminal of the first transistor is coupled to a second terminal of the resistor. A second terminal of the first transistor is coupled to an output terminal of the bias circuit. A first terminal of the second transistor is coupled to the system voltage. A control terminal of the second transistor is coupled to the second terminal of the resistor. A first terminal of the third transistor is coupled to the second terminal of the first transistor. A second terminal of the third transistor is coupled to a reference voltage. A control terminal of the third transistor is coupled to a second terminal of the second transistor.

Description

RF Amplifier and Bias Circuit

The present invention relates to an amplifier, and in particular to a radio frequency amplifier and a bias circuit thereof.

Radio Frequency (RF) amplifiers are widely used in many fields, such as television, radio, mobile phones, radar, automatic identification systems, etc. In order to suppress some noise with frequencies close to the fundamental tone and avoid signal feedback, inductors and capacitors are usually used to form a filtering path. Generally speaking, at the beginning of the RF amplifier being enabled, the DC bias of the amplifier's transistors will be pulled up to a certain target level to enable the RF amplifier to enter the operating point. Therefore, after the RF amplifier is enabled, the RF amplifier needs to spend a period of waiting time (setup time) before it can start working normally. How to shorten the waiting time is one of many technical issues.

In view of this, the present invention provides a radio frequency amplifier and a bias circuit, which can enable the radio frequency amplifier to reach a working point more quickly.

In one embodiment of the present invention, the bias circuit includes a first resistor, a second transistor, and a third transistor. The first end of the first resistor is coupled to the system voltage. The first end of the first transistor is coupled to the second end of the first resistor. The second end of the first transistor is coupled to the output end of the bias circuit. The first end of the second transistor is coupled to the system voltage. The control end of the second transistor is coupled to the second end of the first resistor. The first end of the third transistor is coupled to the second end of the first transistor. The second end of the third transistor is coupled to the first reference voltage. The control end of the third transistor is coupled to the second end of the second transistor.

In order to make the above features of the present invention more clearly understood, embodiments are given below and described in detail with reference to the accompanying drawings.

The term "coupled (or connected)" used in the entire specification of this case (including the scope of the patent application) may refer to any direct or indirect means of connection. For example, if the text describes that a first device is coupled (or connected) to a second device, it should be interpreted that the first device can be directly connected to the second device, or the first device can be indirectly connected to the second device through other devices or some connection means. The terms "first", "second", etc. mentioned in the entire specification of this case (including the scope of the patent application) are used to name the elements or distinguish different embodiments or scopes, and are not used to limit the upper or lower limit of the number of elements, nor to limit the order of elements. In addition, wherever possible, elements/components/steps with the same number in the drawings and embodiments represent the same or similar parts. Elements/components/steps using the same reference numerals or the same terms in different embodiments may refer to each other for related descriptions.

FIG1 is a circuit block diagram of a radio frequency (RF) amplifier 100 according to an embodiment of the present invention. In the embodiment shown in FIG1 , the RF amplifier 100 includes an amplifier 110, an LC resonant circuit 120, and a bias circuit 130, all of which are coupled to an RF path P1. In this embodiment, the amplifier 110 includes an input end and an output end, wherein the input end is used to receive an input RF signal SRF1 through the RF path P1, and the output end is used to output an amplified RF signal SRF2. The bias circuit 130 includes a first end and a second end, wherein the first end is used to couple to a reference voltage Vref, and the second end is used to couple to the input end of the amplifier 110 to provide a DC component Id1. The reference voltage Vref can be provided by a control circuit or externally, and switched between different reference levels to enable and disable the RF amplifier 100. When the reference voltage Vref is a first reference level, the RF amplifier 100 is enabled and operates normally. At this time, the DC component Id1 provided by the bias circuit 130 can make the amplifier 110 operate in a linear region, and the amplifier 110 can amplify the input RF signal SRF1 of the RF path P1 to output the amplified RF signal SRF2. When the reference voltage Vref is a second reference level (different from the first reference level), the RF amplifier 100 is disabled. At this time, the bias circuit 130 cancels (does not provide) or reduces the DC component Id1.

The first end of the LC resonant circuit 120 is coupled to a reference voltage Vref. The second end of the LC resonant circuit 120 is coupled to the RF path P1. In some embodiments, the input RF signal SRF1 may include two fundamental tones at a first frequency and a second frequency. When the RF amplifier 100 is enabled (performing normal operation), the LC resonant circuit 120 may provide a filtering path to filter signal components outside the frequency band formed by the first frequency and the second frequency in the input RF signal SRF1. For example, the filtering path may filter a frequency related to the difference between the first frequency and the second frequency. Furthermore, the filter path provided by the LC resonant circuit 120 is a low impedance path for a signal having a frequency related to the difference between the first frequency and the second frequency, and is a high impedance path for a signal within a frequency band formed by the first frequency and the second frequency. Therefore, the signal having a frequency related to the difference between the first frequency and the second frequency can be guided to the filter path provided by the LC resonant circuit 120, thereby achieving a filtering effect.

In the early stage when the RF amplifier 100 changes from the disabled state to the enabled state, the bias circuit 130 needs to spend a waiting time to pull up the DC level of the amplifier 110 from a low level (e.g., a ground level) to a preset target level so that the RF amplifier 100 enters the operating point. When the reference voltage Vref switches from the second reference level to the first reference level to enable the bias circuit 130, the LC resonant circuit 120 can pull up the voltage of the RF path P1 correspondingly according to the change of the reference voltage Vref, so that the bias circuit 130 can pull up the DC level of the amplifier 110 from a low level (e.g., a ground level) to the preset target level more quickly. In this way, the LC resonant circuit 120 can shorten the DC level setting time of the amplifier 110, so that the amplifier 110 can reach the operating point more quickly.

FIG. 2 is a circuit block diagram of an RF amplifier 200 according to another embodiment of the present invention. In the embodiment shown in FIG. 2 , the RF amplifier 200 may include an amplifier 110, an LC resonant circuit 120, and a bias circuit 130. The amplifier 110, the LC resonant circuit 120, and the bias circuit 130 shown in FIG. 2 may be analogized with the relevant description of the amplifier 110, the LC resonant circuit 120, and the bias circuit 130 shown in FIG. 1 , so they are not repeated here. In the embodiment shown in FIG. 2 , according to design requirements, the RF amplifier 200 may further include a matching circuit 140. The matching circuit 140 is configured in the RF path P1. The matching circuit 140 may be coupled to the input end of the amplifier 110 through the RF path P1. On the RF path P1, the input end of the amplifier 110 can receive the input RF signal SRF1 through the matching circuit 140.

According to design requirements, the matching circuit 140 may include an inductor, and the LC resonant circuit 120 may share the inductor included in the matching circuit 140 with the matching circuit 140 to have a first resonant frequency. According to design requirements, the input RF signal SRF1 may include two fundamental tones at the first frequency and the second frequency, and the matching circuit 140 may provide an input impedance matched to the two fundamental tones, that is, provide an input impedance matched to the amplifier 110. The LC resonant circuit 120 may provide a filtering path to filter signal components outside the frequency band formed by the first frequency and the second frequency in the input RF signal SRF1.

In the embodiment shown in FIG2 , according to design requirements, the RF amplifier 200 may further include a matching circuit 150. The matching circuit 150 may be configured in the RF path P2 shown in FIG2 . The matching circuit 150 may be coupled to the output end of the amplifier 110. On the RF path P2, the output end of the amplifier 110 may output the amplified RF signal SRF2 through the matching circuit 150. Similar to the relevant description of the matching circuit 140, the amplified RF signal SRF2 may include two fundamental tones at the first frequency and the second frequency, and the matching circuit 150 may provide an output impedance matched to the two fundamental tones, that is, provide an output impedance matched to the amplifier 110.

In this embodiment, according to design requirements, the RF amplifier 200 may further include an LC resonant circuit 160. In some embodiments, a first end of the LC resonant circuit 160 may be coupled to another reference voltage (e.g., a relatively fixed system voltage Vcc). The LC resonant circuit 160 may be coupled to the output end of the amplifier 110 to provide a DC component Id2, so that the amplifier 110 can operate in a linear region. Similar to the relevant description of the LC resonant circuit 120, the LC resonant circuit 160 may provide a filtering path to filter signal components outside the frequency band formed by the first frequency and the second frequency in the amplified RF signal SRF2. The matching circuit 150 may include an inductor, and the LC resonant circuit 160 may share the inductor included in the matching circuit 150 with the matching circuit 150 to have a second resonant frequency. According to design requirements, the input RF signal SRF1 and/or the amplified RF signal SRF2 may include two fundamental tones at the first frequency and the second frequency. The LC resonant circuit 160 may provide a filtering path to filter signal components outside the frequency band formed by the first frequency and the second frequency in the amplified RF signal SRF2 output by the amplifier 110. That is, the filtering path provided by the LC resonant circuit 160 is a low impedance path for a signal having a frequency related to the difference between the first frequency and the second frequency, and is a high impedance path for a signal within a frequency band formed by the first frequency and the second frequency.

Thus, the filter path provided by the LC resonant circuits 120 and 160 can filter out signal components outside the frequency band formed by the first frequency and the second frequency. Therefore, the RF amplifier 200 can effectively suppress the noise associated with the two fundamental tones of the input RF signal SRF1 and improve the linearity of the output power of the RF amplifier 200.

FIG3 is a circuit diagram of the RF amplifier 200 shown in FIG2 according to an embodiment of the present invention. According to the actual design, the amplifier 110, the LC resonant circuit 120 and the bias circuit 130 shown in FIG1 can also be analogized with reference to the relevant description of the amplifier 110, the LC resonant circuit 120 and the bias circuit 130 shown in FIG3. In the embodiment shown in FIG3, the RF amplifier 200 includes the amplifier 110, the LC resonant circuit 120, the LC resonant circuit 160, the bias circuit 130, the matching circuit 140 and the matching circuit 150. The amplifier 110 includes a transistor T1. The transistor T1 can be, for example, an NPN transistor, a BJT transistor or a MOS transistor, and this embodiment is not limited thereto. In detail, the control end (e.g., base) of transistor T1 is coupled to the input end of amplifier 110 to receive input RF signal SRF1. The first end (e.g., emitter) of transistor T1 is coupled to reference voltage VR (e.g., ground voltage or other fixed voltage). The second end (e.g., collector) of transistor T1 is coupled to the output end of amplifier 110 to output amplified RF signal SRF2.

In the present embodiment, the LC resonant circuit 120 may include, for example, a capacitor C1 and an inductor L1 connected in series. In the embodiment shown in FIG3 , a first end of the capacitor C1 is coupled to a first end of the LC resonant circuit 120 to receive a reference voltage Vref. A second end of the capacitor C1 is coupled to a first end of the inductor L1. A second end of the inductor L1 is coupled to a second end of the LC resonant circuit 120 to couple to a matching circuit 140. In other embodiments, the positions of the capacitor C1 and the inductor L1 may be interchangeable, and are not limited to the coupling method shown in FIG3 . In some embodiments, the capacitor C1 may be a variable capacitor to adjust the capacitance value of the capacitor C1 according to the operating conditions (e.g., operating bandwidth or operating frequency) of the RF amplifier 200, thereby adjusting the impedance. In addition, the LC resonant circuit 120 can also be implemented with reference to the following multiple embodiments.

In this embodiment, the matching circuit 140 may include a capacitor C2 and an inductor L2. In detail, the capacitor C2 is configured in the RF path P1. The first end of the capacitor C2 is used to receive the input RF signal SRF1. The second end of the capacitor C2 is coupled to the second end of the LC resonant circuit 120 and the first end of the inductor L1. The second end of the inductor L1 is coupled to the input end of the amplifier 110 to provide an AC component Ia to the input end of the amplifier 110. According to design requirements, the capacitor C2 and the inductor L2 can form the RF path P1, and the matching circuit 140 can provide an input impedance matched to the amplifier 110. The input impedance provided by the matching circuit 140 can be jointly determined by the capacitor C2 and the inductor L2 in the matching circuit 140 and the capacitor C1 and the inductor L1 in the LC resonant circuit 120. In some embodiments, the LC resonant circuit 120 and the matching circuit 140 may share the inductor L2 and have a first resonant frequency. In this way, the inductance value of the inductor L1 may be reduced to reduce the size of the RF amplifier 200.

In this embodiment, the bias circuit 130 may include a transistor T2, a diode unit, a capacitor C3, and a resistor R1. The transistor T2 may provide a DC component Id1 at the second end of the bias circuit 130. The transistor T2 may be, for example, an NPN transistor or a BJT transistor or other types of transistors. According to the actual design, the diode unit may include, for example, diodes D1 and D2 connected in series. In detail, the first end (for example, the emitter) of the transistor T2 is coupled to the second end of the bias circuit 130 to be coupled to the input end of the amplifier 110. The second end (for example, the collector) of the transistor T2 is coupled to the system voltage Vccb. The control end (e.g., base) of transistor T2 is coupled to the first end of the diode unit (diodes D1, D2), the first end of capacitor C3, and the first end of resistor R1. The second end of the diode unit (diodes D1, D2) and the second end of capacitor C3 are respectively coupled to the reference voltage VR. The second end of resistor R1 is coupled to the first end of bias circuit 130 to receive reference voltage Vref.

In this embodiment, the matching circuit 150 may include an inductor L3, a capacitor C4, and a capacitor C5. In detail, the first end of the inductor L3 is coupled to the output end of the amplifier 110. The second end of the inductor L3 is coupled to the first end of the capacitor C4 and the first end of the capacitor C5. The second end of the capacitor C4 is coupled to the reference voltage VR. The second end of the capacitor C5 is used to provide an amplified RF signal SRF2. According to design requirements, the capacitor C5 and the inductor L3 can form an RF path P2, and in combination with the capacitor C4, the matching circuit 150 can provide an output impedance matched to the amplifier 110.

The LC resonant circuit 160 may include an inductor L4 and a capacitor C6. In detail, a first end of the inductor L4 is coupled to an output end of the amplifier 110. A second end of the inductor L4 is coupled to a system voltage Vcc and a first end of the capacitor C6. A second end of the capacitor C6 is coupled to a reference voltage VR. In some embodiments, the inductor L4 may be implemented as a choke, for example.

FIG4 is a circuit block diagram of an RF amplifier 400 according to another embodiment of the present invention. In the embodiment shown in FIG4 , the RF amplifier 400 includes an amplifier 110, an LC resonant circuit 120, an LC resonant circuit 170, and a bias circuit 130, and all are coupled to the RF path P1. According to the actual design, the amplifier 110, the LC resonant circuit 120, and the bias circuit 130 shown in FIG4 can be deduced by reference to the relevant description of the amplifier 110, the LC resonant circuit 120, and the bias circuit 130 shown in FIG1 , and (or) by reference to the relevant description of the amplifier 110, the LC resonant circuit 120, and the bias circuit 130 shown in FIG3 , so it is not repeated. In the embodiment shown in FIG. 4 , the first end of the LC resonant circuit 170 is used to couple to a reference voltage VR (e.g., a ground voltage or other fixed voltage). According to the actual design, in some embodiments, when the reference voltage Vref is the reference voltage VR (the second reference level), the RF amplifier 100 is disabled. The second end of the LC resonant circuit 170 is used to couple to the second end of the LC resonant circuit 120 and to the input end of the amplifier 110. In this way, when the reference voltage Vref switches from the second reference level to the first reference level to enable the bias circuit 130, the LC resonant circuit 120 can pull up the voltage of the RF path P1 according to the change of the reference voltage Vref, and the LC resonant circuit 170 can pull down the voltage of the RF path P1 according to the reference voltage VR. Therefore, in the early stage of enabling the bias circuit 130 by the reference voltage Vref, the LC resonant circuits 120 and 170 can quickly bring the voltage of the input end of the amplifier 110 close to the preset target level, so that the amplifier 110 can reach the operating point more quickly.

FIG5 is a schematic diagram of the LC resonant circuit 170 shown in FIG4 according to an embodiment of the present invention. In the embodiment shown in FIG5, the LC resonant circuit 170 includes an inductor L5 and a capacitor C7 connected in series. The first end of the inductor L5 is coupled to the first end of the LC resonant circuit 170 to couple to the reference voltage VR. The second end of the inductor L5 is coupled to the first end of the capacitor C7. The second end of the capacitor C7 is coupled to the second end of the LC resonant circuit 170 to couple to the RF path P1. In other embodiments, the positions of the capacitor C7 and the inductor L5 can be interchanged, and are not limited to the coupling method shown in FIG5. For signal components (noise) outside the frequency band formed by the first frequency and the second frequency in the input RF signal SRF1, the LC resonant circuit 170 can provide a low impedance path to effectively filter out the noise in the input RF signal SRF1. For signals within the frequency band formed by the first frequency and the second frequency in the input RF signal SRF1, the LC resonant circuit 170 can provide a high impedance path.

In the aforementioned multiple embodiments, the implementation of the LC resonant circuit 120 may not be limited to the example shown in FIG3. For example, FIG6 is a schematic diagram of the LC resonant circuit 120 shown in FIG2 according to another embodiment of the present invention. According to the actual design, the LC resonant circuit 120 shown in FIG1, FIG4 and (or) FIG5 can also be analogized with reference to the relevant description of the LC resonant circuit 120 shown in FIG6. In the embodiment shown in FIG6, the LC resonant circuit 120 may include a bias circuit 121, a capacitor C8 and an inductor L6, and the LC resonant circuit 120 has a first end and a second end to be coupled to the reference voltage Vref and the RF path P1 respectively. According to the actual design, the bias circuit 121 may include a low output impedance (low Rout) bias circuit and/or other voltage generating circuits. In detail, the bias circuit 121 has an input terminal IP and an output terminal OP, wherein the input terminal IP is used to couple to the first terminal of the LC resonant circuit 120 to receive the reference voltage Vref, and the output terminal OP is used to generate the corresponding reference voltage Vrefc. The capacitor C8 and the inductor L6 are connected in series between the output terminal OP of the bias circuit 121 and the second terminal of the LC resonant circuit 120. That is, the capacitor C8 and the inductor L6 are connected in series between the bias circuit 121 and the RF path P1.

In the embodiment shown in FIG6 , the first end of capacitor C8 is coupled to the output terminal OP of bias circuit 121 to receive the corresponding reference voltage Vrefc. The second end of capacitor C8 is coupled to the first end of inductor L6. The second end of inductor L6 is coupled to the second end of LC resonant circuit 120 to couple to RF path P1. In other embodiments, the positions of capacitor C8 and inductor L6 can be interchanged, and are not limited to the coupling method shown in FIG6 . When the reference voltage Vref is switched from the second reference level to the first reference level to enable bias circuit 130, bias circuit 121 can generate the corresponding reference voltage Vrefc according to the change of reference voltage Vref. In this way, the LC resonant circuit 120 can quickly (instantly) pull up the voltage of the RF path P1 through the corresponding reference voltage Vrefc of the bias circuit 121, so that the amplifier 110 can reach the operating point more quickly.

FIG. 7 is a circuit diagram of the bias circuit 121 shown in FIG. 6 according to an embodiment of the present invention. Please refer to FIG. 6 and FIG. 7 at the same time. The bias circuit 121 may include a resistor R2, a transistor T3, and a transistor T4 to form a feedback loop and generate a corresponding reference voltage Vrefc with a low output impedance. In the embodiment shown in FIG. 7, the bias circuit 121 may further selectively include a resistor R3 and a capacitor C9, and may be used to reduce the oscillation generated by the aforementioned feedback loop. In detail, the first end of the resistor R2 is coupled to the first end of the LC resonant circuit 120, that is, coupled to the input terminal IP of the bias circuit 121 to receive the reference voltage Vref. The second end of the resistor R2 is coupled to the first end (e.g., collector) of the transistor T3 and the control end (e.g., base) of the transistor T4. The control end (e.g., base) of the transistor T3 is coupled to the first end of the capacitor C9, the second end (e.g., emitter) of the transistor T4, the first end of the resistor R3, and the output end OP of the bias circuit 121 to generate a corresponding reference voltage Vrefc. The first end (e.g., collector) of the transistor T4 is coupled to the system voltage Vccb. The second end (e.g., emitter) of the transistor T3, the second end of the capacitor C9, and the second end of the resistor R3 are respectively coupled to a reference voltage VR (e.g., ground voltage or other fixed voltage).

FIG8 is a circuit diagram of the bias circuit 121 shown in FIG6 according to another embodiment of the present invention. Please refer to FIG6 and FIG8 at the same time. In the embodiment shown in FIG8, the bias circuit 121 may include a resistor R4, a transistor T5, a transistor T6 and a transistor T7 to form a feedback loop and generate a corresponding reference voltage Vrefc with a low output impedance. Transistor T6 and transistor T7 can be used to provide a greater gain effect. In detail, the first end of the resistor R4 and the first end (e.g., collector) of the transistor T6 are respectively coupled to the system voltage Vccb. The second end of the resistor R4 is coupled to the first end (e.g., collector) of the transistor T5 and the control end (e.g., base) of the transistor T6. In the embodiment shown in FIG8 , the control terminal (e.g., base) of transistor T5 is coupled to the first terminal of the LC resonant circuit 120, that is, coupled to the input terminal IP of the bias circuit 121, to receive the reference voltage Vref. The second terminal (e.g., emitter) of transistor T5 and the first terminal (e.g., collector) of transistor T7 are commonly coupled to the output terminal OP of the bias circuit 121 to generate the corresponding reference voltage Vrefc. The control terminal (e.g., base) of transistor T7 is coupled to the second terminal (e.g., emitter) of transistor T6. The second terminal (e.g., emitter) of transistor T7 is coupled to the reference voltage VR (e.g., ground voltage or other fixed voltage).

FIG9 is a circuit diagram of the bias circuit 121 shown in FIG6 according to another embodiment of the present invention. Please refer to FIG6 and FIG9 at the same time. In the embodiment shown in FIG9, the bias circuit 121 may include a switch circuit SW1, a resistor R4, a transistor T5, a transistor T6, and a transistor T7. The resistor R4, the transistor T5, the transistor T6, and the transistor T7 shown in FIG9 can be deduced by referring to the relevant description of the resistor R4, the transistor T5, the transistor T6, and the transistor T7 shown in FIG8, so they are not repeated. The difference from the embodiment shown in FIG8 is that the bias circuit 121 shown in FIG9 further includes a switch circuit SW1. The switch circuit SW1 is coupled between the second end of the resistor R4 and the control end of the transistor T6. That is, the control end of transistor T6 is coupled to the second end of resistor R4 through switch circuit SW1. Switch circuit SW1 is controlled by reference voltage Vref. When reference voltage Vref is at a first reference level, switch circuit SW1 is turned on, and RF amplifier 100 is enabled to operate normally. When reference voltage Vref is at a second reference level (different from the first reference level), switch circuit SW1 is turned off, and RF amplifier 100 is disabled to reduce power consumption.

FIG. 10 is a circuit diagram of the bias circuit 121 shown in FIG. 6 according to another embodiment of the present invention. Please refer to FIG. 8 and FIG. 10 at the same time. In the embodiment shown in FIG. 10, the bias circuit 121 includes a resistor R4, a transistor T5, a transistor T6, a transistor T7, a resistor R5 and a diode unit. The resistor R4, the transistor T5, the transistor T6 and the transistor T7 shown in FIG. 10 can be deduced by referring to the relevant description of the resistor R4, the transistor T5, the transistor T6 and the transistor T7 shown in FIG. 8, so they are not repeated here. The difference from the embodiment shown in FIG. 8 is that the control end of the transistor T5 shown in FIG. 10 is coupled to the input end IP of the bias circuit 121 through the resistor R5.

According to the actual design, in the embodiment shown in FIG. 10 , the diode unit includes diodes D3 and D4 connected in series, wherein the diodes D3 and D4 are transistors in the form of diode connection. The resistor R5, the diodes D3 and D4 can generate an appropriate voltage to drive the bias circuit 121. In detail, the first end of the resistor R5 is coupled to the first end of the LC resonant circuit 120, that is, coupled to the input end IP of the bias circuit 121 to receive the reference voltage Vref. The second end of the resistor R5 is coupled to the control end of the transistor T5 and the first end of the diode unit (the anode of the diode D3). The second end of the diode unit (the cathode of the diode D4) is coupled to the reference voltage VR.

FIG. 11 is a circuit diagram of the bias circuit 121 shown in FIG. 6 according to another embodiment of the present invention. Please refer to FIG. 8 and FIG. 11 at the same time. In the embodiment shown in FIG. 11, the bias circuit 121 includes a resistor R4, a transistor T5, a transistor T6, a transistor T7, a capacitor C10 and a resistor R6. The resistor R4, the transistor T5, the transistor T6 and the transistor T7 shown in FIG. 11 can be deduced by referring to the relevant description of the resistor R4, the transistor T5, the transistor T6 and the transistor T7 shown in FIG. 8, so they are not repeated. The difference from the embodiment shown in FIG. 8 is that the bias circuit 121 shown in FIG. 11 also includes a capacitor C10 and a resistor R6 connected in series. Resistor R6 and capacitor C10 can be used to reduce the vibration generated by the aforementioned feedback loop. In detail, the first end of capacitor C10 is coupled to the control end of transistor T5. The second end of capacitor C10 is coupled to the first end of resistor R6. The second end of resistor R6 is coupled to the control end of transistor T7. In other embodiments, the positions of capacitor C10 and resistor R6 can be interchanged, and are not limited to the coupling method shown in FIG. 11.

In summary, the RF amplifier of the embodiments of the present invention can provide a DC component to the input terminal of the amplifier through the bias circuit 130. The LC resonant circuit 120 can provide a filtering path. In addition, the reference voltage Vref can enable and disable the RF amplifier. When the reference voltage Vref enables the bias circuit 130, the LC resonant circuit 120 can correspondingly increase the voltage of the RF path P1 according to the change of the reference voltage Vref, so that the amplifier 110 can reach the operating point more quickly.

Although the present invention has been disclosed as above by the embodiments, they are not intended to limit the present invention. Any person with ordinary knowledge in the relevant technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be defined by the scope of the attached patent application.

100, 200, 400: RF amplifier 110: amplifier 120, 160, 170: inductor-capacitor resonance circuit 121: bias circuit 130: bias circuit 140, 150: matching circuit C1~C10: capacitor D1~D4: diode Ia, Id1, Id2: current component IP, OP: end point L1~L6: inductor P1, P2: RF path R1~R6: resistor SRF1: input RF signal SRF2: amplified RF signal SW1: switch circuit T1~T7: transistor Vcc, Vccb: system voltage VR, Vref, Vrefc: reference voltage

FIG. 1 is a circuit block diagram of an RF amplifier according to an embodiment of the present invention. FIG. 2 is a circuit block diagram of an RF amplifier according to another embodiment of the present invention. FIG. 3 is a circuit block diagram of an RF amplifier shown in FIG. 2 according to an embodiment of the present invention. FIG. 4 is a circuit block diagram of an RF amplifier according to another embodiment of the present invention. FIG. 5 is a circuit block diagram of an inductor-capacitor resonant circuit shown in FIG. 4 according to an embodiment of the present invention. FIG. 6 is a circuit block diagram of an inductor-capacitor resonant circuit shown in FIG. 2 according to another embodiment of the present invention. FIG. 7 is a circuit block diagram of a bias circuit shown in FIG. 6 according to an embodiment of the present invention. FIG8 is a circuit diagram illustrating the bias circuit shown in FIG6 according to another embodiment of the present invention. FIG9 is a circuit diagram illustrating the bias circuit shown in FIG6 according to another embodiment of the present invention. FIG10 is a circuit diagram illustrating the bias circuit shown in FIG6 according to another embodiment of the present invention. FIG11 is a circuit diagram illustrating the bias circuit shown in FIG6 according to another embodiment of the present invention.

121: Bias circuit IP, OP: End points R4: Resistor T5, T6, T7: Transistor Vccb: System voltage VR: Reference voltage

Claims (6)

A bias circuit includes: a first resistor, a first end of which is coupled to a system voltage; a first transistor, a first end of which is coupled to a second end of the first resistor, wherein a second end of the first transistor is coupled to an output end of the bias circuit; a second transistor, a first end of which is coupled to the system voltage, wherein a control end of the second transistor is coupled to the second end of the first resistor; and a third transistor, a first end of which is coupled to the second end of the first transistor, wherein a second end of the third transistor is coupled to a first reference voltage, and a control end of the third transistor is coupled to a second end of the second transistor. A bias circuit as described in claim 1, wherein the bias circuit is included in an LC resonance circuit, an input terminal of the bias circuit is coupled to a first terminal of the LC resonance circuit, and the bias circuit generates a corresponding reference voltage to a capacitor and an inductor connected in series between an output terminal of the bias circuit and a second terminal of the LC resonance circuit. The bias circuit as described in claim 1 further includes: A switch circuit coupled between the second end of the first resistor and the control end of the second transistor, wherein the switch circuit is controlled by an input end of the bias circuit, and the control end of the second transistor is coupled to the second end of the first resistor through the switch circuit. A bias circuit as described in claim 1, wherein a control terminal of the first transistor is coupled to an input terminal of the bias circuit to receive a second reference voltage. The bias circuit as described in claim 1 further includes: a second resistor, a first end of which is coupled to an input end of the bias circuit to receive a second reference voltage, wherein a second end of the second resistor is coupled to a control end of the first transistor; and a diode unit, a first end of which is coupled to the second end of the second resistor, wherein a second end of the diode unit is coupled to the first reference voltage. The bias circuit as described in claim 1 further includes a capacitor and a second resistor connected in series, wherein: a first end of the capacitor is coupled to a control end of the first transistor; and a first end of the second resistor is coupled to a second end of the capacitor, and a second end of the second resistor is coupled to the control end of the third transistor.

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