TWI736088B - Electronic device and test mode enabling method thereof - Google Patents

Abstract

An electronic device and a method for enabling a test mode thereof are provided. The electronic device includes a plurality of peripheral components, a flash memory, a key comparison circuit and a test mode circuit. The flash memory provides a matching key. The key comparison circuit is used to compare the comparison key and an entry key and provide a test entry signal in response to the comparison result. The test mode circuit tests the peripheral components in responds to the test entry signal.

Description

Electronic device and its test mode activation method

The present invention relates to an electronic device, and more particularly to an electronic device and a method for enabling a test mode thereof.

In recent years, the test mode of an electronic device is to input specific data through an input/output interface (such as a general-purpose input/output (GPIO)) and determine whether the input data is an entry key to determine whether to enter the test mode. However, in order to prevent customers from erroneously entering the test mode when using the input and output interfaces and thus affecting the behavior of the chip, the access key is designed to be highly complex, with a large number of bits, and not easy to enter randomly. However, such an operation mode also increases the difficulty for the measurement personnel to enter the test mode. In addition, after the operator enters the test mode, the voltage state of the reset pin must be maintained in the reset state, so that the processor (such as the central processing unit (CPU)) is not involved, and the test mode can be used for measurement. Therefore, how to make the test mode easier to enter without being mistaken by the user has become an important point in the design of electronic devices.

The present invention provides an electronic device and a test mode activation method thereof, which can simplify the process of activating the test mode and prevent the test mode of the electronic device from being opened by a user.

The electronic device of the present invention includes a plurality of peripheral components, flash memory, a key comparison circuit, and a test mode circuit. The flash memory provides the comparison key. The key comparison circuit is used to compare the comparison key and the access key, and provide a test access signal in response to the comparison result. The test mode circuit tests these peripheral components in response to the test input signal.

The test mode activation method of the electronic device of the present invention includes the following steps. The comparison key is provided from the flash memory. Compare the key and enter the key through the key comparison circuit. The comparison result of the comparison key and the entry key is provided by the key comparison circuit to provide a test entry signal, and a plurality of peripheral components are tested by the test mode circuit in response to the test entry signal.

Based on the above, the electronic device and the test mode activation method of the embodiment of the present invention determine whether the electronic device enters the test mode by comparing the comparison key from the flash memory and the entry key, and automatically determines whether the electronic device enters the test mode. Whether to enter the test mode without data input can simplify the process of activating the test mode and prevent the test mode of the electronic device from being opened by the user.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.

FIG. 1 is a schematic diagram of a system of an electronic device according to an embodiment of the invention. Please refer to FIG. 1, in this embodiment, the electronic device 100 includes a power circuit 110, a flash memory 120, a processor 130, a key comparison circuit 140, a test mode circuit 150 and a plurality of peripheral components 160 and 170. The peripheral components 160 and 170 at least include voltage controlled oscillators, voltage regulators, or output and input circuits.

The power circuit 110 is coupled to the flash memory 120, the processor 130, and the key comparison circuit 140. The flash memory 120 is coupled to the processor 130, the key comparison circuit 140, the test mode circuit 150, and a plurality of peripheral components 160 and 170. In addition, the key comparison circuit 140 is coupled to the test mode circuit 150.

In this embodiment, the electronic device 100 is activated in response to the power activation signal Pon, and then enters an initialization period, where the power activation signal Pon may be input from the electronic device 100 (such as buttons, touch keys, switches, etc.). Furthermore, the power circuit 110 responds to the power activation signal Pon to provide at least the system voltage Vdd to the flash memory 120, and the flash memory 120 responds to receiving the system voltage Vdd to start the initialization process.

During the initialization period, the power circuit 110 controls the reset pin of the processor 130 to be in a reset state. For example, the power circuit 110 can provide a reset signal HRESETn with a logic low level or a logic level of "0" to the processor 130 The reset pin.

In the initialization process, the flash memory 120 sequentially provides a plurality of initialization parameters DPc, DP1, DP2, DPT to the processor 130, peripheral components 160, 170 and the test mode circuit 150 to sequentially set the processor 130 and peripheral components 160, 170 and the operation mode and operation state of the test mode circuit 150.

After the initialization process, that is, after the initialization period, the flash memory 120 reads the comparison key Kcp stored in its key area Mek, and provides the comparison key Kcp to the key comparison circuit 140. The key comparison circuit 140 is used to compare the key Kcp and the access key Ken, and determine whether to provide the test access signal Ten to the power circuit 110 and test based on the comparison result of the comparison key Kcp and the access key Ken. The mode circuit 150 determines whether to enter the test mode. For example, when the comparison key Kcp is the same as the entry key Ken, the key comparison circuit 140 can provide a test entry signal Ten; when the comparison key Kcp is different from the entry key Ken, the key comparison circuit 140 may not provide test access signal Ten.

Then, the test mode circuit 150 can respond to receiving the test entry signal Ten to test the peripheral components 160 and 170, and the power circuit 110 can respond to receiving the test entry signal Ten to maintain the reset pin of the processor 130 in the reset state, In order to prevent the operation of the processor 130 from hindering the testing of the peripheral components 160 and 170, and the input of external signals of the electronic device 100 is not required. On the other hand, the test mode circuit 150 can respond to not receiving the test entry signal Ten without testing the peripheral components 160 and 170, and the power supply circuit 110 can react to not receiving the test entry signal Ten to reset the pin of the processor 130 Release from the reset state, even if the reset pin of the processor 130 changes from the reset state to the enable state (for example, a logic high level or a logic level “1”), so that the processor 130 starts to operate.

For example, after the main components (such as the circuit system) of the electronic device 100 are completed, the comparison key Kcp can be preset to be the same as the access key Ken, so that the electronic device 100 will automatically be activated after booting in the factory. Enter the test mode, and the test of the electronic device 100 will be executed until the electronic device 100 is shut down. Then, after the test is completed, the comparison key Kcp can be changed to be different from the entry key Ken (such as erasing or rewriting the key area Mek) so that the user will not enter the test after starting the electronic device 100 model.

According to the above, in the embodiment of the present invention, the steps (or actions) of comparing the key Kcp and entering the key Ken are inserted and compared after the initialization period (ie, the initialization process) to determine whether the electronic device 100 enters the test mode, and through The automatic determination of whether the electronic device 100 enters the test mode without data input can simplify the process of enabling the test mode and prevent the test mode of the electronic device 100 from being opened by the user.

In the embodiment of the present invention, the area storing the initialization parameters DPc, DP1, DP2, DPT in the flash memory 120 and the area storing the comparison key Kcp (ie, the key area Mek) may be dedicated to the system, that is, storing initialization The area of the parameters DPc, DP1, DP2, DPT and the key area Mek are invisible to the user, which can prevent the user from enabling the test mode outside the factory.

In the embodiment of the present invention, the access key Ken can be stored in the key comparison circuit 140, or can be stored in any storage element (such as the flash memory 120) in the electronic device 100, that is, the flash memory 120 The memory 120 can sequentially provide the comparison key Kcp and the access key Ken to the key comparison circuit 140.

In the embodiment of the present invention, after the initialization period and the key comparison circuit 140 does not provide the test entry signal Ten, the electronic device 100 will return to the boot process to restore all components (such as the processor 130, peripheral components 160, 170). ) Power supply. After the boot process is completed, the user mode is entered. At this time, the processor 130 can access data from the flash memory 120 to execute the application program written into the flash memory 120 by the user.

In the embodiment of the present invention, a control circuit (not shown) may be configured in the electronic device 100 to control the flash memory 120 to output the initialization parameters DPc, DP1, DP2, DPT, and the timing of the comparison key Kcp, that is, The control circuit (not shown) can sequentially provide the initialization parameters DPc, DP1, DP2, DPT, and the address corresponding to the comparison key Kcp to the control flash memory 120. In other words, the control circuit (not shown) can respond to the system voltage Vdd to provide the initialization parameters DPc, DP1, DP2, DPT, and the address corresponding to the comparison key Kcp. In the embodiment of the present invention, the control circuit (not shown) can be configured in the flash memory 120. In the embodiment of the present invention, the control circuit (not shown) can be activated in response to the system voltage Vdd, and can be disabled in response to the test entry signal Ten.

FIG. 2 is a flowchart of a test mode activation method of an electronic device according to an embodiment of the invention. 2, in this embodiment, the circuit system of the electronic device is first powered on (step S210), that is, the power circuit of the electronic device responds to the power-on signal to provide at least the system voltage to the circuit system. Then, the flash memory is initialized (step S220), and after the initialization, a comparison key is provided from the flash memory (step S230). Then, the comparison key and the entry key are compared through the key comparison circuit (step S240), and the comparison result of the comparison key and the entry key is reflected by the key comparison circuit to provide a test entry signal. In other words, when the comparison key is the same as the entry key, that is, the judgment result of step S240 is "Yes", the key comparison circuit can provide a test entry signal to make the electronic device enter the test mode (step S250); When the comparison key is different from the entry key, that is, the judgment result of step S240 is "No", the key comparison circuit may not provide a test entry signal, and then execute the boot process to make the electronic device enter the user mode.

In the test mode, a plurality of peripheral components are measured by the test mode circuit in response to the test input signal. During the boot process, at least the power is ensured to be stable (step S260), the reset state of the reset pin of the processor is released (step S270), and the program code written by the user is executed through the processor (step S280). The sequence of steps S210 to S280 is for illustration, and the embodiment of the present invention is not limited thereto. In addition, the details of steps S210 to S280 can be referred to as shown in the embodiment in FIG. 1, which will not be repeated here.

To sum up, the electronic device and the test mode activation method of the embodiment of the present invention determine whether the electronic device enters the test mode through the steps of inserting the comparison key and entering the key after the initialization period. The action of determining whether to enter the test mode without data input can simplify the process of enabling the test mode and prevent the test mode of the electronic device from being opened by the user.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the relevant technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The protection scope of the present invention shall be subject to those defined by the attached patent application scope.

100: Electronic device 110: Power supply circuit 120: Flash memory 130: Processor 140: Key comparison circuit 150: Test mode circuit 160, 170: multiple peripheral components Data: Data DPc, DP1, DP2, DPT: initialization parameters HRESETn: reset signal Kcp: match key Ken: Enter the key Mek: key area Pon: Power start signal Ten: Test entry signal Vdd: system voltage S210~S280: Steps

FIG. 1 is a schematic diagram of a system of an electronic device according to an embodiment of the invention. FIG. 2 is a flowchart of a test mode activation method of an electronic device according to an embodiment of the invention.

100: Electronic device 110: Power supply circuit 120: Flash memory 130: Processor 140: Key comparison circuit 150: Test mode circuit 160, 170: multiple peripheral components Data: Data DPc, DP1, DP2, DPT: initialization parameters HRESETn: reset signal Kcp: match key Ken: Enter the key Mek: key area Pon: Power start signal Ten: Test entry signal Vdd: system voltage

Claims (10)

An electronic device comprising: a plurality of peripheral components; a flash memory, providing a comparison key; a key comparison circuit, used for comparison after the flash memory is initialized and before the electronic device is turned on The comparison key and an entry key provide a test entry signal in response to a comparison result; and a test mode circuit in response to the test entry signal to determine whether to test the peripheral components. The electronic device described in the first item of the scope of patent application further includes: a processor having a reset pin; and a power supply circuit that maintains the reset pin in a reset state in response to the test entry signal . The electronic device according to claim 2, wherein the power circuit responds to a power activation signal to provide a system voltage to the flash memory, and the flash memory responds to receiving the system voltage to start an initialization process In the initialization procedure, the flash memory sequentially provides a plurality of initialization parameters to the processor, the peripheral components, and the test mode circuit. The electronic device described in item 3 of the scope of patent application, wherein the comparison key is provided after the initialization procedure. The electronic device described in item 2 of the scope of patent application, wherein when the comparison key is the same as the access key, the key comparison circuit provides the test access information When the comparison key is different from the entry key, the key comparison circuit does not provide the test entry signal, and then the power supply circuit responds to not receiving the test entry signal to release the reset pin The reset state. For the electronic device described in item 5 of the scope of patent application, the comparison key is preset to be the same as the access key, and the comparison key is changed to be different from the access key after the test is completed. The electronic device described in item 1 of the scope of patent application, wherein the access key is stored in the key comparison circuit. A test mode activation method of an electronic device includes: providing a comparison key from a flash memory; after initializing the flash memory and before turning on the electronic device, comparing the comparison key through a key comparison circuit A comparison result of the key and an access key; and a comparison result of the key comparison circuit reacting to the comparison key and the access key provides a test access signal to reflect the test through a test mode circuit The incoming signal determines whether to test multiple peripheral components. The test mode activation method described in item 8 of the scope of patent application further includes: maintaining a reset pin of a processor in a reset state through a power circuit in response to the test entry signal. For example, the test mode activation method described in item 9 of the scope of patent application further includes: providing a system voltage to the power supply circuit in response to a power activation signal Flash memory; and start an initialization process through the flash memory response to receiving the system voltage, and in the initialization process, sequentially provide a plurality of initialization parameters to the processor and the peripheral components through the flash memory And the test mode circuit.

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