TWI731697B - Pixel driving circuit - Google Patents

Abstract

A pixel driving circuit includes a light emitting unit, first to sixth switch units, a first capacitor, a second capacitor and a control circuit. The light emitting unit, the first switch unit and the second switch unit are connected in series between a first operating voltage source and a second operating voltage source. The third switch unit is connected between a first terminal and a control terminal of the second switch unit. A first terminal of the fourth switch unit and a first terminal of the fifth switch unit is connected to a control terminal of the second switch unit. A first terminal of the sixth switch unit is connected to a control terminal of the fifth switch unit. The first capacitor is connected between the second operating voltage source and the second switch unit. The second capacitor is connected between a first data input terminal and the fifth switch unit. The control circuit is connected to the fifth switch unit through a third capacitor, and is configured to set the voltage level of the control terminal of the fifth switch unit.

Description

Pixel drive circuit

This case is about a pixel drive circuit, especially a pixel drive circuit for light-emitting diodes.

Light-emitting diodes have been widely used in today’s displays, and because the brightness of the light-emitting diode is related to its drive current, when outputting high brightness, it is necessary to increase the voltage difference to control the operating area of the transistor to effectively control the current. , But therefore the problem of greater power consumption arises. In addition, because of the variation of each transistor in the manufacturing process and the use process, the threshold voltage may be different, and the resistance generated in the circuit transmission process causes the operating voltage source received by each transistor to be different. Compensating for the critical voltage and operating voltage source may cause the problem of uneven brightness of the light-emitting diodes in the display.

In order to solve the above problems, the present disclosure provides a pixel driving circuit, which includes a light emitting unit, a first switch unit, a second switch unit, a third switch unit, a fourth switch unit, a fifth switch unit, a sixth switch unit, and a second switch unit. A capacitor, a second capacitor and a control circuit. The light emitting unit, the first switch unit and the second switch unit are connected in series and connected between the first operating voltage source and the second operating voltage source. The third switch unit is connected between the first terminal and the control terminal of the second switch unit. The first end of the fourth switch unit is connected to the control end of the second switch unit. The first end of the fifth switch unit is connected to the control end of the second switch unit. The first end of the sixth switch unit is connected to the control end of the fifth switch unit. The first capacitor is connected between the second operating voltage source and the control terminal of the second switch unit. The second capacitor is connected between the first data input terminal and the second terminal of the fourth switch unit. The control circuit is connected to the control terminal of the fifth switch unit via the third capacitor, and the control circuit is used to set the voltage level of the control terminal of the fifth switch unit.

All words used in this article have their usual meanings. The above-mentioned words are defined in commonly used dictionaries. The usage examples of any words discussed in this specification are only examples, and should not be limited to the scope and meaning of this disclosure. Similarly, the present disclosure is not limited to the various embodiments shown in this specification.

In this article, the terms first, second, third, etc., are used to describe various elements, components, regions, layers, and/or blocks, and it is understandable. However, these elements, components, regions, layers and/or blocks should not be limited by these terms. These terms are only used to identify a single element, component, region, layer, and/or block. Therefore, in the following, a first element, component, region, layer and/or block may also be referred to as a second element, component, region, layer and/or block without departing from the original meaning of the present case. As used herein, "and/or" includes any one and all combinations of one or more associated items.

Regarding the “coupling” or “connection” used in this text, it can mean that two or more elements make physical or electrical contact with each other directly, or make physical or electrical contact with each other indirectly, and can also refer to two or more elements. Interoperability or action of components.

FIG. 1 is a circuit structure diagram of a pixel driving circuit 100 according to an embodiment of the disclosure. As shown in FIG. 1, the pixel driving circuit 100 includes switch units U1 to U6, a control circuit 110, capacitors C1 to C3, and a light emitting unit L1.

In the embodiment shown in Figure 1, each of the switching units U1 to U6 includes an N-type MOSFET (hereinafter referred to as NMOS) switching element. The following embodiments will use This is taken as an example for description, but the switch units U1~U6 in this disclosure are not limited to include one NMOS switch element. In other embodiments, each switch unit U1~U6 may include a plurality of NMOS switches connected to each other, including The bipolar junction transistor (BJT) includes one or more equivalent switching circuits, and the disclosure is not limited thereto. In some embodiments. The light-emitting unit L1 can be a light emitting diode (LED), or any other form of electronic component that can be used to emit light, and the disclosure is not limited thereto.

In some embodiments, the switch unit U1, the switch unit U2, and the light emitting unit L1 are coupled in series between the first operating voltage source VDD and the second operating voltage source VSS. The first end of the light emitting unit L1 is coupled to the first operating voltage source VDD, the second end of the light emitting unit L1 is coupled to the first end of the switch unit U1, and the first end of the switch unit U2 is coupled to the second end of the switch unit U1, The second end of the switch unit U2 is coupled to the second operating voltage source VSS. The first terminal of the capacitor C1 is coupled to the control terminal of the switch unit U2, and the second terminal of the capacitor C1 is coupled to the second operating voltage source VSS. The first end of the switch unit U3 is coupled to the first end of the switch unit U2, the second end of the switch unit U3 is coupled to the control end (node A) of the switch unit U2, and the control end of the switch unit U3 is coupled to the control signal S1. The first terminal of the switch unit U4 is coupled to the control terminal (node A) of the switch unit U2, the second terminal of the switch unit U4 is coupled to the data input terminal DataIn1 through the capacitor C2, and the control terminal of the switch unit U4 is coupled to the control signal S2. The first end of the switch unit U5 is coupled to the control end (node A) of the switch unit U2, and the second end of the switch unit U5 is coupled to the control signal S3. The first end of the switch unit U6 is coupled to the control signal S3, the second end of the switch unit U6 is coupled to the control end (node B) of the switch unit U5, and the control end of the switch unit U6 is coupled to the control signal S2. The control circuit 110 is coupled to the control terminal (node B) of the switch unit U5 through the capacitor C3, and is used to set the voltage level of the node B.

In some embodiments, the control circuit 110 includes switch units U7 to U9. In some embodiments, the first end of the switch unit U7 is coupled to one end (node C) of the capacitor C3, the second end and the control end of the switch unit U7 are coupled to the first end of the switch unit U8, and the second end of the switch unit U8 is The terminal is coupled to the data voltage Vdata, and the control terminal of the switch unit U8 is coupled to the control signal S1. The first end of the switch unit U9 is coupled to one end (node C) of the capacitor C3, the second end of the switch unit U9 is coupled to the second operating voltage source VSS, and the control end of the switch unit U9 is coupled to the control signal S3. In some embodiments, the control circuit 110 further includes a switch unit U10. The first terminal of the switch unit U10 is coupled to one end (node C) of the capacitor C3, the second terminal of the switch unit U10 is coupled to the data input terminal DataIn2, and the control terminal of the switch unit U10 is coupled to the light-emitting signal EM.

In some embodiments, the switch units U7 to U10 each include an NMOS switch element. The following embodiments will take this as an example for description. However, the switch units U7 to U10 in the present disclosure are not limited to include an NMOS switch element. In other embodiments, each switch unit U7 to U10 may include a plurality of NMOS switches connected to each other, include BJTs, and include one or more equivalent switching circuits, and the disclosure is not limited thereto.

It should be noted that in other embodiments, those skilled in the art can replace the switching units U1~U10 with P-type MOSFET (PMOS) switches, C-type Metal oxide semiconductor field effect transistor (C-type MOSFET, hereinafter referred to as CMOS) switches or other similar switching elements, and respond to the system voltage (such as the first operating voltage source VDD and the second operating voltage source VSS) and the light-emitting signal ( For example, the logic levels of the light-emitting signal EM) and the control signals (such as the control signals S1 to S3) are adjusted correspondingly, and the same function as the present embodiment can also be achieved.

FIG. 2 is a timing diagram of control signals of the pixel driving circuit 100 in FIG. 1. FIG. In Figure 2, the pixel driving circuit operates sequentially in the first period P1, the second period P2, the third period P3, and the fourth period P4.

FIG. 3A is a circuit state diagram of the pixel driving circuit 100 in FIG. 1 in the first period P1 shown in FIG. 2, and the first period P1 belongs to the reset phase. As shown in Figure 2, in the first period P1, the control signal S2 and the control signal S3 are high level signals (such as voltage level VH), the control signal S1, the light emitting signal EM, the data input terminal DataIn1 and the data input terminal DataIn2 is a low level signal (represented by voltage level VL). Correspondingly, as shown in Figure 3A, the switch unit U1, the switch unit U3, the switch unit U8, and the switch unit U10 are in the off state, and the switch unit U2, the switch units U4 to U7, and the switch unit U9 are in the on state.

It should be noted that the control signals S1~S3, the luminous signal EM, the high level signal or the low level signal of the data input terminal DataIn1 and the data input terminal DataIn2 are all relative voltage levels. To simplify the description, except Except for those specifically mentioned in the following description, they are represented by the high voltage level VH and the low voltage level VL respectively. However, it should be understood that the high level signals of the above-mentioned signals can be the same voltage level or For signals with different voltage levels, similarly, the low-level signals of each of the above-mentioned signals can be the same voltage level or different voltage level signals, as long as the voltage level is set to be relatively high or relatively low The voltage level is sufficient, and this disclosure is not limited to this.

In this case, there are three current paths in the pixel driving circuit 100. One of the paths flows from the first end of the switch unit U6 coupled to the high-level control signal S3 to the node B, so that the voltage level of the node B is lower than the control signal S3 at the high-voltage level VH by a threshold voltage. , Vth), this threshold voltage is the threshold voltage of the switch unit U6 (hereinafter will be represented by Vth_U6, this symbol is not marked in the figure), and the voltage level of node B at this time can be represented as VH-Vth_U6. The other path flows from the second end of the switch unit U5 coupled to the high-level control signal S3 to the node A, so that the voltage level of the node A is lower than the control end of the switch unit U5 by a threshold voltage, and this threshold voltage is the switch unit The threshold voltage of U5 (hereinafter will be represented by Vth_U5, this symbol is not marked in the figure), and the voltage level of node A at this time can be represented as VH-Vth_U6-Vth_U5. Yet another path flows from the node C to the second operating voltage source VSS via the switch unit U9, so that the voltage level of the node C is pulled to be equal to the second operating voltage source VSS.

FIG. 3B is a circuit state diagram of the pixel driving circuit 100 in FIG. 1 in the second period P2 shown in FIG. 2, and the second period P2 belongs to the compensation phase. As shown in Figure 2, in the second period P2, the control signal S1 and the control signal S2 are high-level signals, and the control signal S3, the light-emitting signal EM, the data input terminal DataIn1 and the data input terminal DataIn2 are low-level signals. Correspondingly, as shown in Figure 3B, the switch unit U1, the switch unit U5, the switch unit U9, and the switch unit U10 are in the off state, and the switch units U2 to U4, the switch unit U6, the switch unit U7, and the switch unit U8 are in the on state.

In this case, one of the current paths in the pixel drive circuit 100 flows from the switch unit U4 to the second operating voltage source VSS via the node A, the switch unit U3, and the switch unit U2, so that the control terminal (node A) of the switch unit U2 is The voltage stops when the voltage level of the previous stage drops to a threshold voltage higher than the second operating voltage source VSS. The threshold voltage at this time is the threshold voltage of the switch unit U2, so the voltage level of node A can be expressed as VSS+Vth_U2. The other current path flows from the second end of the switch unit U6 to the first end, so that the voltage level of the node B is pulled to the same as the control voltage S3 (for example, the voltage level VL). Another current path is from the data voltage Vdata flowing through the switch unit U8 and the switch unit U7 to the node C, so that the voltage level of the node C is pulled up to a threshold voltage lower than the data voltage Vdata. This threshold voltage is the threshold voltage of the switch unit U7. The threshold voltage (hereinafter will be represented by Vth_U7, this symbol is not marked in the figure), so the voltage level of the node C can be represented as Vdata-Vth_U7.

FIG. 3C is a circuit state diagram of the pixel driving circuit 100 in FIG. 1 in the third period P3 shown in FIG. 2, and the third period P3 belongs to the data input stage. As shown in Figure 2, in the third period P3, the control signal S2 and the data input terminal DataIn1 are high level signals, and the control signal S1, the control signal S3, the light emitting signal EM and the data input terminal DataIn2 are low level signals. Correspondingly, as shown in Figure 3C, the switch unit U1, the switch unit U3, the switch unit U5, the switch unit U8, the switch unit U9, and the switch unit U10 are in the off state, and the switch unit U1 The switch unit U2, the switch unit U4, the switch unit U6, and the switch unit U7 are in a conducting state.

In this case, the current path on the switch unit U6 is maintained from the node B to the control voltage S3, so the voltage level of the node B remains the same as the previous stage (for example, the voltage level VL). The voltage level of the node C also remains the same as the previous stage (for example, Vdata-Vth_U7). Node A is floating and is located between capacitor C1 and capacitor C2. Therefore, when the voltage level of the second terminal of capacitor C2 changes, its variation will be coupled to node A, so that the voltage level of node A is equal to capacitor C1 and The voltage division result of capacitor C2. In this embodiment, the data input terminal DataIn1 changes from a low voltage level VL to a high voltage level VH, and is coupled to the second end of the switch unit U4 through the capacitor C2, and the switch unit U4 is turned on, so the value of node A can be obtained The potential changes from VSS+Vth_U2 in the previous stage to VSS+Vth_U2+[C2/(C1+C2)]*(VH-VL).

3D and 3E are circuit state diagrams of the pixel driving circuit 100 in FIG. 1 in the fourth period P4 shown in FIG. 2, and the fourth period P4 belongs to the light-emitting phase. In some embodiments, the light-emitting signal EM and the data input terminal DataIn1 are high level signals, the control signal S1, the control signal S2, the control signal S3, and the data input terminal DataIn2 are low level signals. Correspondingly, as shown in Figure 3D, the switch unit U3, the switch unit U4, the switch unit U5, the switch unit U8, and the switch unit U9 are in the off state, and the switch unit U1, the switch unit U2, the switch unit U7, and the switch unit U10 are on. status. In this case, the pixel driving circuit 100 includes a current path from the first operating voltage source VDD to the second operating voltage source VSS via the light emitting unit L1, the switch unit U1, and the switch unit U2 in sequence, so that the light emitting unit L1 can emit light.

將 二者抵銷可以得出：

At this time, since the current flowing through the light-emitting unit L1 is equal to the current flowing through the switch unit U2, if the threshold voltage of the switch unit U2 is represented by Vth_U2, and the current flowing through the switch unit U2 is represented by I, then according to the current flowing through the switch unit The current formula of U2 is:

Offset the two to get:

Because the threshold voltage of the transistor itself will be in an unstable state, and the impedance of the entire current path makes the voltage value of the second operating voltage source VSS received by different pixels on the panel different. The current control will be affected. Based on the above embodiment, the second operating voltage source VSS and the threshold voltage Vth can be successfully compensated, so that the current calculation of the light-emitting unit L1 is independent of the second operating voltage source VSS and the threshold voltage Vth, that is, it is not affected by the second operating voltage source VSS and the threshold voltage. The voltage Vth changes. In addition, by increasing the voltage across the control terminal and the second terminal of the switch unit U1, the voltage across the first terminal and the second terminal of the switch unit U1 can be reduced, thereby reducing the power consumption during light emission.

In some embodiments, the voltage signal of the data input terminal DataIn2 can be used to set node B through the switch unit U10 The voltage level. In some embodiments, the data input terminal DataIn2 can be slowly raised from a low-level signal (such as the voltage level VL) to a high-level signal (such as the voltage level VH) in the fourth period P4. In detail, as shown in FIG. 3D, since the switch unit U10 is turned on, the voltage level of the node C changes from Vdata-Vth_U7 in the previous stage to the voltage level of the data input terminal DataIn2. In addition, the voltage level change of the node C can be coupled to the node B through the capacitor C3, so that the voltage level of the node B changes from VL in the previous stage to DataIn2-Vdata+Vth_U7+VL.

In some embodiments, when the voltage difference between the control terminal and the second terminal of the switch unit U5 is higher than its threshold voltage, the switch unit U5 will be turned on. In other words, when the voltage level of node B DataIn2-Vdata+Vth_U7+VL and the voltage level of the control signal S3 (such as the low voltage level VL) are greater than the threshold voltage Vth_U5 of the switch unit U5, the switch unit U5 will Turn on. It can be inferred from the above that under the assumption that each switch unit U5 has the same threshold voltage, since Vth_U5 and Vth_U7 are equal, when the voltage level of the data input terminal DataIn2 is higher than the voltage level of the data voltage Vdata, as shown in Figure 3E It shows that the switch unit U5 will be turned on, the current will flow from the node A to the second end of the switch unit U5, and the voltage level of the node A drops to the same voltage level as the control voltage S3 (for example, the low voltage level VL), The switch unit U2 is turned off, and the current no longer flows through the light-emitting unit L1 to turn it off accordingly.

In some embodiments, through the above-mentioned coordinated arrangement of the pixel driving circuit 100 and the control signal timing, the light-emitting time of the light-emitting unit L1 can be controlled by adjusting the size of the data voltage Vdata. In other words, when the voltage level of the data voltage Vdata is lower, the switch unit U5 switches from the off state shown in Fig. 3D to the on state shown in Fig. 3E, so that the light-emitting time of the light-emitting unit L1 is longer. short. Conversely, when the voltage level of the data voltage Vdata is higher, the light-emitting time of the light-emitting unit L1 is longer.

Based on the above, it can be seen that with the circuit structure design of the pixel driving circuit 100, the voltage compensation method can be used to prevent the current of the light-emitting unit L1 from being affected by the variation of the second operating voltage source VSS and the threshold voltage Vth, while improving the second operation. The voltage level of the voltage source VSS reduces the potential difference between the first operating voltage source VDD and the second operating voltage source VSS, thereby reducing power consumption.

Please refer to Figure 4. Figure 4 is a simulation diagram of the power consumption of the pixel drive circuit in Figure 1. As shown in FIG. 4, the power consumption of the conventional circuit structure without using the pixel drive circuit provided by the present disclosure is represented by a dotted grid. In contrast, the power consumption of the pixel drive circuit 100 provided by the present disclosure is used. Consumption, expressed as a cross-star grid. It can be seen from FIG. 4 that in different gray scales (represented by eight different current values ranging from 0.05 to 1.7 milliamps (mA)), the pixel driving circuit 100 provided in the present disclosure requires only low power consumption.

Please refer to Figure 5. Fig. 5 is a simulation diagram of the improvement rate of power consumption of the pixel driving circuit in Fig. 1. As shown in Figure 5, compared to Xi It is known that the power consumption of the circuit structure is improved by more than 7% in different gray scales by using the pixel driving circuit 100 provided in the present disclosure.

In summary, the pixel driving circuit provided by the present disclosure can compensate for the threshold voltage and the operating voltage, and reduce the correlation between the current of the light-emitting diode and the threshold voltage and the operating voltage. In addition, the present disclosure reduces the driving voltage difference required by the pixel circuit, thereby reducing power consumption. Furthermore, the present disclosure uses Pulse Width Modulation (PWM) to adjust the input data voltage to control the light-emitting time of the light-emitting diode.

Although this case has been disclosed in the above implementation mode, it is not limited to this case. Anyone who is familiar with this technique can make various changes and modifications without departing from the spirit and scope of this case. Therefore, the scope of protection of this case should be attached hereafter. Those defined in the scope of the patent application shall prevail.

100: Pixel drive circuit

110: control circuit

A~C: Node

L1: Light-emitting unit

U1~U10: switch unit

C1~C3: Capacitance

S1~S3: control signal

EM: Luminous signal

VDD: the first operating voltage source

VSS: second operating voltage source

DataIn1, DataIn2: data input terminal

Vdata: data voltage

VH, VL: voltage level

In order to make the above and other objectives, features, advantages and embodiments of the present disclosure more obvious and understandable, the description of the accompanying drawings is as follows: FIG. 1 is a circuit structure diagram of a pixel driving circuit according to an embodiment of the disclosure. Figure 2 is a timing diagram of the control signal of the pixel drive circuit in Figure 1. FIG. 3A is a circuit state diagram of the pixel driving circuit in FIG. 1 in the first period shown in FIG. 2. FIG. FIG. 3B is a circuit state diagram of the pixel driving circuit in FIG. 1 in the second period shown in FIG. 2. FIG. FIG. 3C is a circuit state diagram of the pixel driving circuit in FIG. 1 in the third period shown in FIG. 2. FIG. 3D and 3E are circuit state diagrams of the pixel driving circuit in FIG. 1 in the fourth period shown in FIG. 2. Figure 4 is a simulation diagram of the power consumption of the pixel drive circuit in Figure 1. Fig. 5 is a simulation diagram of the improvement rate of power consumption of the pixel driving circuit in Fig. 1.

Domestic deposit information (please note in the order of deposit institution, date and number) no Foreign hosting information (please note in the order of hosting country, institution, date, and number) no

100: Pixel drive circuit

110: control circuit

A~C: Node

L1: Light-emitting unit

U1~U10: switch unit

C1~C3: Capacitance

S1~S3: control signal

EM: Luminous signal

VDD: the first operating voltage source

VSS: second operating voltage source

DataIn1, DataIn2: data input terminal

Vdata: data voltage

Claims (10)

A pixel driving circuit, comprising: a light-emitting unit; a first switch unit; a second switch unit, the light-emitting unit, the first switch unit, and the second switch unit are connected in series and connected to a first operating voltage source And a second operating voltage source; a third switch unit connected between a first end and a control end of the second switch unit; a fourth switch unit having a first end, the fourth The first end of the switch unit is connected to the control end of the second switch unit; a fifth switch unit has a first end, and the first end of the fifth switch unit is connected to the control end of the second switch unit ; A sixth switch unit having a first end, the first end of the sixth switch unit is connected to a control end of the fifth switch unit; a first capacitor, connected to the second operating voltage source and the first Between the control terminals of the two switch units; a second capacitor connected between a first data input terminal and a second terminal of the fourth switch unit; and a control circuit connected to the second terminal via a third capacitor The control terminal of the fifth switch unit, and the control circuit is used to set a voltage level of the control terminal of the fifth switch unit. The pixel driving circuit described in claim 1, wherein: The first switch unit has a control terminal, and the control terminal of the first switch unit is connected to a light-emitting signal; the third switch unit has a control terminal, and the control terminal of the third switch unit is connected to a first control signal; The fourth switch unit has a control end, and the control end of the fourth switch unit is connected to a second control signal; the fifth switch unit has a second end, and the second end of the fifth switch unit is connected to a second control signal. Three control signals; and the sixth switch unit has a second end and a control end, the second end of the sixth switch unit is connected to the third control signal, and the control end of the sixth switch unit is connected to the second Control signal. The pixel driving circuit according to claim 1, wherein the control circuit includes: a seventh switch unit having a first terminal, a second terminal and a control terminal, and the first terminal of the seventh switch unit is connected The third capacitor; an eighth switch unit having a first end, a second end and a control end, the first end of the eighth switch unit is connected to the control end of the seventh switch unit and the second Terminal, the second terminal of the eighth switch unit is connected to a data voltage, the control terminal of the eighth switch unit is connected to a first control signal; and a ninth switch unit has a first terminal and a second terminal And a control terminal, the first terminal of the ninth switch unit is connected to the control terminal of the fifth switch unit via the third capacitor, and the second terminal of the ninth switch unit is connected to the first terminal Two operating voltage sources, the control terminal of the ninth switch unit is connected to a third control signal. The pixel driving circuit according to claim 3, wherein the control circuit further comprises: a tenth switch unit having a first terminal, a second terminal and a control terminal, the first terminal of the tenth switch unit The control terminal of the fifth switch unit is connected via the third capacitor, the second terminal of the tenth switch unit is connected to a second data input terminal, and the control terminal of the tenth switch unit is connected to a light-emitting signal. The pixel driving circuit according to claim 4, wherein the data voltage is used to determine a length of time when the light-emitting unit is turned on. The pixel driving circuit according to claim 4, wherein the pixel driving circuit is used to operate in a reset phase, wherein in the reset phase: the control terminal of the second switch unit passes through the fifth switch unit Receiving the third control signal; the control terminal of the fifth switch unit receives the third control signal through the sixth switch unit; and the voltage level of the first terminal of the ninth switch unit and the second operating voltage The sources are equal, and the third control signal is a high level signal. The pixel driving circuit according to claim 4, wherein the pixel driving circuit is used to operate in a compensation phase, wherein in the compensation phase: the control terminal of the second switch unit passes through the third switch unit and the The second switch unit flows current to the second operating voltage source; the control terminal of the fifth switch unit receives the third control signal through the sixth switch unit; and the first terminal of the ninth switch unit transmits through the second The seventh switch unit and the eighth switch unit receive the data voltage, wherein the third control signal is a low level signal. The pixel driving circuit according to claim 4, wherein the pixel driving circuit is used to operate in a data input stage, wherein in the data input stage: the voltage level of the control terminal of the second switch unit is the first The voltage change value of a data input terminal is divided by the second capacitor and the control terminal of the second switch unit flows current to the second operating voltage source to the voltage value before the second switch unit is turned off; and The control end of the five switch unit receives the third control signal through the sixth switch unit, wherein the third control signal is a low level signal. The pixel driving circuit according to claim 4, wherein the picture The pixel driving circuit is used to operate in a light-emitting stage, wherein in the light-emitting stage: the voltage level of the control terminal of the fifth switch unit is controlled by adjusting the voltage difference between the voltage of the second data input terminal and the data voltage And the first terminal of the ninth switch unit receives the voltage of the second data input terminal through the tenth switch unit, wherein the third control signal is a low level signal. The pixel driving circuit according to claim 9, wherein when the voltage level of the second data input terminal is greater than the voltage level of the data voltage, the second switch unit is turned off.

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